JP2590835B2 - Code modulation method - Google Patents

Description

The present invention relates to a code modulation method applied to record a time code as a groove when a wobbled groove for tracking servo is formed on an optical disc, for example. About.

[Summary of the Invention] In the present invention, in a modulation method for performing modulation by allocating 2n modulation bits to each bit of original data, the bit “0” of the original data has 2n modulation bits of “1”, “0” The original data bit "1" is obtained by inverting the polarity of predetermined two consecutive modulation bits excluding both ends with respect to this n-times repeated pattern, so that the carrier wave has a stable phase. The components can be removed.

[Conventional technology]

When modulating original data with a low bit rate, PSK (Pha
se Shift Keying) modulation is known. PSK modulation is
12 A sine wave signal having a phase different by 180 ° is assigned corresponding to the binary original data “1” and “0” shown in FIG.
2 The modulated signal shown in FIG. This PSK modulation is currently frequently used in fields such as telephone communication. As is clear from FIG. 12B, the phase of the carrier component of the PSK-modulated signal changes according to the original data, and the phase does not become continuous.

[Problems to be solved by the invention]

For example, in an optical disc, a wobbling pre-groove (guide groove) is formed by a sine wave signal of a predetermined frequency, for example, 22.05 (kHz), for tracking servo, and a frequency component corresponding to the pre-groove included in the reproduction signal. Is separated and synchronous detection is performed to obtain a tracking error signal.When data that changes at a low frequency is recorded as the pre-groove, the above-described wobbling frequency component is preserved, and the wobbling frequency component is maintained at a stable phase. Is required to be able to regenerate the components.
However, if the conventional PSK modulation is used, the phase of the signal after modulation becomes discontinuous, so that it cannot be applied to the case where data is recorded as a pre-groove as described above.

SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a code modulation method capable of preserving a frequency component of a carrier and reproducing the carrier with a stable phase.

[Means for solving the problem]

According to the present invention, in a modulation method for performing modulation by allocating 2n modulation bits to each bit of original data in which a plurality of bits of information are repeated at a predetermined frequency, when the bits of the original data are “0”, the 2n modulation bits Is the n of “1” and “0”
And the original data bit is “1”
In the case of, the repetition pattern of "1" and "0"
The polarity of two predetermined consecutive modulation bits excluding both ends is inverted.

[Action]

For each bit of the original data, 2n modulation bits, for example (2
× 12) Modulation bits are assigned. When the data bit is “0”, the 2n modulation bit is set to a repeating pattern of “1” and “0” n times, and when the data bit is “1”, the pattern is “1”,
The polarity of the two modulation bits is inverted with respect to the repetition pattern of “0”. Therefore, regardless of whether the data bit is “1” or “0”, the basic pattern is a repetition pattern of “1” and “0” n times. This repetitive pattern is stored as a carrier component. Therefore, by matching the frequency of the carrier component of the modulated signal with the wobbling frequency, it is possible to record the time code data as a pre-groove of the optical disk.

〔Example〕

Hereinafter, an embodiment of the present invention will be described. The present invention is made according to the following order.

a. Time code and modulation rule b. Modulation circuit c. Pregroove formation d. Wobbling signal generation circuit e. Disc recording / reproduction circuit f. Modification a. Time code and modulation rule In this embodiment, When a pre-groove (guide groove) is formed on an optical disc by wobbling (oscillating) and tracking is performed using the pre-groove, a time code is recorded on the pre-groove itself. As this time information, an absolute time code adopted for a CD (compact disc) is used. This absolute time code has a one-to-one correspondence with the scanning position of the head (pickup) of the optical disk, and gives information on the disk diameter when the optical disk is rotated in a CLV (constant linear velocity) system.
Also, address information at the time of data access is given.

A signal is recorded on a CD with 588 bits of channel bits as one frame, and the frame frequency at a predetermined linear velocity is 7.35 [kHz]. In the CD, a space (user's bit or subcode) in which information other than the music signal can be recorded is prepared. The subcode consists of eight independent bits (referred to as PQRSTUVW), and currently two channels, P and Q, are used. 1
The eight independent bits described above are EFM-modulated and inserted into the frame. Each channel of the subcode is configured with 98 bits included in 98 frames as one block.

Absolute time codes called "AMIN", "ASEC", and "AFRAME" are inserted in the music signal and the data of the channel Q in the lead-out track. The absolute time code is set to “00:00:00” at the start of the program area, and changes according to the running time of the disc. From the above-mentioned frame frequency, the CD is set to (1 second = 75 frames). Each of the minute, second, and frame of the absolute time code is represented by two digits of the BCD code. That is, the minutes and seconds change between (00-59), the frames change between (00-74), and a total of six characters of the BCD code are used.

EFM (Eight to Four) as channel coding
Teen Modulation) converts a signal of 8 bits per symbol into 14 bits according to a predetermined rule. The EFM reduces the occupied frequency band, increases the clock component, and reduces the DC component.

On the other hand, in the tracking method for wobbling the pre-groove, a sine wave of 22.05 [kHz] is used. Therefore, when recording an absolute time code in a CD format as a wobbled pre-groove, it is necessary to reproduce a sine wave signal of the above-mentioned frequency with a stable phase. In this embodiment, the absolute time code is modulated based on a sampling frequency of (22.05 × 2 = 44.1 [kHz]).

Since the frequency of the change of the absolute time code is 75 [Hz], in the case of the sampling frequency of 44.1 [kHz], 588 samples are included in one cycle. A predetermined number, for example, 24 samples (2 × 12 modulation bits) is allocated to one bit of data of the absolute time code of 6 BCD characters (24 bits in total) of 4 bits each. As shown in FIG. 4A, a preamble having a length of 12 samples is added to the head of 588 samples (= 1/75 (second)), and thereafter, (24 × 24 = 576)
Sample data follows.

Each of "0", "1", and the preamble of one data bit is modulated as shown in FIG. 4B. The data bit “0” is modulated into a series (“0” series) in which 24 samples alternate between a high level and a low level alternately. The data bit “1” is such that the twelfth sample of the 24 samples is changed from the low level to the high level, the thirteenth sample is changed from the high level to the low level, and the other samples are the same as the data bit “0”. (“1” sequence). The preamble has a pattern in which a high level and a low level are alternately repeated every three samples. The data bit “0” is modulated into a DC-free sequence. This sequence has a repetition frequency of 21.05 [kHz] and includes a sine wave component for tracking control. The "1" series corresponding to the data bit "1" is also DC-free,
Run length is limited to 2 samples. The “0” sequence corresponding to the data bit “0” is more preferable than the “1” sequence in terms of a sine wave component for tracking control.
In the absolute time code, the continuous length of “0” is longer than that of “1”, so the “0” sequence is more preferable than the “1” sequence. The sequence corresponding to the preamble is also DC-free and occurs once every (1/75) second.

A method of actually generating the “1” sequence and the preamble sequence will be described with reference to FIG. As shown in FIG. 5A, the 24 samples of the “1” series correspond to the
It is formed by adding a ternary signal that becomes (+1) in the twelfth sample and (-1) in the thirteenth sample. As shown in FIG. 5B, the sequence of 12 samples corresponding to the preamble corresponds to the 8th and 8th sequences with respect to the “0” sequence.
The signal is formed by adding signals (+1) at the 14th sample and (-1) at the 11th and 17th samples, respectively.

b. Modulation Circuit As described above, FIG. 1 shows an example of a modulation circuit that modulates each of data bits “0” or “1” into a sequence of 24 samples in a predetermined pattern.

In FIG. 1, reference numeral 1 denotes an input terminal to which a frame pulse A having a frame frequency (75 Hz) is supplied, and 2 denotes 44.1 [kHz].
z] is an input terminal to which a clock pulse B having a frequency of [z] is supplied. The period of the clock pulse B is represented by T. FIG. 3A
And FIG. 3B shows a frame pulse A and a clock pulse B.
Are shown respectively. The clock pulse B is used as a clock input for the T flip-flop 3 and the decimal counter 4. From the T flip-flop 3 to the "0" series C having a period 2T shown in FIG.
Occurs. The frame pulse A is supplied to the T flip-flop 3 and the 12-bit counter 4 as a clear input.

The frame pulse A is supplied as the set input of the SP flip-flop 5, and the carry output of the decimal counter 4 is supplied as the reset input. Therefore, as shown in FIG. 3D, the output terminal of the SR flip-flop 5
A pulse signal D which becomes low level in a period of 12T from the frame pulse A is obtained. This pulse signal D is supplied to the AND gate 6 and the edge detection circuit 7. The clock pulse B is supplied to the AND gate 6, and the clock pulse passed through the AND gate 6 is supplied to the 24-decimal counter 8. twenty four
The 24-ary counter 8 is cleared by the carry output E of the binary counter 8, and the carry output E is supplied to the adding circuit 9.

As shown in FIG. 3E, the carry output E of the 24-decimal counter 8 is generated every 24T after the pulse signal D becomes high level. Further, the pulse signal D is output from the edge detection circuit 7.
Is generated, and this pulse signal is supplied to the adding circuit 9. Accordingly, the pulse signal I from the adding circuit 9 is, as shown in FIG.
It occurs every 24T after the 12T period of the preamble.

The parallel output of the 24-decimal counter 8 is supplied to the decoder 10. The output signal of the decoder 10 generated when the content of the 24-decimal counter 8 becomes 12 is supplied to the (1) generating circuit 11, and the output signal of the decoder 10 generated when the content of the 24-decimal counter 8 becomes 13 is (-). 1) It is supplied to the generation circuit 12. Therefore,
(1) The pulse signal F of 1 level is generated from the generation circuit 11 as shown in FIG. 3F, and (-1) the pulse signal F of (-1) level is generated from the generation circuit 12 as shown in FIG. A pulse signal G is generated. These pulse signals F and G are added by the adder 13, and the output signal of the adder 13 is supplied to the adder 14. Since the “0” sequence C from the T flip-flop 3 is supplied to the adder circuit 14, the output signal of the adder circuit 14 becomes a “1” sequence.

These “0” series and “1” series are supplied to two input terminals of the switch circuit 15, respectively. The switching circuit 15 is controlled by a switching signal K from a switching signal generating circuit 18, and data from the switching circuit 15 is supplied to a combining circuit 20. The synthesis circuit 20 adds a preamble of 12 samples for every 588 samples. The preamble is formed by the ternary logic signal generating circuit 16 to which the frame pulse A is supplied and the adding circuit 17. The ternary logic signal generating circuit 16 synchronizes with the frame pulse A as shown in FIG.
00-100 100-10) is generated. The pulse signal H and the “0” series C are supplied to the adding circuit 17, and the preamble is obtained from the adding circuit 17. Synthesis circuit
At the output terminal 21 of 20, a modulated sequence is obtained.

19 is an absolute time counter for generating an absolute time code in CD format based on the frame pulse A. FIG. 2 shows the configuration of the absolute time counter 19, which includes frames,
Each second and minute consists of two BCDs. Figure 2 shows “28 minutes 3
4 seconds and 63 frames ". In this case,
"(0010) (1000) (0011) (0100) (0110) (001
1) 6 characters of BCD occur. Switching circuit for switching absolute time code from absolute time counter 19
Supplied to 18. The switching signal generating circuit 18 fetches each data bit of the absolute time code in synchronization with the pulse signal I as shown in FIG.
, A switching signal K (FIG. 3K) having a low level and a data bit of "1" and a high level is formed. Switching signal K
Is low level, the "0" series is selected by the switch circuit 15, and when the switching signal K is high level, the "1" series is selected by the switch circuit 15.

c. Formation of pre-groove FIG. 6 shows a cutting system for forming a pre-groove on an optical disc. In FIG. 6, reference numeral 25 denotes a glass disk, on which a photoresist 26 is applied. The glass disk 25 is a spindle motor 27
Rotated by CLV. Reference numeral 28 denotes a recording laser, for example, an argon ion laser. Galvano mirror 30 of optical head 29 surrounded by a dashed line with a laser beam from recording laser 28
And irradiates the photoresist 26 via the objective lens 31. When the galvanometer mirror 30 is rotated by the galvanometer motor 32, the laser beam is wobbled in the radial direction.

The galvano motor 32 is supplied with a drive signal from a mirror driver 33. The wobbling signal is supplied from the wobbling signal generation circuit 34 to the mirror driver 33. The wobbling signal generation circuit 34 includes the above-described modulation circuit and a band limiting filter. The photoresist 26 is exposed to a spiral and wobbled pregroove by a laser beam.

FIG. 7 shows a glass master optically cut, and a concave portion corresponding to a pregroove is formed in the photoresist 26 as shown by the symbol "" when developed. Next, aluminum 35 is deposited on the photoresist 26 (). Further, nickel plating 36 is applied (), and the nickel master 36 is peeled off to produce a metal master (). A stamper is made from this metal master, and the optical disc 41 is manufactured through the steps of injection molding, recording layer formation and protection film addition by the stamper (). The optical disc 41 has a polycarbonate substrate 37, a recording layer 38, and a transparent protective film 39. The recording layer 38 has a pregroove 40 formed thereon. The optical disc 41 has a bonding structure as required, and double-sided recording is possible.

In the case of a write-once (WORM) optical disc, the recording layer 38
In the case of an erasable optical disc, for example, a magneto-optical disc, it is made of a material such as TbFeCo. In addition, the present invention can be applied to a phase change type optical disk utilizing a crystal-amorphous phase change. The pre-groove 40 is a U-groove or a V-groove.
Pits are formed in the upper region or in the region between the pregrooves. FIG. 8 shows a pre-groove formed on the optical disc 41.
Shows part of 40. The diameter of the optical disc 41 is the same as that of the CD.

d. Wobbling signal generation circuit FIG. 9 shows a wobbling signal generation circuit.
This is the modulation circuit shown in FIG. The modulation circuit 45 generates a pulse train modulated by an absolute time code in CD format. This pulse train basically has a repetition frequency of 22.05 [kHz], and the band is limited by passing the pulse train through a filter. Band limitation toward the low band is necessary to suppress interference with the tracking error signal, and band limitation toward the high band is EF
This is necessary to suppress interference with the M-modulated signal (reproduced data).

Digital high-pass filter connected to modulation circuit 45
Reference numeral 46 is provided to limit the band on the low frequency side, and has a frequency characteristic indicated by 50 in FIG. In FIG. 10, fn represents 22.05 [kHz] and fs represents 44.1 [kHz].

The output signal of the digital high-pass filter 46 is supplied to the digital low-pass filter 47. The digital low-pass filter 47 has a frequency characteristic indicated by 51 in FIG. As the digital low-pass filter 47, a configuration using oversampling is used.
The output signal of the digital low-pass filter 47 is the D / A converter 4
Supplied to 8. The D / A converter 48 converts the high level and the low level of the pulse signal into DC voltages having appropriate values, respectively. The output signal of the D / A converter 48 is supplied to an analog low-pass filter 49. The analog low-pass filter 49 generates a wobbling signal. This wobbling signal is supplied to the mirror driver 33 (see FIG. 6).

e. Disk recording / reproducing circuit FIG. 11 shows an example of a disk recording / reproducing circuit. An optical disk 41 having the same size as a CD is rotated by a spindle motor 55 with a CLV. As the optical head, those having various structures are known. In this example, an optical head in which both a focus adjustment unit and a tracking control unit are incorporated is used.

The optical head includes a semiconductor laser 56, a collimating lens 57, a beam splitter 58, a quarter-wave plate 59, an objective lens 60, an actuator 61 including a coil and a magnet for moving the objective lens 60, and a laser beam from the beam splitter 58 being a cylindrical lens. It comprises an optical sensor 63 provided via 62. A drive signal is supplied to the semiconductor laser 56 via a recording / reproduction switch 64.

The recording data from the terminal 65 is supplied to the recording circuit 66, and the recording signal from the recording circuit 66 is switched to a recording / reproduction switch.
It is supplied to the semiconductor laser 56 through the recording side terminal r of 64. The recording circuit 66 includes a circuit for adding a redundant code of an error correction code, an EFM modulation circuit, a recording timing control circuit, and the like. During reproduction of the optical disk 41, a predetermined DC voltage 67 is supplied to the semiconductor laser 56 via the reproduction side terminal p of the recording / reproduction switch 64.

The return beam from the optical disk 41 is applied to the beam splitter 58
Then, the light is irradiated on the optical sensor 63 via the cylindrical lens 62.
The optical sensor 63 is configured as a four-part detector. Assuming that output signals of the respective sensors of the optical sensor 63 are A, B, C, and D, the adding circuit 68 calculates [(A + B) + (C + D)].
Is formed, and a subtraction circuit 69 forms a focus error signal represented by [(A + B)-(C + D)]. This focus error signal is supplied to the focus servo circuit 70, and the actuator 61
Is supplied with a control signal for focus servo.

The main reproduced signal from the adding circuit 68 is supplied to the waveform shaping circuit 71.
And supplied to the bandpass filter 72. Waveform shaping circuit
At 71, the reproduced signal is converted into a pulse signal, and this pulse signal is supplied to the EFM demodulation circuit 73. EFM demodulation circuit 73
Is supplied to the data processing circuit 74. The reproduction data obtained from the data processing circuit 74 is supplied to an optical disk control circuit provided between the optical disk drive and the computer.

The bandpass filter 72 is (22.05 [kHz] ± 900 [H
z], the components of the reproduction signal corresponding to the pregroove are separated by the bandpass filter 72, and the output signal of the bandpass filter 72 is supplied to the synchronous detection circuit 75 and the waveform shaping circuit 79. The terminal 76 is connected to the synchronous detection circuit 75.
Supplies a sine wave signal of 22.05 [kHz]. The output signal of the synchronous detection circuit 75 is supplied to a low-pass filter 77, and a tracking error signal is extracted from the low-pass filter 77. This tracking error signal is supplied to the tracking servo circuit 78, and a tracking control signal is given from the tracking servo circuit 78 to the actuator 61.

By the waveform shaping circuit 79, a pulse train modulated by the absolute time code in the CD format is obtained. This pulse train is supplied to the demodulation circuit 80, which demodulates the pulse train into data bits of an absolute time code. The absolute time code obtained from the demodulation circuit 80 is supplied to a system roller (not shown) of the optical disk drive, and is used for CLV servo of the spindle motor 55, control of the scanning position of the optical head during a seek operation, and the like.

f. Modifications The present invention is not limited to the CD format time code, and can be applied to a case where other time codes such as SMPTE or digital data other than the time code is modulated and recorded.

According to the present invention, information such as a time code may be superimposed on a signal other than the pre-groove signal of the optical disc.

〔The invention's effect〕

According to the present invention, a predetermined frequency, for example, 21.05 [kHz]
Can be stored, other information such as a time code can be transmitted, and a code modulation method that can be reproduced with a stable phase can be realized.

[Brief description of the drawings]

FIG. 1 is a block diagram of a modulation circuit for modulating an absolute time code into a pulse train in one embodiment of the present invention.
The figure shows a block diagram of a counter that generates an absolute time code.
FIG. 3 is a time chart for explaining the operation of the modulation circuit,
4 and 5 are waveform diagrams used to explain the modulation rule and the modulation method, FIG. 6 is a schematic diagram showing the configuration of a cutting system, and FIGS. 7 and 8 are schematic diagrams showing an example of a method of manufacturing an optical disk. FIG. 9 is a block diagram of an example of a wobbling signal generation circuit, FIG. 10 is a frequency spectrum diagram used to explain band limitation in the wobbling signal generation circuit, and FIG. Record /
FIG. 12 is a block diagram showing an example of a reproducing circuit, and FIG. 12 is a waveform diagram used for explaining conventional PSK modulation. Explanation of main symbols in the drawings 1: input terminal of frame pulse, 2: input terminal of clock pulse, 4: 12-decimal counter, 8: 24-decimal counter, 15: switch circuit, 16: ternary logic signal generation circuit, 19 : Absolute time counter, 26: photoresist, 34: wobbling signal generation circuit, 40: pregroove, 41: optical disk, 46: digital high-pass filter, 47: digital low-pass filter, 7
2: bandpass filter, 75: synchronous detection circuit.

Claims (4)

(57) [Claims] In a modulation method for performing modulation by allocating 2n modulation bits to each bit of original data in which a plurality of bits of information are repeated at a predetermined frequency, when the bits of the original data are "0", 2n modulation bits are “1”, “0”
When the bit of the original data is "1", the polarity of a predetermined two consecutive modulation bits excluding both end portions with respect to the repetition pattern of "1" and "0". A code modulation method characterized by inverting the following. 2. The code modulation method according to claim 1, wherein said original data is a BCD code. 3. The code modulation method according to claim 1, wherein a value obtained by dividing a bit frequency of the modulation bit by the predetermined frequency is not an integral multiple of the plurality of bits. Is assigned to the preamble code the number of modulation bits obtained by subtracting the value obtained by multiplying 2n from the divisor,
A code modulation method, wherein one preamble code is provided in each cycle of the predetermined frequency. 4. The code modulation method according to claim 3, wherein said preamble code has no DC component.