JP2558696B2 - Digital signal processor - Google Patents

Description

Description: TECHNICAL FIELD The present invention converts an analog signal into a digital signal,
The present invention relates to a digital signal processing device that performs signal processing and improves the accuracy of digital signals.

2. Description of the Related Art In recent years, digital signal processing has been widely used for image processing, and a device for A / D converting a signal from a solid-state image sensor to perform digital signal processing has been developed. The accuracy of is insufficient, which causes a problem.
A digital signal processing device of a digitized single-plate solid-state imaging device using a conventional A / D converter will be described below by replacing the analog imaging device with digital signal processing.

FIG. 4 shows a mosaic filter arranged on the light receiving element of the solid-state image pickup element, and one color filter is placed on each light receiving element. The color arrangement of the filters in FIG. 4 will be described. Transparent (W) and green (G) filters are arranged on the n-th horizontal line of a certain field, and cyan (Cy) and 2 yellow (Ye) filters are arranged on the (n + 1) -th horizontal line. On the n'th horizontal line of the next field, green (G), transparent (W) filters are
Yellow (Ye) and cyan (Cy) filters are arranged on the (n ′ + 1) th horizontal line.

FIG. 5 shows a specific example of a color video camera using the solid-state image pickup device having the mosaic filter shown in FIG. 4, and 1 is a pulse for driving an electric signal photoelectrically converted for each pixel in the solid-state image pickup device. To read sequentially. 2 is A / which converts the output signal of the solid-state image sensor 1 into a digital signal
D converter. 3 is 1 horizontal scanning period delay (1 HDL)
Then, a signal for delaying the original signal for one horizontal scanning period and the original signal are input to the synchronization circuit of 4. It is decomposed into four color components W, G, Ye, and Cy by four synchronization circuits. Reference numeral 5 is a matrix and a circuit for adjusting the gain, which is obtained by forming a matrix from W, G, Ye, Cy to red (R), green (G), and blue (B), and the gain is adjusted so as to obtain a white balance. Output signal R ₀ , G ₀ , B ₀
Get. The matrix formula is Becomes

Reference numeral 6 denotes a γ-correction circuit for the three primary color input signals P ₀ , G ₀ , B ₀ , Get the output of

7 is a matrix circuit, which is a luminance signal And color difference signal To obtain the signal encoded by the encoder of 8 and 9
D / A converts the digital signal into an analog signal,
Use standard television signal. Generally, in the case of digitizing a signal having a frequency band of a video signal and processing the signal, parallel processing is performed. The A / D converter is a fully parallel type. Therefore, 256 comparators are required for 8-bit A / D, and when it is 9 bits, it becomes 512, and when it is 10 bits, it becomes 1024. When the number of bits of 1 bit is increased, it is necessary to use an A / D having a small number of bits instead of requiring a double comparator. For example, now
If you use an 8-bit A / D converter and set the maximum value of the signal in the transparent (W) part to 8 bits, red (R) is about the amplitude of W.
At 3/7, the amplitude of blue (B) is about 1/7. Therefore, the number of red bits is 6.7 bits and the number of blue bits is 5.2 bits.
When this is γ-corrected, at least 1.5 bits are reduced.
The other red bits are 5.2 bits and the blue bits are 37 bits. Considering that the number of color bits is generally about 6 bits, the A / D converter requires 10 bits. This requires 1024 comparators, which is very expensive and consumes a lot of power.

Also, when the number of bits is small and the quantization step (1 LSB level) is large, false contours occur on the CRT and the image quality deteriorates significantly. The Disa method has been proposed as a means for improving this (J, O.Limb: Bell Syst.Tech.J., 48,7pp2
555-2582 (1986)). This method is shown in FIG. Sixth
In Fig. A, the ramp waveform whose level rises linearly is quantized (A / D converted) at the quantization level (1 LSB) shown in the figure. In the dither method, random pseudo noise Fig. 6b is added to this analog signal to obtain the analog signal of Fig. 6c. A / D conversion is performed on this added signal, and the output after A / D conversion is also separated by 1 LSB at the place where the signal is above and below a certain threshold due to pseudo noise. Therefore, the false contour seen in FIG. 6a is dispersed and hard to see, but since pseudo noise is added,
S / N ratio deteriorates. Further, the false contour is hard to see, but this is not because the edges corresponding to the false contour are dispersed by noise and the accuracy of the A / D converted signal is improved.

In addition, as a conventional digital signal processing device,
Some are shown in the figure. In the block diagram of FIG. 7, 10
Is an A / D converter, 11 is an offset generation circuit, 12 is an averaging circuit, and 13 is a timing generation circuit for controlling the timing of 10 to 12.

The operation of the signal processing apparatus of this conventional example configured as described above will be described below. FIG. 8 shows the voltage generated by the offset generating circuit 11. The voltage level is m / n (0 ≦ m <nm, n is an integer) LSB of the A / D converter.

Further, the cycle of generating the voltage is 1 / n times the cycle of the required digital signal data (n is an integer). n = 2, m
When = 1, the offsets are 0 and 1/2 LSB, and the respective offsets are added to perform A / D conversion on each data. By adding this offset voltage, when t is an odd number (t = 2n + 1), the input signal is directly input to the A / D converter 10, and when t is an even number (t = 2n), 1 / 2LSB
It is offset only and becomes the input of the A / D converter 10. Seventh
The signal levels of figure a are shown in figure 9a. When the input waveform is a solid line, there is no change when t = 2n + 1, and the level is a solid line when t = 2n. The signal b A / D converted in these two cases is shown in FIG. 9b. The solid line is for t = 2n + 1, and the broken line is for t = 2n. The waveform will change in steps at the LSB level determined by the accuracy of the A / D converter. The threshold level is changed by adding an offset voltage to the analog signal, as shown in FIG. 9b.
As shown in, the time when the output value of the A / D converter changes to the next higher level is different. Averaging circuit 12 for the above two signals
The output signal c is obtained by averaging. FIG. 9c
The waveform is shown in. By performing the above signal processing
The A / D converter can be encoded with double the precision of the encoding when it is encoded by itself, which is effective for a circuit that requires high precision.

As described above, it is possible to improve the accuracy of the A / D converter by offsetting a fixed signal to the analog input section of the A / D converter and averaging the digital signals after A / D conversion. .

In the above-mentioned conventional example, after A / D conversion, the averaging circuit 12 takes an average of n pieces, but when taking an average by the digital circuit, it becomes LPF and high frequency components are lost. In order to solve this problem, there is a configuration shown below. Figure 11a,
An averaging circuit consisting of an LPF and an HPF having the characteristics shown in b and a clipping circuit is configured to pass a signal. This block diagram is shown in FIG. Here, the clipping circuit clips the error signal generated by digitizing the analog signal to which the m / n level offset signal is added.
All the signals of 0. Input signal to averaging circuit is LPF
By passing through, the low-frequency precision is increased by log ₂ n bits, and by passing through the HPF and the clipping circuit,
The error contained in the high frequency component of the input signal is removed. By adding these two signals, the accuracy of the input signal of the averaging circuit is increased in the low frequency range, and the signal component in the high frequency range is not lost.

Problems to be Solved by the Invention However, in the configuration as described above, as the averaging circuit after A / D conversion, the LPF, HPF, and the clipping circuit are large in circuit scale, and the frequency characteristics such as the luminance signal are increased. For the purpose of passing the important signal of the high frequency component, the small signal level (of the changing component) of the high frequency component is clipped, and the characteristic is deteriorated. Had a problem. Also, without performing the HPF, LPF, and clip processing described above, the offset signal is added, and A / D
When the conversion is performed, there is a problem that it becomes a digital conversion error and the error interferes.

In view of such a point, the present invention reduces the circuit scale, secures high frequency components up to a low resolution level, and at the same time, provides a highly accurate digital signal without interference that causes a signal level error in the low frequency component. Aim to get a signal.

Means for Solving the Problems The present invention runs horizontally on an image that is two-dimensional information.
Image signal composed of a part or all of the scanning lines is defined as one field, and one image signal completed by one or more fields is defined as one frame. An A / D conversion circuit for converting a time-series image analog signal into a digital signal, and an LSB level m / n (0 ≦ m <n of the A / D conversion circuit for the analog signal.
m, n is an integer) circuit means for adding an offset signal of a level, the level of the offset signal is periodically changed, the phase of the offset signal from the phase of the sampling timing of the A / D conversion circuit H / for each scan line
k period, i / k period for each field, each frame
j / k period (0 ≦ i <k, 0 ≦ h <k, 0 ≦ j <kh, i, j, k
Is an integer, except when i, h, and j are all 0), and the phase is shifted so that low-frequency signal components are averaged in the process of signal processing.

Operation The present invention has the above-mentioned configuration and is capable of converting analog input signals into analog signals.
After adding the offset signal of the m / n level of the LSB of the D converter, A / D conversion is performed, and the phase of the offset signal to be added is also the phase of the analog input signal, scan line, field, and frame By shifting and averaging after A / D conversion, a digital signal with higher accuracy than the accuracy when using the A / D converter alone can be used without being disturbed by the signal level error caused by the offset signal. Further, it can be obtained without damaging the high frequency component of the frequency characteristic of the input signal.

Embodiment FIG. 1 is a block diagram of a digital signal processing device according to an embodiment of the present invention. 20 in FIG.
Is an A / D converter that converts an input analog signal into a digital signal, 21 is an offset signal generator that generates an m / n level offset signal, 22 is the phase of the offset analog signal, and the phase of the input analog signal , A phase delay circuit that shifts each field and each frame, and 23 is a timing generation circuit that performs A / D conversion control.

The operation when the digital signal processing apparatus of the present embodiment configured as described above is used for an image pickup apparatus will be described below. In the present embodiment, when it is desired to secure a high frequency component of the frequency characteristic as a digital signal like a luminance signal, an offset signal having a level of 1/2 of LSB is added as shown in the block diagram of FIG. After A / D conversion, averaging is not performed thereafter. By not performing this averaging process, the accuracy of the digital signal is not improved at all, but the false contour is dispersed by the wobble effect.

Generally, when the offset signal is added, the phase of the offset signal and the phase of the input analog pixel signal are often supplemented for each scanning line, as shown in FIG. As described above, when the averaging process is not performed, the conversion error appears in the digital signal obtained by A / D converting the analog signal added with the offset signal, and the error is compensated for each scanning line. , It will interfere with the vertical line. In the present example, the phase of the offset signal is shifted by the phase delay circuit 22 for each scanning line, each field, and each frame so that even if the above-mentioned digital conversion error occurs, it is not aligned on the screen.

The phase relationship of the offset signal in this embodiment will be described below. As shown in FIG. 2b, the frequency of the offset signal is (S + 1/2) times the repetition frequency of the scanning line (hereinafter referred to as the horizontal frequency) (S is an integer), and 1 of the sampling frequency sc of the A / D converter. Select 4 times. As a result, the phase of the offset signal shifts by one pixel (1 / 2π) with respect to the input analog pixel signal for each scanning line. As a result, the phase of the offset signal is
It shifts after 1 / 2π and shifts by 3 / 2π after each frame.

In particular, when an NTSC television signal is produced using an element with 404 horizontal pixels, the sampling frequency for A / D conversion is twice the frequency of the color subcarrier, and this color subcarrier A number obtained by dividing the number by ½ corresponds to the above relationship and can be used as an offset signal, so that the phase delay circuit can be omitted and the circuit configuration becomes simple. When an element having a different number of pixels is used, an offset signal is generally generated by resetting with a horizontal pulse, and therefore the offset signals are often aligned in the horizontal direction. Therefore, the phase delay circuit 22 shown in FIG. , The phase of the offset signal for each scan line is 1 / 2π from the phase of the input pixel signal.
Each one is delayed by 1 / 2π for each field and 3 / 2π in the frame. Due to the above, even if a digital conversion error occurs, it does not align in the vertical direction and becomes conspicuous.

In the conventional method, in the case of a digital signal that requires a high frequency component such as a luminance signal, a 1/2 LSB level offset signal is added to the input analog signal and A / D converted, then LPF, HPF Then, the averaging process is performed using the clip circuit to increase the word length of the digital signal. Therefore, the circuit configuration becomes large and the accuracy is limited only to the low frequency component.

Next, in the case of an input signal that does not require a high frequency component such as a color signal, in the conventional technique, the averaging process was performed using the LPF, but in this example, immediately after A / D conversion, It is not necessary to perform the averaging process in step S4, and it is sufficient that the averaging process is included in the signal processing circuit up to the output. Therefore, in this embodiment, A /
Immediately after D conversion, the block for averaging is not included. As described above, in this embodiment, in order to improve the A / D conversion accuracy in the low frequency range,
The addition of the LSB level offset signal has been described as the average of two signals, but the number is not particularly limited to two. or,
The method of shifting the phase of the offset signal is not limited to the method described above. Generally, g pixels in the horizontal direction are regarded as one block, and i / k for each h / k period field for each scanning line.
Cycle, j / k cycle for each frame (0 ≦ h <k, 0 ≦ i <k, 0
≤j <kh, i, f, k are integers, except when i, h, j are all 0). The level to be added is 1 / nLSB
The offset signal level of ~ n-1 / nLSB is sequentially offset each time one A / D conversion is performed, and n signals including those with no offset are averaged in the subsequent signal processing to obtain a logical value. It is possible to increase the accuracy up to n times that of the original A / D converter. For example, in FIG. 3a, n =
If 4, k = 4, h = 1, j = 2, j = 0, the offset level is
1/4 LSB, 4 averages, 1 pixel for each scan line, 2 pixels in the field. Further, in FIG. 3b, n = 4, k = 4, h
= 2, i = j = 0, two pixels are shifted for each scanning line with the same offset signal level and the same average number as in FIG.
If the average number n is determined as described above, the errors can be dispersed by selecting h, i, j, and k so that the errors are not vertically aligned.

As described above, according to the present embodiment, when a high frequency component is required in the required digital signal as in the case of the luminance signal, the offset signal of the i / n to n-1 / n LSB level is set to the above. After adding by the appropriate phase shift method as in the example
Only by A / D conversion, the quantization error due to digital conversion can be made inconspicuous, and at the same time, the high frequency components are not so much needed as with color signals, and the word length of digital signals is more needed. In this case, by averaging the signals after A / D conversion until the final output, the accuracy due to the word length of the original A / D converter can be increased up to n times.

Although the present embodiment has been described with respect to the image pickup apparatus, it is not limited to the image pickup apparatus in particular, and is widely applied to general digital signal processing such as A / D conversion of analog input signals such as standard television signals and printer input signals. it can.

As described above, according to the present invention, the LSB of the A / D converter is
The phase of the offset signal of level m / n (0 ≦ m <nm, n is an integer) is periodically shifted with respect to the pixel, line, field and frame of the input image signal, and the offset signal is input as an analog signal. By adding to, it is possible to disperse false contours without causing line-shaped interference,
It is possible to obtain a change component of 1 LSB of the high frequency component. When the high frequency component is not important, similarly, the offset signal is added to the input analog signal, A / D conversion is performed, and then averaging is performed in the signal processing up to the output. You can increase the accuracy determined by
High precision digital signal processor with short output signal word length
An A / D converter can be used, and its practical effect is great in terms of cost and frequency power.

[Brief description of drawings]

FIG. 1 is a block diagram of a digital signal processing device according to an embodiment of the present invention, FIG. 2 is a diagram showing a phase relationship between an offset signal phase and an input analog pixel signal, and FIG. 3 shows a phase change of the offset signal. Fig. 4 is a diagram showing the structure of a mosaic color filter for a solid-state image sensor, and Fig. 5 is a solid-state image sensor with the mosaic color filter shown in Fig. 4 and a conventional A / D converter. FIG. 6 is a block diagram showing an example of a signal processing circuit, FIG. 6 is a waveform diagram for explaining a conventional dither method for improving false contours, FIG. 7 is a block diagram of a digital signal processing device in a conventional example, and FIG. Is a waveform diagram showing the voltage waveform of the conventional offset generating circuit, FIG. 9 is a waveform diagram showing the operation waveforms of each part of the conventional example, FIG. 10 is a block diagram of the averaging process of the conventional example, and FIG. 11 is a conventional example. LPF and HPF used for averaging 3 is a frequency characteristic diagram of FIG. 20 ... A / D conversion circuit, 21 ... Offset generation circuit, 22 ...
… Phase delay circuit, 23 …… Timing generation circuit, 24 …… Color separation circuit, 25 …… Low pass filter, 26 …… Encoder.

Claims (2)

(57) [Claims] 1. An image which is two-dimensional information is run in a horizontal direction 1
A plurality of dimensional scanning lines, and an image signal composed of a part or all of the scanning lines is set on one field.
An A / D conversion circuit for converting a time-series image analog signal having one frame of the image signal completed by one or more of the fields into a digital signal, and the analog signal of the A / D conversion circuit LSB level m / n
(0 ≦ m <nm, n is an integer) circuit means for adding a level offset signal, the level of the offset signal is periodically changed, and the phase of the offset signal is sampled by the A / D conversion circuit. From the timing phase, h / k cycle for each scanning line, i / k cycle for each field, j / k cycle (0
≤ i <k, 0 ≤ h <k, 0 ≤ j <kh, i, j, k are integers (except when i, h, j are all 0). A digital signal processing device characterized by averaging low-frequency signal components. 2. The frequency of the offset signal is selected to be (s + 1/2) times the repetition frequency of the scanning line (s is an integer), whereby the phase of the offset signal is determined from the sampling timing phase of the A / D conversion circuit. ± 1 / 2π deviation for each scanning line, ± 1 / 2π deviation for each field, ± 1 / 2π for each frame
The digital signal processing device according to claim 1, wherein the offset signals are added with a shift.