JP2544536B2 - Method for determining the presence or absence of data in memory - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for judging the presence or absence of data, which is applied to various control devices using a microcomputer.

[0002]

2. Description of the Related Art In a control device using a microcomputer, it is sometimes desired to save rewritable data even when the power is turned off. If you have a disc, you can save it as a file, but if you do not have a disc, RAM / E ² with battery backup Save data in PROM, NV-RAM, core, etc. In this case, it is difficult to determine whether these memories contain data or not.
For example, when writing data into a memory when writing a specific bit pattern and when reading it, it is possible to judge the presence or absence of data depending on whether or not this specific bit pattern is present. If there is a memory check function such as, it was difficult to handle the memory error. Therefore, if you want to save rewritable data even if the power is turned off in a microcomputer controller without a disk, whether or not there is such data,
Troublesome operations such as leaving it to human judgment and setting switches when writing data were required.

[0003]

In a control device using a microcomputer without a disk, there is no choice but to put data on a memory. Fixed data can be stored in ROM, but variable data can be stored in RAM or E ² Put it in ROM etc.
Especially when you want to keep the variable data even if the power is turned off, the variable data can be stored in the R with battery backup.
AM and E ² It can be stored in a PROM or the like and read this variable data when the power is turned on. At this time, if the self-diagnosis function is enhanced, the memory check function such as the memory parity check and ECC works, and if the variable data does not exist, the parity etc. is not set and a memory error occurs. . On the contrary, if the memory is written in an attempt to set the parity or the like when the power is turned on so as not to cause a memory error, the variable data will be rewritten if the variable data exists.
The present invention, on the contrary, provides a method for effectively reading variable data by utilizing the memory check function in the control device as described above.

[0004]

In a memory according to the present invention,
The method for determining the presence / absence of data is the data retention
Rewritable memory with function and error of this memory
Using a microcomputer that has a memory check means for checking
The storage data of the memory in the control device for
And the steps to read by the test subroutine and this step.
The data read at the step is read by the memory check means.
Check the status to determine if there is an error.
When it is judged that there is no error in the step of
If it is determined that an error has occurred after shifting to control operation, an error
-A step that generates an interrupt and an error interrupt has occurred
When the error interrupt is
Read test subroutine to determine if it occurred in the row
If there is an error interrupt during execution, it is determined that there is no memory data.
After disconnecting and resetting the signal indicating memory error,
Return to the read test subroutine and use another error interrupt.
If there is a device failure step,
Characterize.

[Action] in the memory when the variable data does not exist, becoming an error when you read this. In this case, the memory error is distinguished from the memory error or the memory error at the time of program runaway, and in the case of the memory error of reading the variable data, the controller is restored without the failure and the variable data reception wait or the copy from the ROM. Must be processed.

For that purpose, the variable data read test subroutine is used to read the variable data on a trial basis.
If there is no variable data, a memory error occurs and a memory error interrupt is generated, and in the interrupt processing, it is determined whether or not an interrupt has occurred during execution of the read test subroutine from the program counter on the stack. When an interrupt occurs from the read test subroutine, a flag indicating that the interrupt has occurred is set, the memory error is reset, and then the process returns to the read test subroutine. If an interrupt occurs from another location, it may be considered as a control device failure.

[0006]

[Embodiment] As an embodiment, a DDC (Direct Digital Contr
FIG. 1 shows an example applied to the determination of the presence or absence of the control logic in the ol) device. The control logic is stored in the RAM 11 with battery backup so that it will not disappear even when the power is turned off. When writing to the battery backup RAM 11, the parity check circuit 13 of the RAM 11 also writes to the parity RAM in the circuit 13 (action 1). When reading from the battery backup RAM 11, the parity check circuit 13 compares and verifies the parity RAM. Check (action 2).

When the control logic does not exist at the very beginning, when the control logic is read, the parity RAM is not written, so that a parity mismatch occurs and the parity check circuit interrupts the CPU (action 3). .
At this time, in order to distinguish between a memory parity error due to a memory failure or a program runaway and a parity error due to a control logic read, the control logic is read only by a specific subroutine. Then, by checking the program counter on the stack during the interrupt processing, it can be determined whether or not an interrupt has occurred during the execution of this particular subroutine. If the control logic read subroutine is interrupted, a flag indicating that a memory parity error has occurred is set, and the memory parity check is reset (action 4).
It is sufficient to return to the reading subroutine. As a result, it can be seen that the control logic is not on the circuit with battery backup, and the parity error can be eliminated. On the other hand, if an interrupt request is issued from a subroutine at another location, it can be determined that the control device is abnormal such as a memory failure.

If the control logic is not in the RAM with battery backup, the control device may wait for the control logic to be sent via communication. On the contrary, if there is, the control may be started as it is.

[0009]

As compared with the prior art, since the memory check function can be used to judge the presence / absence of data, the reliability of judgment is improved. Furthermore, since human judgment and operation are not required, usability is also improved.

[Brief description of drawings]

FIG. 1 is an operation explanatory diagram of an embodiment of the present invention.

[Explanation of symbols]

 11 ... RAM, 13 ... Parity check circuit.

Claims (1)

(57) [Claims] 1. A data retention function is provided even when the power is turned off.
Rewritable memory and errors in this memory
Control using a microcomputer with memory check means
In the device, read the stored data in the above memory and test
The steps to read by a subroutine and this step
The read data is checked by the memory check means.
To determine if there is an error, and
Normal control operation when it is determined that there is no error by the
When it is determined that there is an error, the error interrupt
And the error interrupt causes the above read test
Read whether or not it occurred during execution of the subroutine
If it is an error interrupt during the execution of the test subroutine, make a memo
It is judged that there is no data, and a signal indicating a memory error is reset.
After returning to the read test subroutine,
If it is an error interrupt
A method for determining the presence / absence of data in a memory characterized by having
Law .