JP2533077B2 - Waveform equalization circuit - Google Patents

Waveform equalization circuit

Info

Publication number
JP2533077B2
JP2533077B2 JP59181402A JP18140284A JP2533077B2 JP 2533077 B2 JP2533077 B2 JP 2533077B2 JP 59181402 A JP59181402 A JP 59181402A JP 18140284 A JP18140284 A JP 18140284A JP 2533077 B2 JP2533077 B2 JP 2533077B2
Authority
JP
Japan
Prior art keywords
waveform
delay
isolated
peak
adder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59181402A
Other languages
Japanese (ja)
Other versions
JPS6159664A (en
Inventor
弘 武藤
隆 相川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
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Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59181402A priority Critical patent/JP2533077B2/en
Publication of JPS6159664A publication Critical patent/JPS6159664A/en
Application granted granted Critical
Publication of JP2533077B2 publication Critical patent/JP2533077B2/en
Anticipated expiration legal-status Critical
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Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/10009Improvement or modification of read or write signals
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B5/00Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
    • G11B5/02Recording, reproducing, or erasing methods; Read, write or erase circuits therefor
    • G11B5/027Analogue recording
    • G11B5/035Equalising

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Digital Magnetic Recording (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、磁気ディスク装置の薄膜ヘッドによる再生
信号等の歪を補正する波形等化回路に関する。
The present invention relates to a waveform equalization circuit that corrects distortion of a reproduction signal or the like due to a thin film head of a magnetic disk device.

近年、磁気ディスク装置の技術進歩は目覚ましく、特
に薄膜ヘッドの開発により高密度化指向が著しく向上し
ている。しかしながら、薄膜ヘッドは孤立波形の再生時
には特有の負のピーク波形の発生を伴う特徴があり、こ
れが信号再生系の信頼性を低下させるため対策が望まれ
ている。
In recent years, the technical progress of magnetic disk devices has been remarkable, and the development of thin film heads has led to a marked improvement in the direction of higher density. However, the thin-film head has a characteristic that a negative peak waveform peculiar to the isolated waveform is generated at the time of reproducing the isolated waveform, and this reduces the reliability of the signal reproducing system, and therefore a countermeasure is desired.

〔従来の技術〕[Conventional technology]

従来の波形等化回路としては、第5図にその構成を示
すようなコサイン型波形等化回路がある。図において、
再生信号は、入力を終端抵抗Reで終端してある遅延量τ
の遅延素子1により時間τだけ遅れた後、終端抵抗Reに
比較して十分大きい入力インピーダンスを有する加算器
2に入力される。このとき、インピーダンスの不整合に
より信号は反射して、再び遅延素子1により時間τだけ
遅れ、入力信号と共に減衰器3により所要量減衰し、遅
延素子1の反射端とは逆極性で加算器に入力される。
As a conventional waveform equalizer circuit, there is a cosine type waveform equalizer circuit whose configuration is shown in FIG. In the figure,
The reproduced signal has a delay amount τ whose input is terminated by the termination resistor Re.
After being delayed by the time τ by the delay element 1 of, the signal is input to the adder 2 having an input impedance sufficiently larger than the terminating resistance Re. At this time, the signal is reflected due to the impedance mismatch, is again delayed by the time τ by the delay element 1, is attenuated by the attenuator 3 together with the input signal by a required amount, and is added to the adder with the polarity opposite to the reflection end of the delay element 1. Is entered.

第6図は第5図各部の波形図を示す。図において、半
値幅Wiを有する孤立波形Aを入力端子に印加した場合
に、遅延素子1の出力側には孤立波形Aから時間τだけ
遅れた波形Bが、インピーダンスの不整合による反射作
用で大きくなって現れる。また、その反射作用で遅延素
子1を逆方向に通過した波形は、波形Bから更に時間τ
だけ遅延して、孤立波形Aと共に合成波形Cを形成し、
減衰器3にて所要量の減衰をうけ、波形Dとなって加算
器2の負側入力端子に入力される。従って、加算器2の
出力は波形Aから波形Dを減算して半値幅Woに狭められ
た波形Eとなる。
FIG. 6 shows a waveform chart of each part in FIG. In the figure, when an isolated waveform A having a half-width Wi is applied to the input terminal, a waveform B delayed from the isolated waveform A by a time τ on the output side of the delay element 1 is largely reflected by the impedance mismatch. Appears. In addition, the waveform that has passed through the delay element 1 in the opposite direction due to the reflection action is further delayed from the waveform B by time τ.
Only by delaying and forming a composite waveform C together with the isolated waveform A,
The attenuator 3 attenuates a required amount to form a waveform D, which is input to the negative side input terminal of the adder 2. Therefore, the output of the adder 2 becomes the waveform E narrowed to the half width Wo by subtracting the waveform D from the waveform A.

このようなコサイン型波形等化回路は、従来のフェラ
イトヘッドによる孤立波再生波形の補正に用いられるも
のであるが、第4図の波形(a)に示す薄膜ヘッドの再
生波形に対し、同様の波形等化を行なった場合には同図
(b)に示すように孤立波再生波形における独特の負の
ピークが除去されないために、ビット間隔の広い部分で
記録データに対応しないピーク波形が発生する。
Such a cosine type waveform equalizing circuit is used for correction of a solitary wave reproduction waveform by a conventional ferrite head, and is similar to the reproduction waveform of the thin film head shown in the waveform (a) of FIG. When waveform equalization is performed, a peculiar negative peak in the isolated wave reproduction waveform is not removed as shown in FIG. 6B, so that a peak waveform that does not correspond to the recorded data occurs in a portion with a wide bit interval. .

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

このため、エラーレート特性において、特に振幅マー
ジンが減少し、信号再生系の信頼性を著しく低下させる
欠点があった。本発明は上記従来の欠点に鑑み、孤立波
再生波形における半値幅を狭める従来の波形等化手段に
加え、薄膜ヘッド特有の負のピークを除去する機能を持
たせることにより、薄膜ヘッドの再生信号に適した波形
等化回路の提供を目的とする。
Therefore, in the error rate characteristic, there is a drawback that the amplitude margin is particularly reduced and the reliability of the signal reproducing system is remarkably lowered. In view of the above-mentioned conventional drawbacks, the present invention has a function of removing a negative peak peculiar to a thin film head, in addition to a conventional waveform equalizing means for narrowing a half value width in a solitary wave reproduced waveform, and thereby a reproduced signal of a thin film head. It is an object of the present invention to provide a waveform equalization circuit suitable for.

〔問題を解決するための手段〕[Means for solving problems]

そしてこの目的は本発明によれば、出力端を終端した
遅延素子と減衰器と加算器とから構成されてなる波形等
化回路において、前記遅延素子を遅延量がそれぞれτ1,
τ23である4つの直列遅延素子にて構成し、該
直列遅延素子の入力信号となる1つの正のピーク点と、
2つの負のピーク点とを有する孤立波形に対して、前記
正のピーク点と、2つの負の各ピーク点との時間間隔を
それぞれT1,T4とし、前記孤立波形の正の波形の半値幅
を前記正のピーク時点を境にT2+T3として、補正値
α、αをそれぞれ(T2/2)>α>(−T2/2),
(T3/2)>α>(−T3/2)とした場合に、前記各遅延
量を次式 τ+τ=T1−α τ=T2+α τ=T3+α τ+τ=T4−α にて求めることを特徴とする本発明の波形等化回路を提
供することにより達成される。
Further, according to the present invention, according to the present invention, in a waveform equalizing circuit composed of a delay element having an output terminal terminated, an attenuator, and an adder, the delay amount of each delay element is τ 1 ,
a series of four delay elements τ 2 , τ 3 , and τ 4 , and one positive peak point serving as an input signal of the series delay element,
For an isolated waveform having two negative peak points, the time intervals between the positive peak point and each of the two negative peak points are T 1 and T 4 , respectively. the half width as T 2 + T 3 the boundary of the positive peak point, the correction value alpha 1, alpha 2, respectively (T 2/2)> α 1> (- T 2/2),
(T 3/2)> α 2> (- T 3/2) and when said each delay equation τ 1 + τ 2 = T 1 -α 1 τ 2 = T 2 + α 1 τ 3 = T This is achieved by providing the waveform equalization circuit of the present invention, which is characterized in that 3 + α 2 τ 3 + τ 4 = T 4 −α 2 .

〔作用〕[Action]

すなわち、本発明は遅延素子により遅れた再生信号波
形を利用し、遅延素子の遅延量を適当に選択することに
より、薄膜ヘッド特有の孤立波再生波形における負のピ
ークを打ち消し、かつ半値幅を狭めることにより、薄膜
ヘッドの再生信号の品質を改善するようにしたものであ
る。
That is, the present invention utilizes the reproduced signal waveform delayed by the delay element and appropriately selects the delay amount of the delay element to cancel the negative peak in the isolated wave reproduced waveform peculiar to the thin film head and narrow the half width. As a result, the quality of the reproduction signal of the thin film head is improved.

〔実施例〕〔Example〕

以下本発明の実施例を図面によって詳述する。第1図
は本発明による波形等化回路のブロック図を示す。な
お、構成,動作の説明を理解し易くするために前図と同
一部分には同一符号を付して示した。
Embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 1 shows a block diagram of a waveform equalizing circuit according to the present invention. In addition, in order to facilitate understanding of the description of the configuration and operation, the same parts as those in the previous figure are denoted by the same reference numerals.

第1図において5〜8はそれぞれ遅延量がτ12
3である遅延素子、Reは終端抵抗、9〜12はそれぞ
れ減衰量がK1,K2,K3,K4である減衰器、13は加算器、14
は入力端子、15は出力端子を示す。またF〜Kは第2図
に示すような第1図各部の出力波形図である。以下、第
2図を参照しながら第1図の作用について説明する。
In FIG. 1 , the delay amounts 5 to 8 are τ 1 , τ 2 and τ, respectively.
3 and τ 4 are delay elements, Re is a terminating resistor, 9 to 12 are attenuators with attenuation amounts of K 1 , K 2 , K 3 , and K 4 , 13 is an adder, and 14 is an adder.
Indicates an input terminal, and 15 indicates an output terminal. Further, F to K are output waveform diagrams of the respective parts of FIG. 1 as shown in FIG. The operation of FIG. 1 will be described below with reference to FIG.

両図において、入力端子14に印加される入力信号(薄
膜ヘッドの出力する孤立波再生波形A)は、遅延素子5
〜8を直列に通り終端抵抗Reにより終端される。一方、
この4種類の遅延素子5〜8により時間差を持った5種
類の信号が得られる。5種類の信号の内、遅延素子6の
出力信号Hを除いて4種類の信号F,G,IおよびJは、そ
れぞれ減衰量K1,K2,K3,K4である減衰器9〜12により減
衰さる。これらの信号は共に加算器13に導かれる。
In both figures, the input signal applied to the input terminal 14 (the solitary wave reproduction waveform A output by the thin film head) is the delay element 5
8 through 8 and are terminated by a terminating resistor Re. on the other hand,
Five types of signals with a time difference are obtained by these four types of delay elements 5-8. Of the five types of signals, the four types of signals F, G, I and J except for the output signal H of the delay element 6 are attenuation amounts K 1 , K 2 , K 3 and K 4 , respectively. Attenuated by 12. Both of these signals are guided to the adder 13.

加算器13では、前記減衰を受けない信号Hの極性を基
準として、減衰器9と12の出力信号を正、減衰器10と11
の出力信号を負としてそれぞれ加算処理を行う。
In the adder 13, the output signals of the attenuators 9 and 12 are positive and the attenuators 10 and 11 are positive with respect to the polarity of the signal H which is not attenuated.
The output signal of is set negative and the addition processing is performed.

第3図は前にも述べたように薄膜ヘッドの出力する孤
立波再生波形で、第2図の信号Aに対応している。この
波形Aは1つの正のピーク点Pと、2つの負のピーク点
QとRとを有し、P点とQ点との時間差をT1、P点とR
点との時間差をT4とする。また、P点のレベルの50%レ
ベルの時間幅(半値幅)を、P点の縦軸を境にT2+T3
する。
FIG. 3 is a solitary wave reproduction waveform output by the thin film head as described above, and corresponds to the signal A in FIG. This waveform A has one positive peak point P and two negative peak points Q and R, and the time difference between P point and Q point is T 1 , P point and R point.
The time difference from the point is T 4 . Further, the time width (half-value width) of 50% level of the point P is defined as T 2 + T 3 with the vertical axis of the point P as the boundary.

次ぎに各遅延素子の遅延量を補正するための補正値を
α1として、 (T2/2)>α>(−T2/2) (T3/2)>α>(−T3/2) とした場合に、前記各遅延量は次式 τ+τ=T1−α τ=T2+α τ=T3+α τ+τ=T4−α にて求めることにより、薄膜ヘッド特有の孤立波におけ
る負のピークを打ち消し、かつ半値幅を狭めることがで
きる。
Alpha 1 a correction value for correcting the delay amount of each delay element to the next, as α 2, (T 2/2 )> α 1> (- T 2/2) (T 3/2)> α 2> (-T 3/2) and when the respective amount of delay following equation τ 1 + τ 2 = T 1 -α 1 τ 2 = T 2 + α 1 τ 3 = T 3 + α 2 τ 3 + τ 4 = T 4 The negative peak in the solitary wave peculiar to the thin film head can be canceled and the half width can be narrowed by obtaining −α 2 .

第2図の出力波形図を参照して、まず孤立波形の半値
幅が狭められる作用を説明する。なお、この図では減衰
器を通らないで加算器に入力される波形Hを基準として
補正を行った場合と、補正を行わない場合(アルファベ
ットに′がついた波形)を示している。従って、波形H
については補正の有無に係わらず同一の波形として説明
を行う。
First, with reference to the output waveform chart of FIG. 2, the operation of narrowing the half-value width of the isolated waveform will be described. In this figure, there are shown a case where the correction is performed with reference to the waveform H that is input to the adder without passing through the attenuator, and a case where the correction is not performed (the waveform with the letter ‘A’). Therefore, the waveform H
Will be described as the same waveform regardless of the presence or absence of correction.

補正を行った場合は加算器13によって、入力信号の波
形Aとレベル値が同じで遅延量τ+τだけ遅れた波
形Hに、波形Gと波形Iとを加算(実際は減算)する。
なお、波形Gの遅延量τには補正値α、波形Iの遅
延量τ+τ+τには補正値αがそれぞれ加味さ
れている。この加算(波形の重ね合わせ)により、加算
器13の出力には実線で示す波形Kのような半値幅の大幅
に狭められた波形が得られる。
When correction is performed, the adder 13 adds (actually subtracts) the waveform G and the waveform I to the waveform H having the same level value as the waveform A of the input signal and delayed by the delay amount τ 1 + τ 2 .
A correction value α 1 is added to the delay amount τ 1 of the waveform G, and a correction value α 2 is added to the delay amount τ 1 + τ 2 + τ 3 of the waveform I. By this addition (waveform superposition), a waveform having a significantly narrow half width such as the waveform K shown by the solid line is obtained at the output of the adder 13.

一方、補正を行わない即ちα=α=0の場合は加
算器13によって、入力信号の波形A′とレベル値が同じ
で遅延量τ+τだけ遅れた波形Hに、波形G′と波
形I′とを加算(実際は減算)する。この加算(波形の
重ね合わせ)により、加算器13の出力には鎖線で示す波
形K′のようなピークレベルの必要以上に減衰した波形
が得られ、そのため半値幅を狭めて分解能を改善する効
果よりも、このピーク値の減衰によるS/Nの劣化が大き
くなってしまう。即ち、遅延量に補正値が加味されてい
ない波形G′と波形I′は、孤立波形(波形H)の半値
幅を狭める目的からその半値幅の時間的位置で波形
G′、I′のピーク点を一致させて、孤立波形との重ね
合わせが行われるので、孤立波形のピークレベル側でも
ゼロレベル側と同等量の減算が行われ、従って得られる
波形は、鎖線で示す波形K′のようなピークレベルが必
要以上に減衰した波形となる。このピークレベル減衰を
回避するために、前記した波形Gでは遅延量に補正値α
を加味して波形のピーク点を前記半値幅の時間的位置
よりゼロレベル側(紙面の左側)にαだけずらす補正
がなされ、また波形Iでは遅延量に補正値αを加味し
て波形のピーク点を前記半値幅の時間的位置よりゼロレ
ベル側(紙面の右側)にαだけずらす補正がなされて
いる。
On the other hand, when no correction is made, that is, when α 1 = α 2 = 0, the adder 13 adds the waveform G ′ to the waveform H ′ which has the same level value as the input signal waveform A ′ and is delayed by the delay amount τ 1 + τ 2. And waveform I ′ are added (actually subtracted). By this addition (waveform superposition), a waveform having a peak level which is attenuated more than necessary, such as a waveform K'shown by a chain line, is obtained at the output of the adder 13, and therefore the half value width is narrowed to improve the resolution. Rather, the S / N deterioration due to the attenuation of the peak value becomes larger. That is, the waveform G'and the waveform I'in which the correction value is not added to the delay amount are the peaks of the waveforms G'and I'at the temporal position of the half-value width for the purpose of narrowing the half-value width of the isolated waveform (waveform H). Since the points are coincident with each other and superposition with the isolated waveform is performed, the same amount of subtraction is performed on the peak level side of the isolated waveform as on the zero level side. Therefore, the obtained waveform is like the waveform K ′ shown by the chain line. The peak level is a waveform that is attenuated more than necessary. In order to avoid this peak level attenuation, the correction amount α is added to the delay amount in the waveform G described above.
1 is added so that the peak point of the waveform is shifted from the temporal position of the half width to the zero level side (left side of the paper) by α 1 , and in waveform I, the correction value α 2 is added to the delay amount. Correction is performed by shifting the peak point of the waveform by α 2 from the temporal position of the half width to the zero level side (right side of the paper surface).

この補正値α、αの範囲は半値幅の50%の範囲で
あり、この範囲内に設定される。具体的には半値幅の時
間的位置を境に孤立波形の正のピーク点に近づく側を
正、逆に遠ざかる側を負として、前述した式のとおり補
正値αが(T2/2)>α>(−T2/2)、補正値α
(T3/2)>α>(−T3/2)にそれぞれ設定される。実
際の設定はこの波形等化された再生波形を復調する復調
回路の振幅マージン、位相マージンの最大値が得られる
値に選ばれる。
The range of the correction values α 1 and α 2 is 50% of the full width at half maximum, and is set within this range. Positive positive side closer to the peak point of the concrete to the isolated waveform on the border of the temporal position of the half-value width, as a negative side away Conversely, the following correction value alpha 1 of the formula described above (T 2/2) > α 1> (- T 2 /2), the correction value alpha 2 is (T 3/2)> α 2> (- T 3/2) , respectively are set. The actual setting is selected so that the maximum value of the amplitude margin and the phase margin of the demodulation circuit that demodulates the reproduced waveform whose waveform is equalized is obtained.

次に孤立波形の負のピークを打ち消す作用を説明す
る。この場合は加算器13によって、波形Hに、波形Fと
波形Jとを加算する。なお、この波形FとJにも遅延量
に補正値α、αが加味されている。この補正値は、
前記GとIの波形に補正値α、αが加味されそれら
波形G、Iのピーク点を孤立波形Hの半値幅の時間的位
置よりαとαだけずらしたために、それら波形G、
Iの裾部(ゼロレベル近辺)の信号レベルが孤立波形の
負のピークに影響して、補正値を加味しない波形(波形
F′とJ′に相当)では完全に当該負のピークを打ち消
すことができない(鎖線で示す波形K′)のを補正する
ために設けられる。
Next, the action of canceling the negative peak of the isolated waveform will be described. In this case, the adder 13 adds the waveform F and the waveform J to the waveform H. Note that the correction values α 1 and α 2 are also added to the delay amounts in the waveforms F and J. This correction value is
Since the correction values α 1 and α 2 are added to the G and I waveforms and the peak points of these waveforms G and I are shifted by α 1 and α 2 from the time position of the half width of the isolated waveform H, these waveforms G and I ,
The signal level at the tail of I (near zero level) affects the negative peak of the isolated waveform, and the negative peak is completely canceled in the waveform (corresponding to waveforms F ′ and J ′) in which the correction value is not added. It is provided to correct the failure (waveform K'shown by the chain line).

さらに詳細には、波形Fはピーク点が孤立波形Hの負
のピーク点位置よりも紙面の右側にαだけずらされて
おり、波形Jはピーク点が孤立波形Hの負のピーク点位
置よりも紙面の左側にαだけずらされている。また波
形Fは、減衰器9によりその正のピーク値Q1が孤立波形
Hの一方の負のピーク値Q0に等しくなるよう減衰され、
波形Jは、減衰器12によりその正のピーク値R1が孤立波
形Hの他方の負のピーク値R0に等しくなるよう減衰され
ている。従って、波形HにFとJの波形を重ね合わせる
ことにより、実線で示す波形Kのような負のピークの除
去された波形が得られる。
More specifically, the waveform F has a peak point shifted by α 1 to the right side of the drawing from the negative peak point position of the isolated waveform H, and the waveform J has a peak point from the negative peak point position of the isolated waveform H. Is also shifted by α 2 to the left side of the page. Further, the waveform F is attenuated by the attenuator 9 so that its positive peak value Q 1 becomes equal to one negative peak value Q 0 of the isolated waveform H,
The waveform J is attenuated by the attenuator 12 so that its positive peak value R 1 becomes equal to the other negative peak value R 0 of the isolated waveform H. Therefore, by superimposing the waveforms F and J on the waveform H, a waveform in which the negative peak is removed, such as the waveform K shown by the solid line, is obtained.

以上のような加算処理の結果、実線で示す波形Kのよ
うな、ピークレベルが必要以上に減衰していなくて半値
幅が大きく狭められ負のピークも存在しない波形が得ら
れる。なお、この波形を従来例と比較するために、第4
図(c)にも示した。
As a result of the addition processing as described above, a waveform such as a waveform K shown by a solid line is obtained in which the peak level is not attenuated more than necessary, the half-value width is greatly narrowed, and there is no negative peak. In order to compare this waveform with the conventional example,
It is also shown in FIG.

〔発明の効果〕〔The invention's effect〕

以上詳細に説明したように本発明の波形等化回路によ
れば、薄膜ヘッド特有の孤立波再生波形における負のピ
ークを除去することができ、かつ半値幅も狭められるの
で、エラーレート特性の改善ならびに薄膜ヘッド信号再
生系の信頼性向上に大きな効果がある。
As described in detail above, according to the waveform equalizing circuit of the present invention, it is possible to remove the negative peak in the solitary wave reproduction waveform peculiar to the thin film head, and the half width can be narrowed. Therefore, the error rate characteristic is improved. It also has a great effect on improving the reliability of the thin film head signal reproducing system.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明による波形等化回路のブロック図、 第2図は第1図各部の出力波形図、 第3図は薄膜ヘッドの出力する孤立波再生波形図、 第4図は孤立波再生波形(a)に対する従来例の等価波
形(b)と本発明による等化波形(c)の比較例を示す
図、 第5図は従来のコサイン型波形等化回路のブロック図、 第6図は第5図各部の出力波形図を示す。 図において、5〜8はそれぞれ遅延量がτ123
である遅延素子、9〜12は減衰器、13は加算器、Pは
正のピーク点、QとRは負のピーク点をそれぞれ示す。
FIG. 1 is a block diagram of a waveform equalizing circuit according to the present invention, FIG. 2 is an output waveform diagram of each part of FIG. 1, FIG. 3 is a solitary wave reproduction waveform diagram output from a thin film head, and FIG. 4 is a solitary wave reproduction. FIG. 5 is a diagram showing a comparative example of the equivalent waveform (b) of the conventional example with respect to the waveform (a) and the equalized waveform (c) of the present invention. FIG. 5 is a block diagram of a conventional cosine type waveform equalization circuit. FIG. 5 shows an output waveform diagram of each part. In the figure, the delay amounts 5 to 8 are τ 1 , τ 2 , τ 3 and τ, respectively.
The delay element is 4 , 9 to 12 are attenuators, 13 is an adder, P is a positive peak point, and Q and R are negative peak points.

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】出力端を終端抵抗で終端した遅延素子と減
衰器と加算器とから構成されてなる波形等化器におい
て、 前記遅延素子を遅延量がそれぞれτ123であ
る4つの直列遅延素子にて構成し、該直列遅延素子の入
力信号となる1つの正のピーク点と、2つの負のピーク
点とを有する孤立波形に対して、前記正のピーク点と、
2つの負の各ピーク点との時間間隔をそれぞれT1,T4
し、前記孤立波形の正の波形の半値幅を前記正のピーク
時点を境にT2+T3として、補正値α、αをそれぞれ
(T2/2)>α>(−T2/2),(T3/2)>α>(−T3
/2)とした場合に、前記各遅延量を次式 τ+τ=T1−α τ=T2+α τ=T3+α τ+τ=T4−α にて求めることを特徴とする波形等化回路。
1. A waveform equalizer comprising a delay element having an output terminal terminated by a terminating resistor, an attenuator, and an adder, wherein the delay elements have delay amounts of τ 1 , τ 2 , τ 3 , The positive peak is composed of four series delay elements of τ 4 and has an isolated waveform having one positive peak point serving as an input signal of the series delay element and two negative peak points. Points and
The time intervals between the two negative peak points are T 1 and T 4 , respectively, and the half-value width of the positive waveform of the isolated waveform is T 2 + T 3 with the positive peak point as the boundary, and the correction value α 1 , alpha 2, respectively (T 2/2)> α 1> (- T 2/2), (T 3/2)> α 2> (- T 3
/ 2), the respective delay amounts are given by the following equations τ 1 + τ 2 = T 1 −α 1 τ 2 = T 2 + α 1 τ 3 = T 3 + α 2 τ 3 + τ 4 = T 4 −α 2 . Waveform equalization circuit characterized by being obtained by.
JP59181402A 1984-08-29 1984-08-29 Waveform equalization circuit Expired - Lifetime JP2533077B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59181402A JP2533077B2 (en) 1984-08-29 1984-08-29 Waveform equalization circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59181402A JP2533077B2 (en) 1984-08-29 1984-08-29 Waveform equalization circuit

Publications (2)

Publication Number Publication Date
JPS6159664A JPS6159664A (en) 1986-03-27
JP2533077B2 true JP2533077B2 (en) 1996-09-11

Family

ID=16100122

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59181402A Expired - Lifetime JP2533077B2 (en) 1984-08-29 1984-08-29 Waveform equalization circuit

Country Status (1)

Country Link
JP (1) JP2533077B2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2511847B2 (en) * 1984-11-09 1996-07-03 株式会社日立製作所 Waveform equalization circuit
US5307213A (en) * 1990-11-30 1994-04-26 Hitachi, Ltd. Data reproducing apparatus for eliminating undershoots in the vicinity of the outer edges of a magnetic pole
US5337198A (en) * 1990-11-30 1994-08-09 Hitachi, Ltd. Digital magnetic writing and reading apparatus
DE69227309T2 (en) * 1992-01-10 1999-03-11 Fujitsu Ltd CIRCUIT FOR EQUALIZING THE WAVEFORM OF A SIGNAL PLAYED OUT BY A THIN FILM MAGNETIC HEAD
EP0693213A1 (en) * 1993-04-06 1996-01-24 Cirrus Logic, Inc. Spectral smoothing filter

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0721843B2 (en) * 1983-12-26 1995-03-08 株式会社日立製作所 Waveform equalizer

Also Published As

Publication number Publication date
JPS6159664A (en) 1986-03-27

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