JP2530603B2 - Bucket data receiver - Google Patents

Description

Description: TECHNICAL FIELD [0001] The present invention relates to a packet data receiving device for receiving a packet data signal in the case of transmitting a data signal in packets using a data channel of television satellite broadcasting or the like. Is.

[Prior Art and its Problems] In the signal format of the television satellite broadcasting PCM audio transmission system, an independent data area and an empty area where audio is not multiplexed can be used as a data channel. When sending various data signals through this data channel, a packet transmission method having excellent flexibility and expandability is suitable.

FIG. 7 is a bit configuration diagram showing an example of a PCM audio transmission signal format. Further, FIG. 8 is a bit configuration diagram showing an example of a packet configuration.

When sending a data signal by packet, conventionally, each packet is sent only once, the header is detected and the packet is extracted, and error correction is performed using, for example, a [272,190] shortened difference set code as shown in FIG. , Thereby receiving the data signal.

However, in the method of sending each packet only once, C /
There was a drawback that a sufficiently small block error rate could not be obtained when the N ratio decreased to a value close to the service limit.

Further, in the case of continuously transmitting packets, there is a problem in how the receiving side detects the position of a boundary where the header is the same and the content of the packet data changes.

[Object of the Invention] Therefore, an object of the present invention is to send the same packet a certain number of times, take a majority decision for each bit of the received packet, and then use a conventional error correction method.
An object of the present invention is to provide a packet data receiving device that can reliably receive data even at low C / N close to the service limit.

Another object of the present invention is to provide a packet data receiving device which enables the receiving side to determine the position of a delimiter where the content of packet data changes with the same header without error. .

[Points of the Invention] The present invention sends the same packet several times, takes a majority decision for each bit of the received packet, and then performs error correction with sufficient reliability even when the C / N decreases. The present invention relates to a packet data receiving device capable of receiving a data signal.

That is, when continuously transmitting the same packet a plurality of times, a continuous transmission method is used so that the receiving side can reliably identify the time point at which the data content changes, and the receiving side uses each bit of the detected packet. By taking a majority vote and performing error correction after that, it is possible to reliably transmit data even at low C / N, which is close to the service limit where it was difficult to send data by the conventional method of sending only one packet. It was done.

EXAMPLES Hereinafter, the present invention will be described in detail based on examples.

Send the same packet continuously, take a majority vote for each bit,
Furthermore, in a packet continuous transmission method that receives a data signal after error correction and obtains a much smaller block error rate than the conventional method, a method that reliably distinguishes between packets having the same header but different data contents. As an example, three examples will be described.

B) First Embodiment FIG. 1 is a diagram for explaining the first embodiment. Also the second
The figure is a block diagram showing a configuration of a receiver used in the present embodiment.

In this embodiment, for example, a scramble PN initial value load timing signal (hereinafter referred to as a scramble timing signal) sent every one second is used as a trigger for starting packet continuous transmission, and the same packet is sent from the time when the scramble timing signal is sent. It is sent a plurality of times, for example, 5 times continuously.

The receiving side receives the scramble timing signal,
Immediately after that, five packets are continuously taken in, a majority decision is taken for each bit, error correction is performed, and a data signal is received.

In the first embodiment, the timing of continuous packet transmission is determined by the transmission timing of the scramble timing signal, so that if the scramble timing signal can be received by frame synchronization of the voice channel, especially the header and the like can be received. All the sent packets can be captured by the receiving side without using. Therefore,
The block error rate of the received packet becomes a small value as compared with the method in which packets are continuously transmitted at arbitrary timing and captured using a header.

In the present embodiment, the continuous packet transmission is performed only immediately after the trigger signal, which is suitable for transmitting information related to the trigger signal. For example, when a scramble timing signal is used as the trigger signal, it is preferable to use this embodiment to send the key information for descrambling with high reliability.

It should be noted that a plurality of types of packets can be transmitted using this embodiment, but in this case, it is necessary for the receiving side to refer to the header and identify the type of packet.

B) Second Embodiment FIG. 3 is a diagram for explaining the second embodiment, and FIG. 4 is a block diagram showing the configuration of the receiver used in this embodiment.

In this embodiment, the first packet among the packets that are continuously transmitted is transmitted at an arbitrary timing. The remaining packets are transmitted at arbitrary positions within a certain period (for example, within 100 msec) after the first packet is transmitted. The interval from the transmission of the last packet to the transmission of the next top packet with different data content is assumed to be a certain period (for example, 100 ms) above.

On the receiving side, the header of the packet is constantly monitored, and when one header of the packet to be received is detected, the time of 100 msec, for example, is counted from that point. Then, all packets having the same header sent within that period are captured, a majority decision is taken bit by bit, error correction is performed, and a data signal is received.

In the second embodiment, it is possible to send packets at arbitrary timings, except for the restriction that a certain period or more is left when sending packets having the same header but different contents. A more flexible system can be constructed than the first embodiment described. However, in order to capture the packet, it is premised that the header can be accurately detected, so that the position of the packet is determined by another trigger signal as in the first embodiment, and all the transmitted packets are easy. The block error rate increases by the amount corresponding to the header detection error as compared with the case where the block error rate can be captured.

C) Third Embodiment FIG. 5 is a diagram for explaining the third embodiment, and FIG. 6 is a block diagram showing the configuration of the receiver used in this embodiment.

In the first embodiment, packets of the same header but different data contents are distinguished from each other by continuously sending a fixed number of packets immediately after the trigger signal, and in the second embodiment, a certain fixed time is set to leave the same. Made a distinction.

On the other hand, in the third embodiment, the packet is transmitted at an arbitrary timing without any particular delay at the position where the data content changes.

On the receiving side, the number of packets captured using the header is 1
While the number is one or two, error correction is performed every time a packet is captured, and the data is written in the reception data buffer 1.

Further, when three or more packet headers are detected, it is possible to take a majority vote. Therefore, every time a packet is captured, the newest three packets are given a majority vote for each bit and then error correction is performed. Then, the received data is written in the received data buffer 1. At this time, the data which has been used as the reception data until then is replaced with the new reception data.

In the third embodiment, every time a packet is extracted, the latest three packets are subjected to bit-by-bit majority / error correction, and the content of the data is monitored by this. Therefore, it is assumed that the packets are continuously transmitted. Also, it is possible to distinguish packets having different contents having the same header.

Also, if only one or two packet headers are sent, it is not possible to take a majority vote for each bit, but in such a case as well, the received data from the one or two packets in which the header is detected is Can be obtained.

The change point of the packet data content can be detected by monitoring the bit pattern of the packet data before majority decision / error correction, but in this case, the data content is monitored with many error bits. Therefore, a considerable number of bits are required as the check bits for notifying the receiving side of the packet data change. On the other hand, when monitoring data after performing majority voting and error correction for each bit, error bits are almost excluded, so high reliability is achieved even when the number of changed data contents is small. The change point can be detected in degrees.

Although the number of packets for which the majority is decided is fixed to "3" in this embodiment, it is also possible to take the majority for all the packets in which the header is detected.

In the third embodiment, even when the number of detected packets is three or more, each time a packet is detected, error correction is performed on the latest one packet, and the result is decided by majority of the latest three packets. It is also possible to employ the correct one (for example, the one in which the syndrome of error correction becomes “0”) as the received data, as compared with the result of 1.

Further, in the receiver configuration (first embodiment) shown in FIG. 2, when the scramble timing signal is used as the trigger signal, the timing signal is detected from a part of bits of the voice channel control code, and the time point is detected. Then, a fixed number of packets are extracted from a packet by a packet extraction circuit, stored in a packet buffer, and then a majority decision is made for each bit, and then error correction is performed to obtain received data.

On the other hand, in the receiver (see FIG. 4) used in the second embodiment, the header of the first packet in the packets to be continuously transmitted is detected, and the counter is started to count over a fixed time thereafter. The packet whose header is detected within that time is extracted and stored in the packet buffer.
Then, when a certain time has passed, majority data and error correction are performed for each bit to obtain received data, and a certain time counter is reset to wait for the first packet of the next data.

In the receiver configuration (third embodiment) shown in FIG. 6, the header detection circuit (22) refers to the packet header, and an error occurs every time a packet is detected until three or more packets are detected. Correction is performed, the result is stored in the reception data buffer 1 (32), and the detected packet is stored in the packet buffer (24). When three or more packet headers are detected, the latest three packets are used to make a majority decision for each bit, error correction is performed, and the result is transferred to the reception data buffer 1 (32). The data accumulated in the receive data buffer 1 (32) until then is transferred to the receive data buffer 2 (36) at this time,
The data comparison circuit (34) compares the contents of the buffer 1 (32) and the buffer 2 (36). If they are different, the time point is regarded as a change point of the data content, the content of the reception data buffer 2 (36) is output as reception data, and the state of the entire circuit is returned to the initial state.

The error that occurs in the data channel is a burst error peculiar to the 4-phase DPSK method, but when consecutively transmitting the same packet, the corresponding bits of each packet should be separated by more than a certain time interval on the transmission line. If the bits are not included in the same burst error, the block error rate can be further improved.

[Effects of the Invention] In the present invention, the same packet is transmitted a plurality of times, a majority decision is made for each bit of the received packet, and error correction is performed after that.
Data can be sent reliably even at N hours.

In the above-described first embodiment (see FIGS. 1 and 2), a scramble timing signal or the like is used as a trigger signal for starting packet continuous transmission, and a certain number of the same packets are continuously transmitted immediately after the trigger signal. Since it is sent to the receiver, it is possible to capture all the sent packets without referring to the packet header on the receiving side. Therefore, the block error rate of the received data has a small value as compared with the method of continuously transmitting packets at an arbitrary timing.

In the second embodiment (see FIGS. 3 and 4), the same packet is continuously sent at an arbitrary timing within a certain fixed time, and a packet having the same header but different data contents is started to be sent. Since there is a certain time interval or more between the packet and the packet, even when packet continuous transmission is started at an arbitrary timing, the receiver can capture the continuously transmitted packet by referring to the header. . In this embodiment, the packet continuous transmission start timing can be arbitrarily selected, so that a flexible system can be configured even when a plurality of services are simultaneously performed.

In the third embodiment (see FIGS. 5 and 6), each time a packet is captured on the receiving side, the latest three packets are used to perform a majority decision and error correction for each bit, and the result is received. Since the data is changed and the change in the content of the data is monitored, the change point of the data content can be identified even if the packet is transmitted at an arbitrary timing. Further, even when the number of captured packets is 1 or 2, the error correction is performed every time when the packet is captured and the received data is obtained. Therefore, even when the number of detected packets is less than 3 which can be decided by majority. , Receive data can be obtained.

Further, when continuously transmitting the same packet, by transmitting at a certain time interval or more on the transmission path so that the corresponding bit of each packet is not included in the same burst error,
It is possible to obtain the same effect as when interleaving is equivalently performed when a majority vote is performed for each bit, and thus it is possible to further improve the block error rate.

These packet data transmission methods can be applied to general data transmission as well as broadcasting.

[Brief description of drawings]

FIG. 1 is a diagram for explaining a first embodiment of the present invention, FIG. 2 is a block diagram showing a configuration of a receiver in the first embodiment, and FIG. 3 is a second embodiment of the present invention. FIG. 4, FIG. 4 is a block diagram showing the configuration of the receiver in the second embodiment, FIG. 5 is a view for explaining the third embodiment of the present invention, and FIG. 6 is a reception in the third embodiment. FIG. 7 is a block diagram showing the configuration of the machine, FIG. 7 is a diagram showing a format of a PCM voice transmission signal, and FIG. 8 is a diagram showing an example of a packet configuration. 2 ... Scramble timing signal detection circuit, 6 ... Packet extraction circuit, 6 ... Packet buffer, 8 ... Majority circuit, 10 ... Error correction circuit, 12 ... Counter, 14,22 ... Header detection / packet extraction Circuit, 16,24 …… Packet buffer, 18,26 …… Majority decision circuit, 20,30 …… Error correction circuit, 32 …… Reception data buffer 1, 34 …… Data comparison / change point detection circuit, 36 …… Reception Data buffer 2.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Naoki Kawai, 1-10-11 Kinuta, Setagaya-ku, Tokyo Inside Broadcasting Research Institute of Japan Broadcasting Corporation (72) Inventor Takeshi Kimura 1-10-11 Kinuta, Setagaya-ku, Tokyo In the Broadcasting Technology Research Laboratories of Japan Broadcasting Corporation (72) Inventor Takehiko Yoshino 1-10-11 Kinuta, Setagaya-ku, Tokyo Inside the Broadcasting Technology Research Laboratories of Japan Broadcasting Corporation (56) Reference JP-A-57-67349 (JP, A) 52-89402 (JP, A) JP-A-57-41050 (JP, A)

Claims (4)

(57) [Claims] 1. A packet data receiving apparatus for receiving a packet data signal for transmitting desired data in packets using a data channel of television satellite broadcasting or the like, comprising an error correction code consisting of information bits and check bits. An extraction circuit that receives a transmission signal transmitted from a transmission unit that continuously transmits a packet signal having the same data content including a code word a plurality of times at an arbitrary timing, and extracts the packet signal having a specific header from the transmission signal. A packet buffer that stores the extracted packet signal as it is in a specific number, a counter that counts the number of the extracted packet signals, and each bit of the extracted packet signals Connect the bit-by-bit majority circuit that performs majority-bit processing for each bit and the subsequent stage of the majority circuit. Error correction decoding circuit, received data buffer 1 for storing valid received data after error correction decoding, and new data is transferred to the received data buffer 1 every time new data is transferred to the received data buffer 1. Received data buffer 2 for storing the stored data contents
And a comparison circuit for comparing the contents of the reception data buffer 1 and the contents of the reception data buffer 2 with each other. If the number of the extracted packet signals stored in the above does not reach a certain number, error correction decoding is performed on the latest one extracted packet signal, and the decoded data is used as valid reception data in the reception data buffer. If the number of the extracted packet signals is equal to or more than the predetermined number, the majority decision processing is performed for each bit of the extracted constant number of packet signals before performing error correction decoding, and thereafter, Error-correction decoding is performed on the packet signal after the majority decision processing, and the decoded data is treated as the effective reception data. Every time the valid reception data is written to the reception data buffer 1, the comparison circuit compares the data content of the reception data buffer 1 with the data content of the reception data buffer 2, and both are compared. When different, the packet data receiving apparatus is characterized in that the time point is regarded as a change point of the data content, the data in the reception data buffer 2 is output as the final reception data, and the state of the entire circuit is returned to the initial state. 2. Packet data for transmitting desired data in packets by using an independent data area included in a television satellite broadcasting PCM audio transmission signal or an empty area in which no audio is multiplexed as a data channel. A packet data receiving device for receiving a signal, wherein a predetermined timing signal obtained from a part of a voice channel control code is used as a trigger signal for giving a timing for starting packet continuous transmission, and a predetermined time is synchronized with the trigger signal. Receiving means for receiving a transmission signal transmitted from a transmission side device that continuously transmits a packet signal having the same data content including a code word of an error correction code composed of an information bit and a check bit, in a specified number, Detecting means for detecting the trigger signal from the transmission signal; Extracting means for extracting the packet signal from the transmission signal; a packet buffer for storing a specified number of the extracted packet signals; and a bit for performing a majority process for each bit for the specified number of the packet signals. It is equipped with a majority decision circuit and a decoding processing means for performing error correction decoding on the packet signal after the majority decision processing and using the decoded data as the received data, and the same data contents transmitted without referring to the packet header. A packet data receiving device characterized in that all packets can be captured. 3. An independent data area included in a PCM audio transmission signal for television satellite broadcasting or an empty area in which no audio is multiplexed is used as a data channel, and the scramble decryption key information is transmitted in packets by the data channel. A packet data receiving device for receiving a packet data signal, wherein a scramble timing signal obtained from a part of a voice channel control code is used as a trigger signal for giving a packet continuous transmission start timing, and a predetermined value is synchronized with the trigger signal. Receiving means for receiving a transmission signal transmitted from a transmission side device that continuously transmits a packet signal having the same data content including a code word of an error correction code composed of an information bit and a check bit within a certain time, Detecting means for detecting the trigger signal from the transmission signal; and the detecting means Extracting means for extracting the packet signal from the transmission signal in response to a detection output; a packet buffer for storing a specific number of the extracted packet signals; and a specific number of the packet signals for each bit. It is equipped with a bit-by-bit majority circuit that performs majority processing, and decoding processing means that performs error correction decoding on the packet signal after the majority processing and uses the composited data as the received data, and is transmitted without referring to the packet header. A packet data receiving device characterized in that it can capture all incoming packets having the same data content. 4. An independent data area or another empty area included in a transmission signal for television satellite broadcasting is used as a data channel, and a packet data signal for transmitting desired data in packets is received by the data channel. A packet data receiving device, wherein a packet signal having the same data content consisting of a header part and a data part is sent continuously when the sending side device sends the packet signal a plurality of times within a first predetermined time. The first packet signal is transmitted at an arbitrary timing, and the remaining packet signals having the same data content are transmitted at an arbitrary timing within the first predetermined time after the first packet signal is transmitted. After the last packet signal is sent, a packet signal with the same header part but different data content is sent. A unit for receiving a transmission signal in which a second predetermined time which is equal to or longer than the first predetermined time is provided as a time interval until continuous transmission, and a header portion of a packet signal included in the transmission signal. A means for constantly monitoring and, when one header of a packet signal to be received is detected, a means for extracting all packet signals having the same header sent from that point until the first predetermined time elapses. A packet buffer for storing the extracted packet signal; a bit-by-bit majority circuit for performing a majority decision process for each bit of the extracted packet signal; and an error correction decoding for the packet signal after the majority decision process. It has a decryption processing unit that uses the decrypted data as the received data, and distinguishes packets with the same header but different data contents. Packet data receiving apparatus characterized by receiving Te.