JP2527482B2 - Image processing device - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is preferably implemented in an image reading apparatus used in a facsimile machine or the like, and image processing for expressing read image information with black and white binary pixels. Regarding the device.

Conventional technology Facsimile machine and optical character reader (abbreviated as OCR)
And the like are provided with a reading device that reads a document surface for each predetermined pixel unit and outputs as a signal having a binary level corresponding to a document image. The reading device scans the reflected light from the document surface with a reading sensor realized by, for example, a charge-coupled device (abbreviated as CCD), and sequentially generates an image signal representing the shading of each pixel for each pixel.

A typical prior art is shown in FIG. The image signal S which is sequentially output from the CCD or the like for each pixel and is analog / digital converted is given to the line buffer 1, and the image signal stored in the line buffer 1 is
It is provided to another line buffer 2. Each of the line buffers 1 and 2 has a storage capacity corresponding to a scanning line on the document surface. Based on the image signal and the image signal S stored in the two line buffers 1 and 2, the binarization processing circuit 3 outputs the binary data D for each pixel. The binary data D is stored in the line buffer 4, and is output as final binary data by the binary data correction circuit 5 based on the binary data D and the image signal stored in the line buffer 4.

Problems to be Solved by the Invention Conventionally, when binarizing an image of an intermediate gradation, 2 pixels of, for example, four peripheral pixels that are vertically and horizontally adjacent to a pixel of interest that is a specific pixel of interest have been conventionally used. An error diffusion method is performed in which the error E obtained from the binarization situation is added to the pixel signal S of the target pixel and then the binarization process is executed.

FIG. 8 is a block diagram showing a circuit configuration for implementing the error diffusion method. The image signal S for each pixel is given to the adder circuit 6. An error signal E, which will be described later, is also applied to the adder circuit 6, and the sum signal SE = S + E of the image signal S and the error signal E is applied to the comparison circuit 7. Comparison circuit 7
Outputs the binary data D of the image signal S by discriminating the level of the sum signal SE by the threshold value Sh from the threshold value setting circuit 8.

The binary data D is given to the error calculation circuit 9. Further, the image signal S is given to the error calculation circuit 9, and the error e in the pixel corresponding to the image signal S is calculated. That is, the error calculation circuit 9 uses the binary data D from the comparison circuit 7.
= “1”, the error e = S and the binary data D =
When it is "0", the error e = SR (R is a constant).

The error e from the error calculation circuit 9 is delayed by one pixel by the delay circuit 10 and applied to the line buffer 11, and the error e _D delayed by one pixel is applied to the multiplication circuit 12.

The line buffer 11 has a storage capacity that is smaller by two pixels than the number of pixels of one scanning line. Therefore, when the error e corresponding to each pixel is assumed as shown in FIG. 5 (3), the error e _D is given from the delay circuit 10 to the line buffer 11,
The error e _A is output from the line buffer 11. The output e _A from the line buffer 11 and the errors e _B and e _C via the delay circuits 13 and 14 are given to the multiplication circuit 12, respectively.

The multiplication circuit 12 applies the weighting factors k1, k to the errors e _A , e _B , e _C , e _D.
A value obtained by multiplying 2, k3, k4 is given to the adder circuit 15, and the added value is output from the adder circuit 15 as an error signal E. That is, _{E = k1 · e A + k2} · e B + k3 · e C + k4 · e D.

The circuit configuration shown in FIG. 8 for realizing the error diffusion method is usually
It is realized by adding to the circuit configuration shown in FIG. Therefore, in such a conventional image processing apparatus, two line buffers 1 and 2 for temporarily storing the input image signal S and one line buffer 4 for storing the binarized data D are provided. In addition, it is necessary to provide one line buffer 11 for storing the error e shown in FIG. 8, which increases the cost of the image processing apparatus.

It is an object of the present invention to provide an image processing apparatus capable of binarizing an image signal by an error diffusion method without providing a new storage means such as a line buffer memory.

Means for Solving the Problems According to the present invention, an image signal generating unit that sequentially generates a first image signal that represents the light and shade of each pixel, and an output of the image signal generating unit, and improve the contrast. And the second image signal corrected for
Image signal correction means for deriving a first image signal corresponding to a pixel in the vicinity of a pixel corresponding to the image signal, and each output and input from the image signal correction means
The second image signal is corrected so that the larger the deviation between the level of the second image signal and the predetermined discrimination level is, the smaller the deviation of the pixel in the vicinity of the pixel having the larger deviation becomes. Level discrimination, the first 2 of the first image signal
Error diffusion means for obtaining the value data, and in response to the output from the error diffusion means, the first binary data is compressed to obtain the second binary data of the first image signal, and the second binary data is obtained. An image processing apparatus comprising: a data compression unit that gives first error binary data corresponding to pixels near a pixel corresponding to binary data to the error diffusion unit.

Operation According to the present invention, the first image signal representing the light and shade of each pixel generated from the image signal generating means is given to the image signal correcting means, and the second image signal is corrected to improve the contrast. It is derived as an image signal. Further, the image signal correction means derives the first image signal corresponding to the pixel in the vicinity of the pixel corresponding to the derived second image signal from the input first image signal.

These second image signals and the first image signals corresponding to the pixels near the pixels corresponding to the second image signals are given to the error diffusion means. In addition, the error diffusion means includes a first image signal that is input before the first image signal that is input from the data compression means that performs compression processing on the first binary data after level discrimination. Binary data is given.

The larger the deviation between the level of the input second image signal and the predetermined discrimination level, the larger the deviation of the error diffusion means is in the vicinity of the pixel, and the second image signal is input to the error diffusion means. The second image signal is corrected and level discriminated so that the deviation of the second image signal inputted from the image signal correcting means becomes smaller, and the first image signal of the first image signal according to such an error diffusion method is used. Binary data is created and given to the data compression means.

The data compression means performs compression processing from the input first binary data to create the second binary data of the first image signal, and corresponds to the second binary data as described above. First binary data corresponding to pixels in the vicinity of the pixel is given to the error diffusion means.

As described above, the error diffusion unit includes pixels corresponding to the second image signal input from the image signal correction unit in time series earlier than the second image signal which is corrected according to the error diffusion method and level-discriminated. Since the first pixel signal and the first binary data are given from the image signal correction means and the data compression means, respectively, when executing the error diffusion method,
It is not necessary to provide a storage means such as a line buffer memory. Therefore, the circuit configuration is simplified and the cost is reduced.

First Embodiment FIG. 1 is a block diagram showing a simplified basic configuration of an image processing apparatus 20 which is an embodiment of the present invention.
The original document image is sequentially scanned and read by the reading unit 22 that includes a CCD (charge coupled device) and the like. The analog image signal output by the reading unit 22 is an analog / digital (hereinafter abbreviated as “A / D”) conversion circuit 23.
And is converted into a digital image signal. This digital image signal corresponds to, for example, 8-bit data, and the read / write of each pixel is represented by image data S1 of 256 (= 2 ⁸ ) gradations of 0 to 255.

The gradation data S1 output from the A / D conversion circuit 23 is given to the image processing circuit 24. The image processing circuit 24 uses the MTF correction means 2
5. The error diffusion circuit 26 and the compression processing circuit 27 are included.

The MTF correction means 25 derives a second image signal S2 obtained by performing MTF (Modulation Transfer Function) correction, which will be described later, for improving the contrast on the first gradation data S1 which is the first image signal. The error diffusion circuit 26 is supplied with the first gradation data PS corresponding to the pixels near the pixel corresponding to the second gradation data S2.

In the error diffusion circuit 26, each output S2 from the MTF correction means 25,
From the first binary data PD corresponding to the pixels near the pixels corresponding to PS and the second grayscale data S2, the grayscale level represented by the second grayscale data S2 and the threshold level Sh for performing binarization The larger the deviation is, the smaller the deviation of the pixel in the vicinity of the pixel having the larger deviation becomes, and the second gradation data S2 is corrected so that the deviation becomes smaller, and then the data processing is performed according to the error diffusion method described later that the level discrimination is performed. The first binary data D1 of the first gradation data S1 is given to the compression processing circuit 27.

The compression processing circuit 27 converts a plurality of binary data D1 derived corresponding to each pixel of the input two scanning lines into a plurality of binary data D2 corresponding to one scanning line and outputs the binary data D2. While performing the compression process, the error diffusion circuit 26 is provided with the first value data PD corresponding to the pixels near the pixel corresponding to the second binary data D2.

2 is a block diagram showing the basic configuration of the MTF correction means 25, FIG. 3 is a block diagram showing the basic configuration of the error diffusion circuit 26, and FIG. 4 is a basic configuration of the compression processing circuit 27. It is a block diagram showing. Further, FIG. 5 is a diagram showing the corresponding relationship between the pixels corresponding to the first gradation data S1 and the first binary data D1 of each pixel, and each error e obtained by the error calculation described later.

With reference to FIG. 2, the first gradation data S1 which is the first image signal after A / D conversion is given to the line buffer memory 28 of the MTF correction means 25, and each pixel corresponding to one scanning line. The gradation data S1 for each of them is temporarily stored and is given to the MTF correction circuit 38 via the delay circuits 30 and 31 for delaying one pixel. The first gradation data S1 delayed by one line corresponding to one scanning line by the line buffer memory 28 is given to the next line buffer memory 29 and temporarily stored therein, and also passes through delay circuits 32, 33, 34. It is given to the MTF correction circuit 38. The first grayscale data S1 further delayed by one scanning line by the line buffer memory 29 is derived as the first grayscale data S _C via the delay circuits 35, 36 and 37.

Since each of the delay circuits 32 to 37 outputs the input signal delayed by one pixel, the delay circuits 32 and 33 output the first grayscale data shown in FIG. S, S _H is MT
It is given to the F correction circuit 38. Similarly, the first gradation data S _A is derived from the delay circuit 35, and the first gradation data S _B is supplied from the delay circuit 36 to the MTF correction circuit 38. Further, the delay circuit 31 provides the first gradation data S _F to the MTF correction circuit 38.

The MTF correction circuit 38 inputs these first gradation data
Based on S, S _B , S _D , S _F , S _H , MTF correction for improving the contrast of the pixel corresponding to the first gradation data S is performed, and the second gradation which is the second image signal Output the data S2.

That is, in the MTF correction circuit 38, with respect to the target pixel to be subjected to MTF correction, the first gradation data S _B , S _D , S _F , S _H corresponding to the respective pixels that are close to each other in the vertical direction and the horizontal direction.
The average gradation data S _{MEAN according} to the following equation is calculated from
See Fig. 1).

Next, regarding constants A and B having a relationship of AB = 1,
The second gradation data S2 is calculated according to the following equation.

S2 = A * S * B * S _MEAN (2) The second gradation data S2 thus calculated and output in the MTF correction circuit 38 is the first gradation initially derived from the corresponding pixel. The contrast is improved compared to the data S1.

Referring to FIG. 3, the first gradation data S _A , S _B , S _C , S _D derived from the MTF correction means 25 are error calculation circuits 40, 41, 42, 43 of the error diffusion circuit 26. Given to each. Also, M
The second gradation data S2 from the TF correction means 25 is given to the adding circuit 44. The error calculation circuits 40 to 43 include the first binary data D _A and D _{B of} each pixel corresponding to the first gradation data S _{A to} S _D from the compression processing circuit 27 shown in FIG. , D _C , D _D
Is given.

Each of the error calculation circuits 40 to 43 receives the first gradation data and the first binary data S _A , D _A ; S _B , D _B ; S _C , D _C ; S _D , D _D which will be described later. The error e _A , e required to implement the error diffusion method
_B , e _C and e _D are respectively calculated and given to the multiplication circuits 46, 47, 48 and 49, respectively. Multiplication results from the multiplication circuits 46 to 49 k1e _A , k2
_{· E B, k3 · e C} , k4 · e D is given to the addition circuit 44 are added by the adder circuit 45. The addition circuit 44 gives the comparison circuit 50 an addition result SE obtained by adding the addition result E from the addition circuit 45 to the second gradation data S2. The comparator circuit 50 compares the output SE from the adder circuit 44 with the threshold value set in advance in the threshold value setting circuit 39.
Level discrimination is performed with Sh as the discrimination level, and the second gradation data S2
The first binary data D1 of the pixel corresponding to is output.

Referring to FIG. 4, the first binary data D1 derived from the error diffusion circuit 26 is first supplied to the line buffer memory 51 via the switching switch SW3, and is supplied to a plurality of first scanning lines corresponding to one scanning line. The binary data D1 of is temporarily stored.

The line buffer memory 51 has a storage capacity that is smaller by two pixels than the number of pixels corresponding to one scanning line. The first binary data D1 stored in advance from the line buffer memory 51 passes through delay circuits 53, 54, 55 and a logical division (OR) gate.
Given to G1. When the first binary data D1 corresponding to one scanning line is stored in the line buffer memory 51, the changeover switch SW3 is next switched so that the binary data D1 is given to the delay circuit 52. The output from the delay circuit 52 is OR
Given to gate G1.

Since each of the delay circuits 52, 53, 54, 55 outputs data with a delay corresponding to one pixel, the first binary data D1 given from the error diffusion circuit 26 to the compression processing circuit 27 is converted into the fifth binary data D1. In the case of the binary data D shown in FIG. 2B, the output from the delay circuit 52 is the binary data D _D , and the output from the delay circuit 55 is the binary data D _C. Binary data D _A and D _B are derived from the delay circuits 53 and 54, respectively. The binary data D _C , D _D from the delay circuits 55, 52 are output as the second binary data D2 of the pixel corresponding to these binary data D _C , D _D via the OR gate G1. The first binary data D _{A to} D _D output from the delay circuits 52 to 55 are applied to the error calculation circuits 40 to 43 of the error diffusion circuit 26 shown in FIG. 3, respectively.

Next, the error diffusion method will be described below with reference to FIGS. The first gradation data S, the first binary data D and the error e corresponding to the pixel of interest to be binarized,
The first gradation data, the first binary data, and the error corresponding to the pixels in the vicinity of the target pixel are assumed as shown in FIG. At this time, the second gradation data S2 after MTF correction of the pixel of interest
To SE, which is the error data E of the pixel near the pixel of interest,
Binary determination is performed at a preset threshold level Sh to obtain first binary data D1. That, SE = S + E = S + k1 · e A + k2 · e B + k3 · e C + k4 · e D ... (3) where the error ei (i = A, B, C, D) , the error calculation circuit 40 In 43, it is calculated according to the following equation.

Here, the first binary data Di (i = A, B, C, D) is set in the comparison circuit 50 by the following equation.

Here, the above-mentioned first gradation data Si corresponds to each pixel i (i = A, B,
Gradation data corresponding to (C, D). For example, in the case of r-bit data, it takes a value from 0 to 2 ^r -1.

The constant R is a value obtained by adding 1 to the maximum value of the first gradation data Si, that is, 2 ^r .

Further, the above k1 to k4 are the error in the multiplication circuits 46 to 49.
It is a weighting coefficient of each pixel by which e _{A to} e _D are multiplied, and is set by the following mutual relation.

0 <k1, k2, k3, k4 <1, k1 + k2 + k3 + k4 = 1 (6) For example And in other cases, Is. The respective values of k1 to k4 are appropriately set so that a suitable result can be obtained in the binarization processing of the image.

For example, assuming that the number of bits of gradation data is r = 8, the first gradation data S1 takes various values from 0 to 255. The larger the value, the whiter the shade of the corresponding pixel, and the smaller the gradation, the darker it is. Represents

To simplify the error calculation, the minimum value of the first gradation data S1 corresponds to 0 corresponding to a black pixel, and the maximum value corresponds to a white pixel.
When set to 256, this first gradation data S1 is converted to binary data D
Binarizing to 1 corresponds to the determination by considering the value of the first gradation data S1 as 0 (black pixel) or 256 (white pixel). Therefore, an error occurs in such a determination.

That is, when the gradation data S = 200 in decimal display, it is determined that the pixel is a white pixel (gradation data S = 256).
Only the difference 56 is judged on the white pixel side, and the gradation data S
= 100, the determination of a black pixel (gradation data S = 0) means that the difference 100 is determined on the black pixel side. Therefore, in the error diffusion method, the error generated in the above-described binarization determination is taken into consideration in the binarization determination of the next pixel, and when the next pixel of interest is binarized, the pixels in the vicinity of this pixel of interest are The binarization determination is performed by incorporating the above-mentioned error generated in 1) by a predetermined weighting (k1, k2, k3, k4).

When the number of bits of gradation data r = 8, the constant R
= 2 ^r = 256. According to the threshold level Sh set in advance in the threshold setting circuit 39, when Si = 01010101 ₍₂₎ = 85, Di = “0”, that is, when it is determined to be a white pixel, the error ei = Si−R = 85-256 = -171 = 1010101 ₍₂₎ is set.

On the other hand, when Si = 01010101 ₍₂₎ = 85, when Di = “1”, that is, when it is determined that the pixel is black, the error is set to ei = Si = 85 = 001010101 ₍₂₎ .

Here, in the error ei displayed in a binary number, the most significant bit (MSB) of the error is represented by a decimal value by "0" and a negative value by "1".

The error calculation circuits 40 to 43 for realizing the error calculation according to the fourth equation can be realized by the simple circuit configuration shown in FIG. Here, Si (r-1), Si (r-
2), ..., Si (0) is a signal for each bit of the first gradation data Si from the most significant bit (MSB) side to the least significant bit (LS
B) respectively, and the errors ei (r), ei (r-1), e
i (r−2), ..., Ei (0) indicate the error ei for each bit from the most significant bit to the least significant bit.

The first binary data Di is derived as an error signal ei (r) via the inversion buffer N1, and the first gradation data Si (r-
1) to Si (0) are buffers Br-1, Br-2, ..., B respectively.
It is derived as error signals ei (r-1) to ei (0) via 0.

As described above, according to this embodiment, the error calculation circuits 40 to 43 in the error diffusion circuit 26 can be realized by a relatively simple circuit configuration as shown in FIG. The error e _A to e first tone data _D will be required when calculating the S _A to S _D and the first binary data D _A to D _D, the final from the first image data S1 input Second 2 which is a typical binary output
Since it is given from the MTF correction means 25 and the compression processing circuit 27 provided in the image processing circuit 20 in order to create the value data D2, the error ei (i = A = A) as in the conventional error calculation shown in FIG. , B, C, D) need not be stored in the line buffer memory 11, so that the error storing line buffer memory 11 can be omitted and the cost of the image processing apparatus 20 can be reduced.

In the above embodiment, the MTF correction means 25 and the compression processing circuit 2
7 to the first gradation data S _{A to} S _D and the first binary data D _A
˜D _D is derived and used, but in addition, a buffer memory such as a so-called smoothing processing circuit that is provided in the image processing apparatus 20 and that removes and suppresses the unevenness in units of one pixel is used. Alternatively, the derived first binary data D _{A to} D _D may be used.

Further, in the present embodiment, the error E calculated by the error diffusion method is calculated as the weighted addition value of the error in each of the four pixels in the vicinity of the target pixel, but the target area of this error calculation is expanded to the four pixels or more. Alternatively, the error E may be calculated.

According to the present invention, in the image processing device including the image signal correcting means and the data compressing means, the error diffusion means is
Responsive to the first image signal from the image signal correcting means and the first binary data from the data compressing means, the second image signal is corrected to realize the error diffusion method, and then the level discrimination is performed. Therefore, the number of components such as the storage unit and the delay unit is reduced, the circuit configuration is simplified, and the cost of the image processing apparatus is reduced.

[Brief description of drawings]

FIG. 1 is a block diagram showing a simplified basic configuration of an image processing apparatus 20 which is an embodiment of the present invention, FIG. 2 is a block diagram showing a configuration of an MTF correction means 25, and FIG. 3 is an error diffusion circuit.
26 is a block diagram showing the configuration of FIG. 4, FIG. 4 is a block diagram showing the configuration of the compression processing circuit 27, and FIG. 5 is gradation data of each pixel.
FIG. 6 is a diagram showing the correspondence between binary data and errors, FIG. 6 is a block diagram showing an embodiment of the error calculation circuits 40 to 43, and FIG. 7 is a block diagram showing the configuration of a conventional binarization process. The figure is a block diagram showing a conventional typical circuit configuration for realizing the error diffusion method. 20 ... Image processing device, 21 ... Original, 22 ... Reading means, 23
...... A / D conversion circuit, 24 …… Image processing circuit, 25 …… MTF correction means, 26 …… Error diffusion circuit, 27 …… Compression processing circuit, 38 ・ ・ ・
… MTF correction circuit, 40-43 …… Error calculation circuit, 50 …… Comparison circuit

Claims (1)

(57) [Claims] 1. An image signal generating means for sequentially generating a first image signal representing the shading of each pixel, and a correction for improving the contrast in response to the output of the image signal generating means. Image signal correction means for deriving a second image signal and a first image signal corresponding to a pixel in the vicinity of a pixel corresponding to the second image signal, and each output and input from the image signal correction means. In response to the binary data, the larger the deviation between the level of the second image signal and the predetermined discrimination level, the smaller the deviation of the pixels in the vicinity of the pixel having the larger deviation, and the level of the second image signal corrected. Error diffusion means for discriminating and obtaining first binary data of the first image signal; and compression of the first binary data in response to the output from the error diffusion means to obtain the second binary data of the first image signal. Of the binary data of The image processing apparatus characterized by including a data compression means for providing a first binary data corresponding to pixels of the pixel neighborhood corresponding to the second binary data in the error diffusion means.