JP2521052B2 - Speech coding system - Google Patents

Description

TECHNICAL FIELD The present invention relates to a speech coding system.

[Prior Art] For example, when an audio signal is digitally processed such as transmitting an audio signal using a high-speed digital line or accumulating and reproducing the audio signal for an audio response device, the audio signal is digitally processed by some method. Need to be converted to.

Basically, an audio signal is an analog signal having a frequency band of 0.3 to 3.4 KHz. In order to convert this into a digital signal, for example, an analog / digital converter having a sampling frequency of 8 KHz and a resolution of 8 bits may be used. (PCM (P
ulse Code Modulation). Then, to return this digital signal to the original audio signal, the sampling frequency
It has a resolution of 8KHz at 8KHz and can be converted to an analog signal by a digital / analog converter, and then waveform shaped through a low pass filter. At this time, the higher the resolution of the analog / digital converter and the digital / analog converter (that is, the bit width of the PCM code), the higher the quality of the reproduced sound.

By the way, such a PCM-encoded audio signal is 1
The bit rate per second (data rate; hereinafter, referred to as bit rate) is 64 Kbps, and transmitting such a high bit rate audio signal requires a very high-speed transmission path, and accumulates such an audio signal. For this purpose, a memory having a huge storage capacity is required. Therefore, various proposals have conventionally been made for reducing the bit rate of the audio signal.

One of them is a differential PCM coding method for forming a difference between PCM codes adjacent in time series. This differential PCM coding method uses redundancy based on the correlation of the audio waveform, and since the value change between adjacent samples is often included in a limited dynamic range. The number of bits per sample can be reduced. Adaptive differential PCM which further advanced this differential PCM coding method
The adaptive differential PCM system recommended by CCITT (International Telegraph and Telephone Consultative Committee), which is one of the encoding systems, realizes a bit rate of 32 kbps.

Other than this, APC-AB (Adaptive Prediction Coding with Ad
aptive Bit Allocation) method, or LSP (Line Spectrum Pair) method by voice analysis and synthesis method.

However, such an adaptive differential PCM method, APC-AB
The scheme and the LSP scheme have a disadvantage that encoding and decoding processes are very complicated, and a device for realizing them is very expensive.

Meanwhile, the quasi-instantaneous companding method is one of the high-quality PCM audio transmission methods for broadcasting satellites. This quasi-instantaneous companding method is based on PCM
The coded audio data is divided into blocks of a predetermined number in a time series, and scale data representing the most significant digit corresponding to the maximum value of the signal absolute value in each block is identified. The bit number data is shaped into code data, and the encoding process is relatively simple, and the bit number of one sample can be easily reduced. However, such a quasi-instantaneous drawing method is not efficient enough.

Therefore, as a method to improve the efficiency of this quasi-instantaneous companding method, “combining differential PCM method and quasi-instantaneous companding” is considered, but generally, if quasi-instantaneous companding is simply applied to the differential PCM method, compression The missing bit at the time causes a transmission error, and the error is accumulated in the integrator on the reception side, and reception becomes impossible.

One way to solve this problem is to use differential bit companding PCM (DC-PC by accumulating missing bits).
M) ”(Takahashi et al., The Transactions of the Institute of Electronics and Communication Engineers, '84 / 10 Vo1.J67-
B No.10) has been proposed.

However, this method is effective when the difference data of about 15 bits is compressed to about 8 bits, and cannot be applied to a low bit rate coding method in which the difference data of 8 bits is compressed to about 3 bits.

In other words, at such a low bit rate, the scale position may change significantly between blocks, such as when the amplitude of the audio waveform changes significantly between blocks. May be larger than the valid data to be transmitted. In such a case, the data to be transmitted is buried in the error signal. Proper data transmission cannot be realized.

[Object] The present invention has been made in order to solve the above-mentioned inconveniences of the prior art, and it is an object of the present invention to provide a voice encoding method capable of reproducing high-quality voice by a simple process at a low bit rate. Has an aim.

[Configuration] According to the present invention, in the DC-PCM audio encoding process, compressed data which is caused by quasi-instantaneous companding and 1 is added to the least significant digit of the compressed data to form added code data. For each sample, one of the compressed data and the addition code data that is closer to the signal value before compression is selected as the code data, and further, if the selected code data cannot be represented by the scale value that is set first, The above-described object is achieved by correcting the code data so that the scale value is increased by one.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

 First, the principle of the present invention will be described.

For example, an audio signal as shown by the solid line in FIG. 1 (a) is sampled at a sampling frequency of 8 KHz, each sample is converted into 8-bit digital data (PCM code), and this digital data is quasi-instantaneously expanded. Think to do. As conditions for quasi-instantaneous companding, the number of samples constituting one block is 8, each sample is compressed to 3 bits, and the scale value is represented by 3 bits. The 8-bit digital data sampled and formed in this manner is digital data represented by 2's complement, and the most significant digit is a sign bit (a sign bit for distinguishing between positive and negative).

Here, it is assumed that the digital data of samples # 1 to # 8 are obtained as shown in FIG.

In this block consisting of 8 samples, the maximum absolute value is the data of sample # 1, so the position of the most significant digit of the bit pattern, that is, bit 4 is set to the quasi-instantaneous companding scale position POS. To be done.

Then, for each of the samples # 1 to # 8, bit 5 to lower 3 of one digit higher than this scale position
The digit is extracted as a transmission bit, that is, code data. Therefore, in the MSB (most significant digit) of the code data, there is a sign bit (code bit) that indicates whether the code data is positive or negative.

As a result, coded data by quasi-instantaneous companding can be obtained as shown in FIG. That is, the data of the scale position POS is arranged in the first 3 bits, and subsequently, the 3-bit code data extracted in the samples # 1 to # 8 is sequentially arranged.

At this time, in order to realize the above-mentioned DC-PCM, the data of the lower bits (hereinafter referred to as the missing bits) that are not included in the code data are sequentially accumulated for each sample, and a carry occurs in the accumulated value. If so, 1 is added to the LSB of the code data. In this case, this addition occurs in samples # 3, # 6, and # 8 marked with "*".

In this way, code data reflecting the contents of the missing bits is formed.

When decoding the encoded data and reproducing the audio signal, first, the scale position POS is identified from the contents of the leading 3 bits.

Next, the subsequent data is sequentially divided into code data of 3 bits, and the MSB of the code data is positioned one digit higher than the scale position POS identified above.
It is located in the 8-bit data, the MSB contents of the code data (that is, the contents of the sign bit) is placed in the upper digit of the code data, and 0 is placed in the lower digit of the code data. Then, the 8-bit difference data is decompressed (see (c) in the figure).

Then, the difference data is integrated, the integrated value is digital-to-analog converted, and the waveform is shaped by the low-pass filter, whereby the audio signal is reproduced.

Now, the audio signal encoded and reproduced by such DC-PCM has a level higher than that of the original audio signal shown by the solid line in FIG. 1 (b), as shown by the alternate long and short dash line. Therefore, when DC-PCM is applied to a low bit rate audio signal (coded signal) with a small number of bits per sample in this way, the sound quality of the reproduced audio signal is It may deteriorate.

In order to prevent such deterioration of sound quality, the coded data at each sample point should be set within the quantized bit so that the data obtained by decoding the coded data, that is, the decoded value, becomes closer to the original speech signal. You can correct it with.

One method for this is to set the decoded value of the code data and the LSB (least significant digit) of the code data to 1 for each sample point.
It is to determine which of the decoded values of the data (hereinafter referred to as addition code data) to which is added is closer to the original voice signal, and select the code data at the sample point based on the determination result.

For example, for the code data formed as shown in FIG. 2B, addition code data as shown in FIG. 2D is obtained, and when this addition code data is decoded, as shown in FIG. The decoded value is obtained as shown.

Comparing the integrated value of the decoded value of the addition code data and the integrated value of the decoded value of the code data with the original audio signal, in this case, for sample # 1, the decoded value of the addition code data is more original. Since it is close to an audio signal, code data is selected as a code value for samples # 2 to # 8, and addition code data is selected as a code value for sample # 1.

As a result, the coded data is corrected as shown in FIG. 2 (f), and the decoded value is improved as shown in FIG. 2 (g). The state is shown by a two-dot chain line in FIG.

By such a correction process, an audio signal closer to the original audio signal can be reproduced. However, as a result, code data that cannot be expressed by the initially set scale value may be selected. In such a case, the code data formed by increasing the scale value by one is selected as the code value. .

FIG. 3 shows a speech coder according to an embodiment of the present invention. This speech coding apparatus corrects coded data by the method described above. The conditions for the quasi-instantaneous companding are those described above.

In the figure, the input audio signal SS is band-limited by the low-pass filter 1 and then applied to the analog / digital converter 2 to be converted into an 8-bit digital signal DS. This analog / digital converter 2 performs linear quantization at a sampling frequency of 8 KHz.

The digital signal DS has a storage capacity of 16 samples for 2 blocks, and the capacity is variable in block units (that is, the storage capacity is arbitrarily set to 1 block and 2 blocks). It is added to a difference data forming circuit 4 including a circuit and a subtractor.

Difference data output from the difference data forming circuit 4
The DD is added to a buffer memory 5 similar to the buffer memory 3 and a scale value setting unit 6 for setting a scale value for quasi-instantaneous compression.

The data stored in the buffer memory 5 is added to a quasi-instantaneous compression unit 7 that performs quasi-instantaneous compression coding for each sample and an accumulator 8 that accumulates missing bits that are not included in the code data. The buffer memories 3 and 5 are normally set to have a storage capacity of one block.

The scale value setting unit 6 identifies the largest absolute value of the consecutive 8 samples of the difference data DD output from the difference data forming circuit 4, determines the most significant digit of the bit pattern, and determines the bit. The position is output as 3-bit scale data DK.

This scale data DK is converted into an LSB of the compression difference data DC by the quasi-instantaneous compression unit 7, the accumulator 8, the quasi-instantaneous expansion unit 9 for decoding the compression difference data DC output from the quasi-instantaneous compression unit 8, and the adder 10. A quasi-instantaneous decompression unit 11 for decoding the addition code data DCm formed by adding 1;
Also, it is added to one input end of a multiplexer 12 for shaping one block of data into a predetermined signal meter type.

The quasi-instantaneous compression unit 7 sets the MSB to be a 1-bit higher digit than the scale position represented by the scale data DK added from the scale value setting unit 6 with respect to each difference data DD added from the buffer memory 5 for each sample 3
While extracting the bit data, when the carry signal CC is input from the accumulator 8 for the sample, add 1 to the LSB of the 3-bit data and add it as compression difference data DC to the adder 10 and quasi-instantaneous expansion. It outputs to the input terminal B of the section 9 and the selector 13.

The accumulator 8 saves the storage data at the start of the block in the accumulator buffer 14, identifies the missing bit in the digital signal DD added from the buffer memory 5 based on the scale data DK added from the scale value setting unit 6, When the missing bit is accumulated for each sample and a carry occurs in the accumulated value, a carry signal CC is output to the quasi-instantaneous compression unit 7. When the selection signal SL output from the comparison unit 15 is raised to the logic level H, 1 is subtracted from the most significant digit of the missing bit at that time and the stored content is corrected.
Further, when the reprocessing signal RE is output from the comparison unit 15, the saved data is read into the accumulator buffer 14 and the stored contents are restored to the initial state of the block.

The quasi-instantaneous expansion unit 9 decodes the compression difference data DC added from the quasi-instantaneous compression unit 7 into the decoded difference data FD based on the scale data DK added from the scale value setting unit 6, and integrates this decoded difference data DD. Output to the section 16. The integrating unit 16 integrates the received decoded difference data FD to form the decoded data BD, and outputs this decoded data BD to one input end of the comparing unit 15.

The adder 10 forms addition code data DCm by adding 1 to the LSB of the compression difference data DC added from the quasi-instantaneous compression unit 7 and forms it to the quasi-instantaneous decompression unit 11 and the input terminal A of the selector 13.
When a carry is generated as a result of the addition, the carry signal CY is formed and the carry signal is output.
CY is output to the comparison unit 15.

The quasi-instantaneous decompression unit 11 decodes the addition code data DCm added from the adder 10 into 9-bit decoded difference data FDm based on the scale data DK added from the scale value setting unit 6, and decodes this decoded difference data FDm. Output to the integrating unit 17. The integrating unit 17 integrates the received decoded difference data FDm to form the decoded data BDm, and compares the decoded data BDm with the comparing unit.
Output to 15 other input terminals.

The digital signal DS which is the original signal from the buffer memory 3 is added to the comparison unit 15, and the error between the digital signal DS and the decoded data FD and the error between the digital signal DS and the decoded data FDm are sampled. When the former is smaller than the latter, the selection signal SL output to the selector 16 and the accumulator 8 is set to the logic level L,
When the former is larger than the latter, the selection signal SL is set to the logic level H.

Therefore, when the decoded value of the compressed differential data DC is closer to the original signal, the compressed differential data DC is the added code data DD.
When m is closer to the original signal, the addition code data DCm is selected by the selector 13 and output to the multiplexer 12 as code data DCo. Further, when the addition code data DCm is selected, the contents of the accumulator 8 are updated, so that the error is properly accumulated between the samples.

The multiplexer 12, as shown in FIG. 4, arranges the scale data DK output from the scale value setting unit 6 at the head, and subsequently, sequentially arranges the code data DCo of each sample to generate a signal. The encoded data DL for one block is formed and output to the next-stage device (for example, a data transmission device or a data storage device).

Further, when the carry signal CY is input when the selection signal SL is set to the logic level H, the comparison unit 15 determines that the scale data set at that time cannot represent the code data of the sample, The reprocessed signal RE is output to the scale value setting unit 6, the accumulator 8 and the multiplexer 15 in order to increase the scale value in the block by one.

When this reprocessed signal RE is output, the multiplexer 12
Does not output the 1 block data input at that time,
Further, the stored contents of the accumulator 8 are restored to the state at the start of the block, and the scale value setting unit 6 further changes the set scale value by one. Further, the storage capacities of the buffer memories 3 and 5 are set to 2 blocks. As a result, the quasi-instantaneous compression process is performed again on the data of the same block.

In this way, the compression difference data DC output from the quasi-instantaneous compression unit 7 is corrected and output as encoded data DL.

FIG. 5 shows an example of a speech decoding apparatus according to an embodiment of the present invention. This audio decoding device decodes the encoded data DL encoded by the above-described audio encoding device and outputs an audio signal.

In the figure, the encoded data DL output from a preceding device (not shown) such as a data receiving device or a data storage device is added to the demultiplexer 21, and the leading 3 bits are scaled for each block. The scale value input end of the quasi-instantaneous decompression unit 22 identified as SC is added, and the other code data (compressed difference data) is added to the code data input end of the quasi-instantaneous decompression unit 22.

The quasi-instantaneous decompression unit 22 divides the code data to be added into 3 bits at a time, arranges the 3-bit data at a bit position corresponding to the scale data SC input in the 8-bit data, and places the higher digit than the code data. The contents of the sign bit are expanded to 9-bit data by placing 0 in the lower digit, and this 8-bit data is output to the integrating unit 23.

The integrator 23 integrates the sequentially input 8-bit data to form an 8-bit signal value in each sample of the audio signal, and outputs this to the digital / analog converter 24.

The digital / analog converter 24 uses the received signal value for 8K.
Analog signal (level signal) corresponding to the conversion frequency of Hz
And outputs this to the low-pass filter 25. The analog signal is shaped by the low-pass filter 25 and then output as a reproduced audio signal to a next-stage device (for example, an audio output device).

Thus, the configuration of the audio decoding device for decoding the encoded data according to the present invention is very simple. Therefore, for example, this speech decoding device can be realized using a general-purpose 8-bit microprocessor, and the cost can be kept extremely small.

By the way, in the above-described embodiment, the decoded data BD and BDm formed based on the compression difference data DC output from the quasi-instantaneous compression unit 7 and the addition code data DCm output from the adder 10 are compared with the original signal. As a result, either the compressed difference data DC or the addition code data DCm is selected for each sample. However, other than the decoded data can be used as the reference for this selection.

FIG. 6 shows a speech coding apparatus according to another embodiment of the present invention. In this embodiment, the difference data DD is used as the reference for the above selection. In the figure, the same parts as those in FIG. 3 and corresponding parts are designated by the same reference numerals, and the description thereof will be omitted.

In the figure, the difference data DD output from the difference data forming circuit 4 is stored in the buffer memory 3, and the data stored in the buffer memory 3 is added to the comparison unit 15 as a reference signal for comparison.

The comparison unit 15 detects an error between the reference signal added from the buffer memory 3 and the decoded difference data FD added from the quasi-instantaneous expansion unit 9, and an error between the reference signal and the decoded difference data FDm added from the quasi-instantaneous expansion unit 11. Is formed for each sample, the selection signal SL output to the selector 13 is set to the logical level L when the former is smaller than the latter, and the selection signal SL is set to the logical level H when the former is larger than the latter. Set to.

As a voice decoding device which outputs a voice signal based on the encoded data DL formed by this embodiment,
The same speech decoding device as shown in the figure can be used.

Now, in each of the embodiments described above, when the variation of the scale value is detected by the comparison unit 15, the scale value is changed and the processing of the block is executed again, but in such a method, Block data cannot be processed continuously.

Next, still another embodiment of the present invention capable of eliminating such inconvenience will be described.

FIG. 7 shows still another embodiment of the present invention.
In the figure, the same parts as those in FIG. 3 and the corresponding parts are designated by the same reference numerals or the same reference numerals with a subscript added, and the description thereof will be omitted.

In the figure, the digital signal DS output from the analog / digital converter 2 is added as a reference signal to the comparison units 15 and 35 via a buffer memory 31 having a storage capacity of one block, and The difference data DD output from the difference data forming circuit 4 is added to the scale value setting unit 33, and the quasi-instantaneous compression units 7a and 7b are also passed through the buffer memory 32 having a storage capacity of one block.
And added to accumulators 34a, 34b.

The scale value setting unit 33 uses the scale data DK ₀ corresponding to the same scale value as described above and 1 more than the scale value.
2 of scale data DK ₁ corresponding to the larger scale value
Generate one.

Then, the processing regarding the scale data DK ₀ is performed by the quasi-instantaneous compression unit 7a, the accumulator 34a, the quasi-instantaneous decompression units 9a, 11a,
The adder 10a, the integrators 16a and 17a, the comparator 15, and the selector 13a output the corrected code data DCo ₀ from the selector 13. The code data DCo ₀ is applied to the input terminal B of the selector 38a via the buffer memory 36a having a storage capacity of one block. Also,
The scale data DK ₀ is added to the input terminal B of the selector 38b via the buffer memory 37a.

Similarly, the processing related to the scale data DK ₁ is performed by the quasi-instantaneous compression unit 7b, the accumulator 34b, the quasi-instantaneous decompression units 9b and 11b,
The adder 10b, the integrators 16b and 17b, the comparator 35, and the selector 13b output the corrected code data DCo ₁ from the selector 13. The code data DCo ₁ is applied to the input terminal A of the selector 38b via the buffer memory 36b having a storage capacity of one block. Also,
The scale data DK ₁ is added to the input terminal A of the selector 38b via the buffer memory 37b.

Here, when the reprocessing signal RE is output from the comparison unit 15 at the time when the processing of one block is completed, the accumulators 34a and 34b are arranged so that the accumulator 34a immediately before the processing of the next block is started. If the stored content is changed to the stored content of 34b, and conversely, if the reprocessing signal RE is not output, the accumulator 34b stores the stored content in the accumulator 34a immediately before the processing of the next block is started. To change.

In addition, the carry signal from the adder 10b is not added to the comparison unit 35, the reprocessing signal is not generated, and only the selection signal SL ₁ is output.

Then, the selector 38a receives the reprocessed signal RE from the comparison unit 15.
Is output, the code data DCo ₀ output from the buffer memory 36a is selected, and the code data DCo ₁ output from the buffer memory 36b is selected when the reprocessed signal RE is output, and the selected code data DCo is selected. Output to the multiplexer 12.

Similarly, the selector 38b outputs the scale data DK ₀ output from the buffer memory 37a when the reprocessing signal RE is not output, and the scale data D output from the buffer memory 37b when the reprocessing signal RE is output.
K ₁ is selected and output as scale data DK to the multiplexer 12.

As a result, when carry occurs in the compression difference data DC ₀ of the quasi-instantaneous compression unit 7a due to the correction process, it is converted to the compression difference data DC ₁ formed by the quasi-instantaneous compression unit 7b based on the one-larger scale data DK _1. The data that has undergone the correction process is selected.

In this way, the two scales data DK _0, DK ₁ code data DCo ₀ corresponding to, since DCo ₁ are formed at the same time,
There is no time delay as in the above-described embodiment.

Also, the encoded data DL formed by this embodiment
As the speech decoding apparatus which outputs the speech signal based on the above, the same speech decoding apparatus as shown in FIG. 5 can be used.

FIG. 8 shows a speech coding apparatus according to still another embodiment of the present invention. This embodiment differs from the embodiment shown in FIG. 7 in that compression difference data DC ₀ , DC ₁ output by the quasi-instantaneous compression units 7a, 7b and addition code data DCm ₀ , DCm ₁ output by the adders 10a, 10b. The difference data DD is used as a criterion for selecting either of the above. In the figure, the same parts as those in FIG. 7 and corresponding parts are designated by the same reference numerals, and the description thereof will be omitted.

In the figure, the difference data DD output from the difference data forming circuit 4 is added to the comparison unit 15 and the comparison unit 35 as a reference signal for comparison via the buffer memory 31.

The comparison unit 15 includes a reference signal added from the buffer memory 31 and decoded difference data FD ₀ added from the quasi-instantaneous expansion unit 9a.
And an error between the reference signal and the decoded difference data FDm ₀ added from the quasi-instantaneous decompression unit 11a are formed for each sample, and output to the selector 13a and the accumulator 34a when the former is smaller than the latter. The selected selection signal SL ₀ is set to the logical level L, and when the former is larger than the latter, the selected signal SL ₀ is set to the logical level H.

Similarly, the comparison unit 35 is an error between the reference signal added from the buffer memory 31 and the decoded difference data FD ₁ added from the quasi-instantaneous expansion unit 9b, and the decoded difference data FDm added from the reference signal and the quasi-instantaneous expansion unit 11b. An error from ₁ is formed for each sample, and if the former is smaller than the latter, the selector 13
b and select signal SL ₁ output to accumulator 34b
Is set to the logic level L, and when the former is larger than the latter, the selection signal SL ₁ is set to the logic level H.

Also, the encoded data DL formed by this embodiment
As the speech decoding apparatus which outputs the speech signal based on the above, the same speech decoding apparatus as shown in FIG. 5 can be used.

As described above, according to each embodiment of the present invention, DC-PCM can be applied to a low bit rate voice code. In particular, since a voice decoding device for decoding can be realized with a very simple structure, a mechanism for reproducing an arbitrary voice based on the encoded data by this voice encoding can be easily incorporated. .

Note that various constants such as the number of bits in each of the above-described embodiments are not limited to those described above, and arbitrary ones can be used.

[Effect] As described above, according to the present invention, in the DC-PCM audio encoding process, the compressed data which is caused by the quasi-instantaneous companding and 1 is added to the least significant digit of the compressed data. Form the addition code data, select the compressed data and the addition code data that are closer to the signal value before compression for each sample as the code data, and the selected code data is the scale value set first. If it cannot be expressed with, the code data is corrected in a state where the scale value is increased by one, so that it is possible to prevent the transmission signal from being buried in the error signal, and as a result, at a low bit rate and with a simple The processing has the effect of reproducing high-quality voice.

[Brief description of drawings]

FIGS. 1 (a) and 1 (b) are waveform diagrams for explaining the principle of the present invention, FIGS. 2 (a) to 2 (g) are signal arrangement diagrams for explaining the principle of the present invention, and FIG. Is a block diagram showing a speech coding apparatus according to an embodiment of the present invention, FIG. 4 is a signal arrangement diagram illustrating a signal format of encoded data, and FIG. 5 is a speech decoding according to an embodiment of the present invention. 6 is a block diagram showing a speech coding apparatus according to another embodiment of the present invention, and FIG. 7 is a block diagram showing a speech coding apparatus according to yet another embodiment of the present invention. Block diagram shown, eighth
FIG. 9 is a block diagram showing a speech coding apparatus according to still another embodiment of the present invention. 1,25 ...... Low pass filter, 2 ...... Analog / digital converter, 3,5,31,32,36a, 36b, 37a, 37b ...... Buffer memory, 4 ...... Differential data forming circuit, 6,33 ...... Scale value setting section, 7,7a, 7b ... Quasi-instantaneous compression section, 8,34a, 34b ... Accumulator, 9,9a, 9b, 11,11a, 11b, 22 ... Quasi-instantaneous extension section, 1
0,10a, 10b ... Adder, 12 ... Multiplexer, 13,13a,
13b, 38a, 38b …… Selector, 14 …… Accumulator buffer, 15,35 …… Comparison section, 16,16a, 16b, 17,17a, 17b, 23…
… Integrator, 24 …… Digital / analog converter.

(72) Inventor Hiroki Uchiyama 1-3-6 Nakamagome, Ota-ku, Tokyo Inside Ricoh Co., Ltd. (56) Reference JP 62-190930 (JP, A) JP 63-14523 (JP, A) JP 63-14524 (JP, A) IEICE Transactions '84 / 10 Vol. J67-B No. 10P. 1033-1039

Claims (1)

(57) [Claims] 1. A difference value between adjacent samples of PCM-encoded audio data is formed, and the difference value is divided into a predetermined number of blocks in a time series, and the maximum absolute value of the difference value in each block is maximum. The scale data that represents the most significant digit corresponding to the value is identified, the data of a predetermined number of bits including the most significant digit is shaped into code data, and the above audio data is compressed, and at the same time the data that was not included in the code data was missing. In the audio encoding method in which when the accumulated value of bits causes a carry, in the voice encoding system in which 1 is added to the least significant digit of the encoded data of the sample to correct the encoded data, the most significant digit and one digit more than this most significant digit The first and second code data sequences are formed based on the first and second scale data respectively corresponding to the high-order digits, and each code data is formed. For the data sequence, addition code data is formed by adding 1 to the least significant digit of the code data, and the error between the decoded value of the addition code data and the voice data corresponding to the addition code data is the addition code data. When the difference between the decoded value of the code data corresponding to and the audio data corresponding to the code data is smaller than the error, the addition code data is selected as the code value corresponding to the audio data. The code data is selected as a code value corresponding to the audio data, and the addition code data is carried by the first code data sequence, and the addition code data carried by the carry is selected as the code value. Sometimes, the second code data sequence is selected as a code value in the block, and at other times, the first code data sequence is selected. Speech coding scheme and selects a code value in the block.