JP2024062415A - Improved back barrier for gallium nitride-based high electron mobility transistors - Google Patents

Abstract

The present invention provides an improved back barrier for gallium nitride based high electron mobility transistors. A high electron mobility transistor (HEMT) device includes a substrate, an AlGaN buffer layer having an Al content between 1% and 6% above the substrate, an InGaN layer having about 10% In above the buffer layer, a GaN channel layer above the InGaN layer, and an AlGaN barrier layer above the channel layer. In one embodiment, the buffer layer is Al0.04Ga0.96N, the InGaN layer is about 2 nm thick, and the barrier layer is Al0.34Ga0.66N. The HEMT device may include a nucleation layer between the substrate and the buffer layer, a GaN spacer layer between the buffer layer and the InGaN layer, and/or an AlN intermediate layer between the channel layer and the barrier layer.

Description

[0001] This disclosure relates generally to gallium nitride (GaN)-based high electron mobility transistors (HEMTs), and more specifically to GaN-based HEMTs that include a low Al% AlGaN buffer layer and a thin InGaN layer.

[0002] Field-effect transistors (FETs) are well known in the transistor art and come in various varieties, such as HEMTs, MOSFETs, MISFETs, and FinFETs. A typical FET includes various semiconductor layers, such as silicon, gallium arsenide (GaAs), indium gallium arsenide (InGaAs), indium aluminum arsenide (InAlAs), gallium nitride (GaN), and indium phosphide (InP). In some cases, the semiconductor layers are doped with various impurities, such as boron and silicon, to increase the number of carriers in the layers, with higher doping levels of a layer resulting in higher electrical conductivity for that particular semiconductor material. A FET also includes source, drain, and gate terminals, with one or more of the semiconductor layers being a channel layer, electrically connecting the source and drain terminals. A potential difference applied between the source and drain terminals allows N-type or P-type electrical carriers to flow through the channel layer between the source and drain terminals. An electrical signal applied to the gate terminal creates an electric field that changes the carriers in the channel layer, and small changes in the gate voltage cause large fluctuations in the number of carriers in the channel layer, changing the current flow from between the source and drain terminals.

[0003] HEMT devices are widespread transistor devices with many applications, particularly high frequency or high speed applications. GaN HEMT devices are typically epitaxially grown on a suitable substrate, such as silicon carbide (SiC), sapphire, or silicon, all of which are well known to those skilled in the art. A typical HEMT device may have a SiC substrate, which includes alternating crystalline layers of silicon and carbon. A nucleation layer, such as an AlN layer, is often deposited on the SiC substrate to help promote epitaxial growth, and the nucleation layer is grown on the silicon-facing side of the substrate, such that the orientation of the crystal structure of the nucleation layer and subsequent device layers has a gallium orientation. A buffer layer is typically grown on the nucleation layer, which provides a crystal structure with limited defects, and the buffer layer is typically GaN or low Al% AlGaN. A GaN channel layer is deposited on the buffer layer, and an AlGaN barrier layer is deposited on the channel layer, forming a two-dimensional electron gas (2-DEG) layer for electron flow at the interface between the channel layer and the barrier layer.

[0004] Currently, two approaches are used in the art to form the back barrier of AlGaN/GaN HEMTs. The first approach employs a thin InGaN layer between the GaN channel layer and the GaN buffer layer, and the second approach grows the GaN channel layer on top of a low Al% AlGaN buffer layer. The first approach produces a higher breakdown voltage and a lower thermal resistance from the channel layer to the backside of the wafer than the second approach. The turn-off characteristics of the HEMTs of the first approach are not as sharp as the second approach. At low voltages, this leads to a lower transconductance, a more negative pinch-off voltage, and a lower RF gain than the second approach for the HEMTs. However, the second approach produces a lower breakdown voltage and a higher thermal resistance from the channel layer to the backside of the wafer compared to the first approach.

[0005] The first approach uses polarization in a thin InGaN layer, typically located at least 10 nm from the AlGaN/GaN interface, to create a voltage-independent conduction band back barrier. To create a large enough barrier in the conduction band, one must use a thickness and In content that results in the conduction band in the InGaN crossing or nearly crossing the Fermi level. Because the InGaN conduction band crosses the Fermi level, there are some electrons in the InGaN layer, which results in a less steep off-to-on transition of the HEMT with gate voltage compared to a HEMT without an InGaN layer.

[0006] The second approach grows a GaN channel layer on low Al% AlGaN. The difference in lattice constants between AlGaN and GaN creates a net polarization charge at the GaN channel/AlGaN buffer interface. This polarization charge creates an electric field in the channel layer that further confines electrons at the AlGaN barrier/GaN channel interface. The conduction band lift in the channel layer is the polarization field multiplied by the thickness of the channel layer. This results in a thickness of about 50 nm that creates a large conduction band lift in the channel layer. Due to the low Al% in the AlGaN buffer layer, the conduction band discontinuity between the AlGaN buffer layer and the GaN channel layer contributes only slightly to the electron confinement in the channel layer. As the drain voltage increases, short channel effects can occur and the electric field due to the drain voltage can offset the electric field due to the polarization. When this happens, the electron confinement in the channel layer is reduced and the AlGaN buffer layer approach becomes ineffective. This results in a lower breakdown voltage compared to the first method.

FIG. 2 is a cross-sectional view of an AlGaN HEMT device having a low Al % AlGaN buffer layer and a thin InGaN layer. FIG. 2 is a conduction band diagram for the AlGaN HEMT device shown in FIG. 1 with the thin InGaN buffer layer removed. FIG. 2 is a conduction band diagram for the AlGaN HEMT device shown in FIG. 1, where the low Al % AlGaN buffer layer is replaced with a GaN buffer layer. FIG. 2 is a conduction band diagram for the AlGaN HEMT device shown in FIG.

[0011] The following description of embodiments of the present disclosure relating to GaN-based HEMTs with low Al% AlGaN buffer layers and thin InGaN layers is merely exemplary in nature and is not intended to limit in any way the present disclosure or its application or uses.

[0012] As detailed below, the present disclosure proposes a HEMT that provides improved confinement of electrons in the device channel layer leading to improved RF performance of the HEMT over known devices for all voltages at which the HEMT is operated. The novel approach inserts a thin InGaN layer into a GaN channel layer grown on a low Al% AlGaN buffer layer. The polarization field caused by the difference in lattice constants between the GaN layer and the AlGaN buffer layer prevents the conduction band of the InGaN layer from crossing the Fermi level, preserving the sharp transition from the off state to the on state with gate voltage resulting from the second approach described above. When the drain voltage is increased, the polarization field can be countered by the field created by the drain voltage, which results in confinement of electrons in the channel layer due to the conduction band barrier created by the thin InGaN layer. This results in a higher breakdown voltage than the second approach can produce for the same design.

[0013] Figure 1 is a cross-sectional device view of a HEMT device 10 including a substrate 12 on which various epitaxial or device layers of the HEMT device 10 are deposited or grown using known epitaxial growth techniques. The substrate 12 can be any substrate suitable for the purposes described herein, such as SiC, sapphire, GaN, AlN, Si, etc. A nucleation layer 14 is grown on the substrate 12 to provide a base layer for proper epitaxial growth of the device layers, which layer 14 can be, for example, GaN, AlGaN or AlN. An AlGaN buffer layer 16 is grown on the nucleation layer 14, which has a low Al content, for example 1% to 6 _% , for reasons described below. In one non-limiting embodiment, the buffer layer 16 is _{Al0.04Ga0.96N} . A GaN spacer layer 18 is grown on the buffer layer 16, and a thin InGaN layer 20 is grown on the spacer layer 18, having a thickness of less than 20 nm. In one embodiment, the thin layer 20 is In _0.1 Ga _0.9 N, having a thickness of about 2 nm and an In composition of about 10%. A GaN channel layer 22 is grown on the thin layer 20, and an optional AlN intermediate layer 24 is grown on the channel layer 22. An AlGaN barrier layer 26 is grown on the intermediate layer 24, and the piezoelectric/spontaneous polarization effect between the AlGaN barrier layer 26 and the GaN channel layer 22 creates a 2-DEG layer 28 between the intermediate layer 24 and the channel layer 22. In one non-limiting embodiment, the barrier layer 26 is Al _0.34 Ga _0.66 N. Appropriate patterning and metal deposition steps are performed to provide a source terminal 30, a drain terminal 32, and a gate terminal 34 on the barrier layer 26.

[0014] FIG. 2 is a conduction band diagram for an AlGaN HEMT device 10 with the thin InGaN layer 20 removed, FIG. 3 is a conduction band diagram for an AlGaN HEMT device 10 with the low Al % AlGaN buffer layer 16 replaced with a GaN buffer layer, and FIG. 4 is a conduction band diagram for an AlGaN HEMT device 10.

[0015] As shown in FIG. 2, the primary confinement mechanism for retaining electrons at the interface between the barrier layer 26 and the intermediate layer 24 is the polarization-induced electric field caused by the lattice constant mismatch between the GaN channel layer 22 and the low Al % AlGaN buffer layer 16. This electric field can be countered by short channel effects at high drain voltages, resulting in a low breakdown voltage.

[0016] As shown in FIG. 3, the thin InGaN layer 20 creates a barrier in the conduction band between the GaN channel layer 22 and the GaN buffer layer that replaces the buffer layer 16. To create a large enough barrier, an In content of about 10% is used in the layer 20, which results in the conduction band in the InGaN layer 20 crossing the Fermi level. When the conduction band of the InGaN layer 20 is close to the Fermi level, electrons begin to populate the layer 20, thereby creating a less steep transition from the off state to the on state with the gate voltage. This results in a more negative pinch-off voltage, a smaller transconductance, and a smaller RF gain. This shift in the conduction band of the thin InGaN layer 20 is due to polarization in the thin InGaN layer 20, which is not affected by the drain voltage. This allows for confinement to higher voltages (unlike the AlGaN buffer confinement approach), which results in a higher breakdown voltage.

[0017] As shown in FIG. 4, the thin InGaN layer 20 creates a barrier in the conduction band between the GaN channel layer 22 and the GaN spacer layer 18 that is independent of the external electric field. Growing the spacer layer 18 on the low Al% AlGaN buffer layer 16 creates a polarization field that exists in the GaN channel layer 22, the InGaN layer 20, and the GaN spacer layer 18. This polarization field prevents electrons from populating the InGaN layer 26 at low voltages, thereby creating the desired sharp transition from the off state to the on state with the gate voltage, high transconductance, and high RF gain at lower voltages. At high voltages, where the polarization field caused by growth on the low Al% AlGaN buffer layer 16 can be offset by the drain voltage from the short channel effect, the barrier created in the conduction band by the InGaN layer 20 between the GaN channel layer 22 and the GaN spacer layer 18 still exists, resulting in a high breakdown voltage.

[0018] The foregoing disclosure discloses and describes merely exemplary embodiments of the present disclosure. Those skilled in the art will readily appreciate from such description and the accompanying drawings and claims that various changes, modifications, and variations can be made therein without departing from the spirit and scope of the present disclosure, as defined in the following claims.

10 HEMT device 12 Substrate 14 Nucleation layer 16 AlGaN buffer layer 18 GaN spacer layer 20 Thin InGaN layer 22 GaN channel layer 24 AlN intermediate layer 26 AlGaN barrier layer 28 2-DEG layer 30 Source terminal 32 Drain terminal 34 Gate terminal

Claims (20)

A substrate;
an AlGaN buffer layer having an Al content of less than 10% on the substrate;
an InGaN layer over the buffer layer, the InGaN layer having a thickness of less than 20 nm;
a channel layer on the InGaN layer;
a barrier layer over the channel layer. The FET device of claim 1, wherein the Al content in the buffer layer is between 1% and 6%. The FET device of claim 3 , wherein the buffer layer is Al _0.04 Ga _0.96 N. The FET device of claim 1, wherein the InGaN layer has an In content of about 10%. The FET device of claim 4, wherein the InGaN layer is _{In0.1Ga0.9N .} The FET device of claim 1, wherein the InGaN layer has a thickness of about 2 nm. The FET device of claim 1, wherein the channel layer is GaN. The FET device of claim 1, wherein the barrier layer is AlGaN. The FET device of claim 8 , wherein the barrier layer is Al _0.34 Ga _0.66 N. The FET device of claim 1, further comprising a nucleation layer between the substrate and the buffer layer. The FET device of claim 1, further comprising a GaN spacer layer between the buffer layer and the InGaN layer. The FET device of claim 1, further comprising an AlN intermediate layer between the channel layer and the barrier layer. The FET device of claim 1, wherein the substrate is a SiC, sapphire, GaN, AlN or Si substrate. The FET device of claim 1, wherein the FET device is a high electron mobility transistor device. A substrate;
an AlGaN buffer layer having an Al content between 1% and 6% on the substrate;
an InGaN layer having about 10% In on the buffer layer;
a GaN channel layer on the InGaN layer;
and an AlGaN barrier layer over the channel layer. The HEMT device of claim 15, wherein the buffer layer is _{Al0.04Ga0.96N .} The HEMT device of claim 15, wherein the InGaN layer is about 2 nm thick. The HEMT device of claim 15, wherein the barrier layer is _{Al0.34Ga0.66N .} The HEMT device of claim 15, further comprising a nucleation layer between the substrate and the buffer layer, a GaN spacer layer between the buffer layer and the InGaN layer, and an AlN intermediate layer between the channel layer and the barrier layer. A substrate;
a nucleation layer on the substrate;
an AlGaN buffer layer having an Al content of about 4% on the nucleation layer;
a GaN spacer layer on the buffer layer;
an InGaN layer having about 10% In and a thickness of about 2 nm on the spacer layer;
a GaN channel layer on the InGaN layer;
an AlN intermediate layer on the channel layer;
and an AlGaN barrier layer over the intermediate layer.