JP2023102116A - Ip transmission system, iprf conversion device, rfip conversion device, ip transmission method, iprf conversion method and rfip conversion method - Google Patents

Abstract

To retransmit broadcasting signals of more channels with a simple configuration while restraining delay caused at retransmission of a broadcasting signal for terrestrial digital signal, in a system for retransmission after IP transmission of an RF band broadcasting signal.SOLUTION: An IP transmission system includes an RFIP conversion device and an IPRF conversion device, the RFIP conversion device generates a plurality of digital signals by performing digital conversion for a plurality of channel signals extracted from a broadcasting signal of terrestrial digital broadcasting using mutually synchronized first clocks of the same frequency or a common first clock, and transmits a plurality of IP packets respectively including the generated plurality of digital signals, the IPRF conversion device generates a plurality of channel signals by performing analog conversion for the plurality of digital signals contained in the plurality of received IP packets using a common second clock, and outputs the generated plurality of channel signals.SELECTED DRAWING: Figure 1

Description

The present disclosure relates to an IP transmission system, an IPRF conversion device, an RFIP conversion device, an IP transmission method, an IPRF conversion method, and an RFIP conversion method.

Conventionally, a system for retransmitting a digital terrestrial signal has been proposed.

For example, Patent Document 1 (Japanese Unexamined Patent Application Publication No. 2008-211587) discloses the following IP/RF conversion device as a device used in such a system. That is, the IP/RF converter includes IP packet receivers (32-1 to 32-n) that receive IP packets that carry broadcast TS packets, broadcast TS packet processors (34-1 to 34-n) that extract the broadcast TS packets from the IP packets received by the IP packet receivers, arrange them in time order on the transmission side and output them, and extracts a synchronous clock necessary for OFDM modulation from the broadcast TS packets supplied from the broadcast TS packet processor, and extracts the synchronous clock and the synchronous clock. Clock extraction devices (36-1 to 36-n) for synchronously outputting the broadcast TS packets, and OFDM modulation devices (38-1 to 38-n) for OFDM-modulating the broadcast TS packets from the clock extraction devices in synchronization with the synchronous clocks from the clock extraction devices.

Further, Patent Document 2 (Japanese Unexamined Patent Application Publication No. 2011-10186) discloses a digital broadcast retransmission system as follows. That is, a digital broadcast retransmission system receives a radio frequency signal broadcast from a digital broadcasting device, demodulates the radio frequency signal, extracts channel coded channel coded information from the radio frequency signal, packetizes the channel coded information, and transmits the packet to a network; a packet converter that receives the packet from the packet converter via the network, extracts the channel coded information from the packet, and modulates the channel coded information to generate a radio frequency signal; and a frequency converter for transmitting radio frequency signals to a digital broadcast receiver.

JP 2008-211587 A Japanese Unexamined Patent Application Publication No. 2011-10186 JP 2018-11236 A

Beyond the techniques described in Patent Literatures 1 to 3, in a system that retransmits an RF (Radio Frequency) band broadcast signal after IP (Internet Protocol) transmission, a technique that can retransmit broadcast signals of more channels with a simple configuration while suppressing delays that occur when retransmitting broadcast signals of terrestrial digital signals is desired.

The present disclosure has been made to solve the above-mentioned problems, and its object is to provide an IP transmission system, an IPRF conversion device, an RFIP conversion device, an IP transmission method, an IPRF conversion method, and an RFIP conversion method that can retransmit broadcast signals of more channels with a simple configuration while suppressing the delay that occurs when retransmitting terrestrial digital broadcast signals in a system that IP-transmits and then retransmits broadcast signals in the RF band.

The IP transmission system of the present disclosure includes an RFIP conversion device and an IPRF conversion device, wherein the RFIP conversion device digitally converts a plurality of channel signals extracted from broadcast signals of terrestrial digital broadcasting using a first clock of the same frequency that is synchronized with each other or a common first clock to generate a plurality of digital signals, and transmits a plurality of IP packets each including the plurality of generated digital signals to the IPRF conversion device, and the IPRF conversion device is included in the plurality of IP packets received from the RFIP conversion device. A plurality of channel signals are generated by analog-converting the plurality of digital signals received using a common second clock, and the generated plurality of channel signals are output.

The IPRF conversion apparatus of the present disclosure includes a receiving unit that receives a plurality of IP packets each containing a plurality of digital signals generated by digitally converting a plurality of channel signals in digital terrestrial broadcasting using a first clock of the same frequency that is synchronized with each other or using a common first clock; a generating unit that generates a plurality of channel signals by analog-converting the plurality of digital signals included in the plurality of IP packets received by the receiving unit using a common second clock; and an output unit for outputting.

The RFIP conversion apparatus of the present disclosure includes a receiving unit that receives a broadcast signal of terrestrial digital broadcasting, an extracting unit that extracts a plurality of channel signals from the broadcast signal received by the receiving unit, a generating unit that digitally converts the plurality of channel signals extracted by the extracting unit using a first clock of the same frequency that is synchronized with each other or a common first clock to generate a plurality of digital signals, and an output unit that outputs a plurality of IP packets including the plurality of digital signals generated by the generating unit.

The IP transmission method of the present disclosure is an IP transmission method in an IP transmission system comprising an RFIP conversion device and an IPRF conversion device, wherein the RFIP conversion device digitally converts a plurality of channel signals extracted from a broadcast signal of digital terrestrial broadcasting using a first clock of the same frequency that is synchronized with each other or a common first clock, thereby generating a plurality of digital signals, and transmitting a plurality of IP packets each containing the plurality of generated digital signals to the IPRF conversion device; generating a plurality of channel signals by analog-converting the plurality of digital signals contained in the plurality of IP packets received from the device using a common second clock, and outputting the generated plurality of channel signals.

The IPRF conversion method of the present disclosure is an IPRF conversion method in an IPRF conversion device, comprising the steps of: receiving a plurality of IP packets each containing a plurality of digital signals generated by digitally converting a plurality of channel signals in terrestrial digital broadcasting using a mutually synchronized first clock of the same frequency or using a common first clock; generating a plurality of channel signals by analog-converting the plurality of digital signals included in the received plurality of IP packets using a common second clock; and outputting.

The RFIP conversion method of the present disclosure is a RFIP conversion method in an RFIP conversion device, comprising the steps of: receiving a broadcast signal of terrestrial digital broadcasting; extracting a plurality of channel signals from the received broadcast signal; generating a plurality of digital signals by digitally converting the extracted plurality of channel signals using a mutually synchronized first clock having the same frequency or a common first clock; and outputting a plurality of IP packets each containing the generated plurality of digital signals.

One aspect of the present disclosure can be implemented not only as an IPRF conversion device including such a characteristic processing unit, but also as a program for causing a computer to execute steps of such characteristic processing, or as a semiconductor integrated circuit that partially or fully implements the IPRF conversion device.

In addition, one aspect of the present disclosure can be realized not only as an RFIP conversion device including such a characteristic processing unit, but also as a program for causing a computer to execute such characteristic processing steps, or as a semiconductor integrated circuit that realizes part or all of the RFIP conversion device.

According to the present disclosure, in a system that IP-transmits an RF band broadcast signal and then retransmits it, it is possible to retransmit broadcast signals of more channels with a simple configuration while suppressing the delay that occurs when retransmitting a digital terrestrial signal.

FIG. 1 is a diagram showing the configuration of an IP transmission system according to the first embodiment of the present disclosure. FIG. 2 is a diagram showing the configuration of the RFIP conversion device according to the first embodiment of the present disclosure. FIG. 3 is a diagram showing the configuration of an IP transmission unit in the RFIP conversion device according to the first embodiment of the present disclosure; FIG. 4 is a diagram showing the configuration of the IPRF conversion device according to the first embodiment of the present disclosure. FIG. 5 is a diagram showing the configuration of an IP reception unit in the IPRF conversion device according to the first embodiment of the present disclosure; FIG. 6 is a flowchart defining an example of an operation procedure when the RFIP conversion device according to the first embodiment of the present disclosure transmits IP packets. FIG. 7 is a flowchart defining an example of an operation procedure when the IPRF conversion device according to the first embodiment of the present disclosure outputs channel signals. FIG. 8 is a diagram showing an example of a sequence of IP packet transmission processing in the IP transmission system according to the first embodiment of the present disclosure. FIG. 9 is a diagram showing the configuration of an IP transmission system according to the second embodiment of the present disclosure. FIG. 10 is a diagram illustrating an example of a configuration of a control unit in the RFIP conversion device according to the second embodiment of the present disclosure; FIG. 11 is a diagram illustrating another example of the configuration of the control unit in the RFIP conversion device according to the second embodiment of the present disclosure; FIG. 12 is a diagram illustrating another example of the configuration of the control unit in the RFIP conversion device according to the second embodiment of the present disclosure; FIG. 13 is a diagram illustrating another example of the configuration of the control unit in the RFIP conversion device according to the second embodiment of the present disclosure;

First, the contents of the embodiments of the present disclosure will be listed and described.

(1) An IP transmission system according to an embodiment of the present disclosure includes an RFIP conversion device and an IPRF conversion device, wherein the RFIP conversion device digitally converts a plurality of channel signals extracted from a broadcast signal of digital terrestrial broadcasting using a first clock of the same frequency synchronized with each other or a common first clock to generate a plurality of digital signals, and transmits a plurality of IP packets each containing the plurality of generated digital signals to the IPRF conversion device, and the IPRF conversion device receives from the RFIP conversion device. A plurality of channel signals are generated by analog-converting the plurality of digital signals contained in the plurality of IP packets using a common second clock, and the generated plurality of channel signals are output.

In this way, the configuration in which the IPRF conversion device converts a plurality of digital signals included in a plurality of IP packets to analog using a common second clock makes it possible to share components such as a DAC (Analog to Digital Converter) necessary for generating a plurality of channel signals corresponding to a plurality of channels. can be reduced, and cost reduction can be achieved. Therefore, in a system that IP-transmits an RF band broadcast signal and then retransmits it, it is possible to retransmit broadcast signals of more channels with a simple configuration while suppressing a delay that occurs when retransmitting a digital terrestrial signal.

(2) The IPRF conversion device according to the embodiment of the present disclosure includes a receiving unit that receives a plurality of IP packets each containing a plurality of digital signals generated by digitally converting a plurality of channel signals in digital terrestrial broadcasting using a first clock of the same frequency that is synchronized with each other or a common first clock, a generating unit that generates a plurality of channel signals by analog-converting the plurality of digital signals included in the plurality of IP packets received by the receiving unit using a common second clock, and a generating unit. and an output unit for outputting the plurality of channel signals.

In this way, with the configuration in which a plurality of digital signals included in a plurality of IP packets are analog-converted using a common second clock, parts such as a DAC necessary for generating a plurality of channel signals corresponding to a plurality of channels can be shared. Therefore, compared to a configuration in which a channel signal corresponding to one channel is generated using one DAC, it is possible to reduce the number of components and the mounting area for generating a channel signal, thereby realizing cost reduction. Therefore, in a system that IP-transmits an RF band broadcast signal and then retransmits it, it is possible to retransmit broadcast signals of more channels with a simple configuration while suppressing a delay that occurs when retransmitting a digital terrestrial signal.

(3) The IPRF conversion device may further include a buffer that accumulates the IP packets received by the reception unit, and an adjustment unit that adjusts the second clock based on the amount of the IP packets accumulated in the buffer, and the generation unit may generate the plurality of channel signals by analog-converting the plurality of digital signals using one DAC that operates according to the second clock.

With such a configuration, the second clock can follow the clock used for generating the digital signal in the device that is the transmission source of the IP packet, so IP transmission of the broadcast signal between the device and the IPRF conversion device can be performed while suppressing the deviation between the clock and the second clock.

(4) The RFIP conversion device according to the embodiment of the present disclosure includes a receiving unit that receives a broadcast signal of digital terrestrial broadcasting, an extracting unit that extracts a plurality of channel signals from the broadcast signal received by the receiving unit, a generating unit that digitally converts the plurality of channel signals extracted by the extracting unit using a first clock of the same frequency that is synchronized with each other or a common first clock, and outputs a plurality of IP packets each containing the plurality of digital signals generated by the generating unit. and an output unit for

In this manner, a plurality of channel signals are digitally converted using a mutually synchronized first clock of the same frequency or a common first clock to generate a plurality of digital signals, and a plurality of IP packets each containing the generated plurality of digital signals are output. Thus, in a destination device of the IP packets, the plurality of digital signals can be analog-converted using a common clock to generate a plurality of channel signals. As a result, parts such as a DAC necessary for generating a plurality of channel signals corresponding to a plurality of channels can be shared in the destination device, so compared to a configuration in which one DAC is used to generate a channel signal corresponding to one channel, the number of parts and mounting area for generating a channel signal can be reduced, and cost reduction can be realized. Therefore, in a system that IP-transmits an RF band broadcast signal and then retransmits it, it is possible to retransmit broadcast signals of more channels with a simple configuration while suppressing a delay that occurs when retransmitting a digital terrestrial signal.

(5) An IP transmission method according to an embodiment of the present disclosure is an IP transmission method in an IP transmission system comprising an RFIP conversion device and an IPRF conversion device, wherein the RFIP conversion device digitally converts a plurality of channel signals extracted from a broadcast signal of digital terrestrial broadcasting using a mutually synchronized first clock of the same frequency or a common first clock to generate a plurality of digital signals, and a step of transmitting a plurality of IP packets each containing the plurality of generated digital signals to the IPRF conversion device; A conversion device generates a plurality of channel signals by analog-converting the plurality of digital signals included in the plurality of IP packets received from the RFIP conversion device using a common second clock, and outputting the generated plurality of channel signals.

In this way, the method in which the IPRF conversion apparatus converts a plurality of digital signals contained in a plurality of IP packets to analog using a common second clock makes it possible to share components such as a DAC necessary for generating a plurality of channel signals corresponding to a plurality of channels. Therefore, compared to the method of generating a channel signal corresponding to one channel using one DAC, the number of components and the mounting area for generating a channel signal can be reduced, and the cost can be reduced. Therefore, in a system that IP-transmits an RF band broadcast signal and then retransmits it, it is possible to retransmit broadcast signals of more channels with a simple configuration while suppressing a delay that occurs when retransmitting a digital terrestrial signal.

(6) An IPRF conversion method according to an embodiment of the present disclosure is an IPRF conversion method in an IPRF conversion device, and includes a step of receiving a plurality of IP packets each containing a plurality of digital signals generated by digitally converting a plurality of channel signals in terrestrial digital broadcasting using a mutually synchronized first clock of the same frequency or a common first clock, a step of generating a plurality of channel signals by analog-converting the plurality of digital signals contained in the received plurality of IP packets using a common second clock; and outputting the generated plurality of channel signals.

In this way, the method of analog-converting a plurality of digital signals contained in a plurality of IP packets using a common second clock makes it possible to share parts such as a DAC necessary for generating a plurality of channel signals corresponding to a plurality of channels. Therefore, compared to the method of generating a channel signal corresponding to one channel using one DAC, it is possible to reduce the number of parts and the mounting area for generating a channel signal, thereby realizing cost reduction. Therefore, in a system that IP-transmits an RF band broadcast signal and then retransmits it, it is possible to retransmit broadcast signals of more channels with a simple configuration while suppressing a delay that occurs when retransmitting a digital terrestrial signal.

(7) The RFIP conversion method according to the embodiment of the present disclosure is the RFIP conversion method in the RFIP conversion device, a step to receive the terrestrial digital broadcasting signal, a step that extracts multiple channel signals from the received broadcast signal, and a step that extracted multiple channels. Includes a step in which multiple digital signals are generated by digital conversion using the first clock of the same frequency or the first clock of the same frequency or a common first clock, and a step that outputs multiple IP packets that contain multiple digital signals.

In this manner, a plurality of channel signals can be digitally converted using a mutually synchronized first clock having the same frequency or a common first clock to generate a plurality of digital signals, and a plurality of IP packets each containing the generated plurality of digital signals can be output. In the destination device of the IP packets, the plurality of digital signals can be analog-converted using a common clock to generate a plurality of channel signals. As a result, parts such as a DAC necessary for generating a plurality of channel signals corresponding to a plurality of channels can be shared in the destination device, so compared to a method of generating a channel signal corresponding to one channel using one DAC, the number of parts and mounting area for generating a channel signal can be reduced, and cost reduction can be realized. Therefore, in a system that IP-transmits an RF band broadcast signal and then retransmits it, it is possible to retransmit broadcast signals of more channels with a simple configuration while suppressing a delay that occurs when retransmitting a digital terrestrial signal.

Embodiments of the present disclosure will be described below with reference to the drawings. The same or corresponding parts in the drawings are denoted by the same reference numerals, and the description thereof will not be repeated. Moreover, at least part of the embodiments described below may be combined arbitrarily.

<First embodiment>
[Configuration and basic operation]
FIG. 1 is a diagram showing the configuration of an IP transmission system according to the first embodiment of the present disclosure. Referring to FIG. 1 , IP transmission system 401 includes RFIP conversion device 101 and IPRF conversion device 201 . For example, the RFIP conversion device 101 is installed in a station building 301 of a cable television station, and the IPRF conversion device 201 is installed in a station building 302 different from the station building 301 .

The RFIP conversion device 101 receives an RF band broadcast signal of terrestrial digital broadcasting, including a stream, for example. Hereinafter, a broadcast signal of digital terrestrial broadcasting is also referred to as a terrestrial signal. For example, a terrestrial signal includes multiple channel signals corresponding to multiple channels, respectively. The stream includes program information and the like. Program information includes, for example, audio information, video information, EPG (Electronic Program Guide) information, SI information (Service Information), caption information, and the like. Audio information and video information are, for example, compressed and encrypted according to a predetermined method.

The RFIP conversion device 101 extracts a plurality of channel signals respectively corresponding to a plurality of predetermined channels from the received terrestrial signal. The RFIP conversion device 101 generates a plurality of digital signals respectively corresponding to the plurality of channels by digitally converting the extracted plurality of channel signals using the mutually synchronized clock CL1 having the same frequency. More specifically, the RFIP conversion device 101 generates a plurality of digital signals by digitally converting the extracted plurality of channel signals at the same timing according to the clock CL1. Clock CL1 is an example of a first clock. RFIP conversion device 101 transmits a plurality of IP packets each containing a plurality of generated digital signals to IPRF conversion device 201 via IP network 311 .

For example, an IP packet output by RFIP conversion device 101 is converted into an optical signal in IP network 311 and transmitted to IPRF conversion device 201 by wavelength division multiplexing.

IPRF conversion device 201 receives a plurality of IP packets from RFIP conversion device 101 via IP network 311 . The IPRF conversion device 201 generates a plurality of channel signals by analog-converting a plurality of digital signals respectively corresponding to a plurality of channels contained in a plurality of received IP packets using a common clock CL2. More specifically, the IPRF conversion device 201 generates a plurality of channel signals by analog-converting a plurality of digital signals according to the timing of the clock CL2. Clock CL2 is an example of a second clock. The IPRF conversion device 201 outputs the generated multiple channel signals to the multiplexer 321 .

A multiplexer 321 multiplexes a plurality of channel signals output from the IPRF converter 201 and transmits them to each subscriber's house via the cable television network.

<RFIP converter>
FIG. 2 is a diagram showing the configuration of the RFIP conversion device according to the first embodiment of the present disclosure. Referring to FIG. 2 , RFIP conversion device 101 comprises a plurality of IP transmission units 111 , control unit 121 , backplane 131 and subchassis 141 . For example, RFIP conversion device 101 comprises twelve IP transmission units 111 .

Subchassis 141 houses IP transmission unit 111 , control unit 121 and backplane 131 . More specifically, the backplane 131 is fixed to the inner wall surface of the sub-chassis 141 . A plurality of IP transmission units 111 and control units 121 are removably attached to the backplane 131 .

Backplane 131 transmits various signals between IP transmission unit 111 and control unit 121 .

Control unit 121 includes, for example, a precision crystal oscillator. The control unit 121 outputs a clock generated by a high-precision crystal oscillator to each IP transmission unit 111 via the backplane 131 .

The IP transmission unit 111 generates a clock CL1 by dividing or multiplying the clock received from the control unit 121 via the backplane 131 . The division ratio or multiplication ratio of the clock in each IP transmission unit 111 is fixed in advance and is the same as each other. That is, the clocks CL1 generated in each IP transmission unit 111 are synchronized with each other and have the same frequency.

The IP transmission unit 111 also receives, via an antenna 191, an RF band terrestrial signal transmitted from a radio tower (not shown) for relaying a stream from a broadcasting station. Each IP transmission unit 111 extracts channel signals corresponding to different channels from the terrestrial signal received via the antenna 191 . For example, a channel signal to be extracted by IP transmission unit 111 is predetermined for each IP transmission unit 111 . A channel corresponding to a channel signal to be extracted by the IP transmission unit 111 is hereinafter also referred to as a target channel.

For example, the IP transmission unit 111A, which is the IP transmission unit 111, extracts the channel signal chX of the X channel, which is the target channel, from the terrestrial signal received via the antenna 191. FIG. The IP transmission unit 111A generates a digital signal DX by digitally converting the extracted channel signal chX according to the timing of the generated clock CL1. IP transmission unit 111A transmits IP packet PAX including digital signal DX to IPRF converter 201 via IP network 311 .

Also, for example, the IP transmission unit 111B, which is the IP transmission unit 111, extracts the channel signal chY of the Y channel, which is the target channel, from the terrestrial signal received via the antenna 191. FIG. The IP transmission unit 111B digitally converts the extracted channel signal chY according to the timing of the generated clock CL1 to generate a digital signal DY. IP transmission unit 111B transmits IP packet PAY including digital signal DY to IPRF converter 201 via IP network 311 .

<IP transmission unit>
FIG. 3 is a diagram showing the configuration of an IP transmission unit in the RFIP conversion device according to the first embodiment of the present disclosure; 3, IP transmission unit 111 includes receiver 11, extractor 12, amplifier 13, clock synthesizer 14, AD (Analog to Digital) converter 15, filter 16, IP packet generator 17, output 18, and storage 19. The AD converter 15 is an example of a generator. Storage unit 19 is, for example, a non-volatile memory.

(receiving part)
The receiving unit 11 receives terrestrial signals. More specifically, for example, the receiving unit 11 receives an OFDM (Orthogonal Frequency Division Multiplexing)-modulated RF band terrestrial signal via the antenna 191 .

The receiving unit 11 down-converts the received terrestrial signal using a direct conversion method to generate a baseband signal. The receiver 11 outputs the generated baseband signal to the extractor 12 .

(Extraction part)
The extraction unit 12 extracts the channel signal of the target channel from the terrestrial signal received by the reception unit 11 . More specifically, the extractor 12 extracts the channel signal of the target channel from the baseband signal received from the receiver 11 . The extractor 12 outputs the extracted channel signal to the amplifier 13 .

Specifically, extraction section 12 in IP transmission unit 111 A extracts channel signal chX from the baseband signal received from reception section 11 and outputs the channel signal chX to amplification section 13 . Also, the extractor 12 in the IP transmission unit 111B extracts the channel signal chY from the baseband signal received from the receiver 11 and outputs it to the amplifier 13 .

(amplifier)
The amplifier 13 amplifies the channel signal received from the extractor 12 . For example, the amplifier 13 performs automatic gain control on channel signals. More specifically, the detection unit (not shown) generates a control signal for adjusting the gain of the amplification unit 13 so that the level indicated by the digital signal output from the AD conversion unit 15 described later becomes a predetermined value, and outputs the generated control signal to the amplification unit 13. The amplification section 13 receives the control signal from the detection section, and amplifies the channel signal so that the level of the channel signal becomes a predetermined value by changing the gain according to the received control signal. The amplifier 13 outputs the amplified channel signal to the AD converter 15 .

(clock synthesizer)
Clock synthesizer 14 receives a clock from control unit 121 . The clock synthesizer 14 divides the received clock by a predetermined division ratio or multiplies it by a predetermined multiplication ratio to generate a clock CL1 and outputs the clock CL1 to the AD conversion unit 15 . The clock synthesizer 14 in each IP transmission unit 111 generates a clock CL<b>1 synchronized with each other and having the same frequency, and outputs the clock CL<b>1 to the AD conversion section 15 .

(AD converter)
In each IP transmission unit 111, the AD converter 15 digitally converts the channel signal extracted by the extractor 12 using the clock CL1 received from the clock synthesizer 14 to generate a digital signal. More specifically, AD converter 15 includes an ADC (Analog to Digital Converter) that operates according to clock CL1 received from clock synthesizer 14 . The AD conversion section 15 digitally converts the channel signal received from the amplification section 13 according to the timing of the clock CL1 to generate a digital signal, and outputs the generated digital signal to the filter section 16 .

Specifically, the AD converter 15 in the IP transmission unit 111A receives the channel signal chX from the amplifier 13, digitally converts the received channel signal chX according to the timing of the clock CL1 to generate the digital signal DX, and outputs the digital signal DX to the filter 16. Further, the AD conversion section 15 in the IP transmission unit 111B receives the channel signal chY from the amplification section 13, digitally converts the received channel signal chY according to the timing of the clock CL1 to generate the digital signal DY, and outputs the digital signal DY to the filter section 16.

(filter part)
For example, the filter unit 16 includes an FIR (Finite Impulse Response) filter. The filter unit 16 performs filter processing to attenuate signal components of channels other than the target channel in the frequency components indicated by the digital signal generated by the AD conversion unit 15, and outputs the digital signal after the filter processing to the IP packet generation unit 17.

Specifically, the filter unit 16 in the IP transmission unit 111A receives the digital signal DX from the AD conversion unit 15, attenuates the signal components of the channels other than the X channel in the frequency components indicated by the received digital signal DX, and outputs the result to the IP packet generation unit 17. Also, the filter section 16 in the IP transmission unit 111B receives the digital signal DY from the AD conversion section 15, attenuates the signal components of the channels other than the Y channel in the frequency components indicated by the received digital signal DY, and outputs the result to the IP packet generation section 17.

(IP packet generator)
The IP packet generator 17 generates IP packets containing the digital signal generated by the AD converter 15 .

More specifically, the IP packet generation unit 17 receives the digital signal from the filter unit 16 and accumulates the received digital signal in the buffer in the storage unit 19 . The IP packet generation unit 17 acquires a predetermined number of samples of the digital signal from the storage unit 19 at packet generation timing according to a predetermined cycle, and generates an IP packet addressed to the IPRF conversion device 201 in which the acquired digital signal is stored in the payload. The IP packet generator 17 outputs the generated IP packet to the output unit 18 .

Specifically, the IP packet generator 17 in the IP transmission unit 111A generates an IP packet PAX in which a predetermined number of samples of the digital signal DX are stored in the payload, and outputs the generated IP packet PAX to the output unit 18 . Also, the IP packet generator 17 in the IP transmission unit 111B generates an IP packet PAY in which a predetermined number of samples of the digital signal DY are stored in the payload, and outputs the generated IP packet PAY to the output unit 18 .

(output section)
In each IP transmission unit 111 , the output section 18 outputs IP packets containing the digital signal generated by the AD conversion section 15 .

More specifically, output section 18 in IP transmission unit 111A transmits IP packet PAX received from IP packet generation section 17 to IPRF conversion device 201 via IP network 311 . Output unit 18 in IP transmission unit 111 B transmits IP packet PAY received from IP packet generation unit 17 to IPRF conversion device 201 via IP network 311 .

<IPRF converter>
FIG. 4 is a diagram showing the configuration of the IPRF conversion device according to the first embodiment of the present disclosure. Referring to FIG. 4 , IPRF conversion device 201 comprises a plurality of IP receiving units 211 , control unit 221 , backplane 231 and subchassis 241 . For example, the IPRF translator 201 comprises fewer IP receiver units 211 than the number of IP transmitter units 111 in the RFIP translator 101 . For example, IPRF conversion device 201 comprises six IP receiving units 211 .

Subchassis 241 houses IP receiving unit 211 , control unit 221 and backplane 231 . More specifically, the backplane 231 is fixed to the inner wall surface of the sub-chassis 241 . IP receiving unit 211 and control unit 221 are removably attached to backplane 231 .

Backplane 231 transmits various signals between IP receiving unit 211 and control unit 221 .

Control unit 221 includes, for example, a precision crystal oscillator. The control unit 221 supplies a clock generated by a precision crystal oscillator to each IP receiving unit 211 via the backplane 231 .

The IP receiving unit 211 generates a clock CL2 by dividing or multiplying the clock received from the control unit 221 via the backplane 231 .

Also, the IP receiving unit 211 receives a plurality of IP packets each containing a plurality of digital signals generated by digitally converting a plurality of channel signals using the clock CL1 from the RFIP conversion device 101 via the IP network 311 .

More specifically, for example, IP receiving unit 211A, which is IP receiving unit 211, receives IP packets PAX including digital signal DX from IP transmitting unit 111A via IP network 311, and receives IP packets PAY including digital signal DY from IP transmitting unit 111B via IP network 311.

IP receiving unit 211A generates channel signals chX and chY by analog-converting digital signal DX contained in IP packet PAX and digital signal DY contained in IP packet PAY according to the timing of generated clock CL2. The IP receiving unit 211A outputs the generated channel signals chX and chY to the multiplexer 321 .

<IP Receiving Unit>
FIG. 5 is a diagram showing the configuration of an IP reception unit in the IPRF conversion device according to the first embodiment of the present disclosure; Referring to FIG. 5, IP reception unit 211 includes reception section 21, classification filters 22A and 22B, buffers 23A and 23B, acquisition sections 24A and 24B, adjustment section 25, clock synthesizer 26, DA (Digital to Analog) conversion section 27, output section 28, and storage section 29. The DA converter 27 is an example of a generator. Storage unit 29 is, for example, a non-volatile memory. Buffers 23A and 23B are FIFOs (First In First Out), for example, and store IP packets received by receiver 21 .

(receiving part)
The receiving unit 21 receives a plurality of IP packets each including a plurality of digital signals generated by digitally converting a plurality of channel signals in digital terrestrial broadcasting using a clock CL1. The receiving unit 21 outputs the received IP packets to the classification filters 22A and 22B.

More specifically, for example, receiving section 21 in IP receiving unit 211A receives IP packet PAX including digital signal DX and IP packet PAY including digital signal DY from RFIP conversion device 101 via IP network 311, and outputs received IP packets PAX and PAY to classification filters 22A and 22B.

(Separation filter)
The classification filters 22A and 22B receive a plurality of IP packets from the receiver 21 and extract IP packets containing digital signals corresponding to a predetermined channel from among the received plurality of IP packets.

For example, classification filter 22A in IP reception unit 211A extracts IP packets PAX containing digital signal DX from among the plurality of IP packets received from reception section 21, and stores the extracted IP packets PAX in buffer 23A. More specifically, the classification filter 22A receives an IP packet from the receiver 21 and checks the source MAC address of the received IP packet. If the source MAC address of the received IP packet does not match the MAC address of the IP transmission unit 111A, the classification filter 22A discards the IP packet. On the other hand, when the source MAC address of the received IP packet matches the MAC address of IP transmission unit 111A, classification filter 22A accumulates the IP packet, ie, IP packet PAX, in buffer 23A.

Further, for example, classification filter 22B in IP reception unit 211A extracts IP packets PAY including digital signal DY among the plurality of IP packets received from reception unit 21, and stores the extracted IP packets PAY in buffer 23B. More specifically, the classification filter 22B receives an IP packet from the receiver 21 and checks the source MAC address of the received IP packet. If the source MAC address of the received IP packet does not match the MAC address of the IP transmission unit 111B, the classification filter 22B discards the IP packet. On the other hand, when the source MAC address of the received IP packet matches the MAC address of the IP transmission unit 111B, the classification filter 22B accumulates the IP packet, that is, the IP packet PAY in the buffer 23B.

(acquisition unit)
The acquisition units 24A and 24B receive the IP packets output from the buffers 23A and 23B, acquire digital signals corresponding to the channel signals from the received IP packets, and output the digital signals to the DA conversion unit 27. FIG.

More specifically, the acquisition unit 24A in the IP reception unit 211A receives the IP packet PAX output from the buffer 23A, acquires the digital signal DX from the received IP packet PAX, and outputs the digital signal DX to the DA conversion unit 27. Also, the acquisition unit 24B in the IP reception unit 211A receives the IP packet PAY output from the buffer 23B, acquires the digital signal DY from the received IP packet PAY, and outputs the digital signal DY to the DA conversion unit 27. FIG.

(clock synthesizer)
Clock synthesizer 26 receives a clock from control unit 221 . The clock synthesizer 26 generates a clock CL2 by dividing or multiplying the received clock, and outputs the clock CL2 to the DA conversion section 27 and the adjustment section 25 . When the clock synthesizer 26 receives a control signal from the adjuster 25 as described later, the clock synthesizer 26 changes the division ratio or multiplication ratio of the clock received from the control unit 221 according to the received control signal.

(DA converter)
The DA converter 27 generates a plurality of channel signals by analog-converting a plurality of digital signals contained in a plurality of IP packets received by the receiver 21 using a common clock CL2.

For example, the DA conversion section 27 includes one multi-channel DAC that operates according to the clock CL2 received from the clock synthesizer 26 . The DA converter 27 generates a plurality of channel signals by analog-converting a plurality of digital signals using the DAC.

More specifically, the DA conversion section 27 generates a plurality of channel signals by analog-converting the digital signals received from the acquisition sections 24A and 24B in accordance with the timing of the clock CL2 received from the clock synthesizer 26 . The DA conversion section 27 outputs the generated plural channel signals to the output section 28 .

Specifically, the DA conversion section 27 in the IP reception unit 211A converts the digital signals DX and DY received from the acquisition sections 24A and 24B into analog signals according to the timing of the clock CL2 received from the clock synthesizer 26, thereby generating the channel signals chX and chY and outputting them to the output section 28.

(output section)
The output section 28 outputs the multiple channel signals generated by the DA conversion section 27 .

More specifically, the output section 28 in the IP reception unit 211 A up-converts the channel signals chX and chY received from the DA conversion section 27 to a desired frequency and outputs the result to the multiplexer 321 .

(Adjuster)
The adjuster 25 adjusts the clock CL2 based on the amount of IP packets accumulated in the buffers 23A and 23B.

For example, the adjuster 25 monitors the buffers 23A and 23B and counts IP packets accumulated in the buffers 23A and 23B. The adjustment unit 25 detects the deviation between the clock CL1 used in the RFIP conversion device 101 and the clock CL2 generated by the clock synthesizer 26 based on the IP packet count result. The adjustment unit 25 performs processing for reducing the deviation between the clock CL1 and the clock CL2 based on the detection result.

More specifically, the storage unit 29 stores the number of clocks C1 of the clock CL1 in the period required for the RFIP conversion device 101 to transmit N IP packets. Here, N is an integer of 1 or more.

The adjustment unit 25 periodically or irregularly counts the clock number CNTA of the clock CL2 received from the clock synthesizer 26 during the period until IP packets are accumulated N times in the buffer 23A by the classification filter 22A, and the clock number CNTB of the clock CL2 received from the clock synthesizer 26 during the period until IP packets are accumulated N times in the buffer 23B by the classification filter 22B. After counting the numbers of clocks CNTA and CNTB, the adjustment unit 25 calculates an average value CNTAB of the numbers of clocks CNTA and CNTB.

Then, the adjustment unit 25 calculates the difference between the calculated average value CNTAB and the number of clocks C1 in the storage unit 29 . For example, when the average value CNTAB is greater than the number of clocks C1, the adjustment unit 25 determines that the frequency of the clock CL2 is greater than the frequency of the clock CL1.

Based on the calculated difference, the adjustment unit 25 determines a setting value for the frequency division ratio or multiplication ratio of the clock in the clock synthesizer 26 so as to bring the frequency of the clock CL2 closer to the frequency of the clock CL1, and outputs a control signal indicating the determined setting value to the clock synthesizer 26.

When the clock synthesizer 26 receives the control signal from the adjustment unit 25, the clock synthesizer 26 changes the division ratio or multiplication ratio of the clock received from the control unit 221 to the set value indicated by the received control signal.

[Flow of operation]
Each device in the IP transmission system according to the first embodiment of the present disclosure includes a computer including a memory, and an arithmetic processing unit such as a CPU in the computer reads out from the memory and executes a program including part or all of the steps of the following flowcharts and sequences. Programs for these multiple devices can each be installed from the outside. Programs for these devices are distributed in a state stored in recording media or via communication lines.

FIG. 6 is a flowchart defining an example of an operation procedure when the RFIP conversion device according to the first embodiment of the present disclosure transmits IP packets.

Referring to FIG. 6, first, RFIP conversion device 101 starts receiving terrestrial signals. The RFIP conversion device 101 down-converts the received terrestrial signal to generate a baseband signal (step S11).

Next, RFIP conversion device 101 extracts a plurality of channel signals from the received terrestrial signal. More specifically, the IP transmission unit 111A in the RFIP conversion device 101 extracts the X-channel channel signal chX from the baseband signal, and the IP transmission unit 111B in the RFIP conversion device 101 extracts the Y-channel channel signal chY from the baseband signal (step S12).

Next, the RFIP conversion device 101 generates a plurality of digital signals respectively corresponding to the plurality of channels by digitally converting the extracted plurality of channel signals using the clock CL1. More specifically, IP transmission units 111A and 111B generate clock CL1 by dividing or multiplying the clock received from control unit 121 . The IP transmission unit 111A digitally converts the extracted channel signal chX using the generated clock CL1 to generate a digital signal DX, and stores the generated digital signal DX in the buffer in the storage unit 19. Further, the IP transmission unit 111B digitally converts the extracted channel signal chY using the generated clock CL1 to generate a digital signal DY, and stores the generated digital signal DY in the buffer in the storage unit 19 (step S13).

Next, RFIP conversion device 101 waits for a packet generation timing according to a predetermined cycle (NO in step S14), and generates an IP packet addressed to IPRF conversion device 201 when the packet generation timing arrives (YES in step S14). More specifically, the IP transmission unit 111A acquires a predetermined number of samples of the digital signal DX from the storage unit 19 at the packet generation timing, and generates an IP packet PAX in which the acquired predetermined number of samples of the digital signal DX are stored in the payload. At the packet generation timing, the IP transmission unit 111B acquires a predetermined number of samples of the digital signal DY from the storage unit 19, and generates an IP packet PAY in which the acquired predetermined number of samples of the digital signal DY are stored in the payload (step S15).

Next, RFIP conversion device 101 outputs a plurality of IP packets each containing a plurality of digital signals. More specifically, IP transmission unit 111A transmits IP packet PAX including digital signal DX to IPRF converter 201 via IP network 311 . IP transmission unit 111B also transmits IP packet PAY including digital signal DY to IPRF conversion device 201 via IP network 311 (step S16).

Next, the RFIP conversion device 101 waits for a new packet generation timing (NO in step S14).

FIG. 7 is a flowchart defining an example of an operation procedure when the IPRF conversion device according to the first embodiment of the present disclosure outputs channel signals.

Referring to FIG. 7, first, IPRF conversion apparatus 201 waits for the arrival of an IP packet (NO in step S21), and upon receiving a plurality of IP packets each containing a plurality of digital signals generated by digitally converting a plurality of channel signals using clock CL1 (YES in step S21), accumulates the received IP packets in buffers 23A and 23B. More specifically, IP receiving unit 211A in IPRF conversion device 201 receives IP packets PAX and PAY from RFIP conversion device 101 via IP network 311, and stores received IP packets PAX and PAY in buffers 23A and 23B, respectively (step S22).

Next, the IPRF conversion device 201 generates a plurality of channel signals by analog-converting a plurality of digital signals contained in the IP packets output from the buffers 23A and 23B using a common clock CL2. More specifically, the IP receiving unit 211A in the IPRF conversion device 201 acquires the digital signals DX and DY from the IP packets PAX and PAY output from the buffers 23A and 23B, and analog-converts the acquired digital signals DX and DY using the common clock CL2 to generate the channel signals chX and chY (step S23).

Next, the IPRF conversion device 201 outputs the generated multiple channel signals. More specifically, the IP receiving unit 211A up-converts the generated channel signals chX and chY to a desired frequency and outputs them to the multiplexer 321 (step S24).

Next, IPRF conversion device 201 waits for arrival of a new IP packet (NO in step S21).

FIG. 8 is a diagram showing an example of a sequence of IP packet transmission processing in the IP transmission system according to the first embodiment of the present disclosure.

Referring to FIG. 8, first, IP transmission units 111A and 111B in RFIP conversion apparatus 101 receive terrestrial signals via antenna 191 (step S31).

Next, the IP transmission unit 111A extracts the channel signal chX from the terrestrial signal (step S32).

Also, the IP transmission unit 111B extracts the channel signal chY from the terrestrial signal (step S33).

Next, the IP transmission unit 111A digitally converts the channel signal chX using the clock CL1 to generate the digital signal DX (step S34).

Also, the IP transmission unit 111B digitally converts the channel signal chY using the clock CL1 to generate the digital signal DY (step S35).

Next, the IP transmission unit 111A generates an IP packet PAX in which a predetermined number of samples of the digital signal DX are stored in the payload (step S36).

In addition, the IP transmission unit 111B generates an IP packet PAY in which a predetermined number of samples of the digital signal DY are stored in the payload (step S37).

Next, IP transmission unit 111A transmits IP packet PAX to IPRF converter 201 via IP network 311 (step S38).

IP transmission unit 111B also transmits IP packet PAY to IPRF conversion device 201 via IP network 311 (step S39).

IP reception unit 211A in IPRF converter 201 stores IP packets PAX and PAY received from IP transmission units 111A and 111B via IP network 311 in buffers 32A and 32B, respectively (step S40).

Next, the IP receiving unit 211A converts the digital signals DX and DY included in the IP packets PAX and PAY output from the buffers 23A and 23B into analog signals using the clock CL2 to generate channel signals chX and chY (step S41).

Next, the IP receiving unit 211A up-converts the channel signals chX and chY to desired frequencies and outputs them to the multiplexer 321 (step S42).

In addition, in the IPRF conversion device 201 according to the first embodiment of the present disclosure, the IP reception unit 211 is configured to include the adjustment unit 25, but the configuration is not limited to this. IP reception unit 211 may be configured without adjustment section 25 .

Further, in the IPRF conversion device 201 according to the first embodiment of the present disclosure, the adjustment unit 25 calculates the average value CNTAB of the clock numbers CNTA and CNTB, and determines the set value of the clock division ratio or multiplication ratio in the clock synthesizer 26 based on the difference between the calculated average value CNTAB and the clock number C1 in the storage unit 29. However, it is not limited to this. The adjustment unit 25 may be configured to count the number of clocks CNTA and determine the set value based on the difference between the number of clocks CNTA and the number of clocks C1. Further, the adjustment unit 25 may be configured to count the number of clocks CNTB and determine the set value based on the difference between the number of clocks CNTB and the number of clocks C1.

With the configuration that determines the setting value based on the difference between the average value CNTAB and the clock number C1, when a packet loss occurs between the RFIP conversion device 101 and the IPRF conversion device 201, it is possible to determine a more appropriate division ratio or multiplication ratio setting value than the configuration that determines the setting value based on the difference between the clock number CNTA or the clock number CNTB and the clock number C1. On the other hand, if the frequency of occurrence of packet loss between the RFIP conversion device 101 and the IPRF conversion device 201 is low and there is a high possibility that a plurality of IP packets corresponding to a plurality of channels will be lost all at once due to congestion in the IP network 311, a simple configuration may be adopted in which the set value is determined based on the difference between the number of clocks CNTA or the number of clocks CNTB and the number of clocks C1.

Further, in the RFIP conversion device 101 according to the first embodiment of the present disclosure, the receiving unit 11 in the IP transmission unit 111 down-converts the received terrestrial signal using the direct conversion method to generate a baseband signal. However, it is not limited to this. The receiving unit 11 may be configured to generate an IF (Intermediate Frequency) signal by down-converting a terrestrial signal using a superheterodyne method and output the generated IF signal to the extracting unit 12 .

Further, in the RFIP conversion device 101 according to the first embodiment of the present disclosure, each IP transmission unit 111 extracts the channel signal of one target channel from the terrestrial signal received via the antenna 191, digitally converts the extracted channel signal using the clock CL1 of the same frequency synchronized with each other to generate a digital signal, and outputs the IP packet including the generated digital signal. However, it is not limited to this. The IP transmission unit 111 may be configured to extract channel signals of a plurality of target channels from terrestrial signals received via the antenna 191, convert the extracted channel signals to digital using a common clock CL1 to generate a plurality of digital signals, and output a plurality of IP packets each containing the plurality of generated digital signals.

By the way, in a system that IP-transmits an RF band broadcast signal and then retransmits it, there is a demand for a technique that can retransmit broadcast signals of more channels with a simple configuration while suppressing the delay that occurs when retransmitting terrestrial digital broadcast signals. For example, cable television that broadcasts emergency bulletins and the like is required to shorten the delay that occurs when retransmitting.

With the techniques described in Patent Documents 1 and 3, it is necessary to demodulate the modulated signal before IP transmission, and after the IP transmission, modulate again and retransmit, resulting in a large delay when retransmitting the broadcast signal. For example, in a system for retransmitting a terrestrial digital signal, demodulation and remodulation of the modulated signal take a particularly long time, resulting in a large delay.

Further, Patent Document 2 discloses a system in which a frequency conversion device for converting IP packets into RF signals for terrestrial digital broadcasting is installed in viewer equipment. When installing such a frequency conversion device in a cable TV station building, it is desirable to make the device more compact. In particular, compared with a station building equipped with a device for receiving a terrestrial signal and transmitting an IP packet, a station building equipped with a device for receiving an IP packet and outputting an RF signal is smaller in scale and often has limited space for arranging the device.

On the other hand, in the IP transmission system 401 according to the first embodiment of the present disclosure, the RFIP conversion device 101 digitally converts a plurality of channel signals extracted from a terrestrial signal using a clock CL1 of the same frequency that is synchronized with each other or a common clock CL1 to generate a plurality of digital signals, and transmits a plurality of IP packets each containing the generated plurality of digital signals to the IPRF conversion device 201. The IPRF conversion device 201 generates a plurality of channel signals by analog-converting a plurality of digital signals contained in a plurality of IP packets received from the RFIP conversion device 101 using a common clock CL2, and outputs the generated plurality of channel signals.

In this way, the configuration of the IPRF conversion device that converts a plurality of digital signals contained in a plurality of IP packets to analog using a common clock CL2 makes it possible to share components such as a DAC necessary for generating a plurality of channel signals corresponding to a plurality of channels. Therefore, compared to a configuration in which a channel signal corresponding to one channel is generated using one DAC, the number of components and mounting area for generating a channel signal can be reduced, and cost reduction can be achieved. Specifically, in a configuration in which the IPRF conversion device includes an IP reception unit that receives IP packets and generates a channel signal, and a subchassis that accommodates the IP reception unit, the accommodation efficiency of the IP reception unit in the subchassis can be improved. Therefore, in a system that IP-transmits an RF band broadcast signal and then retransmits it, it is possible to retransmit broadcast signals of more channels with a simple configuration while suppressing the delay that occurs when retransmitting a digital terrestrial signal within an allowable range.

Next, another embodiment of the present disclosure will be described with reference to the drawings. The same or corresponding parts in the drawings are denoted by the same reference numerals, and the description thereof will not be repeated.

<Second Embodiment>
The present embodiment relates to an IP transmission system 402 including multiple RFIP conversion devices 101 and multiple IPRF conversion devices 201, unlike the IP transmission system 401 according to the first embodiment. It is the same as the IP transmission system 401 according to the first embodiment except for the contents described below.

FIG. 9 is a diagram showing the configuration of an IP transmission system according to the second embodiment of the present disclosure. Referring to FIG. 9, IP transmission system 402 includes multiple RF IP conversion devices 101 and multiple IPRF conversion devices 201 .

For example, the plurality of RFIP conversion devices 101 digitally convert a plurality of channel signals using clocks CL1 of the same frequency that are synchronized with each other, thereby generating a plurality of digital signals respectively corresponding to the plurality of channels. That is, the clocks CL1 used in the plurality of RFIP conversion apparatuses 101 are synchronized with each other and have the same frequency.

FIG. 10 is a diagram illustrating an example of a configuration of a control unit in the RFIP conversion device according to the second embodiment of the present disclosure; FIG. 10 shows a control unit 121A that is the control unit 121 in the RFIP conversion device 101A, a control unit 121B that is the control unit 121 in the RFIP conversion device 101B, and a control unit 121C that is the control unit 121 in the RFIP conversion device 101C.

Referring to FIG. 10, control units 121A, 121B and 121C respectively include switches SWA, SWB and SWC and precision crystal oscillators VA, VB and VC. The control unit 121 also outputs the clock output to the IP transmission unit 111 to the control unit 121 in the subsequent RFIP conversion device 101 . In the following description, the RFIP conversion device 101A is assumed to be the RFIP conversion device 101 in the foremost stage.

The switch SWA can be switched between a state in which the IP transmission unit 111 in the RFIP conversion device 101A and the control unit 121 in the other RFIP conversion device 101 are connected, and a state in which the IP transmission unit 111 in the RFIP conversion device 101A and the high-precision crystal oscillator VA are connected, according to a switch control signal from a control device (not shown).

Further, the switch SWB can switch between a state in which the IP transmission unit 111 in the RFIP conversion device 101B and the control unit 121A in the other RFIP conversion device 101A are connected, and a state in which the IP transmission unit 111 in the RFIP conversion device 101B and the high-precision crystal oscillator VB are connected, according to a switch control signal from a control device (not shown).

In addition, the switch SWC can switch between a state in which the IP transmission unit 111 in the RFIP conversion device 101C and the control unit 121B in the other RFIP conversion device 101B are connected, and a state in which the IP transmission unit 111 in the RFIP conversion device 101C and the high-precision crystal oscillator VC are connected, according to a switch control signal from a control device (not shown).

In the example shown in FIG. 10, the switch SWA in the RFIP conversion device 101A in which the preceding RFIP conversion device 101 does not exist is connected to the IP transmission unit 111 and the high-precision crystal oscillator VA in the RFIP conversion device 101A. The switch SWB is in a state in which the IP transmission unit 111 in the RFIP conversion device 101B and the control unit 121A in the preceding RFIP conversion device 101A are connected. Also, the switch SWC is in a state in which the IP transmission unit 111 in the RFIP conversion device 101C and the control unit 121B in the RFIP conversion device 101B in the previous stage are connected.

In this way, the clock generated by the high-precision crystal oscillator VA in the control unit 121A is output to each IP transmission unit 111 in the RFIP conversion device 101A and each IP transmission unit 111 in the RFIP conversion device 101 subsequent to the RFIP conversion device 101A. Each IP transmission unit 111 in the RFIP conversion device 101A and each IP transmission unit 111 in the RFIP conversion device 101 subsequent to the RFIP conversion device 101A receive a clock generated by a high-precision crystal oscillator VA and generate a clock CL1 by dividing or multiplying the received clock. As a result, clocks CL1 that are synchronized with each other and have the same frequency are generated in the plurality of RFIP conversion apparatuses 101 .

Therefore, in the IP transmission system 402 in which the IPRF conversion device 201 receives IP packets from a plurality of RFIP conversion devices 101 via the IP network 311, the IPRF conversion device 201 can generate a plurality of channel signals by analog-converting a plurality of digital signals respectively included in the received plurality of IP packets using the common clock CL2.

FIG. 11 is a diagram illustrating another example of the configuration of the control unit in the RFIP conversion device according to the second embodiment of the present disclosure; FIG. 11 shows a control unit 121A that is the control unit 121 in the RFIP conversion device 101A, a control unit 121B that is the control unit 121 in the RFIP conversion device 101B, and a control unit 121C that is the control unit 121 in the RFIP conversion device 101C.

Referring to FIG. 11, control units 121A, 121B and 121C respectively include PLL controllers PA, PB and PC and high-precision crystal oscillators VA, VB and VC. The control unit 121 also outputs the clock output to the IP transmission unit 111 to the control unit 121 in the subsequent RFIP conversion device 101 .

In the RFIP conversion device 101A where the preceding RFIP conversion device 101 does not exist, the PLL control unit PA in the control unit 121A outputs a free-running clock, that is, a clock output from the high-precision crystal oscillator VA, to each IP transmission unit 111 in the RFIP conversion device 101A and to the control unit 121B in the RFIP conversion device 101B in the subsequent stage of the RFIP conversion device 101A.

Also, the PLL controller PB in the control unit 121B receives clocks from the control unit 121A and the high-precision crystal oscillator VB in the preceding RFIP conversion device 101A. Using the clock received from the control unit 121A as a reference signal, the PLL control unit PB performs feedback control to synchronize the phase of the clock output from the high-precision crystal oscillator VB with the reference signal, and outputs the feedback-controlled clock to each IP transmission unit 111 in the RFIP conversion device 101B and to the control unit 121C in the RFIP conversion device 101C in the subsequent stage of the RFIP conversion device 101B.

Also, the PLL controller PC in the control unit 121C receives clocks from the control unit 121B and the high-precision crystal oscillator VC in the preceding RFIP conversion device 101B. Using the clock received from the control unit 121B as a reference signal, the PLL control unit PC performs feedback control to synchronize the phase of the clock output from the high-precision crystal oscillator VC with the reference signal, and outputs the feedback-controlled clock to each IP transmission unit 111 in the RFIP conversion device 101C and to the control unit 121 in the RFIP conversion device 101 in the subsequent stage of the RFIP conversion device 101C.

As a result, clocks CL1 that are synchronized with each other and have the same frequency are generated in the plurality of RFIP conversion apparatuses 101 .

FIG. 12 is a diagram illustrating another example of the configuration of the control unit in the RFIP conversion device according to the second embodiment of the present disclosure; FIG. 12 shows a control unit 121A that is the control unit 121 in the RFIP conversion device 101A, a control unit 121B that is the control unit 121 in the RFIP conversion device 101B, and a control unit 121C that is the control unit 121 in the RFIP conversion device 101C.

Referring to FIG. 12, control units 121A, 121B and 121C respectively include PLL controllers PA, PB and PC and high precision crystal oscillators VA, VB and VC. The control unit 121 also outputs the clock output to the IP transmission unit 111 to the control unit 121 in the subsequent RFIP conversion device 101 .

A GPS (Global Positioning System) receiver 122 receives radio waves transmitted from GPS satellites, generates a reference signal based on time information included in the received radio waves, and transmits the generated reference signal to the control unit 121A.

A PLL controller PA in the control unit 121A receives the reference signal from the GPS receiver 122 and the clock from the high-precision crystal oscillator VA. PLL control unit PA uses the reference signal received from GPS receiving unit 122 to perform feedback control to synchronize the phase of the clock output from high-precision crystal oscillator VA with the reference signal, and outputs the feedback-controlled clock to each IP transmission unit 111 in RFIP conversion device 101A and control unit 121B in RFIP conversion device 101B in the subsequent stage of RFIP conversion device 101A.

The operations of the PLL controllers PB and PC in the control units 121B and 121C are as explained with reference to FIG.

FIG. 13 is a diagram illustrating another example of the configuration of the control unit in the RFIP conversion device according to the second embodiment of the present disclosure; FIG. 13 shows a control unit 121A that is the control unit 121 in the RFIP conversion device 101A, a control unit 121B that is the control unit 121 in the RFIP conversion device 101B, and a control unit 121C that is the control unit 121 in the RFIP conversion device 101C.

Referring to FIG. 13, control units 121A, 121B and 121C respectively include PLL controllers PA, PB and PC and high-precision crystal oscillators VA, VB and VC.

The GPS receiver 122 receives radio waves transmitted from GPS satellites, generates a reference signal based on time information included in the received radio waves, and transmits the generated reference signal to the control unit 121 in each RFIP conversion device 101.

The PLL controller in the control unit 121 of each RFIP conversion device 101 receives the reference signal from the GPS receiver 122 and the clock from the precision crystal oscillator. The PLL control unit uses the reference signal received from the GPS reception unit 122 to perform feedback control to synchronize the phase of the clock output from the high-precision crystal oscillator with the reference signal, and outputs the feedback-controlled clock to each IP transmission unit 111 in the RFIP conversion device 101.

The above-described embodiments should be considered as illustrative in all respects and not restrictive. The scope of the present invention is indicated by the scope of the claims rather than the above description, and is intended to include all modifications within the scope and meaning equivalent to the scope of the claims.

The above description includes the features appended below.
[Appendix 1]
an RFIP conversion device;
an IPRF conversion device,
The RFIP conversion device generates a plurality of digital signals by digitally converting a plurality of channel signals extracted from broadcast signals of terrestrial digital broadcasting using a first clock of the same frequency that is synchronized with each other or a common first clock, and transmits a plurality of IP packets each containing the plurality of generated digital signals to the IPRF conversion device;
The IPRF conversion device generates a plurality of channel signals by analog-converting the plurality of digital signals included in the plurality of IP packets received from the RFIP conversion device using a common second clock, and outputs the generated plurality of channel signals;
the RFIP conversion device includes a plurality of IP transmission units;
the IPRF conversion device includes one or more IP receiving units;
each of the IP receiving units digitally converts the channel signal using the first clock to generate the digital signal, and transmits the IP packet containing the generated digital signal to the IPRF conversion device;
The IP receiving unit generates the plurality of channel signals by analog-converting the plurality of digital signals included in the plurality of IP packets received from the RFIP conversion device using the second clock, and outputs the generated plurality of channel signals,
An IP transmission system, wherein the IPRF conversion device includes fewer IP reception units than the number of IP transmission units in the RFIP conversion device.

11 receiver 12 extractor 13 amplifier 14 clock synthesizer 15 AD converter 16 filter 17 IP packet generator 18 output 19 storage 21 receiver 22A, 22B classification filter 23A, 23B buffer 24A, 24B acquisition unit 25 adjuster 26 clock synthesizer 27 DA converter 28 output unit 29 storage unit 101 RFIP conversion device 111, 111A, 111B IP transmission unit 121, 121A, 121B, 121C control unit 122 GPS reception unit 131 backplane 141 subchassis 191 antenna 201 IPRF conversion device 211, 211A IP reception unit 221 control unit 231 backplane 241 subchassis 301, 302 station building 311 IP network 321 multiplexer 401, 402 IP transmission system SWA, SWB, SWC switch VA, VB, VC high-precision crystal oscillator PA, PB, PC PLL control unit

Claims (7)

an RFIP conversion device;
an IPRF conversion device,
The RFIP conversion device generates a plurality of digital signals by digitally converting a plurality of channel signals extracted from broadcast signals of terrestrial digital broadcasting using a first clock of the same frequency that is synchronized with each other or a common first clock, and transmits a plurality of IP packets each containing the plurality of generated digital signals to the IPRF conversion device;
The IPRF conversion device generates a plurality of channel signals by analog-converting the plurality of digital signals included in the plurality of IP packets received from the RFIP conversion device using a common second clock, and outputs the generated plurality of channel signals. a receiver for receiving a plurality of IP packets each containing a plurality of digital signals generated by digitally converting a plurality of channel signals in digital terrestrial broadcasting using a mutually synchronized first clock of the same frequency or a common first clock;
a generating unit configured to generate a plurality of channel signals by analog-converting the plurality of digital signals included in the plurality of IP packets received by the receiving unit using a common second clock;
an output unit that outputs the plurality of channel signals generated by the generation unit. The IPRF conversion device further comprises:
a buffer for accumulating the IP packets received by the receiving unit;
an adjusting unit that adjusts the second clock based on the accumulated amount of the IP packets in the buffer;
3. The IPRF conversion device according to claim 2, wherein the generation unit generates the plurality of channel signals by analog-converting the plurality of digital signals using one DAC (Analog to Digital Converter) that operates according to the second clock. a receiving unit that receives a broadcast signal of terrestrial digital broadcasting;
an extractor that extracts a plurality of channel signals from the broadcast signal received by the receiver;
a generation unit configured to digitally convert the plurality of channel signals extracted by the extraction unit using a mutually synchronized first clock having the same frequency or a common first clock to generate a plurality of digital signals;
an output unit that outputs a plurality of IP packets each containing the plurality of digital signals generated by the generation unit. An IP transmission method in an IP transmission system comprising an RFIP conversion device and an IPRF conversion device,
a step in which the RFIP conversion device generates a plurality of digital signals by digitally converting a plurality of channel signals extracted from a broadcast signal of digital terrestrial broadcasting using a mutually synchronized first clock having the same frequency or a common first clock, and transmitting a plurality of IP packets each containing the plurality of generated digital signals to the IPRF conversion device;
and the IP RF conversion device generating a plurality of channel signals by analog-converting the plurality of digital signals included in the plurality of IP packets received from the RF IP conversion device using a common second clock, and outputting the generated plurality of channel signals. An IPRF conversion method in an IPRF conversion device, comprising:
receiving a plurality of IP packets each containing a plurality of digital signals generated by digitally converting a plurality of channel signals in terrestrial digital broadcasting using a mutually synchronized first clock of the same frequency or a common first clock;
generating a plurality of channel signals by analog-converting the plurality of digital signals contained in the plurality of received IP packets using a common second clock;
and outputting the generated plurality of channel signals. An RFIP conversion method in an RFIP conversion device,
a step of receiving a broadcast signal of terrestrial digital broadcasting;
extracting a plurality of channel signals from the received broadcast signal;
generating a plurality of digital signals by digitally converting the extracted plurality of channel signals using a mutually synchronized first clock having the same frequency or a common first clock;
and outputting a plurality of IP packets each containing the generated plurality of digital signals.

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