JP2022546271A - Method and apparatus for predicting kernel tuning parameters - Google Patents

Abstract

A processing device for improving processing performance is provided, the processing device comprising a memory configured to store data, and a processor in communication with the memory. A processor is configured to receive tuning parameters each having a numerical value and convert the numerical values of the tuning parameters into words for executing the portion of the program on the identified hardware device. The processor also uses one or more machine language learning algorithms to determine which word combination is better for executing the portion of the program on the identified hardware device based on performance efficiency. and convert the predicted combinations of words into corresponding numerical values for execution of the program portion on the identified hardware device. [Selection drawing] Fig. 3

Description

(Cross reference to related application)
This application claims the benefit of U.S. patent application Ser. incorporated herein by.

A program's performance efficiency is determined, for example, by the speed or time at which the program's instructions are executed on the hardware (eg, integrated circuit (IC) or chip). The physical characteristics and specifications of hardware vary by hardware generation or version. Therefore, the performance efficiency of programs usually varies greatly between different generations of hardware devices. Programs typically include tuning parameters that are used to vary the program's performance efficiency on different hardware.

A more detailed understanding can be obtained from the following description given by way of example in conjunction with the accompanying drawings.

1 is a block diagram of an example device that may implement one or more features of the disclosure; FIG. 2 is a block diagram of the device of FIG. 1 showing additional details; FIG. 1 is a block diagram illustrating an example method for predicting tuning parameters of a program; FIG. 4 illustrates an exemplary method of implementing the language learning and prediction shown in FIG. 3; FIG.

Before deploying a program to run on the identified hardware device, the program typically profiles the identified hardware by running the program using different combinations of the program's tuning parameters. , varying performance efficiency. Program tuning parameters for the identified hardware are selected based on resulting performance efficiency.

A program's performance efficiency depends on the values of the program's tuning parameters. A program typically includes multiple tuning parameters (eg, 10 parameters), each with multiple different selectable values (eg, 10 values). Different combinations of these tuning parameter values will compute correct results, but will result in varying performance efficiencies for these results.

Conventional profiling systems determine tuning parameter values for a program (eg, a GPU computing kernel) by a search algorithm that traverses a solution space. For example, for matrix multiplication instructions, conventional systems require a continuous search of a database of stored tuning parameter values for each combination of matrix sizes to be multiplied.

These search algorithms are costly and time consuming. For example, these conventional search algorithms typically require costly computational resources and a lot of time to tune programs (eg, kernels). Additionally, tuning applies only to selected programs. Running unselected programs usually results in poor performance, and users who choose to tune their kernels experience long delays. Also, these conventional search algorithms do not provide tuning parameter values that take into account the different input sizes for each program and the various types of problems the program is trying to solve.

The devices and methods described herein use machine learning algorithms to efficiently obtain tuning parameter values for programs running on identified hardware without using inefficient search algorithms. to predict tuning parameter values based on input values (eg, input tensor values including image dimensions, matrix dimensions, number of color channels, number of operations to perform).

In contrast to conventional machine learning models that output numeric values based on input numeric values, the machine learning algorithms described herein convert input numeric values into words (i.e., languages of one or more letters) and use language models is used to predict parameters from input words. A language learning algorithm learns to translate from a source language (eg, an input word or word sequence converted from one or more numbers) to a target language (eg, an output word sequence). The output word is then converted to a number to obtain the executable tuning parameter value.

Tuning parameter values are predicted based on tuning parameter values entered into the program in sequence (as opposed to parallel input), where the tuning parameter values are encoded as separate words rather than scalar numbers. Individual words are then processed using a combination of neural machine language translation techniques such as multi-layer perceptrons (MLP) and other ML primitives (convolution, activation, batch normalization, dropout, and recurrent neural networks (RNN)). is translated using the technology of translating text from one language to another using

In contrast to traditional language models, the machine learning language algorithms described herein rely on pre-determined (i.e., pre-execution) constraints (e.g., invalid combinations of parameter values). , the maximum number of registers allocated per thread, and the amount of memory accessible per thread). Constraints prevent values that cannot exist simultaneously or that produce invalid results from being predicted as tuning parameter values. Constraints therefore facilitate a more efficient prediction process, as the tuning parameter values are predicted from a small space (i.e., a small number of potential parameter values), and also prevent the selected tuning parameter values from being invalid. Provide more accurate forecasts to avoid consequences.

A processing device for improving processing performance is provided, the processing device including a memory configured to store data and a processor in communication with the memory. A processor is configured to receive tuning parameters each having a numerical value and convert the numerical values of the tuning parameters into words for executing the portion of the program on the identified hardware device. The processor also uses one or more machine language learning algorithms to determine which word combination is better for executing the portion of the program on the identified hardware device based on performance efficiency. and convert the predicted combinations of words into corresponding numerical values for execution of the portion of the program on the identified hardware device.

A method of improving processing performance is provided, comprising: receiving tuning parameters each having a numerical value; and converting to The method also uses one or more machine language learning algorithms to determine which word combination is better for executing the portion of the program on the identified hardware device based on performance efficiency. and converting the predicted combinations of words into corresponding numerical values for executing the portion of the program on the identified hardware device.

A non-transitory computer-readable storage medium is provided that includes instructions for causing a computer to perform a method, the method for performing a portion of a program on an identified hardware device, each tuning having a numerical value. Receiving the parameter and converting the numerical value of the tuning parameter to a word. The method also uses one or more machine language learning algorithms to determine which word combination is better for executing the portion of the program on the identified hardware device based on performance efficiency. and converting the predicted combinations of words into corresponding numerical values for executing the portion of the program on the identified hardware device.

As used herein, a program includes any sequence of instructions that are executed using one or more processors to perform a procedure or routine (e.g., operation, computation, function, process, job) . As used herein, execution of programmed instructions (e.g., applications, drivers, operating systems, or other software) on a processor includes, but is not limited to, fetching, decoding, scheduling execution, starting execution , and execution of a particular portion of programmed instructions (eg, rendering a video in full screen). Programmed instructions include tuning parameters and tuning parameter settings, which are adjustable (i.e., changeable) values used to control the performance efficiency of programs executing on hardware devices. have

FIG. 1 is a block diagram of an exemplary device 100 that can implement one or more features of this disclosure. Device 100 may include, for example, a computer, gaming device, handheld device, set-top box, television, mobile phone, or tablet computer. Device 100 includes processor 102 , memory 104 , storage 106 , one or more input devices 108 and one or more output devices 110 . Device 100 may also optionally include input driver 112 and output driver 114 . It should be appreciated that device 100 may include additional components not shown in FIG.

In various alternatives, processor 102 includes a central processing unit (CPU), a graphics processing unit (GPU), a CPU and GPU located on the same die, or one or more processor cores, each processor A core can be a CPU or a GPU. In various alternatives, memory 104 is located on the same die as processor 102 or is located separately from processor 102 . Memory 104 includes volatile or nonvolatile memory (eg, random access memory (RAM), dynamic RAM, cache).

Storage 106 includes fixed storage or removable storage (eg, hard disk drive, solid state drive, optical disk, or flash drive). Input devices 108 include, but are not limited to, keyboards, keypads, touch screens, touch pads, detectors, microphones, accelerometers, gyroscopes, biometrics scanners, or network connections (e.g., for transmitting wireless IEEE 802 signals and/or or a wireless local area network card for reception). Output device 110 includes, but is not limited to, a display, speaker, printer, haptic feedback device, one or more lights, antenna, or network connection (e.g., wireless local area network for transmitting and/or receiving wireless IEEE 802 signals). card).

Input driver 112 communicates with processor 102 and input device 108 and enables processor 102 to receive input from input device 108 . Output driver 114 communicates with processor 102 and output device 110 and enables processor 102 to send output to output device 110 . Note that input driver 112 and output driver 114 are optional components, and that device 100 operates similarly if input driver 112 and output driver 114 are not present. Output driver 114 includes an accelerated processing device (APD) 116 coupled to display device 118 . APD is configured to accept computational and graphics rendering commands from processor 102, process the computational and graphics rendering commands, and provide pixel output to display device 118 for display. As described in more detail below, APD 116 includes one or more parallel processing units configured to perform computations according to the Single Instruction Multiple Data (SIMD) paradigm. Thus, while various functions are described herein as being performed by or in conjunction with APD 116, in various alternatives the functions described as being performed by APD 116 are performed by a host processor (e.g., , processor 102 ) and configured to provide graphical output to display device 118 . For example, it is envisioned that any processing system that performs processing tasks according to the SIMD paradigm may be configured to perform the functions described herein. Alternatively, any computing system that does not perform processing tasks according to the SIMD paradigm is envisioned to perform the functions described herein.

FIG. 2 is a block diagram of device 100 showing additional details related to performing processing tasks on APD 116 . APD 116 includes multiple computation units 132 , a processing pipeline (eg, graphics processing pipeline) 134 , and a scheduler 136 . Processor 102 maintains in system memory 104 one or more control logic modules for processor 102 to execute. The control logic module includes an operating system 120 , kernel mode drivers 122 and applications 126 . These control logic modules control various aspects of the operation of processor 102 and APD 116 . For example, operating system 120 communicates directly with the hardware and provides an interface to the hardware for other software running on processor 102 . Kernel-mode driver 122 controls the operation of APD 116 and accesses various functions of APD 116, for example, by providing an application programming interface (API) to software (e.g., application 126) running on processor 102. . Kernel mode driver 122 also includes a just-in-time compiler that compiles programs for execution by processing components of APD 116 (such as SIMD unit 138, described in more detail below).

APD 116 executes commands and programs for selected functions such as graphics and non-graphics operations that may be suitable for parallel processing. APD 116 can be used to perform graphics pipeline operations such as pixel manipulation, geometric calculations, etc., and to render images on display device 118 based on commands received from processor 102 . APD 116 also performs computational processing operations not directly related to graphics operations, such as video-related operations, physics simulations, computational fluid dynamics, or other tasks, based on commands received from processor 102. do.

APD 116 includes a computational unit 132 that includes one or more SIMD units 138 that are configured to perform operations at the request of processor 102 in parallel according to the SIMD paradigm. The SIMD paradigm is a paradigm in which multiple processing elements can share a single program control flow unit and program counter, thus executing the same program, but with different data. In one example, each of SIMD units 138 includes 16 lanes, each lane executing the same instruction at the same time as other lanes of SIMD unit 138, but may execute that instruction with different data. Prediction can be used to turn off lanes when not all lanes need to execute a given instruction. Prediction can also be used to execute programs with branching control flow. More specifically, for programs whose control flow has conditional branches or other instructions based on computations performed by individual lanes, prediction of lanes corresponding to currently unexecuted control flow paths and different control flow paths. The serial execution of allows for arbitrary control flow.

The basic unit of execution in computation unit 132 is a work item. Each work-item represents a single instantiation of the program to be executed in parallel on a particular lane. Work-items can be executed simultaneously in a single SIMD processing unit 138 as a "wavefront". One or more wavefronts are contained in a "workgroup", which contains a collection of workitems designated to execute the same program. A workgroup can be implemented by executing each of the wavefronts that make up the workgroup. Alternatively, the wavefronts are run serially on a single SIMD unit 138 or partially or completely in parallel on different SIMD units 138 . A wavefront can be thought of as the largest set of work items that can be executed simultaneously on a single SIMD unit 138 . Thus, if a command received from processor 102 indicates that a particular program is to be processed in parallel to the extent that the program cannot be executed on a single SIMD unit 138 at the same time, that program may be executed on two or more SIMD units 138 . , or serially processed on the same SIMD unit 138 (or both parallel and serially processed, if desired). Scheduler 136 is configured to perform operations related to scheduling various wavefronts on different compute units 132 and SIMD units 138 .

The parallelism allowed by computation unit 132 is adequate for graphics related operations such as pixel value computations, vertex transformations, and other graphics operations. Thus, in some cases, graphics processing pipeline 134, which receives graphics processing commands from processor 102, provides computational tasks to compute units 132 for execution in parallel.

Compute unit 132 may also be used to perform computational tasks not related to graphics or not performed as part of the “normal” operation of graphics processing pipeline 134 (e.g., for operations of graphics processing pipeline 134). custom operations performed to supplement the processing performed). Application 126 or other software running on processor 102 sends programs defining such computational tasks to APD 116 for execution.

FIG. 3 is a block diagram illustrating an exemplary method 300 of predicting tuning parameters for a program executing on an identified hardware device. Portions of method 300, such as encoding, transformation, language learning, comparison and prediction, are performed by a processor such as APD 116, for example.

Tuning parameters are parameters that are categorical in nature (e.g., parameters that represent options provided to a program to change its performance efficiency) and, for example, the amount of data accessed from memory (e.g., main memory), Number of parallel memory accesses made across the link (e.g. reads, writes), number of input image channels (e.g. color channels of an image), number of output channels (e.g. output channels of a hyperspectral image), pipeline depth parameters with numerical values for tuning specific parameters such as (eg, input depth and output depth). The target values of the tuning parameters are determined according to input parameters such as image height, image width, total number of input channels, total number of output channels, and number of images to be processed at one time. Furthermore, tuning parameters differ, in part, with parameters having different interpretations between programs.

As shown at 302 of FIG. 3, method 300 includes receiving numerical values for a plurality of tuning parameters of a program executing on an identified hardware device (eg, an identified version of the hardware device). Each of the numerical tuning parameter values are received by APD 116 in succession (ie, in sequence), for example.

As shown at 304 in FIG. 3, method 300 includes encoding numerical values in a sequence of tuning parameters. Encoding is done by converting the tuning parameter values from numbers to linguistic words. Transforming a tuning parameter value includes transforming a number into a word, transforming one or more numbers into words, and transforming a number into multiple words. Examples of encoding include one-hot encoding and dense vectors generated from one-hot encoding.

Each transformed word is provided to the machine language model 312 and predicted based on the constraints 314 as part of the language learning and prediction process 306, using a machine language learning and prediction algorithm, based on performance efficiency, Predict which words will be used to execute the program on the identified hardware device. That is, the machine language learning algorithm predicts which word combinations (corresponding to numerical tuning parameter values) will result in efficient execution of a portion of the program on the identified hardware device. (e.g. predicting whether the word combination will execute part of the program faster than other word combinations or will execute part of the program in less time than other word combinations) do).

Machine language model 312 processes the transformed word values of tuning parameters according to one or more machine learning primitives. Examples of machine learning primitives include convolutional neural networks (CNNs), convolutional and pooling layers, and recurrent neural networks ( RNN) and densely connected deep neural networks with dropout and different activation functions.

Words are predicted based on constraints 314, which include, for example, invalid combinations of parameter values, the maximum number of registers allocated per thread, and the amount of memory accessible per thread. Constraints 314 prevent prediction of tuning parameter values that cannot co-exist with one or more other tuning parameters or that produce invalid results. Constraints improve efficiency because predictions are made in a small space. In addition, the constraint improves the accuracy of the prediction because the predicted tuning parameter values do not produce invalid results.

As shown at 308 in FIG. 3, method 300 includes decoding the predicted tuning parameter values. Decoding is performed by converting the predicted tuning parameter word values back to numeric values. The predicted tuning parameter values are then provided as predicted viable tuning parameter values, as shown at 310 in FIG. A portion of the program is executed on the identified hardware device using the predicted executable tuning parameter values.

An example language learning and prediction process 306 will now be described in more detail with respect to FIG. As noted above, in contrast to conventional systems for determining tuning parameters that receive multiple tuning parameter values in parallel, the features of the present disclosure are based on tuning parameter values that are entered into the program in sequence. , the tuning parameter values are predicted. That is, each of the input tuning parameter values are received consecutively (ie, in sequence) and the tuning parameter values are predicted as a sequence.

FIG. 4 illustrates an example method 400 for performing language learning and prediction shown at 306 in FIG. 3 in which each of the input tuning parameter values are received in succession. As described in more detail below, FIG. 4 illustrates how constraints 314 can be used to filter intermediate tuning parameter value candidates and predict predicted tuning parameter value candidates (e.g., performance efficiency over other tuning parameter value candidates). predicting the next tuning parameter value candidate in the sequence using the candidate determined to be likely to execute part of the program with high probability. For example, portions of method 400 such as encoding, transformation, language learning, comparison, filtering, discrimination, and prediction are performed by a processor, such as APD 116, for example.

As shown in FIG. 4, each word 402(1)-402(n) of an input word sequence 402 is received. A representation learning process 404 is performed on each word 402(1)-402(n) according to one or more machine learning primitives (eg, one or more of the machine learning primitives described above) and an internal representation 406 (eg, The compressed representation of words 402(1)-402(n) within machine language model 312) is determined. Each block of representation learning 404 represents, for example, a memory cell used to determine the internal representation of the corresponding word of input word sequence 402 .

For example, during representation learning 404, the internal representation of first word 402(1) is output (eg, temporarily stored) as internal representation 406 of first word 402(1). Also, the internal representation of the first word 402(1) is provided upstream (to the left between the memory cells of the first word 402(1) and the memory cells of the second word 402(2)). ), which is used to determine the internal representation of the second word 402(2).

An intermediate internal representation of the second word 402(2) is determined based on the internal representations of the first word 402(1) and the second word 402(2). The intermediate internal representation of the second word 402(2) is then output (eg, temporarily stored) as the internal representation 406 of the second word 402(2). Also, the internal representation of the second word 402(2) is provided upstream toward the memory cells of the third word 402(3) (the memory cells of the second word 402(2) and the memory cells of the third word 402(3)). (indicated by the left-to-right arrows between the memory cells of word 402(3)), are used to determine the internal representation of the third word 402(3). The process continues upstream (ie, in the direction of the left-to-right arrow of expression learning 404 ) for each remaining word of input word sequence 402 .

In the example shown in FIG. 4, representation learning 404 includes interactive learning. That is, an internal representation of each word 402(1)-402(n) is also provided downstream (ie, in the direction of the right-to-left arrow of representation learning 404). Thus, the internal representation of each word 402(1)-402(n-1) is determined based on the upstream word of the input word sequence 402 (ie, directly based on the next upstream word in the sequence, indirectly typically determined based on other upstream words in the input word sequence 402). Also, features of the present disclosure are implemented, for example, by unidirectional learning (ie, the direction of the arrow going from left to right).

Using the internal representation 406 of the words, sequences of words are predicted for execution of the portion of the program on the identified hardware device. The prediction process includes generating an intermediate word sequence 408 and an output word sequence 410 . The multiple tuning parameter candidates are used to predict sequences of words for execution, including candidates determined to be more likely to yield better performance efficiency than other candidates, as described below. be done. For example, if the first candidate does not satisfy one or more of the constraints 314, then the next most likely candidate is used to predict words in the sequence.

In one example, candidate numerical tuning parameters to be used during the prediction process are pre-determined (ie, determined prior to execution). For example, a given number of predictions k is propagated resulting in k predictions.

The internal representation of words 402 ( 1 )- 402 ( n ) of word sequence 402 is then provided to a similar machine learning structure to generate intermediate word sequence 408 . Each block of the intermediate word sequence 408 of FIG. 4, for example, is used to intermediately predict corresponding words 408(1)-408(n) of the intermediate word sequence 408 (ie, tuning parameter value candidates). Represents a memory cell.

The first word 408(1) (i.e., the first candidate) of the intermediate word sequence 408 executes part of the program on the identified hardware device based on one or more of the machine learning primitives described above. expected to be intermediate. The internal representation of the first word 408(1) is analyzed based on one or more constraints 314 on the part of the program (eg, part of the kernel). That is, if the first word 408 ( 1 ) satisfies each of the one or more constraints 314 , the first word 408 ( 1 ) is intermediately predicted as a parameter value candidate for the output word sequence 410 . If first word 408 ( 1 ) does not satisfy each of one or more constraints 314 , then first word 408 ( 1 ) is not selected as a candidate parameter value for output word sequence 410 .

The internal representation of the first word 408(1) is also provided to the next memory cell (ie, the next upstream memory cell) to determine the second word 408(2) of the intermediate word sequence 408. be done. If the second word 408(2) satisfies each of the one or more constraints 314 instead of the first word 408(1), then the second word 408(2) is a candidate parameter value for the output word sequence 410. is intermediately predicted as If second word 408 ( 2 ) does not satisfy each of one or more constraints 314 , then second word 408 ( 2 ) is not selected as a candidate parameter value for output word sequence 410 . Processing continues for each remaining word of the intermediate word sequence 408 .

The prediction process also compares the tuning parameter values to other tuning parameter values to determine which combination of tuning parameter values will produce a portion of the program on the identified hardware device. Includes an attention mechanism that predicts which combination will yield better performance efficiency than other combinations of candidates.

For example, the tuning parameter value candidates 410(1)-410(n) of the output word sequence 410 are compared and ranked according to their likelihood of executing a portion of the program with greater performance efficiency than other tuning parameter value candidates. be. One or more tuning parameter value candidates of output word sequence 410 (eg, tuning parameter value candidates determined to be more likely to provide better performance efficiency than other candidates) are stored in memory cells of intermediate word sequence 408 . provided to return and intermediately predict one or more words 408(1)-408(n) of the intermediate word sequence 408. FIG. Accordingly, the machine learning algorithm predicts tuning parameter values based on input tuning parameter values (e.g., values of the input word sequence 402) and predicted tuning parameter value candidates that are fed back to the machine learning algorithm. to learn.

Next, as shown in block 308 of FIG. 3, the predicted tuning parameter value candidates 410(1)-410(n) of the output word sequence 410 are converted back to numeric values and are computed on the identified hardware device. To run a portion of the program, it is provided as predicted executable tuning parameter values 310 shown in FIG.

It should be understood that many variations are possible based on the disclosure herein. Although features and elements are described above in particular combinations, each feature or element can be used alone, without other features or elements, or in various combinations with or without other features and elements. can be done.

The provided methods can be implemented in a general purpose computer, processor or processor core. Suitable processors include, by way of example, general purpose processors, special purpose processors, conventional processors, digital signal processors (DSPs), multiple microprocessors, one or more microprocessors associated with a DSP core, controllers, microcontrollers, application specific It includes an integrated circuit (ASIC), a field programmable gate array (FPGA) circuit, any other type of integrated circuit (IC), and/or a state machine. Such processors are manufactured by configuring the manufacturing process using the results of processing hardware description language (HDL) instructions and other intermediate data (instructions storable on computer readable media) including netlists. may Such processing results may be masks used in semiconductor manufacturing processes to manufacture processors that implement application profiling for power performance management.

The various functional units shown and/or described herein (including but not limited to processor 102, input driver 112, input device 108, output driver 114, output device 110, accelerated processing device 116, scheduler 136, graphics processing pipeline 134, compute unit 132, and SIMD unit 138) may be implemented as general purpose computers, processors or processor cores, or as programs, software or firmware, and may be implemented as non-transitory computer readable storage media or It may be stored on another medium and executable by a general purpose computer, processor or processor core.

The methods or flowcharts provided herein may be implemented in computer programs, software, firmware embodied in non-transitory computer-readable storage media for execution by a general purpose computer or processor. Examples of non-transitory computer-readable storage media include read-only memory (ROM), random-access memory (RAM), registers, cache memory, semiconductor memory devices, magnetic media such as internal hard disks and removable disks, magneto-optical media, CDs - Including optical media such as ROM discs and Digital Versatile Discs (DVDs).

Claims (20)

A processing device for improving processing performance, comprising:
a memory configured to store data;
a processor in communication with the memory;
The processor
receiving tuning parameters each having a numerical value for executing the portion of the program on the identified hardware device;
converting the numerical values of the tuning parameters into words;
using one or more machine language learning algorithms to determine which combination of words is better for executing the portion of the program on the identified hardware device based on performance efficiency; to predict,
converting predicted word combinations into corresponding numerical values for execution of the portion of the program on the identified hardware device;
is configured to do
processing device. the processor is configured to successively determine a machine language learning representation for each word input in a word sequence;
2. The processing device of claim 1. the processor is configured to determine a machine language learning representation of a word in the word sequence based on a determined machine language learning representation of another word in the word sequence;
3. The processing device of claim 2. The processor
predicting an intermediate sequence of words based on the word-by-word machine language learning representation;
determining any word of the intermediate sequence of words as a candidate word for the predicted word combination if the word satisfies each of one or more predetermined constraints;
determining that the any word of the intermediate sequence of words is not a candidate word for the predicted word combination if the word does not satisfy each of the one or more predetermined constraints;
is configured to do
3. The processing device of claim 2. each of the one or more predetermined constraints indicates whether the combination of words would produce an invalid result by executing a portion of the program;
5. The processing device of claim 4. The processor
determining the plurality of words of the intermediate sequence of words as candidate words for the predicted word combination;
predicting the next word in the intermediate sequence of words based on candidate words determined to be more likely to execute the portion of the program with greater performance efficiency than other candidate words;
is configured to do
5. The processing device of claim 4. the performance efficiency is a measure of speed or time to execute a portion of the program;
Based on the performance efficiency, the processor performs the configured to determine which combination of said words is good for executing said program on an identified hardware device;
2. The processing device of claim 1. the received numeric values of the plurality of tuning parameters are tensor input values;
2. The processing device of claim 1. the one or more machine language learning algorithms include at least one of a convolutional neural network, a recurrent neural network, and a combined neural network;
2. The processing device of claim 1. A method for improving processing performance comprising:
receiving tuning parameters each having a numerical value for executing the portion of the program on the identified hardware device;
converting the numerical values of the tuning parameters into words;
Using one or more machine language learning algorithms to predict which word combinations are better for executing the portion of the program on the identified hardware device based on performance efficiency. and
converting predicted word combinations into corresponding numerical values for execution of the portion of the program on the identified hardware device;
Method. further comprising successively determining a machine language learning representation for each word entered in the word sequence;
11. The method of claim 10. further comprising determining machine language learning representations of words in the word sequence based on determined machine language learning representations of other words in the word sequence;
12. The method of claim 11. predicting an intermediate sequence of words based on the word-by-word machine language learning representation;
determining any word of the intermediate sequence of words as a candidate word for the predicted word combination if the word satisfies each of one or more predetermined constraints;
determining that the any word of the intermediate sequence of words is not a candidate word for the predicted word combination if the word does not satisfy each of the one or more predetermined constraints; further comprising
11. The method of claim 10. each of the one or more predetermined constraints indicates whether the combination of words would produce an invalid result by executing a portion of the program;
14. The method of claim 13. determining the plurality of words of the intermediate sequence of words as candidate words for the predicted word combination;
predicting the next word in the intermediate sequence of words based on candidate words determined to be more likely to execute the portion of the program with greater performance efficiency than other candidate words; further including,
14. The method of claim 13. further comprising ranking each of the plurality of words of the intermediate sequence of words according to the candidate word's likelihood of executing the portion of the program with greater performance efficiency than the other candidate words;
16. The method of claim 15. the performance efficiency is a measure of speed or time to execute a portion of the program;
Based on the performance efficiency, the method performs the determining which combination of the words is good for executing the program on the identified hardware device;
12. The method of claim 11. the received numeric values of the plurality of tuning parameters are tensor input values;
12. The method of claim 11. the one or more machine language learning algorithms include at least one of a convolutional neural network, a recurrent neural network, and a combined neural network;
12. The method of claim 11. A computer-readable storage medium having instructions for causing a computer to perform a method, comprising:
The method includes:
receiving tuning parameters each having a numerical value for executing the portion of the program on the identified hardware device;
converting the numerical values of the tuning parameters into words;
Using one or more machine language learning algorithms to predict which word combinations are better for executing the portion of the program on the identified hardware device based on performance efficiency. and
converting predicted word combinations into corresponding numerical values for execution of the portion of the program on the identified hardware device;
computer readable storage medium.

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