JP2021077805A - Light receiving element and manufacturing method thereof - Google Patents

Abstract

To provide a light receiving element that uses a germanium layer as a light receiving layer, and can suppress a leakage current in the dark state.SOLUTION: A light receiving element 1 includes a silicon substrate 10 on which an N-type junction barrier region 12 and a P-type region 11 are formed on the surface, and in which the P-type region 11 is arranged so as to face at least one direction in the in-plane direction with the N-type junction barrier region 12 in between, a germanium layer 30 provided on the surface of the silicon substrate 10 and in contact with the N-type junction barrier region 12 and the P-type region 11, a cathode electrode 50 that is electrically connected to the N-junction barrier region 12, and an anode electrode 40 electrically connected to the P-shaped region.SELECTED DRAWING: Figure 1

Description

The techniques disclosed herein relate to light receiving elements and methods of manufacturing them.

Patent Document 1 discloses a heterojunction photodiode-type light receiving element in which a germanium layer is crystal-grown as a light receiving layer on the surface of a silicon substrate. The germanium layer is in contact with each of the N-type region and the P-type region formed on the surface of the silicon substrate. The cathode electrode is electrically connected to the N-type region, and the anode electrode is electrically connected to the P-type region.

This light receiving element has a configuration in which an N-type region, a germanium layer, and a P-type region are connected in series between a cathode electrode and an anode electrode. Germanium is a P-type semiconductor because lattice defects act as acceptors even if no impurities are added. Therefore, in this light receiving element, a hetero-PN junction is formed by a germanium layer and an N-type region.

When a reverse bias is applied between the cathode electrode and the anode electrode, the depletion layer spreads in the vicinity of the hetero-PN junction between the germanium layer and the N-type region. When light with an energy larger than the germanium band gap is irradiated in this state, electron-hole pairs are generated in the depleted layer, electrons flow to the cathode electrode via the N-type region, and the holes are germanium. It flows to the anode electrode through the layer and the P-shaped region, and a photocurrent flows between the cathode electrode and the anode electrode.

Special Table 2017-508295

The germanium bandgap is as small as about 0.67 eV. A bandgap of about 0.67 eV corresponds to about 1850 nm in terms of wavelength. Therefore, the light receiving element having the germanium layer as the light receiving layer can detect infrared light up to about 1850 nm. As described above, the light receiving element having the germanium layer as the light receiving layer can detect infrared light having a longer wavelength than the light receiving element having silicon as the light receiving layer. On the other hand, since the band gap of germanium is small, there is a problem that the leakage current in the dark state is large in the light receiving element having the germanium layer as the light receiving layer.

The light receiving element disclosed in the present specification can include a silicon substrate, a germanium layer, a cathode electrode, and an anode electrode. An N-type junction barrier region and a P-type region are formed on the surface of the silicon substrate. The P-type region is arranged so as to face at least one direction in the in-plane direction with the N-type junction barrier region in between. The germanium layer is provided on the surface of the silicon substrate and is in contact with each of the N-type junction barrier region and the P-type region. The cathode electrode is electrically connected to the N-type junction barrier region. The anode electrode is electrically connected to the P-shaped region. In this light receiving element, the N-type junction barrier region is configured to be sandwiched by the P-type region. Therefore, in the one direction in which the P-type regions face each other, a depletion layer extends from the P-type regions on one side and the other side to the N-type junction barrier region. As a result, the N-type junction barrier region is satisfactorily depleted, and the leakage current in the dark state is suppressed.

In the light receiving element, the P-type region may be arranged so as to surround the periphery of the N-type junction barrier region. In such a form, the depletion layer extends from all directions around the N-type junction barrier region to the N-type junction barrier region, so that the N-type junction barrier region is satisfactorily depleted and in a dark state. Leakage current is suppressed.

In the light receiving element, when the N-type junction barrier region applies a reverse bias between the cathode electrode and the anode electrode, the P-type on one side in the one direction in which the P-type region faces each other. It may have a width in which the depletion layer extending from the region and the depletion layer extending from the P-type region on the other side are connected. In this light receiving element, since the width of the N-type junction barrier region is formed to be narrow, the N-type junction barrier region is satisfactorily depleted and the leakage current in the dark state is suppressed.

In the light receiving element, when the N-type junction barrier region does not apply a bias between the cathode electrode and the anode electrode, the P on one side in the one direction in which the P-type region faces each other. It may have a width in which the depletion layer extending from the mold region and the depletion layer extending from the P-type region on the other side are connected. In this light receiving element, the width of the N-type junction barrier region is formed to be extremely narrow, so that the N-type region is satisfactorily depleted and the leakage current in the dark state is suppressed.

Further, the method for manufacturing a light receiving element disclosed in the present specification can include a step of preparing a silicon substrate, a first film forming step, a second film forming step, and a single crystallizing step. The step of preparing the silicon substrate is a step of preparing a silicon substrate having an N-type junction barrier region and a P-type region formed on the surface, and the P-type region has the N-type junction barrier region in between. They are arranged so as to face each other in at least one direction in the in-plane direction. The first film forming step is a step of forming an insulating layer on the surface of the silicon substrate, and the insulating layer is formed with an opening in which the N-shaped region and the P-shaped region are exposed. .. In the second film forming step, an amorphous germanium layer is formed so as to embed the opening. In the single crystallization step, the amorphous germanium layer of the portion in contact with the surface of the silicon substrate is single crystallized by solid-phase crystal growth using the silicon substrate as a seed crystal by carrying out an annealing treatment. To do.

The annealing treatment may be carried out in the range of 350 ° C. to 450 ° C.

The light receiving element of the present embodiment, (A) a plan view of a main part of the light receiving element, (B) a cross-sectional view of the main part of the light receiving element, and a cross section of the main part corresponding to the line BB of (A). It is a figure. It is a figure explaining the manufacturing process of the light receiving element of this embodiment. It is a figure explaining the manufacturing process of the light receiving element of this embodiment. It is a structure for verifying the effect of the technique disclosed in the present specification, and is (I) a cross-sectional view of a main part of the structure of the comparative example, and (II) a cross-sectional view of the main part of the structure of the present embodiment. (III) It is a cross-sectional view of the main part of the structure of the comparative example.

As shown in FIG. 1, the light receiving element 1 is a type of light receiving element called a heterojunction photodiode, which is a silicon substrate 10, a first insulating layer 20, a second insulating layer 25, a germanium layer 30, and an anode electrode. 40 and a cathode electrode 50 are provided. The silicon substrate 10 has a P-type region 11, an N-type junction barrier region 12, an N-type contact region 13, and an N-type layer 14. In the plan view of FIG. 1A, the outlines of the P-type region 11 and the N-type contact region 13 are shown by broken lines, and the range of the N-type junction barrier region 12 is shown in gray.

The silicon substrate 10 is an N-type silicon single crystal substrate. The N-type impurity is phosphorus, the concentration of which is 1 × 10 ¹⁷ cm- ² or less. The P-type region 11, the N-type junction barrier region 12, and the N-type contact region 13 are arranged at positions exposed on the surface of the silicon substrate 10. The N-type junction barrier region 12 and the N-type layer 14 are the rest of the P-type region 11 and the N-type contact region 13 formed on the surface of the silicon substrate 10, and have the same impurity concentration as the silicon substrate 10. The N-type junction barrier region 12 is surrounded by the P-type region 11 in the in-plane direction of the silicon substrate 10 (the direction parallel to the surface of the silicon substrate 10 and, in this example, the direction parallel to the XY plane). It is an area defined as a defined range.

The P-type region 11 is provided on the N-type layer 14, and when the silicon substrate 10 is viewed from vertically above (+ Z direction), it surrounds the periphery of the N-type junction barrier region 12 and one side from the surrounding region. It is arranged so as to extend in the direction of (−X direction). Further, the P-type region 11 is adjacent to the N-type junction barrier region 12 in the in-plane direction of the silicon substrate 10. The P-type region 11 is a region formed by introducing P-type impurities (for example, boron) onto the surface of the silicon substrate 10 using ion implantation technology, and its concentration is 1 × 10 ¹⁸ cm- ² or more. is there.

The N-type junction barrier region 12 is provided on the N-type layer 14, and has a circular shape when viewed from above vertically. Instead of this example, the N-junction barrier region 12 may have an elliptical shape, a polygonal shape, or various appropriately adjusted shapes when viewed from above vertically. Further, a plurality of N-type junction barrier regions 12 may be provided.

The N-type contact region 13 is provided on the N-type layer 14, and is provided at a position separated from the P-type region 11 in one direction (+ X direction) when the silicon substrate 10 is viewed from vertically above. There is. The N-type contact region 13 is a region formed by introducing N-type impurities (for example, phosphorus or arsenic) onto the surface of the silicon substrate 10 using ion implantation technology, and its concentration is 1 × 10 ¹⁸ cm ^{−. 2} or more.

The first insulating layer 20 is provided on the surface of the silicon substrate 10, and the material thereof is silicon oxide. The second insulating layer 25 is provided on the surface of the first insulating layer 20, and the material thereof is silicon oxide. A light receiving layer opening 21 is formed in the first insulating layer 20. An anode electrode opening 22 and a cathode electrode opening 23 are formed in each of the first insulating layer 20 and the second insulating layer 25. Each of the anode electrode opening 22 and the cathode electrode opening 23 is formed so as to communicate the first insulating layer 20 and the second insulating layer 25.

The light receiving layer opening 21 of the first insulating layer 20 has a circular shape centered on the N-type junction barrier region 12 when the silicon substrate 10 is viewed from above vertically, and the P-type region 11 is the N-type junction barrier region. It is formed within the range of the area surrounding the twelve. As a result, the light receiving layer opening 21 is formed so as to expose a part of the P-type region 11 and also expose the N-type junction barrier region 12. A germanium layer 30 is embedded in the light receiving layer opening 21.

The anode electrode opening 22 is formed within the range of the P-type region 11 formed so that the P-type region 11 extends from the region surrounding the N-type junction barrier region 12 when the silicon substrate 10 is viewed from above vertically. It is formed so as to expose a part of the P-shaped region 11. The anode electrode 40 is embedded in the anode electrode opening 22. In this way, the anode electrode 40 provides a contact portion on the surface of the second insulating layer 25 and is electrically connected to the P-shaped region 11 via the anode electrode opening 22. The anode electrode 40 is aluminum (Al) and is in ohmic contact with the P-type region 11. The anode electrode 40 is arranged so as not to overlap the germanium layer 30 when the silicon substrate 10 is viewed from above vertically.

The cathode electrode opening 23 is formed within the range in which the N-type contact region 13 is formed when the silicon substrate 10 is viewed from above vertically, so that a part of the N-type contact region 13 is exposed. It is formed. A cathode electrode 50 is embedded in the cathode electrode opening 23. In this way, the cathode electrode 50 provides a contact portion on the surface of the second insulating layer 25 and is electrically connected to the N-type contact region 13 via the cathode electrode opening 23. The cathode electrode 50 is made of aluminum (Al) and is in ohmic contact with the N-type contact region 13. The cathode electrode 50 is arranged so as not to overlap the germanium layer 30 when the silicon substrate 10 is viewed from above vertically.

The germanium layer 30 is provided so as to be embedded in the light receiving layer opening 21, and its surface is covered with the second insulating layer 25. The germanium layer 30 is separated from each of the anode electrode 40 and the cathode electrode 50 by the first insulating layer 20 and the second insulating layer 25. The germanium layer 30 has a circular shape centered on the N-type junction barrier region 12 when the silicon substrate 10 is viewed from above vertically.

The germanium layer 30 is an intrinsic semiconductor into which impurities are not intentionally introduced. However, in germanium, lattice defects act as acceptors even if impurities are not added. As will be described later, since the germanium layer 30 is formed by solid-phase crystal growth using the silicon substrate 10 as a seed crystal, the defect density of the germanium layer 30 is high due to the lattice mismatch between silicon and germanium. Therefore, the germanium layer 30 functions as a high-concentration P-type semiconductor having ^{a hole density of 10 17} cm ^-3 from the latter half to 10 ¹⁸ cm ^{-3 units.}

The germanium layer 30 is in contact with both the P-type region 11 and the N-type junction barrier region 12 at the bottom of the light receiving layer opening 21. As described above, since the germanium layer 30 functions as a P-type semiconductor, the germanium layer 30 and the P-type region 11 are in ohmic contact, and the germanium layer 30 and the N-type junction barrier region 12 have a hetero-PN junction. It is configured. The germanium layer 30 is a single crystal at least in a portion in contact with the N-type junction barrier region 12. The germanium layer 30 in a region away from the portion in contact with the N-type junction barrier region 12 may be polycrystalline.

The thicker the film thickness T1 of the germanium layer 30, the higher the light receiving efficiency, but the larger the step when the element is formed, and the more likely it is that the wiring is broken. Therefore, the film thickness T1 may be determined in consideration of the balance between the light receiving efficiency and the reliability of the wiring. In this embodiment, the film thickness T1 is about 1 μm.

In this way, in the light receiving element 1, the P-type region 11, the germanium layer 30, the N-type junction barrier region 12, the N-type layer 14, and the N-type contact region 13 are connected in series between the anode electrode 40 and the cathode electrode 50. It is configured as a heterojunction photodiode.

(Operation when the light receiving element 1 receives light)
The light receiving element 1 is used in a state where a reverse bias is applied between the anode electrode 40 and the cathode electrode 50. Specifically, the light receiving element 1 is used in a state where 0 to -50 V (for example, -1 V) is applied to the anode electrode 40 and 0 V is applied to the cathode electrode 50. When a reverse bias is applied between the anode electrode 40 and the cathode electrode 50, a depletion layer spreads in the vicinity of the hetero-PN junction between the germanium layer 30 and the N-type junction barrier region 12. When eye-safe band light (eg, 1550 nm, energy: 0.8 eV) is incident on the upper surface of the germanium layer 30 in this state, the light is absorbed by the germanium layer 30 and electrons and holes are generated in the depletion layer. It should be noted that such eye-safe band light is not absorbed by the silicon substrate 10, but is selectively absorbed by the germanium layer 30. Due to the internal electric field of the depleted layer near the hetero-PN junction between the N-type junction barrier region 12 and the germanium layer 30, holes flow to the anode electrode 40 via the germanium layer 30 and the P-type region 11, and electrons flow to the N-type junction barrier region. It flows to the cathode electrode 50 via 12, the N-type layer 14, and the N-type contact region 13. In this way, in the light receiving element 1, a photocurrent corresponding to the amount of incident eye-safe band light flows between the anode electrode 40 and the cathode electrode 50.

(Manufacturing method of light receiving element 1)
Next, a method of manufacturing the light receiving element 1 will be described with reference to FIGS. 2 and 3. First, as shown in FIG. 2, a silicon substrate 10 on which a P-type region 11, an N-type junction barrier region 12, an N-type contact region 13 and an N-type layer 14 are formed is prepared. Next, the first insulating layer 20 is formed on the surface of the silicon substrate 10 by thermal oxidation or the like. Next, a mask (not shown) in which the regions corresponding to the light receiving layer opening 21, the anode electrode opening 22, and the cathode electrode opening 23 are open is formed, and anisotropic etching is performed. As a result, as shown in FIG. 2, the first insulating layer 20 in which the openings 21, 22, and 23 are formed is formed on the surface of the silicon substrate 10.

Next, an amorphous germanium layer 30a is formed inside each of the openings 21, 22, 23 and on the surface of the first insulating layer 20. For this film forming step, for example, vapor deposition or sputtering can be used. The substrate temperature at the time of film formation is preferably 200 ° C. or lower. This is because a polycrystalline germanium layer may be formed at 200 ° C. or higher. As a result, the structure shown in FIG. 3 is formed. In FIG. 3, the amorphous germanium layer 30a is shown in gray.

Next, the structure of FIG. 3 is annealed. The annealing temperature is preferably 400 ° C. or higher, but the higher the temperature, the more microcrystal nuclei are generated in the amorphous germanium layer 30a, so that the annealing temperature is preferably 500 ° C. or lower. In this embodiment, a temperature in the range of 350 ° C. to 450 ° C. was used. The annealing atmosphere is preferably a non-oxidizing atmosphere such as nitrogen.

By carrying out the annealing treatment, solid-phase crystal growth can be performed using the single crystal silicon substrate 10 as a seed crystal. In the solid-phase crystal growth, the germanium crystal structure can be aligned with the crystal plane of the silicon substrate 10, so that the amorphous germanium layer 30a can be single-crystallized. As shown by the arrow Y1 in FIG. 3, the solid-phase crystal growth gradually proceeds from the interface between the amorphous germanium layer 30a and the silicon substrate 10 (the bottom of each of the openings 21, 22, and 23). I will go. Further, in the region R1 sufficiently separated from the bottom of each of the openings 21, 22, and 23, the amorphous germanium layer 30a is polycrystalline. This is because solid-phase crystal growth occurs in the region R1 using the microcrystal nuclei randomly generated during the annealing treatment as seed crystals before the single-crystallized solid-phase crystal growth (arrow Y1) reaches the region R1. This is because it is polycrystallized. By performing the annealing treatment for a predetermined time or longer, solid-phase crystal growth can be performed on the entire amorphous germanium layer 30a. In the germanium layer 30 after crystallization, the region near the bottom of each of the openings 21, 22, and 23 is a single crystal, and the region R1 is a polycrystalline. The size of the region to be single crystallized can be controlled by various parameters such as annealing time and annealing temperature. The entire germanium layer 30 may be single crystallized.

After that, as shown in FIG. 1, a circular mask centered on the light receiving layer opening 21 is formed, and an unnecessary germanium layer is removed by dry etching. Further, the anode electrode 40 and the cathode electrode 50 are formed. As a result, the light receiving element 1 shown in FIG. 1 is completed.

(effect)
Autonomous vehicles and ADAS (Advanced driver-assistance systems) use infrared cameras and LiDAR (Light Detection and Ranging) systems to recognize the surrounding environment. In these systems, it is preferable to use eye-safe band light (1300 nm to 1600 nm light) for safety. However, since eye-safe band light has an energy lower than that of silicon, it is necessary to fabricate a light receiving element using a narrow bandgap semiconductor (eg, germanium). If the light receiving element is made of a germanium substrate or the like and the signal processing circuit is made of a silicon substrate, it is necessary to mount a plurality of chips in the light receiving system, which leads to an increase in cost. The light receiving element 1 of the present embodiment can form a germanium light receiving film only by adding a step of depositing a germanium film and a step of annealing to the silicon process. The light receiving film and the signal processing circuit can be monolithically integrated on the Si substrate. It is possible to reduce the manufacturing cost of a light receiving system compatible with eye-safe band light.

When a germanium layer is used as the light receiving layer, the band gap of the germanium crystal is small, so that the leakage current in the dark state increases. The light receiving element 1 of the present embodiment has a structure in which the area of the N-type junction barrier region 12 is smaller than the area of the germanium layer 30 when viewed from above vertically. Since the leak current density depends on the area of the hetero-PN junction between the N-type junction barrier region 12 and the germanium layer 30, the leak current can be reduced by reducing the area of the hetero-PN junction. Further, by making the area of the germanium layer 30 larger than the area of the hetero-PN junction, it is possible to suppress a decrease in sensitivity. The value of the area of the hetero-PN junction can be appropriately determined according to the allowable value of the leakage current. Further, the sensitivity increases as the ratio of the area of the germanium layer 30 to the area of the hetero-PN junction increases, but when the ratio exceeds a certain predetermined ratio, the increase in sensitivity saturates. Therefore, the area ratio may be increased so as not to exceed the saturation point of sensitivity.

Further, in the light receiving element 1 of the present embodiment, the P-type region 11 is provided so as to surround the N-type junction barrier region 12. In the light receiving element 1, the N-type junction barrier region 12 is substantially depleted by the depletion layer extending from the P-type region 11 in a used state in which a reverse bias is applied between the anode electrode 40 and the cathode electrode 50. It is configured as follows. In other words, the width W1 (see FIG. 1) of the N-type junction barrier region 12 is N due to the depletion layer extending from the P-type region 11 in the use state where a reverse bias is applied between the anode electrode 40 and the cathode electrode 50. The type junction barrier region 12 is set to a size that is substantially depleted. As a result, the thickness of the depletion layer in the vicinity of the hetero-PN junction becomes larger than that in the case where the P-type region 11 is not provided, and as a result, the potential of the N-type junction barrier region 12 immediately below the hetero-PN junction decreases. Leakage current in the dark state is suppressed.

Here, the width W1 of the N-type junction barrier region 12 will be described in detail. In the present embodiment, when the silicon substrate 10 is viewed from above vertically, the N-type junction barrier region 12 has a circular shape, and the P-type region 11 is provided so as to surround the N-type junction barrier region 12. Therefore, in the present embodiment, the width W1 of the N-type junction barrier region 12 is the diameter of the circular N-type junction barrier region 12 when the silicon substrate 10 is viewed from vertically above. The shape of the N-type junction barrier region 12 is not limited to the circular shape. If the P-type region 11 is arranged so that the depletion layer spreads over a wide area of the N-type junction barrier region 12, various shapes can be adopted for the N-type junction barrier region 12. In order to spread the depletion layer over a wide area of the N-type junction barrier region 12, if the P-type region 11 is arranged so as to face at least one direction in the in-plane direction with the N-type junction barrier region 12 in between. Good. As a result, the depletion layer can extend from both sides of the N-type junction barrier region 12, and the depletion layer can spread over a wide area of the N-type junction barrier region 12. For example, when the silicon substrate 10 is viewed from above vertically, the P-type region 11 may be arranged so as to be in contact with the long sides of each of the rectangular N-type junction barrier regions. In this case, the width of the N-type junction barrier region 12 is the width of the N-type junction barrier region 12 in the lateral direction, that is, the width in the direction in which the P-type region 11 faces each other. As described above, the width W1 of the N-type junction barrier region 12 is defined as the width in the direction in which the P-type region 11 faces each other.

The width W1 of the N-type junction barrier region 12 is such that the N-type junction barrier region 12 is substantially covered by the depletion layer extending from the P-type region 11 in a state where no reverse bias is applied between the anode electrode 40 and the cathode electrode 50. It may be set to a size that is depleted. In this example, the width W1 of the N-type junction barrier region 12 is configured to be extremely narrow, the N-type junction barrier region 12 is satisfactorily depleted, and the leakage current in the dark state is suppressed.

In the technique described in the present specification, the germanium layer 30 is formed by solid-phase crystal growth using the silicon substrate 10 as a seed crystal. As a result, the germanium layer 30 can be made into a single crystal at least in the vicinity of the hetero-PN junction between the N-type junction barrier region 12 and the germanium layer 30. Since the leakage current can be suppressed as compared with the case where the hetero-PN junction is formed by polycrystal, the characteristics of the light receiving element 1 can be improved.

The germanium layer 30 is electrically connected to the anode electrode 40 via the P-shaped region 11. As a result, it is possible to realize a structure in which the germanium layer 30 and the anode electrode 40 do not come into direct contact with each other and are separated from each other. Therefore, the germanium layer 30 can be protected by a protective film or the like during the manufacturing process of the anode electrode 40. When the anode electrode 40 is formed, it is possible to prevent the germanium layer 30 from being damaged by various chemicals and the like. Further, the upper surface of the germanium layer 30 is not covered by the anode electrode 40. Since the entire surface of the germanium layer 30 can function as a light receiving layer, the sensitivity can be increased.

Using the structure shown in FIG. 4, the effect of the technique disclosed in the present specification was verified. A common reference numeral is given to the components substantially corresponding to the above-described embodiment, and the description thereof will be omitted. Structure I is a comparative example, in which the P-type region 11 and the N-type junction barrier region 12 are not formed. Structure III is also a comparative example, and is an example in which the width of the germanium layer 30 and the width of the hetero-PN junction are widened as compared with the structure I. Structure II is an example corresponding to this embodiment, and is an example in which a P-type region 11 and an N-type junction barrier region 12 are formed. The width of the hetero-PN junction between the structure I and the structure II is 1 μm, and the width of the germanium layer 30 of the structure II and the structure III is 12 μm. Further, the impurity concentration in each semiconductor region is the same as that in the above-described embodiment.

Table 1 shows the current flowing in each of the dark and bright states of each structure, the S / N ratio (the ratio of the current in the bright state to the current in the dark state), and the current ratio (the ratio of the current of each structure to the current of structure I). ) Is shown. The reverse bias voltage is -1 V, the wavelength of the eye-safe band light incident in the bright state is 1550 nm, and the amount of light is 0.01 W / cm ² .

Structure III has the largest current in the dark state (corresponding to the leak current). It is considered that the leakage current increased due to the increase in the area of the hetero-PN junction. On the other hand, the dark state current of structure II is smaller than that of structure III and is substantially equal to that of structure I. It is considered that the leakage current was suppressed by forming the P-type region 11 and the N-type junction barrier region 12.

For the current in the bright state, the order is structure III> structure II> structure I. The current of structure II is smaller than that of structure III, but sufficiently higher than that of structure I.

Regarding the S / N ratio, the structure II has the largest value. In addition, the current ratio of the structure II is 2.47 times that of the structure I, and the light receiving sensitivity is improved. As described above, it was confirmed that the structure II of this example has a high S / N ratio and a highly sensitive structure.

Although specific examples of the present invention have been described in detail above, these are merely examples and do not limit the scope of claims. The techniques described in the claims include various modifications and modifications of the specific examples illustrated above. In addition, the technical elements described in the present specification or the drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the techniques illustrated in the present specification or drawings can achieve a plurality of purposes at the same time, and achieving one of the purposes itself has technical usefulness.

1: Light receiving element 10: Silicon substrate 11: P type region 12: N type junction barrier area 13: N type contact area 14: N type layer 20, 25: Insulation layer 21: Light receiving layer opening 30: Germanium layer 40: Anode Electrode 50: Cathode electrode

Claims (6)

A silicon substrate having an N-type junction barrier region and a P-type region formed on the surface thereof so that the P-type region faces at least one direction in the in-plane direction with the N-type junction barrier region in between. The silicon substrate that is placed and
A germanium layer provided on the surface of the silicon substrate and in contact with each of the N-type junction barrier region and the P-type region.
A cathode electrode electrically connected to the N-type junction barrier region and
With the anode electrode electrically connected to the P-shaped region,
The light receiving element. The light receiving element according to claim 1, wherein the P-type region is arranged so as to surround the periphery of the N-type junction barrier region. The N-type junction barrier region extends from the P-type region on one side in the one direction in which the P-type region faces each other when a reverse bias is applied between the cathode electrode and the anode electrode. The light receiving element according to claim 1 or 2, which has a width in which the depletion layer and the depletion layer extending from the P-shaped region on the other side are connected. The N-junction barrier region extends from the P-type region on one side in the one direction with which the P-type region faces when no bias is applied between the cathode electrode and the anode electrode. The light receiving element according to claim 3, which has a width in which the coming depletion layer and the depletion layer extending from the P-shaped region on the other side are connected. This is a step of preparing a silicon substrate on which an N-type junction barrier region and a P-type region are formed on the surface, and the P-type region is in at least one direction in the in-plane direction with the N-type junction barrier region in between. The process of preparing silicon substrates, which are arranged facing each other,
In the first film forming step of forming an insulating layer on the surface of the silicon substrate, the insulating layer is formed with an opening in which the N-type region and the P-type region are exposed. Membrane process and
A second film forming step of forming an amorphous germanium layer so as to embed the opening, and
A step of single-crystallizing the amorphous germanium layer in a portion of the silicon substrate in contact with the surface by solid-phase crystal growth using the silicon substrate as a seed crystal by carrying out an annealing treatment.
A method for manufacturing a light receiving element. The method for manufacturing a light receiving element according to claim 5, wherein the annealing treatment is carried out in the range of 350 ° C. to 450 ° C.

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