JP2021048680A - Rectenna device and method for designing rectenna device - Google Patents

Abstract

To improve power conversion efficiency without adopting special elements and complicated circuit configurations.SOLUTION: A rectenna device 1 comprises: an antenna circuit 10 which receives radio waves 101 and generates AC power; a matching circuit 20 connected to the antenna circuit 10; and a rectifier circuit 30 which is connected to the matching circuit 20, has a plurality of diodes 31 and 32 connected in series with each other, and rectifies the AC power provided by the antenna circuit 10. Power conversion efficiency η, which is a ratio of the power output by the rectifier circuit 30 to the power output by the antenna circuit 10, is greater than the reference power conversion efficiency, which is a ratio of power output by a reference rectifier circuit having only the diode 31 to the power output by the antenna circuit 10.SELECTED DRAWING: Figure 1

Description

The present invention relates to a rectenna device and a method of designing a rectenna device.

Energy harvesting technology collects radio waves around us and uses them as a power source for IoT terminals. An antenna and a rectifier are required to convert radio waves into DC power. A device equipped with these antennas and a rectifier is called a rectenna device. Patent Documents 1 and 2 and Non-Patent Documents 1, 2 and 3 disclose techniques relating to a rectenna device.

Japanese Unexamined Patent Publication No. 7-231585 Japanese Unexamined Patent Publication No. 2004-209816

Carlos Henrique Petzl Lorenz et.al, "Breaking the Efficiency Barrier for Ambient Microwave PowerHarvesting With" Heterojunction Backward Tunnel Diodes), Eye Triple E (IEEE), Theory and Technology on the Handling of Eye Triple E Microwaves (IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES), December 2015 (DECEMBER2015), Volume 63 (VOL. 63) ), No. 12 (NO. 12). VladMarian et.al, Strategy for Microwave Energy Harvesting From Ambient Field or aFeeding Source, Institute of Electrical and Electronics Engineers (IEEE), Eye Triple Handling of e-Power Electronics (IEEE TRANSACTIONS ON POWER ELECTRONICS), November 2012 (NOVEMBER 2012), Vol. 27 (Vol. 27), No. 11 (No. 11). Katsura Ohno, Shinichi Tanaka, "UHF Band High Sensitivity Diode Rectifier (II) Loaded with Series Inductors", Proceedings of Electronics Lecture 1, IEICE General Conference, 2019, p29.

In the technical field, further improvement of power conversion efficiency, which indicates the degree of conversion of radio waves captured by an antenna into DC power, is desired. For example, Non-Patent Documents 1, 2 and 3 disclose techniques for improving the power conversion efficiency of a rectenna device. However, these technologies are focused on improving the power conversion efficiency, and in order to improve the power conversion efficiency, a complicated circuit configuration is adopted or a special element is adopted.

However, in the practical application of the rectenna device, the adoption of a special element or a complicated circuit configuration increases the design load required for manufacturing the rectenna device and the load of the assembly work. In addition, it also leads to an increase in manufacturing costs.

Therefore, an object of the present invention is to provide a rectenna device capable of improving power conversion efficiency and a method for designing the rectenna device without adopting a special element and a complicated circuit configuration.

The rectenna device according to one embodiment of the present invention has an antenna unit that receives radio waves to generate AC power, a matching unit connected to the antenna unit, and a plurality of diodes connected in series with each other, and is connected to the matching unit. It is provided with a rectifying unit that rectifies the AC power provided from the antenna unit, and the rectifying unit has at least a first diode and a second diode connected in series with each other, with respect to the power output by the antenna unit. The ratio of the power output by the rectifying unit is larger than the ratio of the power output by the reference rectifying unit having only the first diode to the power output by the antenna unit.

The power conversion efficiency of the rectenna device is affected by the parasitic resistance and capacitance contained in the diodes that make up the rectifier. In a configuration in which a plurality of diodes are connected in series, the magnitude of the combined parasitic capacitance is smaller than the parasitic capacitance contained in one diode. When the parasitic capacitance becomes small and the matching part satisfies the condition of impedance matching, the inductance of the matching part becomes large. As a result, in a circuit configuration in which a plurality of diodes are connected in series, the Q value of the circuit can be made larger than the Q value of the reference rectifying unit having the circuit configuration including one diode. As a result, the power conversion efficiency of the rectenna device including the rectifying section having the first diode and the second diode is larger than the power conversion efficiency of the rectenna device having the reference rectifying section having only the first diode. Therefore, the rectenna device can increase the Q value by a simple circuit configuration in which these diodes are connected in series while using a plurality of general diodes including parasitic capacitances. As the Q value increases, the potential difference between the antenna unit and the rectifying unit increases, so that the current flowing from the antenna unit to the rectifying unit increases. As a result, the power passed from the antenna unit to the rectifying unit increases, so that the power conversion efficiency can be improved.

The matching part of one form of lectena device has at least a first diode and a second diode connected in series with each other, the first diode having a first parasitic resistor and a first parasitic capacitance, and a first. The two diodes have a second parasitic resistance and a second parasitic capacitance, and the rectifying unit has a combined parasitic resistance based on the first and second parasitic resistors and a combined parasitic capacitance based on the first and second parasitic capacitances. The matching section may include a coil having an inductance determined by the impedance matching conditions between the antenna section and the rectifying section and the combined parasitic capacitance. Even with this configuration, the power conversion efficiency can be improved without adopting a special element or a complicated circuit configuration.

In one form of lectena device, the Q value determined based on the combined parasitic resistance, the combined parasitic capacitance, and the inductance is determined by the first parasitic resistance, the first parasitic capacitance, the first parasitic capacitance, and the impedance matching condition. It may be larger than the Q value obtained based on the inductance. According to this configuration, the power conversion efficiency can be surely improved.

In one form of the rectenna device, the rectifier may be a half-wave rectifier circuit. Further, in one form of the rectenna device, the rectifying unit may be a full-wave rectifying circuit. Even with these configurations, the power conversion efficiency can be improved without adopting a special element or a complicated circuit configuration.

Another embodiment of the present invention is a method of designing a diode device, in which the diode device is connected in series with an antenna portion that receives radio waves to generate AC power and a matching portion connected to the antenna portion. The basic diode and the plurality of additional diodes are provided with a rectifying part that has a plurality of additional diodes including the basic diode and is connected to the matching part to rectify the AC power provided from the antenna part. The basic diode and the plurality of additional diodes have a parasitic resistance and a parasitic capacitance. Based on the process of selecting at least one additional diode connected to the basic diode and the combined parasitic resistance based on the parasitic resistance of the basic diode and the additional diode, and the parasitic capacitance of the basic diode and the additional diode. It has a step of obtaining the Q value of a resonance circuit in which a composite parasitic capacitance, a coil having an inductance determined by the impedance matching conditions between the antenna section and the rectifying section and the combined parasitic capacitance, and a resonance circuit connected in series are obtained, and an additional diode. The process of selecting the above and the process of obtaining the Q value are repeated while changing the combination of the selected additional diodes, and the Q value is larger than the Q value when the matching unit is the reference rectifying unit having only the basic diode. The combination of the additional diodes to be added may be determined as the combination of the additional diodes added to the basic diode.

According to this method, it is possible to design a rectenna device capable of improving the power conversion efficiency.

According to the present invention, there is provided a rectenna device capable of improving power efficiency and a method for designing the rectenna device without adopting a special element or a complicated circuit configuration.

FIG. 1 is a circuit diagram of the rectenna device. FIG. 2 is an equivalent circuit diagram of the rectenna device. FIG. 3 is a flow chart showing the main steps of the method of designing the rectenna device. Part (a) of FIG. 4 is a circuit diagram of the rectenna device of the modified example 1, and part (b) of FIG. 4 is a circuit diagram of the rectenna device of the modified example 2. FIG. 5 is a circuit diagram of the rectenna device of the third modification. FIG. 6 is a circuit diagram of the rectenna device of the modified example 4. FIG. 7 is a circuit diagram of the rectenna device of the modified example 5. FIG. 8 is a circuit diagram of the rectenna device of the modified example 6. FIG. 9 is a circuit diagram of the rectenna device of the modified example 7. FIG. 10 is a circuit diagram of the rectenna device of the modified example 8. FIG. 11 is a graph showing the results of Example 1. FIG. 12 is a graph showing the results of Example 2. FIG. 13 is a graph showing the results of Example 3.

Hereinafter, embodiments for carrying out the present invention will be described in detail with reference to the accompanying drawings. In the description of the drawings, the same elements are designated by the same reference numerals, and duplicate description will be omitted.

<Rectenna device>
The rectenna device 1 shown in FIG. 1 is a power supply device. The rectenna device 1 receives the radio wave 101 and converts it into DC power. Then, the rectenna device 1 supplies the DC power to the load device 102 such as the IoT device. The power required by the load device 102 is, for example, in the range of nanowatts to microwatts. Therefore, the rectenna device 1 outputs electric power on the order of nanowatts to microwatts.

The rectenna device 1 has an antenna circuit 10 (antenna unit), a matching circuit 20 (matching unit), and a rectifier circuit 30 (rectifier unit) as main components. Further, the rectenna device 1 has a capacitor 41 as a decoupling capacitor.

η：電力変換効率。
Ｐ_ＯＵＴ：出力電力。
Ｐ_ＡＶ：アンテナ回路１０がインピーダンス整合条件下で出力できる最大の出力電力。
Ｖ_ＩＮ：式（２）で定義されたアンテナ素子１１の実効出力電圧。
Ｒ_Ａ：出力電力を最大にする負荷抵抗で定義されるアンテナ抵抗１２の抵抗値。
Ｖ_ＤＤ：整流回路３０の出力電圧の直流成分。
Ｉ_ＤＤ：整流回路３０の出力電流の時間平均。 Here, the power conversion efficiency η of the rectenna device 1 shown in FIG. 1 is defined as follows. It can be said that the power conversion efficiency η is the ratio of _{the power (P OUT} ) output by the rectifier circuit 30 _{to the power (P AV) output by the antenna circuit 10.} More precisely, the power conversion efficiency η can be defined by the equations (1) to (3) and the following parameters included in each equation.

η: Power conversion efficiency.
P _OUT : Output power.
_PAV : The maximum output power that the antenna circuit 10 can output under impedance matching conditions.
V _IN : The effective output voltage of the antenna element 11 defined by the equation (2).
_RA : The resistance value of the antenna resistor 12 defined by the load resistance that maximizes the output power.
_VDD : DC component of the output voltage of the rectifier circuit 30.
_IDD : Time average of the output current of the rectifier circuit 30.

In the circuit diagram including FIG. 1, reference numbers shown by drawing leader lines from circuit symbols such as resistance and capacitance indicate resistance elements and capacitance elements themselves as constituent elements. The characters attached in the vicinity of the circuit symbol indicate the resistance value of the resistance element, the capacitance value of the capacitance element, and the like. For example, reference numeral "21" in FIG. 1 means a coil element. The characters assigned to the vicinity of the coil 21 "L _M" indicates the inductance of the coil 21.

The antenna circuit 10 receives the radio wave 101 and generates alternating current power according to the received radio wave 101. The power that can be extracted from the antenna circuit 10 depends on the load resistance of the antenna circuit 10. Power that can be extracted from the antenna circuit 10 when changing the load resistance is a condition that maximizes defines the output power when this P _AV. The antenna circuit 10 is modeled as a circuit having an antenna element 11 and an antenna resistor 12 as electrical functional elements. It is considered that the antenna element 11 receives the radio wave 101 and generates the _{voltage VIN defined by the equation (2).} The specific configuration of the antenna element 11 may be appropriately selected according to the frequency (ω) of the received radio wave 101. One end of the antenna element 11 is connected to the antenna resistor 12. The other end of the antenna element 11 is connected to the ground potential 103. The antenna circuit 10 may have other electric elements, if necessary, in addition to the antenna element 11 and the antenna resistor 12.

Matching circuit 20 improves the transfer efficiency of the power _{P AV} from the antenna circuit 10 to the matching circuit 20. That is, the matching circuit 20 attempts to match the impedance in the electrical connection between the antenna circuit 10 and the matching circuit 20. The input 20a of the matching circuit 20 is connected to the output 10b of the antenna circuit 10. The output 20b of the matching circuit 20 is connected to the input 30a of the rectifier circuit 30. That is, the matching circuit 20 is connected in series with the antenna circuit 10.

The matching circuit 20 has a coil 21 as an electrical functional element. The matching circuit 20 may have other electric elements in addition to the coil 21 if necessary.

Rectifier circuit 30 converts the AC power P _AV of the antenna circuit 10 outputs the DC current. The rectifier circuit 30 may be a half-wave rectifier type or a full-wave rectifier type. The rectifier circuit 30 included in the rectenna device 1 of the present embodiment is a half-wave rectifier type. The input 30a of the rectifier circuit 30 is connected to the output 20b of the matching circuit 20. That is, the rectifier circuit 30 is connected in series with the matching circuit 20. The output 30b of the rectifier circuit 30 is connected to the input 102a of the load device 102.

The rectifier circuit 30 includes at least two or more diodes 31, 32 (first diode, second diode). Therefore, the rectifier circuit 30 may include a plurality of diodes, such as three or four, under conditions that satisfy the requirements described below. The rectifier circuit 30 of the present embodiment will be described as including two diodes 31 and 32. The rectifier circuit 30 may have other electric elements in addition to the diodes 31 and 32, if necessary.

The diodes 31 and 32 are connected in series with each other. The input 31a of the diode 31 is connected to the input 30a of the rectifier circuit 30. The output 31b of the diode 31 is connected to the input 32a of the diode 32. The output 32b of the diode 32 is connected to the output 30b of the rectifier circuit 30.

By the way, the actual diodes 31 and 32 have parasitic resistors 31r and 32r (first parasitic resistor and second parasitic resistor) in addition to the portions (diode function sections 31d and 32d) that function as diodes as electrical functional elements. ) And the parasitic capacitances 31c and 32c (first parasitic capacitance, second parasitic capacitance). The diodes 31 and 32 have the same electrical configuration as each other. Therefore, the electrical configuration of the diode 31 will be described in detail, and the detailed description of the diode 32 will be omitted.

The diode function unit 31d is an electrical element that functions as a diode. That is, it can be said that the diode function unit 31d is an ideal diode that does not include the parasitic resistance 31r and the parasitic capacitance 31c. The output of the parasitic resistor 31r is connected to the input of the diode function unit 31d. That is, the parasitic resistor 31r is connected in series with the diode functioning unit 31d. The input of the parasitic capacitance 31c is connected to the input of the diode function unit 31d. Further, the output of the parasitic capacitance 31c is connected to the output of the diode function unit 31d. That is, the parasitic capacitance 31c is connected in parallel to the diode function unit 31d. The input of the parasitic capacitance 31c is also connected to the output of the parasitic resistor 31r. That is, the parasitic capacitance 31c is connected in series with the parasitic resistor 31r.

Here, the rectenna device 1 does not _{always output the power P OUT while receiving the radio wave 101. In the rectenna device 1, a voltage VDD} is generated at the output 30b of the rectifier circuit 30 during a period in which a voltage exceeding the voltage _VTH which is the threshold of the diodes 31 and 32 is applied to the input 30a of the rectifier circuit 30. That is, the operation of the rectenna device 1 is intermittent. During the entire period during which the rectenna device 1 receives the radio wave 101, the period during which the voltage _VDD is generated at the output 30b of the rectifier circuit 30 is extremely short. Then, during the period when the diode function units 31d and 32d are off, the circuit configuration of the rectenna device 1 can ignore the diode function units 31d and 32d. As a result, the circuit configuration of the rectenna device 1 can be regarded as approximately equivalent to the circuit configuration shown in FIG.

In FIG. 2, the portion different from the circuit configuration of FIG. 1 is the rectifier circuit 30. The rectifier circuit 30 includes a combined parasitic resistor 33 and a combined parasitic capacitance 34. The output of the synthetic parasitic resistor 33 is connected to the input of the synthetic parasitic capacitance 34. That is, the synthetic parasitic resistor 33 is connected in series with the synthetic parasitic capacitance 34. In the equivalent circuit, the connection order of the synthetic parasitic resistor 33 and the synthetic parasitic capacitance 34 may be reversed.

The combined parasitic resistance 33 is composed of the parasitic resistance 31r of the diode 31 and the parasitic resistance 32r of the diode 32. The diodes 31 and 32 are connected in series with each other. The parasitic resistors 31r and 32r are connected in series with the diodes 31 and 32. Therefore, the parasitic resistors 31r and 32r are also connected in series with each other. _{Therefore, the resistance value RS} of the combined parasitic resistance 33 when the parasitic resistors 31r and 32r are connected in series can be obtained by the following equation.

The synthetic parasitic capacitance 34 is composed of a parasitic capacitance 31c of the diode 31 and a parasitic capacitance 32c of the diode 32. The diodes 31 and 32 are connected in series with each other. The parasitic capacitances 31c and 32c are connected in parallel to the diodes 31 and 32. Therefore, the parasitic capacitances 31c and 32c are connected in parallel with each other. Therefore, the capacitance value C _J synthetic parasitic capacitance 34 when the parasitic capacitance 31c, 32c are connected in parallel is obtained by the following equation.

Then, in the equivalent circuit shown in FIG. 2, it can be said that the resistance element, the capacitance element, and the coil element are connected in series with each other. In other words, the equivalent circuit shown in FIG. 2 is a so-called series type LCR resonant circuit.

The matching circuit 20 aims at impedance matching between the antenna circuit 10 and the rectifier circuit 30. Now, the impedance Z _{IN of the} equivalent circuit is expressed by the following equation.

In the above equation, impedance matching is satisfied when the complex term is zero. That is, the matching circuit 20 has an inductance L _M represented by the following formula.

Further, the Q value of the equivalent circuit satisfying impedance matching is expressed by the following equation.

In designing the rectenna device 1, the inventors evaluated the variables that could affect the power conversion efficiency η. Some variables affect the power conversion efficiency η, but to varying degrees. That is, it is possible to efficiently design the rectenna device 1 by emphasizing the variables having a large influence. As a result of diligent studies by the inventors, it was found that the combined parasitic capacitance 34 most affects the power conversion efficiency η when the rectenna device 1 can be shown by the equivalent circuit of FIG. 2 (Example described later). See a few). As the synthetic parasitic capacitance 34 increases, the power conversion efficiency η decreases. On the other hand, when the combined parasitic capacitance 34 becomes smaller, the power conversion efficiency η improves.

As described above, as the number of diodes 31 and 32 connected in series increases, the combined parasitic capacitance 34 connected in parallel decreases. Therefore, as the number of diodes 31 and 32 connected in series increases, the combined parasitic capacitance 34 becomes smaller. As a result, the power conversion efficiency η is increased. The relationship between the synthetic parasitic capacitance 34 and the power conversion efficiency η can be explained by the equation (8). According to the equation (8), as the capacitance value C _J of the combined parasitic capacitance 34 decreases, the Q value of the equivalent circuit increases. That is, since the magnification (Q value) of the voltage in the LCR resonance circuit becomes large, the electric power transferred from the antenna circuit 10 to the rectifier circuit 30 increases.

On the other hand, as the number of diodes 31 and 32 connected in series increases, the combined parasitic resistance 33 connected in series increases. According to the formula (8), an increase in the combined parasitic resistance 33 causes a decrease in the Q value. That is, as the number of diodes 31 and 32 connected in series increases, the Q value tends to increase due to the decrease in the combined parasitic capacitance 34. However, as the number of diodes 31 and 32 increases, the Q value tends to decrease due to the increase in the combined parasitic resistance 33. Therefore, the inventors have clarified that the number of diodes 31 and 32 connected in series should be set within the range of the number in which the increase in Q value due to the decrease in the synthetic parasitic capacitance 34 is dominant. ..

That is, the matching circuit 20 does not simply include two or more diodes 31 and 32. The diodes 31 and 32 included in the matching circuit 20 in the rectenna device 1 are higher than the Q value of the equivalent circuit when the matching circuit 20 includes the diodes 31 and 32 and when the Q value of the equivalent circuit includes only the diode 31 or when the matching circuit 20 includes only the diode 32. The condition of being large is satisfied.

In short, the rectenna device 1 of the present embodiment connects a plurality of diodes 31 and 32 in series between the antenna and the output terminal. This connection configuration makes it possible to apparently reduce the parasitic capacitance at the input end. For example, when N diodes having the same capacitance value C _S is connected in series, the combined capacitance value C is indicated as C = C S / _N. When combined capacitance value C becomes smaller, it is possible to increase the inductance L _M of the coil 21 used in the impedance matching. The optimum number of diodes connected in series depends on the parasitic resistance, parasitic capacitance, and saturation current of each diode. As a result of the examination by the inventors, the rectenna device 1 of the present embodiment allows the diodes 31 and 32 constituting the rectifier circuit 30 to include a certain amount of parasitic capacitance and resistance, and has a power conversion efficiency η. Can be enhanced. That is, it has been clarified that the rectifying action can be obtained even with a low input power by connecting a plurality of commercially available diodes in series.

In particular, in common sense, as the number of diodes connected in series increases, the power required for turn-on increases, so the power conversion efficiency η tends to decrease. However, rectenna device 1 of the present embodiment, than the effect of power required for the turn-on due to the increase in the number of diodes is increased, a large effect of increasing the inductance L _M due to decreased synthesis parasitic capacitance. Therefore, the effect is dominant range of increase in the inductance L _M, by increasing the number of diodes, it is possible to increase the power conversion efficiency.

Since the rectifying action can be obtained even with a low input current, it is possible to recover the electric power from the radio wave 101 even when the energy of the radio wave 101 is small.

<How to design a rectenna device>
Next, a method of designing the rectenna device 1 will be described with reference to FIG.

The design method calculates the Q value (n) of each of the basic diode 31 (basic diode) while sequentially connecting additional diodes 32 (plurality of additional diodes) and the like. The Q value (n) increases each time a diode is connected. Then, when the number of diodes serving as a threshold value is exceeded, the Q value (n) gradually decreases. Therefore, in the design method, the number of connections whose Q value (n) gradually increases turns to decrease is specified. Then, the number obtained by subtracting one from the number of connections that starts to decrease is set as a combination of diodes constituting the rectifier circuit 30. In the following description, the combination of diodes may mean the number of diodes and the type of diode to be combined.

First, the Q value of the equivalent circuit corresponding to the reference rectifier circuit (reference rectifier unit) having only the diode 31 is obtained.

Specifically, the input frequency (ω) of the radio wave 101 received by the antenna circuit 10 is set (step S1). Next, the capacitance value _{C J1} of the parasitic capacitance 31c of diode 31 and the input frequency (omega) is applied to Equation (7) to calculate inductance _L M of the matching circuit 20 (1) (step S2). For the matching circuit of FIG. 2, the inductance _L M of the matching circuit 20 (1) is a self-inductance of the coil 21. Then, the resistance value _{R S1} of the parasitic resistance 31r, the capacitance value _{C J1} of the parasitic capacitance 31c, by applying the inductance _L M (1), to the equation (8) to obtain Q value (1) (process S3 ).

Next, the Q value (2) of an equivalent circuit in which an additional diode 32 is added to the basic diode 31 is obtained.

_{Specifically, the resistance value R S1} of the parasitic resistance 31r of the diode 31 _{and the resistance value R S2} of the parasitic resistance 32r of the diode 32 are applied to the equation (4) to apply the resistance value R _S (2) of the combined parasitic resistance 33. Is calculated. _{Further, the capacitance value C J1} of the parasitic capacitance 31c of the diode 31 _{and the capacitance value C J2} of the parasitic capacitance 32c of the diode 32 are applied to the equation (5 _{) to calculate the capacitance value C J} (2) of the combined parasitic capacitance 34. (Step S4). Next, the capacitance value _C J (2) and the input frequency of the synthetic parasitic capacitance 34 and (omega) is applied to Equation (7) to calculate an inductance _L M (2) (step S5). Then, the resistance value _R S of the composite parasitic resistance 33 (2), the capacitance value _C J synthetic parasitic capacitance 34 (2), the inductance _L M (2), by applying the equation (8), Q value (2) is obtained (step S6).

Next, the Q value is compared (step S7). If the Q value (n + 1) is larger than the Q value (n), the variable is changed (n = n + 1), and steps S4, S5, and S6 are performed again. The operation of adding 1 to this variable n means increasing the number of diodes connected in series by one. On the other hand, when the Q value (n + 1) is smaller than the Q value (n), the process ends. For example, when the Q value (3) is smaller than the Q value (2), it is determined that the diodes 31 and 32 constitute the rectifier circuit 30.

In the method of designing the rectenna device, a step of setting a combination of diodes constituting the rectifier circuit 30, a step of calculating a Q value based on the combination, and a plurality of Qs obtained by repeatedly performing these steps. It may include a step of determining a combination of diodes constituting a Q value satisfying the condition from the value.

<Effect>
The power conversion efficiency η of the rectenna device 1 is affected by the parasitic resistors 31r and 32r and the parasitic capacitances 31c and 32c included in the diodes 31 and 32 constituting the rectifier circuit 30. In a configuration in which a plurality of diodes 31 and 32 are connected in series, the capacitance value C _J of the combined parasitic capacitance 34 is smaller than _{the capacitance value C J1} of the parasitic capacitance 31c included in one diode 31. Parasitic capacitance 31c is reduced, the matching circuit 20 when the meet the impedance matching inductance L _M of the matching circuit 20 is increased. As a result, in a circuit configuration in which a plurality of diodes 31 and 32 are connected in series, the Q value of the circuit can be made larger than the Q value of the circuit configuration including one diode. Therefore, the rectenna device 1 uses a plurality of general diodes 31 and 32 including parasitic capacitances 31c and 32c, and increases the Q value by a simple circuit configuration in which these diodes 31 and 32 are connected in series. Is possible. As the Q value increases, the potential difference between the antenna circuit 10 and the rectifier circuit 30 increases, so that the current flowing from the antenna circuit 10 to the rectifier circuit 30 increases. As a result, the power passed from the antenna circuit 10 to the rectifier circuit 30 increases, so that the power conversion efficiency η can be improved.

The matching circuit 20 of the rectenna device 1 has at least diodes 31 and 32 connected in series with each other, and the diode 31 has a parasitic resistor 31r and a parasitic capacitance 31c. The diode 32 has a parasitic resistance 32r and a parasitic capacitance 32c. The rectifier circuit 30 has a combined parasitic resistor 33 based on the parasitic resistors 31r and 32r, and a combined parasitic capacitance 34 based on the parasitic capacitances 31c and 32c. Matching circuit 20 includes a coil 21 having an inductance L _M determined by the impedance matching conditions and synthetic parasitic capacitance 34 between the antenna circuit 10 and the rectifier circuit 30. Even with this configuration, the power conversion efficiency η can be improved without adopting a special element or a complicated circuit configuration.

In rectenna device 1, a synthetic parasitic resistance 33, a synthetic parasitic capacitance 34, and the inductance _{L M,} the Q value determined on the basis of the parasitic resistance 31r and a parasitic capacitance 31c, inductance determined by the parasitic capacitance 31c and the impedance matching condition and L _M, than Q value obtained based on large. According to this configuration, the power conversion efficiency η can be surely improved.

For example, when the rectifier circuit is composed of one diode, the allowable range of parasitic resistance and parasitic capacitance allowed for each diode tends to be narrowed in order to satisfy the specifications of the rectenna device. On the other hand, the rectenna device 1 of the present embodiment achieves a desired power conversion efficiency η by combining a plurality of diodes 31 and 32. Then, even if the parasitic resistance and the parasitic capacitance of each diode vary widely, it is possible to meet the specifications of the rectenna device by the combination. Therefore, the specification conditions required for the diodes constituting the rectifier circuit 30 can be relaxed.

The rectifier circuit 30 is a half-wave rectifier circuit. Even with this configuration, the power conversion efficiency η can be improved without adopting a special element or a complicated circuit configuration.

<Modifications 1 to 6>
The rectifier circuit included in the rectenna device is not limited to the circuit configuration shown in FIG. The rectenna devices 1A to 1F of the modified examples 1 to 6 may have rectifier circuits 30A to 30F different from the rectifier circuit 30 of FIG.

Part (a) of FIG. 4 shows the rectenna device 1A of the first modification. The rectenna device 1A has a rectifier circuit 30A. This rectenna device 1A is a so-called single shunt type rectenna device (single shunt rectenna). The rectifier circuit 30A includes a diode unit 30S1 including a plurality of diodes 31 and 32, and a functional element 35. Even with this configuration, the same effect as that of the rectenna device 1 of the embodiment can be obtained.

Part (b) of FIG. 4 shows the rectenna device 1B of the second modification. The step-up rectenna device 1B has a rectifier circuit 30B. The rectenna device 1C is a single stage multiplier. The rectifier circuit 30B includes diode units 30S1 and 30S2 including a plurality of diodes 31 and 32, and a capacitor 30N1. Even with this configuration, the same effect as that of the rectenna device 1 of the embodiment can be obtained.

FIG. 5 shows the rectenna device 1C of the third modification. The step-up rectenna device 1C has a rectifier circuit 30C. This rectifier circuit 30C is a multi-stage version of the rectifier circuit 30B of the second modification. The rectenna device 1C is a type of Cockcroft-Walton / Greinacher / Village charge pump. The rectifier circuit 30C includes diode units 30S1, 30S2, 30S3, 30S4 including a plurality of diodes 31 and 32, and capacitors 30N1, 30N2, 30N3, 30N4. Even with this configuration, the same effect as that of the rectenna device 1 of the embodiment can be obtained.

FIG. 6 shows the rectenna device 1D of the modified example 4. The step-up rectenna device 1D has rectifier circuits 30D1 and 30D2. This rectenna device 1D is a so-called Dickson charge pump. The rectenna device 1D is a device in which the rectifier circuit 30B of the second modification is connected in parallel. The rectifier circuits 30D1 and 30D2 include diode units 30S1 and 30S2 including a plurality of diodes 31 and 32. Further, the rectifier circuits 30D1 and 30D2 have two matching circuits 20A and 20B, capacitors 2C1 and 2C2, and capacitors 41A and 41B. Even with this configuration, the same effect as that of the rectenna device 1 of the embodiment can be obtained.

FIG. 7 shows the rectenna device 1E of the modified example 5. The step-up rectenna device 1E has a rectifier circuit 30E. This rectifier circuit 30E is a multi-stage version of the rectifier circuit 30B of the second modification. The rectenna device 1E is a type of Cockcroft-Walton / Greinacher charge pump. The rectifier circuit 30E includes diode units 30S1 to 30S6 including a plurality of diodes 31 and 32, and capacitors 30N1 to 30N5. Even with this configuration, the same effect as that of the rectenna device 1 of the embodiment can be obtained.

FIG. 8 shows the rectenna device 1F of the modified example 6. The rectenna device 1F has a rectifier circuit 30F. This rectifier circuit 30F is a full-wave rectifier circuit. The rectifier circuit 30F has diode units 30S1 to 30S4 including a plurality of diodes 31 and 32. Even with this configuration, the same effect as that of the rectenna device 1 of the embodiment can be obtained.

FIG. 9 shows the rectenna device 1G of the modified example 7. The rectenna device 1G has a rectifier circuit 30G. The rectifier circuit 30G has two diode units 30S1 and 30S2. The diode units 30S1 and 30S2 have two diodes 31 and 32, respectively. The diodes 31 and 32 are connected in series with each other. The input of the diode unit 30S1 is connected to the matching circuit 20. The output of the diode unit 30S1 is connected to the input of the diode unit 30S2 and the capacitor 36. That is, the diode unit 30S2 is connected in series with the diode unit 30S1. In other words, the rectifier circuit 30G has four diodes 31 and 32 connected in series with each other. The input of the diode unit 30S2 is connected to the output of the diode unit 30S1 and the capacitor 36. The output of the diode unit 30S2 is connected to the capacitor 41 and the load device 102. Even with this configuration, the same effect as that of the rectenna device 1 of the embodiment can be obtained.

FIG. 10 shows the rectenna device 1H of the modified example 8. The rectenna device 1H includes a rectifier circuit 30H and a filter element 42. The rectifier circuit 30H is arranged between the matching circuit 20 and the ground potential 103. Even with this configuration, the same effect as that of the rectenna device 1 of the embodiment can be obtained.

In the embodiments and Modifications 1 to 8, the parasitic resistance 31r and the parasitic capacitance 31c of the diode 31 have been described as being the same as the parasitic resistance 32r and the parasitic capacitance 32c of the diode 32, respectively. The magnitudes of the parasitic resistance and the parasitic capacitance of the diodes constituting the rectifier circuit 30 may differ for each diode.

<Examples 1A and 1B>
In Examples 1A and 1B, the relationship between the number of diodes constituting the rectifier circuit and the power conversion coefficient was confirmed. The graph of FIG. 11 shows the results of Examples 1A and 1B. The horizontal axis of the graph shows the number of diodes that make up the rectifier circuit. The vertical axis of the graph shows the power conversion efficiency η. Graph G11A shows the results of Example 1A. Graph G11B shows the results of Example 1B.

In Examples 1A and 1B, the resistance value _RA of the antenna resistor 12 is 70Ω, the output voltage value _VDD is 1.0V, and the output current _IDD is 10μA. _{Further, in Example 1A, a diode having a resistance value RS} of the synthetic parasitic resistor 33 of _{12Ω and a capacitance value C J} of the synthetic parasitic capacitance 34 of 0.1 pF was selected. _{In Example 1B, a diode having a resistance value RS} of the synthetic parasitic resistor 33 of _{8.04Ω and a capacitance value C J} of the synthetic parasitic capacitance 34 of 0.192pF was selected.

According to Examples 1A and 1B, it was found that the power conversion efficiency η changes when the number of diodes changes. For example, in both Examples 1A and 1B, it was found that the power conversion efficiency η is higher when the rectifier circuit includes two diodes than when the rectifier circuit includes one diode. On the other hand, it was found that the number of diodes having the maximum power conversion efficiency η differs depending on the conditions. For example, under the analysis conditions of Example 1A, the number of diodes having the maximum power conversion efficiency η was two. On the other hand, under the analysis conditions of Example 1B, the number of diodes having the maximum power conversion efficiency η was four.

Further, the tendency that the power conversion efficiency increases as the number of diodes increases, the power conversion efficiency reaches the maximum value, and then the power conversion efficiency gradually decreases is common to Examples 1A and 1B. .. Therefore, when connecting diodes having parasitic resistance and parasitic capacitance that can be regarded as equal to each other, it was confirmed that the optimum number of diodes can be set by the method described in the embodiment.

<Examples 2A to 2F>
In Example 2A-2F, it was checked for the relationship between the capacitance value C _J and the power conversion efficiency η of the composite parasitic capacitance 34. The graph of FIG. 12 shows the results of Examples 2A to 2F. The horizontal axis of the graph shows the capacitance values C _J synthetic parasitic capacitance 34. The vertical axis of the graph shows the power conversion efficiency η. Graphs G12A, G12B and G12C show the results of Examples 2A, 2B and 2C, respectively. Further, the graphs G12D, G12E and G12F show the results of Examples 2D, 2E and 2F, respectively.

Examples 2A to 2C are calculation results by the circuit simulator. Examples 2D to 2F are actually measured values. In Examples 2A to 2F, the resistance value _RA of the antenna resistor 12 is 70Ω, the output voltage value _VDD is 0.5V, and the output current _IDD is 10μA. Further, in Examples 2A to 2F, the resistance values _RS of the combined parasitic resistance 33 are different from each other. _{The resistance values RS} set in each of Examples 2A to 2F are as follows.
Example 2A: _RS = 2Ω.
Example 2B: _RS = 20Ω.
Example 2 C: _RS = 200 Ω.
Example 2D: _RS = 2Ω.
Example 2E: _RS = 20Ω.
Example 2F: _RS = 200Ω.

When the calculation result is compared with (Example 2A-2C) and the measurement results (Example 2d to 2f), the relationship between the capacitance value C _J and the power conversion efficiency η of the composite parasitic capacitance is generally trends coincide. In either embodiment 2A-2F, synthetic parasitic capacitance 34 capacitance C _J are larger, the power conversion efficiency η was found to be reduced. For example, when the capacitance value C _J of the synthetic parasitic capacitance 34 was between 0.01 pF and 0.1 pF, the degree of reduction in the power conversion efficiency η was slight. On the other hand, when the capacitance value C _J of the synthetic parasitic capacitance 34 was between 0.1 pF and 1 pF, the degree of reduction of the power conversion efficiency η was large.

In any embodiment 2A-2F, the relationship between the capacitance value C _J and the power conversion efficiency η of the composite parasitic capacitance 34 was found to show a generally similar tendency. That is, it was found that when _{the resistance value RS} of the combined parasitic resistance 33 is a fixed value, the power conversion efficiency η is _{determined by the capacitance value C J of the combined parasitic capacitance 34.}

<Examples 3A to 3F>
Example 3A-3F, confirmed the relationship between the resistance value R _S and the power conversion efficiency η of the composite parasitic resistor 33. The graph of FIG. 13 shows the results of Examples 3A to 3F. The horizontal axis of the graph shows _{the resistance value RS of the combined parasitic resistance 33.} The vertical axis of the graph shows the power conversion efficiency η. Graphs G13A, G13B and G13C show the results of Examples 3A, 3B and 3C, respectively. Further, the graphs G13D, G13E and G13F show the results of Examples 3D, 3E and 3F, respectively.

Examples 3A to 3C are calculation results by the circuit simulator. Examples 3D to 3F are actually measured values. In Example 3A-3F, the resistance value _{R A} of the antenna resistor 12 is 70 ohm, the output voltage value _{V DD} is 0.5V, the output current _{I DD} was to be 10 .mu.A. In Examples 3A-3F, different capacitance values _{C J} synthetic parasitic capacitance 34 from each other. Capacitance _{C J} are set to the embodiments 3A~3F is as follows.
Example _3A: C J = _0.14pF.
Example _3B: C J = _0.42pF.
Example _3C: C J = _1.40pF.
Example _3D: C J = _0.14pF.
Example _3E: C J = _0.42pF.
Example _3F: C J = _1.40pF.

Comparing the calculation results (Examples 3A to 3C) and the measurement results (Examples 3D to 3F) _{, the relationship between the resistance value RS} of the combined parasitic resistance and the power conversion efficiency η was generally the same. In either embodiment 3A-3F, synthetic parasitic resistor 33 resistance R _S is larger, the power conversion efficiency η was found to be reduced. _{However, the degree of reduction of the power conversion efficiency η when the resistance value RS} of the combined parasitic resistor 33 increases and the degree of reduction of the power conversion efficiency η when the capacitance value C _J of the combined parasitic capacitance 34 increases. Comparing with and, the degree of reduction of the power conversion efficiency η was large when _{the capacitance value C J} of the combined parasitic capacitance increased. That is, it was found that the effect _{of the capacitance value C J} of the combined parasitic capacitance on the _{power conversion efficiency η is larger than the effect of the resistance value RS} of the combined parasitic resistance on the power conversion efficiency η.

Note that in either embodiment 3A-3F, the relationship between the resistance value R _S and the power conversion efficiency η of the composite parasitic resistor 33 was found to show a generally similar tendency. That is, it was found that when _{the capacitance value C J} of the combined parasitic capacitance 34 is a fixed value, the power conversion efficiency η is _{determined by the resistance value RS of the combined parasitic resistor 33.}

1,1A, 1B, 1C, 1D, 1E, 1F, 1G, 1H ... Rectifier device, 10 ... Antenna circuit (antenna part), 11 ... Antenna element, 12 ... Antenna resistance, 20, 20A, 20B ... Matching circuit (matching) Part), 21 ... Coil, 30, 30A, 30B, 30C, 30D, 30E, 30F, 30G, 30H ... Rectifier circuit (rectifier), 30S1-30S6 ... Diode unit, 31,32 ... Diode, 31d, 32d ... Diode Functional unit, 31r, 32r ... Parasitic resistance, 31c, 32c ... Parasitic capacitance, 33 ... Synthetic parasitic resistance, 34 ... Synthetic parasitic capacitance, 101 ... Radio wave, 102 ... Load device, 103 ... Ground potential.

Claims (6)

The antenna part that receives radio waves and generates AC power,
The matching part connected to the antenna part and the matching part
It has a plurality of diodes connected in series with each other and includes a rectifying unit connected to the matching unit and rectifying the AC power provided from the antenna unit.
The rectifying unit has at least a first diode and a second diode connected in series with each other.
The ratio of the power output by the rectifying unit to the power output by the antenna unit is larger than the ratio of the power output by the reference rectifying unit having only the first diode to the power output by the antenna unit. Large, rectenna device. The first diode has a first parasitic resistance and a first parasitic capacitance.
The second diode has a second parasitic resistance and a second parasitic capacitance.
The rectifying unit has a synthetic parasitic resistance based on the first and second parasitic resistors and a synthetic parasitic capacitance based on the first and second parasitic capacitances.
The rectenna device according to claim 1, wherein the matching unit includes a coil having an impedance matching condition between the antenna unit and the rectifying unit and an inductance corresponding to the combined parasitic capacitance. The Q value determined based on the combined parasitic resistance, the combined parasitic capacitance, and the inductance is determined by the first parasitic resistance, the first parasitic capacitance, the first parasitic capacitance, and the impedance matching condition. The rectener device according to claim 2, which is larger than the inductance and the Q value obtained based on. The rectenna device according to any one of claims 1 to 3, wherein the rectifier unit is a half-wave rectifier circuit. The rectenna device according to any one of claims 1 to 3, wherein the rectifier unit is a full-wave rectifier circuit. How to design a rectenna device
The rectenna device has a configuration in which an antenna portion that receives radio waves and generates AC power, a matching portion connected to the antenna portion, a basic diode, and a plurality of additional diodes are connected in series with each other, and the matching is performed. A rectifying unit connected to the unit and rectifying the AC power provided from the antenna unit is provided, and the basic diode and the plurality of additional diodes each have a parasitic resistance and a parasitic capacitance.
The step of selecting at least one additional diode connected to the basic diode and
The combined parasitic resistance based on the parasitic resistance of the basic diode and the additional diode, the combined parasitic capacitance based on the parasitic capacitance of the basic diode and the additional diode, the impedance matching conditions between the antenna unit and the rectifying unit, and the said. It has a coil having an inductance determined by a synthetic parasitic capacitance and a step of obtaining a Q value of a resonance circuit in which a diode is connected in series.
The step of selecting the additional diode and the step of obtaining the Q value are repeated while changing the combination of the selected additional diodes.
A rectenna that determines a combination of the additional diodes having a Q value larger than the Q value when the matching unit is a reference rectifier having only the basic diode as the combination of the additional diodes added to the basic diode. How to design a device.

Images