JP2021034914A - Communication channel checker - Google Patents

Abstract

To detect a communication state of a serial bus singly without occurrence of trouble in the serial bus.SOLUTION: A communication channel checker comprises: a signal generation units 14 connected to electrodes 22a and 22b in the vicinity of coated conductors La and Lb constituting a communication channel (serial bus) SB on which a logic signal Sa is transmitted, and configured to generate voltage signals Vc1 and Vc2 whose voltages are changed correspondingly to voltages Va and Vb of the coated conductors La and Lb capacitively coupled with the electrodes 22a and 22b, and generate a code identification signal Sf capable of identifying a code corresponding to the logic signal Sa based on a differential voltage Vo of the voltage signals Vc1 and Vc2;; a display unit 16; and a processing unit 15 which executes communication state detection processing for identifying the code from the code identification signal Sf and detecting a communication state of the communication channel SB based on the code, and display processing for displaying a detection result in the communication state detection processing on the display unit 16. The signal generation unit 14, the processing unit 15 and the display unit 16 are disposed in a case 11.SELECTED DRAWING: Figure 1

Description

The present invention specifies a code corresponding to a logic signal based on a 2-wire differential voltage system logic signal transmitted via a communication path such as a CAN bus, and communicates on the communication path based on the specified code. It relates to a communication path checker that can easily detect the state by itself.

For example, in the following patent documents, vehicle data configured to collect and record various CAN frames (control data) transmitted via a serial bus for CAN communication (in-vehicle LAN, which is also a CAN bus). The invention of a collecting device (hereinafter, also simply referred to as a “collecting device”) is disclosed. This collecting device is connected to a diagnostic connector (connector for connecting diagnostic equipment: hereinafter simply referred to as "connector") provided on the serial bus to connect an external device to the serial bus for the purpose of failure diagnosis and maintenance. It is configured to be possible. Further, in this collecting device, by connecting to the above connector, it is operated by the power supply supplied from the serial bus via the connector, and the collection of CAN frames from the serial bus is started / stopped in conjunction with the operation of the ignition switch. Is adopted to automatically execute. In addition, this collecting device is connected to an analysis device such as a personal computer or an analysis device via a cable (harness) on a desk or while mounted on a vehicle, so that the collected CAN frame is appropriately output to the analysis device. It is possible to do. Further, this collecting device is provided with a CAN communication monitoring circuit that monitors the communication status of the CAN bus, and the CAN communication monitoring circuit detects whether or not a change in the CAN signal has started, thereby simulating IG. It is possible to determine whether or not a voltage (ignition voltage: voltage from a battery) is being supplied.

Japanese Unexamined Patent Publication No. 2008-70133 (Pages 4-11, Fig. 1-17)

However, in the configuration in which this collecting device is directly connected to the serial bus via the connector as described above, the collecting device assumed by the vehicle manufacturer (manufacturer) (such as the collecting device of Patent Document 1 described above). There is no problem by connecting the above, but when an unexpected collector is connected, unexpected troubles (transmission of logic signals on the serial bus and operation of the equipment connected to the serial bus) occur in the vehicle. (Trouble such as hindering) may occur. Further, this collecting device is provided with a CAN communication monitoring circuit that monitors the communication status of the CAN bus, and the detection result of this CAN communication monitoring circuit (whether or not the CAN signal has started to change) is pseudo. It is only used to determine whether or not an IG voltage is being supplied to the. Therefore, the user of this collection device cannot confirm the communication status of the CAN bus only by the collection device, and must connect to a separate analysis device (analyzer) for this confirmation. That is, this collecting device, in combination with the analysis device, functions as a communication path checker for detecting the communication state of the CAN bus as a whole, and cannot function as a communication path checker by itself.

The present invention has been made in view of such a problem, and an object of the present invention is to provide a communication path checker capable of detecting a communication state of a serial bus by itself without causing a trouble in the serial bus.

In order to achieve the above object, the communication path checker according to claim 1 is arranged in a state of being close to each of a pair of covered conductors constituting a communication path for transmitting a logic signal of a two-wire differential voltage system. A pair of voltage signals whose voltage changes according to the voltage transmitted to the pair of coated conductors connected to the electrodes and capacitively coupled to the pair of electrodes are generated, and the differential voltage of the pair of voltage signals is generated. A signal generation unit that generates a code identification signal capable of specifying a code corresponding to the logic signal based on the above, a display unit, and the code corresponding to the logic signal from the code identification signal are specified and specified. It is provided with a communication state detection process for detecting the communication state of the communication path based on the code, and a processing unit for executing a display process for displaying the detection result in the communication state detection process on the display unit, and the signal. The generation unit and the processing unit are housed in the same case, and the display unit is arranged in the case.

The communication path checker according to claim 2 is the communication path checker according to claim 1, wherein the base ends of a pair of probes whose free ends are attached to the pair of covered conductors are connected to the case. A connector is provided, and the electrode is arranged at the free end of the pair of probes.

Further, the communication path checker according to claim 3 is the communication path checker according to claim 1, wherein a contact surface is formed in the case so as to be brought into contact with the pair of coated conducting wires, and the electrode is the case. Inside, it is arranged in the vicinity of the contact portion with the pair of coated conductors on the contact surface.

The communication path checker according to claim 4 is the communication path checker according to any one of claims 1 to 3, wherein the signal generation unit is based on the pair of voltage signals input to the pair of input terminals. A differential amplification unit that outputs the difference voltage and a signal switching unit that can selectively switch which of the pair of input terminals the pair of voltage signals are input to are provided, and the processing unit has the reference numeral. When the identification signal cannot specify the code corresponding to the logic signal, the input state of the pair of voltage signals to the pair of input terminals is set to an input state opposite to the current input state. The switching process for switching to the signal switching unit is executed.

Further, the communication path checker according to claim 5 is arranged in a state of being close to one of the covered conductive wires constituting the communication path constituting the communication path through which the logic signal of the two-wire differential voltage system is transmitted. A voltage signal whose voltage changes according to the voltage transmitted to the one coated lead wire which is connected to one electrode and capacitively coupled to the one electrode is generated, and the logic signal is generated based on the voltage signal. A signal generation unit that generates a code identification signal capable of specifying a code corresponding to the code, a display unit, and the code corresponding to the logic signal from the code specification signal are specified, and the code is specified based on the specified code. It includes a communication state detection process for detecting the communication state of the communication path and a processing unit for executing a display process for displaying the detection result in the communication state detection process on the display unit, and also includes the signal generation unit and the processing unit. Are housed in the same case, and the display unit is arranged in the case.

The communication path checker according to claim 6 is a connection connector in which the base end portion of a probe whose free end portion is attached to the one covered lead wire is connected to the case in the communication path checker according to claim 5. Is disposed, and the electrode is disposed at the free end portion of the probe.

Further, the communication path checker according to claim 7 is the communication path checker according to claim 5, wherein a contact surface is formed in the case so as to be brought into contact with the one coated lead wire, and the electrode is the case. Inside, it is arranged in the vicinity of the contact portion with the one coated lead wire on the contact surface.

The communication path checker according to claim 8 is the communication path checker according to any one of claims 5 to 7, wherein the signal generation unit inverts the phase of the voltage signal and outputs it as an inverted voltage signal. The processing unit includes an amplifier and a signal switching unit capable of switching which of the voltage signal and the inverting voltage signal is input, and the processing unit corresponds to the code specifying signal corresponding to the logic signal. When the code cannot be specified, the signal switching unit is subjected to a switching process of switching from one voltage signal of the voltage signal and the inverting voltage signal to the other voltage signal.

The communication path checker according to claim 9 is the communication path checker according to any one of claims 1 to 8, wherein the case has a handy outer shape.

Further, the communication path checker according to claim 10 is the communication path checker according to any one of claims 1 to 9, which converts the code identification signal into a signal of a communication method specified in advance and is outside the case. It is equipped with a signal conversion unit that outputs to.

Further, the communication path checker according to claim 11 is connected to a pair of electrodes arranged in a state close to each of a pair of coated conductive wires constituting a communication path for transmitting a logic signal of a two-wire differential voltage system. Therefore, a pair of voltage signals whose voltage changes according to the voltage transmitted to the pair of coated conductors which are capacitively coupled to the pair of electrodes are generated, and the difference voltage of the pair of voltage signals is used as the basis for generating the pair of voltage signals. A signal generation unit that generates a code identification signal capable of specifying a code corresponding to a logic signal, a display unit, and the code corresponding to the logic signal from the code identification signal are specified and based on the specified code. A processing unit that executes a communication state detection process for detecting the communication state of the communication path and a display process for displaying the detection result in the communication state detection process on the display unit, and the code identification signal are defined in advance. It is provided with a signal conversion unit that converts and outputs a signal of the communication method, the signal generation unit and the processing unit are housed in a first case, and the signal conversion unit is connected to the first case via a connection cable. The code identification signal is input via the connection cable while being housed in the second case connected to the display unit, and the display unit is arranged in at least one of the first case and the second case. It is installed.

Further, the communication path checker according to claim 12 is arranged in a state of being close to one of the covered conductive wires constituting the communication path constituting the communication path through which the logic signal of the two-wire differential voltage system is transmitted. A voltage signal whose voltage changes according to the voltage transmitted to the one coated lead wire which is connected to one electrode and capacitively coupled to the one electrode is generated, and the logic signal is generated based on the voltage signal. A signal generation unit that generates a code identification signal capable of specifying a code corresponding to the code, a display unit, and the code corresponding to the logic signal from the code specification signal are specified, and the code is specified based on the specified code. Communication in which the code identification signal is defined in advance with a processing unit that executes a communication state detection process for detecting the communication state of the communication path and a display process for displaying the detection result in the communication state detection process on the display unit. A signal conversion unit that converts and outputs a signal of the system is provided, the signal generation unit and the processing unit are housed in a first case, and the signal conversion unit is connected to the first case via a connection cable. The code identification signal is input via the connection cable while being housed in the second case, and the display unit is arranged in at least one of the first case and the second case. ing.

According to the communication path checker according to claims 1 and 5, the communication status of the communication path can be checked (detected) and displayed by itself, so that the user of this communication path checker can use a separate analyzer ( It is possible to check the communication status of the communication path only with this communication path checker without preparing an analyzer). Further, according to this communication path checker, since the electrode is capacitively coupled to the coated lead wire, it is possible to prevent a trouble from occurring in the communication path (serial bus).

According to the communication path checker according to claim 2, since a pair of probes having electrodes arranged at free ends are used, different positions along the length direction of the communication path (each of which is easy to attach) The electrode can be attached to the position).

According to the communication path checker according to claim 6, since the probe using the electrode is provided at the free end portion, the electrode can be easily attached to the portion of the communication path having a small gap in the periphery.

According to the communication path checker according to claims 3 and 7, the communication state of the communication path can be confirmed by itself. In addition, since a probe is not required, the outer shape can be made compact, and the trouble of connecting the probe to the checker body can be saved.

According to the communication path checker according to claims 4 and 8, since the signal switching unit is provided, the processing unit can be connected to the signal switching unit even when the probe is not correctly connected to the covered wire to which the probe should be connected. By executing the switching process, the correct code identification signal can be output from the signal generation unit. Therefore, according to this communication path checker, even when the probe is not correctly connected to the coated wire, the user can eliminate the work of reconnecting the probe to the covered wire by himself / herself.

According to the communication path checker according to claim 9, since the outer shape is a handy type, the user can carry it by putting it in a pocket or the like (convenience can be enhanced).

According to the communication path checker according to claims 10, 11 and 12, since the signal conversion unit is provided, the communication state of the communication path is detected by itself and the detection result is displayed on the display unit for external analysis. It is possible to output a code identification signal to the device to perform more advanced analysis.

It is a block diagram which shows the structure of the communication path checker 1A. It is a waveform diagram of the code Cs, the voltage Va, Vb, the voltage signals Vc1, Vc2, the output signal Vo, and the code specifying signal Sf. It is a block diagram which shows the structure of the communication path checker 1B. It is a perspective view which shows the structure of the communication path checker 1B. It is a block diagram which shows the structure of the communication path checker 1C. It is a block diagram which shows the structure of the channel checker 1D. It is a block diagram which shows the structure of the communication path checker 1E. It is a block diagram which shows the structure of the communication path checker 1F.

Hereinafter, embodiments of the communication path checker will be described with reference to the attached drawings.

As shown in FIG. 1, the communication path checker 1A as the communication path checker includes a pair of probes PLa and PLb and a checker body 2, and is a single communication path checker 1A (that is, a separate analyzer (that is, a separate analyzer (that is, a separate analyzer). It is configured so that the communication status of the communication path (serial bus) SB to be checked can be checked (detected) and displayed without using an analyzer) or the like.

Specifically, the communication path checker 1A is a 2-wire differential voltage type logic signal (covered) transmitted via a communication path SB composed of a pair of signal lines (for example, a pair of covered lead wires La and Lb). The communication status of the logic signal Sa) defined by the difference between the voltages Va and Vb transmitted to the lead wires La and Lb is checked and displayed. Further, the communication path checker 1A uses various "2-wire differential" as the logic signal Sa, which conforms to various communication protocols such as "CAN (registered trademark) protocol", "CAN FD", and "FlexRay (registered trademark)". It is possible to target various "two-wire differential voltage system logic signals" conforming to various communication protocols capable of small-amplitude low power consumption communication by "voltage system logic signal" and "LVDS". In this case, in the "serial bus for CAN communication" of "CAN protocol" and "CAN FD", "high potential side signal line (CANH) / low potential side signal line (CANL)" transmits a "logic signal". In the "serial bus for FlexRay communication", the "positive side signal line (BP) / negative side signal line (BM)" corresponds to the "pair of covered wires", and the "pair of covered wires for transmitting logic signals". In the "serial bus that communicates by LVDS", the "positive logic side signal line / negative logic side signal line" corresponds to "a pair of covered conductors for transmitting a logic signal".

In the following, as an example of the communication path SB, a "serial bus for CAN communication" (for example, a serial bus for CAN communication installed in an automobile or a factory; hereinafter, also simply referred to as a CAN bus) will be described as an example. To do.

In the communication path SB as the CAN bus, as shown in FIG. 1, the logic signal Sa representing each code Cs (see FIG. 2) constituting the CAN frame is formed on the two covered lead wires La, which constitute the communication path SB. Of the two coated conductors, the voltage Va of the voltage signal transmitted to the CANH (CANH) coated conductor La of Lb (hereinafter, for the sake of easy understanding, this voltage signal itself is also referred to as the voltage signal Va). It is a potential difference (Va-Vb) between the voltage Vb of the voltage signal transmitted to the coated lead wire Lb of CANLow (CANL) (hereinafter, for the sake of easy understanding, this voltage signal itself is also referred to as the voltage signal Vb). It is transmitted as a differential signal.

Since the transmission principle of the logic signal Sa via the communication path SB is known, detailed description thereof will be omitted, but the specifications of the CANHight (CANH) voltage signal Va and the CANLow (CANL) voltage signal Vb are simple. Explain to. As shown in FIG. 2, the voltage signals Va and Vb are voltage signals that change in the opposite direction from the base voltage (+ 2.5 V), and when the voltage signal Va is the voltage of this base, the voltage signal Vb is also The code Cs (logical value) constituting the CAN frame transmitted during this period when the voltage is the same base voltage over the same period and the potential difference (Va-Vb) becomes zero (minimum) indicates "1". Become. On the other hand, when the voltage signal Va is a specified voltage (+ 3.5 V) higher than the base voltage, the voltage signal Vb is conversely another specified voltage (+1) lower than the base voltage for the same period. .5V), and the code Cs (logical value) constituting the CAN frame transmitted during this period when the potential difference (Va-Vb) is maximized indicates "0". In addition, illustration and description of "SG", which is a signal line serving as a reference potential for transmitting a differential signal in the communication path SB, and signal lines and power lines arranged for purposes other than transmission of the differential signal. Is omitted.

The pair of probes PLa and PLb are configured in the same manner as a metal non-contact type probe by using a shielded cable (for example, a coaxial cable). Specifically, the probe PLa is connected to a core wire (not shown) of the coated lead wire La on the free end side (free end portion) which is detachably connected to the corresponding coated lead wire La (connected by capacitive coupling). The electrode portion 21a is arranged, and the base end side (base end portion) is connected (fixed) to the corresponding input terminal portion 12 of the input terminal portions 12 and 13 described later of the checker body 2. , Or removably connected) connection connectors (not shown) are arranged and configured. Further, the probe PLb is an electrode connected to a core wire (not shown) of the coated conductive wire Lb on the free end side (free end portion) removably connected to the corresponding coated conductive wire Lb (connected by capacitive coupling). A portion 21b is arranged, and the proximal end side (base end portion) is connected (fixed or removed) to the corresponding input terminal portion 13 of the input terminal portions 12 and 13 described later in the checker body 2. A connection connector (not shown) (not shown) is arranged and configured.

As shown in FIG. 1, the electrode portion 21a contacts (contacts) an insulating coating portion (hereinafter, also simply referred to as “coating portion”) of the coating conductor wire La, which is not shown, in a state of being connected to the coating conductor wire La. By covering the contact portion between the electrode 22a, which is capacitively coupled to the core wire (conductor itself (metal part)) of the coated conductor La, and the electrode 22a in the coated portion of the coated conductor La, including the electrode 22a, the electrode It is provided with a shield 23a for preventing capacitance coupling with another metal portion of 22a (a metal portion other than the core wire of the coated conductor La). Further, the electrode 22a is connected to the first detection unit 31 described later of the signal generation unit 14 described later via the core wire of the shielded cable constituting the probe PLa and one terminal of the input terminal unit 12. Further, the shield 23a is connected to a reference potential portion (ground G) in the checker body 2 via the shield of the shielded cable and other terminals of the input terminal portion 12.

Further, as shown in FIG. 1, the electrode portion 21b is in contact with (contacting) an insulating coating portion (hereinafter, also simply referred to as “coating portion”) of the coating conductor wire Lb (hereinafter, also simply referred to as “coating portion”) in a state of being connected to the coated conductor wire Lb. ), By covering the contact portion between the electrode 22b, which is capacitively coupled to the core wire (conductor itself (metal part)) of the coated conductor Lb (not shown), and the electrode 22b in the coated portion of the coated conductor Lb, including the electrode 22b. The electrode 22b is provided with a shield 23b for preventing capacitance coupling with another metal portion (a metal portion other than the core wire of the coated conductor Lb). Further, the electrode 22b is connected to the second detection unit 32 of the signal generation unit 14 described later via the core wire of the shielded cable constituting the probe PLb and one terminal of the input terminal unit 13. Further, the shield 23b is connected to a reference potential portion (ground G) in the checker body 2 via the shield of the shielded cable and other terminals of the input terminal portion 13.

Further, although not shown, each probe PLa, PLb has a corresponding coating so that the probe PLa can be correctly connected to the corresponding coated lead wire La and the probe PLb can be correctly connected to the corresponding coated lead wire Lb. Marks and the like for clearly indicating the conductors La and Lb (for example, the characters "CANH" and "CANL" indicating the coated conductors La and Lb to be connected) are displayed.

As shown in FIG. 1, the checker main body 2 includes a case 11, input terminal units 12 and 13, signal generation unit 14, processing unit 15, display unit 16, operation unit 17, and power supply unit 18.

The case 11 is formed in a box body such as a rectangular parallelepiped in outer shape, and each electronic circuit constituting the signal generation unit 14, the processing unit 15, and the power supply unit 18 is housed (built-in) in the case 11. Further, on the wall surface of the case 11, input terminal units 12 and 13, a display unit 16 and an operation unit 17 are arranged. Further, as an example, in the case 11, the outer surfaces of all the wall surfaces (except for the input terminal portions 12, 13, the display portion 16 and the operation portion 17 are arranged) are covered with a resin material having an electrically insulating property. It is formed of a metal box (for example, the metal portion of the case 11 is connected to the ground G).

The input terminal portion 12 is composed of a connection connector arranged on the proximal end side of the probe PLa and a connection connector that can be connected. Further, the input terminal portion 13 is composed of a connection connector that can be connected to a connection connector arranged on the proximal end side of the probe PLb.

As shown in FIG. 1, the signal generation unit 14 includes a first detection unit 31, a second detection unit 32, a signal switching unit 33A, a differential amplification unit 34, and a comparator 35.

As an example, the first detection unit 31 is configured to include a resistance (a resistance having a high resistance value (a high impedance resistance of at least several MΩ)) and a capacitor connected in parallel to the resistance, as shown in FIG. In addition, the voltage changes according to the voltage Va transmitted to the coated lead wire La connected via the input terminal portion 12 and the probe PLa (when the voltage Va is the base voltage, the voltage becomes low, and the voltage Va becomes high voltage. The first voltage signal Vc1 (which changes so as to become a high voltage at the time of) is output.

Specifically, one end of each of the resistors and capacitors connected in parallel is connected to the core wire of the shielded cable constituting the probe PLa via one terminal of the input terminal portion 12, and the other end of each is connected to the ground G. It is connected. The first detection unit 31 is not limited to the above configuration (parallel circuit of resistor and capacitor). For example, it may be composed of a circuit having only a resistor or a circuit having only a capacitor. Further, this capacitor can be composed of discrete parts, or the wiring capacity of the shielded cable (capacity formed between the core wire and the shield) constituting the probe PLa connected via the input terminal portion 12. It can also be configured with.

The second detection unit 32 is configured in the same manner as the first detection unit 31, and as shown in FIG. 2, the second detection unit 32 is connected to the voltage Vb transmitted to the coated lead wire Lb connected via the input terminal unit 13 and the probe PLb. The second voltage signal Vc2 whose voltage changes accordingly (changes so that when the voltage Vb is the base voltage, it becomes a high voltage and when the voltage Vb is a low voltage, it becomes a low voltage) is output.

Specifically, one end of each of the resistors and capacitors connected in parallel is connected to the core wire of the shielded cable constituting the probe PLb via one terminal of the input terminal portion 13, and the other end of each is connected to the ground G. It is connected. The second detection unit 32 is not limited to the above configuration (parallel circuit of resistor and capacitor), and various configurations can be adopted in the same manner as the first detection unit 31 described above.

The probe PLa connected to the first detection unit 31 is erroneously connected to a coated lead wire Lb different from the corresponding coated lead wire La, and the probe PLb connected to the second detection unit 32 corresponds to the probe PLb. When the first detection unit 31 is erroneously connected to a covered wire La different from the covered wire Lb, the first detection unit 31 is a voltage signal whose voltage changes according to the voltage Vb of the voltage signal Vb transmitted to the covered wire Lb (the above). A signal equivalent to the second voltage signal Vc2) is generated as the first voltage signal Vc1. Further, the second detection unit 32 uses a second voltage signal as a voltage signal (a signal equivalent to the first voltage signal Vc1 described above) whose voltage changes according to the voltage Va of the voltage signal Va transmitted to the coated lead wire La. Generated as Vc2.

The signal switching unit 33A includes a pair of input terminals INa and INb, a pair of output terminals OUa and OUb, and a signal switching circuit (not shown), and the signal switching circuit operates based on the control signal Scant from the processing unit 15. By doing so, the first voltage signal Vc1 input to one input terminal INa is output as a voltage signal Vd1 from one output terminal OUa, and the second voltage signal Vc2 input to the other input terminal INb is output from the other. The first output state (output state indicated by the solid arrow) that is output as the voltage signal Vd2 from the output terminal OUb and the first voltage signal Vc1 that is input to one input terminal INa are connected to the voltage signal Vd2 from the other output terminal OUb. It is possible to switch to the second output state (output state indicated by the dashed arrow) in which the second voltage signal Vc2 is output as the voltage signal Vd1 from one output terminal OUa and is output as the voltage signal Vd1. It is configured in. That is, the signal switching unit 33A connects the pair of voltage signals Vc1 and Vc2 to the pair of input terminals INc and INd (input terminal INc and output terminal OUb connected to the output terminal OUa) described later in the differential amplification unit 34. It is possible to selectively switch which of the input terminals INd) to input. Further, the signal switching unit 33A is assumed to be switched to the first output state as the initial state by the processing unit 15 at the time of starting the checker main body 2, for example.

With this configuration, in the signal switching unit 33A, the probe PLa connected to the first detection unit 31 is correctly connected to the coated lead wire La, and the probe PLb connected to the second detection unit 32 is correctly connected to the coated lead wire Lb. The first voltage signal Vc1 (the signal corresponding to the voltage signal Va of the coated lead wire La) from the first detection unit 31 is input to the input terminal INa, and the second voltage signal from the second detection unit 32 is connected. When Vc2 (a signal corresponding to the voltage signal Vb of the covered lead wire Lb) is input to the input terminal INb, the first output state is switched based on the control signal Scnt from the processing unit 15. As a result, the signal switching unit 33A correctly outputs the signal corresponding to the voltage signal Va of the covered lead wire La (in this case, the first voltage signal Vc1) as the voltage signal Vd1 from the output terminal OUa, and the voltage signal of the covered lead wire Lb. It is possible to correctly output the signal corresponding to Vb (in this case, the second voltage signal Vc2) as the voltage signal Vd2 from the output terminal OUb.

Further, in the signal switching unit 33A, the probe PLa connected to the first detection unit 31 is erroneously connected to the coated lead wire Lb, and the probe PLb connected to the second detection unit 32 is erroneously connected to the coated lead wire La. The first detection unit 31 outputs a signal corresponding to the voltage signal Vb of the coated lead wire Lb as the first voltage signal Vc1, and the second detection unit 32 outputs a signal corresponding to the voltage signal Va of the coated lead wire La. When it is output as the second voltage signal Vc2, it is switched to the second output state based on the control signal Scnt from the processing unit 15. As a result, the signal switching unit 33A correctly outputs the signal corresponding to the voltage signal Va of the covered lead wire La (in this case, the second voltage signal Vc2) as the voltage signal Vd1 from the output terminal OUa, and the voltage signal of the covered lead wire Lb. It is possible to correctly output the signal corresponding to Vb (in this case, the first voltage signal Vc1) as the voltage signal Vd2 from the output terminal OUb.

The differential amplification unit 34 is composed of, for example, a known electronic circuit using an operational amplifier, and one input terminal INc of the pair of input terminals INc and INd is used as one output terminal OUa of the signal switching unit 33A. It is connected, and the other input terminal INd is connected to the other output terminal OUb of the signal switching unit 33A. Further, the differential amplification unit 34 outputs a differential voltage (Vd1-Vd2) between the voltage signal Vd1 input to one input terminal INc and the voltage signal Vd2 input to the other input terminal INd as an output signal Vo (in this example, Vd1-Vd2). Output from the output terminal OUc as a differential output signal).

With this configuration, in the differential amplification unit 34, when the probes PLa and PLb are correctly connected to the coated conductors La and Lb and the signal switching unit 33A is switched to the first output state, the voltage signal of the coated conductors La Since the first voltage signal Vc1 corresponding to Va is output as the voltage signal Vd1 and the second voltage signal Vc2 corresponding to the voltage signal Vb of the coated lead wire Lb is output as the voltage signal Vd2, the difference voltage (Vd1-Vd2). Is output as a correct output signal Vo as shown by a solid line in FIG. This correct output signal Vo is a low voltage (negative voltage) during the period in which the code Cs (“1”) constituting the CAN frame (code string) is transmitted to the communication path SB, and the code Cs (“0”). Is an output signal Vo that becomes a high voltage (positive voltage) during the period of transmission.

On the other hand, in the differential amplification unit 34, when the probes PLa and PLb are erroneously connected to the coated lead wires Lb and La and the signal switching unit 33A is switched to the first output state (switched to the second output state). When not), the first voltage signal Vc1 corresponding to the voltage signal Vb of the covered lead wire Lb is output as the voltage signal Vd1, and the second voltage signal Vc2 corresponding to the voltage signal Va of the covered lead wire La is the voltage signal Vd2. Therefore, the differential voltage (Vd1-Vd2) is output as an erroneous output signal Vo as shown by the broken line in FIG. The erroneous output signal Vo is an output signal Vo whose phase is inverted with respect to the above-mentioned correct output signal Vo (code Cs (“1”) constituting a CAN frame (code string) is transmitted to the communication path SB. This is an output signal Vo) that becomes a high voltage (positive voltage) during the period during which the signal is being transmitted and becomes a low voltage (negative voltage) during the period during which the symbol Cs (“0”) is transmitted.

The comparator 35 binarizes the output signal Vo based on the constant threshold voltage Vth output from the processing unit 15, thereby generating and outputting the code identification signal Sf. In this example, as an example, the comparator 35 becomes a constant high potential (recessive) when the output signal Vo falls below the threshold voltage Vth, and a constant low potential (dominant) when the output signal Vo is equal to or higher than the threshold voltage Vth. The code identification signal Sf is generated and output.

In the signal generation unit 14 having the above configuration, as shown in FIG. 1, the probes PLa and PLb are correctly connected to the corresponding coated lead wires La and Lb, and the signal switching unit 33A is in the first output state (state shown by the solid line). ), The signal switching unit 33A connects the output terminal OUa to the input terminal INc of the differential amplification unit 34 with a signal corresponding to the voltage signal Va of the coated lead wire La (in this case, the first voltage signal Vc1). ) Is output, and a signal corresponding to the voltage signal Vb of the coated lead wire Lb (in this case, the second voltage signal Vc2) is output from the output terminal OUb to the input terminal INd of the differential amplification unit 34. In this case, as described above, the differential amplification unit 34 outputs the output signal Vo having the phase shown by the solid line in FIG. Therefore, the comparator 35 binarizes the output signal Vo with the threshold voltage Vth, so that the period during which the CAN frame code Cs (“1”) is transmitted to the communication path SB as shown in FIG. In, a correct code identification signal Sf that becomes a high potential side voltage (recessive) and becomes a low potential side voltage (dominant) during the period in which the code Cs (“0”) is transmitted is generated and output.

On the other hand, in the signal generation unit 14, the signal switching unit 33A is in the first output state (shown by a solid line) when the probe PLa is erroneously connected to the coated conductor Lb and the probe PLb is erroneously connected to the coated conductor La. In the state), the signal switching unit 33A outputs a signal (in this case, the first voltage signal Vc1) corresponding to the voltage signal Vb of the coated lead wire Lb from the output terminal OUa to the input terminal INc of the differential amplification unit 34. Then, a signal corresponding to the voltage signal Va of the coated lead wire La (in this case, the second voltage signal Vc2) is output from the output terminal OUb to the input terminal INd of the differential amplification unit 34. In this case, as described above, the differential amplification unit 34 outputs the output signal Vo having the phase indicated by the broken line in FIG. Therefore, the comparator 35 binarizes this output signal Vo with the threshold voltage Vth to generate and output an erroneous code identification signal Sf whose phase is inverted with respect to the above-mentioned correct code identification signal Sf. To do. Although not shown, this erroneous code identification signal Sf becomes a low potential side voltage (dominant) during the period in which the CAN frame code Cs (“1”) is transmitted to the communication path SB, and the code Cs (“1”). The code identification signal Sf that becomes a high potential side voltage (recessive) during the period when 0 ") is transmitted, that is, becomes a low potential (dominant) during the period that should originally become a high potential (recessive), and originally becomes a low potential. It is a code identification signal Sf that becomes high potential (recessive) during the period when it should be (dominant).

In the signal generation unit 14, when the probe PLa is erroneously connected to the coated conductor Lb and the probe PLb is erroneously connected to the coated conductor La, the signal switching unit 33A is in the first output state as described above. By switching from to the second output state, a signal corresponding to the voltage signal Va of the coated lead wire La (in this case, the second voltage signal Vc2) is output from the output terminal OUa to the input terminal INc of the differential amplification unit 34. Then, a signal corresponding to the voltage signal Va of the coated lead wire La (in this case, the first voltage signal Vc1) is output from the output terminal OUb to the input terminal INd of the differential amplification unit 34. Therefore, in this state, the differential amplification unit 34 outputs the output signal Vo of the phase shown by the solid line in FIG. 2, and the comparator 35 binarizes this output signal Vo with the threshold voltage Vth. A correct code identification signal Sf is generated and output.

As an example, the processing unit 15 is composed of an A / D converter, a D / A converter, a CPU, a memory (none of which are shown), and the like, and includes threshold output processing, communication state detection processing, switching processing, and display. Execute the process. In this configuration, the CPU executes the communication state detection process by software, but the commercially available CAN controller (the code Cs (“1” or “0”) for the CAN frame transmitted to the communication path SB is correct. It is also possible to adopt a configuration in which the communication state detection process is executed by using (a controller having at least a function of executing the process of specifying from the code specifying signal Sf).

In this case, in the threshold output processing, the processing unit 15 sets a voltage indicating a predetermined threshold voltage Vth in the D / A converter, for example, to set a voltage predetermined for the D / A converter. The value threshold voltage Vth is output. As described above, this threshold voltage Vth is used in the comparator 35 to binarize the output signal Vo, and this output signal Vo is used in the high voltage period as shown in FIG. It is an AC signal that becomes a positive voltage and becomes a negative voltage during a low voltage period. Further, since the high voltage and low voltage values of the output signal Vo change according to, for example, the degree of coupling between the core wires of the coated conductors La and Lb and the electrodes 22a and 22b, the output signal Vo is ensured. The threshold voltage Vth is defined as a constant voltage (a positive voltage or a negative voltage, but in this example, a positive voltage) in the vicinity of zero volt so that the threshold voltage Vth can be binarized. The operation unit 17 may be configured to output data indicating the threshold voltage Vth to the processing unit 15. According to this configuration, the user can change the threshold voltage Vth by operating the operation unit 17.

Further, in the communication state detection process, the processing unit 15 first inputs the code specifying signal Sf output from the signal generating unit 14, and samples the code specifying signal Sf with an A / D converter to obtain the code specifying signal Sf. It is converted into waveform data showing the instantaneous voltage value and stored. Next, the processing unit 15 measures the bit length of the logic signal Sa based on the stored waveform data. Subsequently, the processing unit 15 executes a connection determination process for determining whether or not each probe PLa, PLb is correctly connected to the corresponding coated lead wires La, Lb. Hereinafter, a specific example of this connection determination process will be described.

As described above, when the probes PLa and PLb are correctly connected to the coated lead wires La and Lb and the signal switching unit 33A is in the first output state, the signal generation unit 14 is connected to the communication path SB as shown in FIG. It becomes a high potential side voltage (recessive) during the period when the code Cs (“1”) constituting the CAN frame is transmitted, and the low potential side voltage (dominant) during the period when the code Cs (“0”) is transmitted. The correct code identification signal Sf is generated and output.

In EOF (End Of Frame), the CAN frame transmitted to the communication path SB is continuously recessive (a state in which the code Cs is "1") over a 7-bit length, and is continuously recessive even during the bus idle period. since the longest continuous period length T _SH period of the recessive always equal to or greater than 7 bits long. On the other hand, in the CAN frame, the longest continuous period length _TSL for the dominant period (the state where the sign Cs is "0") is from the SOF (Start Of Frame) where the dominant can be continuous to the end of the CRC sequence. In the range of, since the bit stuffing rule (the rule that the continuity of the same data is restricted to 5 bits at the maximum) is applied, the length is 5 bits at the maximum.

Therefore, even with the correct code identification signal Sf corresponding to this, the longest period of the high potential side voltage (recessive) corresponding to the recessive period of the CAN frame (the period during which the code Cs (“1”) is transmitted). The continuous period length _TSH is always 7 bits or more, and is the longest period of the low potential side voltage (dominant) corresponding to the dominant period of the CAN frame (the period during which the code Cs (“0”) is transmitted). The continuous period length T _SL has a maximum length of 5 bits. Processor 15, By utilizing this, the bit length of the measured logic signal Sa, the maximum continuous period length T _SH and the longest code specifying signal Sf based on the waveform data of the stored code specifying signal Sf The continuous period length T _SL is measured, and the measured longest continuous period length T _SH is compared with the longest continuous period length T _SL, and the longest continuous period length T _SH is longer than the longest continuous period length T _{SL (} When T _SH > T _SL ), the code identification signal Sf output from the signal generation unit 14 is the correct code identification signal Sf, and the probes PLa and PLb are correctly connected to the coated conductors La and Lb. To determine. On the other hand, the processing section 15, the maximum continuous period length _{T SH} longest shorter than the continuous period length _{T SL (T SH <T SL} ) Sometimes, the code specifying signal Sf which is output from the signal generator 14 is incorrect code It is a specific signal Sf, and it is determined that the probes PLa and PLb are erroneously connected to the coated conductors La and Lb.

Further, when the processing unit 15 determines in this connection determination process that the probes PLa and PLb are erroneously connected (not correctly connected) to the coated lead wires La and Lb, the processing unit 15 executes a switching process to signal. The switching state of the switching unit 33A is switched from the first output state in the initial state to the second output state. As a result, the processing unit 15 sets the input state of the pair of voltage signals Vc1 and Vc2 input to the input terminals INc and INd of the differential amplification unit 34 as the voltage signals Vd1 and Vd2 to the current input state (that is, that is). The input state (that is, the second voltage) opposite to the input state in which the first voltage signal Vc1 is input to the input terminal INc as the voltage signal Vd1 and the second voltage signal Vc2 is input to the input terminal INd as the voltage signal Vd2). The signal Vc2 is input to the input terminal INc as the voltage signal Vd1 and the first voltage signal Vc1 is input to the input terminal INd as the voltage signal Vd2). Output. Further, when the switching process is executed, the processing unit 15 acquires and stores the waveform data of the new code specifying signal Sf.

Further, in the communication state detection process, the processing unit 15 refers to the CAN frame transmitted to the communication path SB based on the measured bit length of the logic signal Sa and the waveform data of the acquired correct code identification signal Sf. The code Cs (“1” or “0”) of Further, the processing unit 15 detects various communication states (information indicating the communication state) for the CAN frame based on the specified code Cs. As an example, the processing unit 15 detects and stores the signal format, communication speed, load factor, number of errors, error rate, number of bits of received data, etc. as the communication state (information indicating the communication state). As described above, the correct code specifying signal Sf is a code specifying signal in a state in which the processing unit 15 can specify the code Cs for the CAN frame transmitted to the communication path SB based on the code specifying signal Sf. Sf. On the other hand, since the erroneous code identification signal Sf is a signal whose phase is inverted from that of the correct code identification signal Sf, the processing unit 15 sets the communication path SB based on the code identification signal Sf. This is a code identification signal Sf in a state in which the code Cs for the transmitted CAN frame cannot be specified.

In addition, the processing unit 15 finally executes a display process in the communication state detection process. In this display process, the processing unit 15 is instructed by the operation of the user's operation unit 17 among the information indicating the communication state such as the communication speed, the load factor, the number of errors, the error rate, and the number of bits of the received data. The information is displayed on the display unit 16. Further, the processing unit 15 updates the information displayed on the display unit 16 by repeatedly executing the communication state detection process at a predetermined cycle. The cycle for repeatedly executing the communication state detection process may be a predetermined fixed cycle (for example, about 1 second), or a cycle instructed by the operation of the user's operation unit 17. May be good.

As an example, the display unit 16 is composed of a display device such as an LCD and a display device such as a light emitting diode, and displays information indicating a communication state detected by the processing unit 15. The operation unit 17 is composed of an operable input device such as a numerical key for inputting the above-mentioned cycle and the like and a selection key for selecting information to be displayed. Further, the operation unit 17 outputs numerical data indicating the period and identification data indicating the selected information (information to be displayed) to the processing unit 15 by being operated by the user.

The power supply unit 18 is, for example, a battery and a converter that converts the DC voltage output from the battery into the DC voltage Vcc required for each component arranged in the checker body 2 and outputs the converter (neither is shown). ). The power supply unit 18 is not limited to this configuration. For example, instead of the battery, a configuration in which a power adapter (so-called AC adapter) is connected to the checker body 2 can be adopted, and the DC voltage generated by this power adapter can be supplied to the converter.

Next, the operation of the communication path checker 1A will be described.

First, as shown in FIG. 1, the probes PLa and PLb connected to the checker body 2 are connected to the covered conductors La and Lb constituting the communication path SB by the user.

Next, the user executes an operation on the operation unit 17 of the checker main body 2, and the operation unit 17 causes the processing unit 15 to display numerical data indicating the period and information to be displayed on the display unit 16 (information indicating the communication status). Is output with the identification data indicating.

In the signal generation unit 14 of the checker body 2, as shown in FIG. 1, the first detection unit 31 responds to the voltage Va for the covered lead wire La of the communication path SB connected via the input terminal unit 12 and the probe PLa. The first voltage signal Vc1 whose voltage changes is output, and the second detection unit 32 increases the voltage according to the voltage Vb of the covered lead wire Lb of the communication path SB connected via the input terminal unit 13 and the probe PLb. The changing second voltage signal Vc2 is output.

When the communication path checker 1A (checker body 2) is activated, the processing unit 15 outputs a control signal Scant for switching to the initial state (first output state) to the signal switching unit 33A. The signal switching unit 33A in the initial state (first output state) differs the first voltage signal Vc1 input to one input terminal INa from one output terminal OUa as a voltage signal Vd1 as indicated by the solid line arrow. The second voltage signal Vc2 that is output to the input terminal INc of the dynamic amplification unit 34 and is input to the other input terminal INb is output from the other output terminal OUb to the input terminal INd of the differential amplification unit 34 as a voltage signal Vd2. ..

As described above, when the probes PLa and PLb are correctly connected to the coated lead wires La and Lb and the signal switching unit 33A is in the first output state, the differential amplification unit 34 receives the voltage input to the input terminal INc. The signal Vd1 (the first voltage signal Vc1 corresponding to the voltage signal Va of the covered lead wire La) and the voltage signal Vd2 (the second voltage signal Vc2 corresponding to the voltage signal Vb of the covered lead wire Lb) input to the input terminal INd. Based on the above, the differential voltage (Vd1-Vd2) is output as the correct output signal Vo as shown by the solid line in FIG.

The comparator 35 binarizes this correct output signal Vo based on the threshold voltage Vth output from the processing unit 15 to generate a correct code identification signal Sf and outputs it to the processing unit 15.

The processing unit 15 executes the communication state detection process based on the correct code identification signal Sf. In this communication state detection process, the processing unit 15 first executes a connection determination process to determine whether or not each probe PLa, PLb is correctly connected to the corresponding covered lead wires La, Lb. In this case, since the correct code specifying signal Sf is input to the processing unit 15, the processing unit 15 sets the longest continuous period length _TSH for the code specifying signal Sf and the longest for the code specifying signal Sf. Continuous period length Measured as a time longer than _{T SL.} As a result, the processing unit 15 determines that the probes PLa and PLb are correctly connected to the coated conductors La and Lb. Further, the processing unit 15 determines that the execution of the switching process is unnecessary.

As a result, the processing unit 15 transmits the CAN frame to the communication path SB based on the bit length of the logic signal Sa and the waveform data of the acquired correct code identification signal Sf without executing the switching process. Specify the code Cs (“1” or “0”) for, and based on the specified code Cs, various communication states (signal format, communication speed, load factor, number of errors, error rate, reception) for the CAN frame. Information indicating the communication status such as the number of bits of data) is detected and stored.

Finally, the processing unit 15 is the user's information (detection result in the communication state detection process) indicating the communication state such as the above-mentioned communication speed, load factor, number of errors, error rate, and number of bits of received data. The information instructed by the operation on the operation unit 17 is displayed on the display unit 16. The processing unit 15 updates the information displayed on the display unit 16 by repeatedly executing this communication state detection process at a specified cycle (cycle specified by the operation of the user's operation unit 17). To do.

In this way, since the communication path checker 1A can check (detect) and display the communication status of the communication path SB by itself, the user of the communication path checker 1A can use a separate analysis device (analyzer). It is possible to check the communication status of the communication path SB only with the communication path checker 1A without preparing. Further, since the communication path checker 1A uses a pair of probes PLa and PLb in which electrodes 22a and 22b are arranged at free ends, different positions along the length direction of the communication path SB (each of them). The free ends of the probes PLa and PLb (that is, the electrodes 22a and 22b) can be attached to any position that is easy to attach. Further, according to the communication path checker 1A, since the electrodes 22a and 22b are capacitively coupled to the coated conducting wires La and Lb, it is possible to prevent troubles from occurring in the communication path SB.

On the other hand, when the probes PLa and PLb are not correctly connected to the coated conductors La and Lb (when the probe PLa is erroneously connected to the coated conductors Lb and the probe PLb is erroneously connected to the coated conductors La), the signal When the switching unit 33A is in the initial state (first output state), the differential amplification unit 34 receives the voltage signal Vd1 (first voltage signal Vc1 corresponding to the voltage signal Vb of the covered lead wire Lb) input to the input terminal INc. The difference voltage (Vd1-Vd2) is shown by a broken line in FIG. 2 based on the voltage signal Vd2 (second voltage signal Vc2 corresponding to the voltage signal Va of the coated lead wire La) input to the input terminal INd. It is output as an erroneous output signal Vo.

The comparator 35 binarizes this erroneous output signal Vo based on the threshold voltage Vth to generate an erroneous code identification signal Sf and outputs it to the processing unit 15.

The processing unit 15 executes the communication state detection process based on the erroneous code identification signal Sf. In this communication state detection process, the processing unit 15 first executes a connection determination process to determine whether or not each probe PLa, PLb is correctly connected to the corresponding covered lead wires La, Lb. In this case, since an erroneous code identification signal Sf (as described above, a code identification signal Sf whose phase is inverted with respect to the correct code identification signal Sf) is input to the processing unit 15, the processing unit 15 is input. Reference numeral 15 denotes the longest continuous period length T _SH of the code specifying signal Sf, which is measured as a time shorter than _{the longest continuous period length T SL of the code specifying signal Sf.} As a result, the processing unit 15 determines that the probes PLa and PLb are not correctly connected (misconnected) to the coated lead wires La and Lb. Further, the processing unit 15 determines that it is necessary to execute the switching process.

As a result, the processing unit 15 executes the switching process and outputs the control signal Scnt for switching the signal switching unit 33A from the initial state (first output state) to the second output state. As shown by the broken line in FIG. 1, the signal switching unit 33A switched to the second output state has a second voltage signal Vc2 (in this case, a covered lead wire) from the output terminal OUa to the input terminal INc of the differential amplification unit 34. A signal corresponding to the voltage signal Va of La) is output, and the first voltage signal Vc1 (in this case, the signal corresponding to the voltage signal Vb of the covered lead wire Lb) is output from the output terminal OUb to the input terminal INd of the differential amplification unit 34. ) Is output. That is, in the same manner as when the probes PLa and PLb are correctly connected to the coated conductors La and Lb, the voltage signal corresponding to the voltage signal Va of the coated conductors La is connected to the input terminal INc of the differential amplification unit 34. It is input as the signal Vd1, and the voltage signal corresponding to the voltage signal Vb of the coated lead wire Lb is input as the voltage signal Vd2 to the input terminal INd of the differential amplification unit 34. Therefore, the differential amplification unit 34 receives the voltage signal Vd1 input to the input terminal INc and the voltage signal Vd2 input to the input terminal INd after the signal switching unit 33A is switched to the second output state. Based on the above, the differential voltage (Vd1-Vd2) is output as the correct output signal Vo as shown by the solid line in FIG.

The comparator 35 binarizes this correct output signal Vo based on the threshold voltage Vth to generate a correct code identification signal Sf and outputs it to the processing unit 15.

Next, the processing unit 15 uses the code Cs (“1” or “1” or the code Cs (“1”” for the CAN frame transmitted to the communication path SB based on the bit length of the logic signal Sa and the waveform data for the acquired correct code identification signal Sf. “0”) is specified, and based on the specified code Cs, various communication states (signal format, communication speed, load factor, number of errors, error rate, number of bits of received data, etc.) for the CAN frame are determined. Information to be shown) is detected and stored.

Further, the processing unit 15 inputs the information instructed by the operation of the user to the operation unit 17 among the information indicating the communication state such as the communication speed, the load factor, the number of errors, the error rate, and the number of bits of the received data. , Displayed on the display unit 16. The processing unit 15 updates the information displayed on the display unit 16 by repeatedly executing this communication state detection process at a specified cycle (cycle specified by the operation of the user's operation unit 17). To do.

In this way, since the communication path checker 1A is provided with the signal switching unit 33A, the probes PLa and PLb are not correctly connected to the covered lead wires La and Lb, and the differential amplification unit 34 has an erroneous output signal Vo. Therefore, even if the comparator 35 also outputs an erroneous code identification signal Sf to the processing unit 15, the processing unit 15 changes the signal switching unit 33A from the first output state to the second output state. By switching, the differential amplification unit 34 can automatically switch to a state in which the correct output signal Vo is output, and the comparator 35 can automatically switch to a state in which the correct code identification signal Sf is output to the processing unit 15.

Therefore, in this communication path checker 1A, the comparator 35 can output the correct code identification signal Sf to the processing unit 15 even when the probes PLa and PLb are not correctly connected to the covered conductors La and Lb. Therefore, it is possible for the user to eliminate the work of reconnecting the probes PLa and PLb to the coated lead wires La and Lb. The communication path checker 1A adopts a configuration including a signal switching unit 33A, but the configuration is not limited to this configuration. For example, the signal switching unit 33A is omitted, the first voltage signal Vc1 is input to the input terminal INc of the differential amplification unit 34 as the voltage signal Vd1, and the second voltage signal Vc2 is used as the voltage signal Vd2 of the differential amplification unit 34. It is also possible to adopt a configuration in which input is made to the input terminal INd. In this configuration, when the processing unit 15 determines that the code identification signal Sf output from the signal generation unit 14 is an erroneous code identification signal Sf, the processing unit 15 connects the probes PLa and PLb to the covered conductors La and Lb. An instruction to replace the connection is displayed on the display unit 16. When the instruction to this effect is displayed, the user manually replaces the connections of the probes PLa and PLb to the coated conductors La and Lb.

Further, in the above-mentioned communication path checker 1A, the checker body 2 has input terminal units 12 and 13, signal generation unit 14, processing unit 15, display unit 16, operation unit 17, and power supply unit 18 arranged in one case 11. The probes PLa and PLb are configured independently of the checker body 2 and are connected to the input terminal portions 12 and 13 so as to be arranged outside the checker body 2. However, it is not limited to this configuration. For example, as in the communication path checker 1B shown in FIG. 3, a case is provided with electrodes 22a and 22b that are capacitively coupled to each core wire CR of each coated lead wire La and Lb composed of a core wire CR and an insulating coating CV covering the core wire CR. It is also possible to adopt a configuration in which the probes PLa and PLb are omitted by disposing the probe PLa and PLb. Hereinafter, the communication path checker 1B shown in FIG. 3 will be described with reference to FIGS. 3 and 4. The configurations in which the electrodes 22a and 22b are housed in the case 11 to omit the probes PLa and PLb and the configurations other than the shape of the case 11 are the same as those of the communication path checker 1A shown in FIG. The same reference numerals are given to the above, and duplicate description will be omitted.

As shown in FIG. 3, the communication path checker 1B as the communication path checker includes the checker body 2, and the communication path checker 1B alone is a communication path SB (covered lead wire La, Lb) to be checked. It is configured so that the communication status of the road) can be checked (detected) and displayed.

As shown in FIG. 3, the checker main body 2 includes a case 11, a signal generation unit 14, a processing unit 15, a display unit 16, an operation unit 17, and a power supply unit 18.

The outer shape of the case 11 is formed into a handy type (a compact type (shape) that can be held and used with one hand). As an example, as shown in FIG. 4, the case 11 is formed as a columnar body having a cylindrical shape, an elliptical column shape, or a polygonal column shape (square column shape, etc.) as a whole, and one end surface of the length direction W thereof. The portion 11b on the 11a side (right end surface side in the figure) is formed into a columnar body (a square column (rectangular parallelepiped) as an example in the figure) having a substantially uniform cross-sectional shape in a virtual plane orthogonal to the length direction W. The cross-sectional shape of the portion 11d on the other end face 11c side (left end face side in the figure) of the length direction W in the virtual plane orthogonal to the length direction W gradually decreases toward the other end face 11c (tapering). It is formed in a columnar body.

Further, the other end surface 11c of the case 11 functions as an abutting surface that is brought into contact with the coated lead wires La and Lb. Therefore, as shown in FIGS. 3 and 4, when the other end surface 11c is brought into contact with the coated conductors La and Lb, the positions of the coated conductors La and Lb are mutually positioned on the other end surface 11c. 2 concave grooves 11e, 11f (a part of the coating of the coated conductors La, Lb) so as to be constant (the distance between the contact portions of the coated conductors La, Lb with the other end surface 11c is constant). The concave grooves having a width and a depth that can be penetrated) are formed in parallel in a separated state.

Further, as an example, as shown in FIG. 3, the electrode 22a is arranged in the vicinity of the concave groove 11e in the case 11, and the electrode 22b is arranged in the vicinity of the concave groove 11f in the case 11. Further, the electrode 22a is connected to the first detection unit 31 in the signal generation unit 14, and the electrode 22b is connected to the second detection unit 32 in the signal generation unit 14. In this communication path checker 1B, the electrodes 22a and 22b are housed in the case 11 in this way and are connected to the first detection unit 31 and the second detection unit 32 in the signal generation unit 14, so that they are input terminals. It has a structure that does not have parts 12 and 13.

Next, the usage and operation of the communication path checker 1B will be described.

The user holds the checker body 2 with one hand, and while holding the coated conductors La and Lb with the other hand, fills the concave groove 11e of the concave grooves 11e and 11f formed on the other end surface 11c of the case 11. The other end face 11c is brought into contact with the coated conductors La and Lb so that the coated conductor La is fitted and the coated conductor Lb is fitted in the concave groove 11f. As a result, the electrode 22a corresponding to the coated lead wire La among the electrodes 22a and 22b is in a state of being close to the coated lead wire La and is capacitively coupled to the core wire CR of the coated lead wire La, so that the electrode 22b corresponding to the coated lead wire Lb is formed. , It becomes close to the coated lead wire Lb and is capacitively coupled to the core wire CR of the covered lead wire Lb.

As a result, in the communication path checker 1B, the signal generation unit 14, the processing unit 15, the display unit 16, the operation unit 17, and the power supply unit 18 operate in the same manner as the communication path checker 1A described above, and the communication speed, load factor, and so on. Among the information indicating the communication status such as the number of errors, the error rate, and the number of bits of received data, the information instructed by the operation on the operation unit 17 of the user is displayed on the display unit 16. Therefore, the communication path checker 1B can check (detect) and display the communication status of the communication path SB by the communication path checker 1B alone in the same manner as the communication path checker 1A described above, so that the communication path checker 1B can be displayed. The user can check the communication status of the communication path SB only with the communication path checker 1B without preparing a separate analyzer (analyzer). Further, since the communication path checker 1B does not require the probes PLa and PLb, the outer shape can be made compact and the trouble of connecting the probes PLa and PLb to the checker body 2 can be saved. Further, since the communication path checker 1B has a handy outer shape, it can be carried by the user in a pocket or the like (convenience can be enhanced). Further, also in this communication path checker 1B, since the electrodes 22a and 22b are capacitively coupled to the coated conducting wires La and Lb, it is possible to prevent troubles in the communication path SB.

Further, the communication path checkers 1A and 1B are provided with a pair of electrodes 22a and 22b, and adopt a configuration in which the electrodes 22a and 22b are capacitively coupled to the corresponding coated lead wires La and Lb at the same time. It is not limited to. For example, it is possible to adopt a configuration in which only one of the pair of electrodes 22a and 22b is provided and this one electrode is capacitively coupled to the coated conductive wire of either one of the coated conductive wires La and Lb.

Hereinafter, the communication path checker 1C adopting this configuration will be described with reference to FIG. The same configuration as that of the communication path checker 1A is designated by the same reference numerals, and duplicate description will be omitted. Further, although an example in which the electrode 22a is provided as one of the pair of electrodes 22a and 22b will be described, it is needless to say that the configuration may include the electrode 22b.

As shown in FIG. 5, the communication path checker 1C as the communication path checker includes one probe PLa on which the electrode 22a is arranged and the checker body 2, and the communication path checker 1C alone is a check target. It is configured so that the communication status of the communication path SB can be checked (detected) and displayed.

As shown in FIG. 5, the checker main body 2 includes a case 11, one input terminal unit 12, a signal generation unit 14, a processing unit 15, a display unit 16, an operation unit 17, and a power supply unit 18. Further, the signal generation unit 14 includes a first detection unit 31, a non-inverting amplifier 36, an inverting amplifier 37, a signal switching unit 33B, and a comparator 35.

In this case, the non-inverting amplifier 36 and the inverting amplifier 37 use an operational amplifier (op amp) or the like, respectively, from the first detection unit 31 to the first voltage signal Vc1 (hereinafter, the first voltage signal Vc1 is as shown in FIG. It is configured as an amplifier (for example, an AC amplifier) in which the input impedance of each input terminal to which a “voltage signal Vc” is input is extremely high. The non-inverting amplifier 36 outputs this voltage signal Vc to the signal switching unit 33B as a voltage signal Vd1 with the same phase without inverting its phase. On the other hand, the inverting amplifier 37 inverts the phase of this voltage signal Vc and outputs it as a voltage signal Vd2 to the signal switching unit 33B. The non-inverting amplifier 36 may be omitted when the voltage signal Vc may be output as the voltage signal Vd1 to the signal switching unit 33B as it is.

The signal switching unit 33B includes a pair of input terminals INa and INb, one output terminal OUa, and a signal switching circuit (not shown), and the signal switching circuit operates based on the control signal Scant from the processing unit 15. The first output state (output state indicated by the solid arrow) that outputs the voltage signal Vd1 input to one input terminal INa as an output signal Vo (non-differential output signal in this example) from the output terminal OUa, and It is configured to be switchable to a second output state (output state indicated by a broken arrow) in which the voltage signal Vd2 input to the other input terminal INb is output as an output signal Vo from the output terminal OUa. That is, the signal switching unit 33B can selectively switch which of the pair of voltage signals Vd1 and Vd2 is input to the comparator 35. Further, the signal switching unit 33B is assumed to be switched by the processing unit 15 to the first output state as the initial state at the time of starting the checker main body 2, for example.

Next, the operation of the communication path checker 1C will be described.

First, as shown in FIG. 5, the probe PLa connected to the checker body 2 corresponds to one of the covered conductors La and Lb constituting the communication path SB (in the figure, the electrode 22a is used as an example). It is connected to the coated lead wire La).

Next, the user executes an operation on the operation unit 17 of the checker main body 2, and the operation unit 17 causes the processing unit 15 to display numerical data indicating the period and information to be displayed on the display unit 16 (information indicating the communication status). Is output with the identification data indicating.

In the signal generation unit 14 of the checker body 2, as shown in FIG. 5, the first detection unit 31 responds to the voltage Va for the covered lead wire La of the communication path SB connected via the input terminal unit 12 and the probe PLa. Outputs a voltage signal Vc whose voltage changes. In this case, the voltage signal Vc is a voltage signal having the same phase as the first voltage signal Vc1 in FIG. The non-inverting amplifier 36 inputs a voltage signal Vc and outputs a voltage signal Vd1 having the same phase as this signal (a voltage signal having the same phase as the first voltage signal Vc1 in FIG. 2), and the inverting amplifier 37 outputs a voltage signal. Vc is input, and a voltage signal Vd2 whose phase is inverted with respect to this signal (a voltage signal having the same phase as the second voltage signal Vc2 in FIG. 2) is output.

When the communication path checker 1C (checker body 2) is activated, the processing unit 15 outputs a control signal Scant for switching to the initial state (first output state) to the signal switching unit 33B. The signal switching unit 33B in the initial state (first output state) outputs the voltage signal Vd1 input to one input terminal INa as an output signal Vo from the output terminal to the comparator 35 as indicated by the solid arrow. ..

As described above, when the probe PLa on which the electrode 22a is arranged is correctly connected to the corresponding coated lead wire La and the signal switching unit 33B is in the first output state, the comparator 35 is in the first output state as described above. An output signal Vo having the same phase as the first voltage signal Vc1 shown in FIG. 2 (that is, having the same phase as the output signal Vo shown by the solid line in FIG. 2) is output.

The comparator 35 binarizes this output signal Vo based on the threshold voltage Vth output from the processing unit 15 to generate a code identification signal Sf having the correct phase shown in FIG. 2, and causes the processing unit 15 to generate the signal Sf. Output.

The processing unit 15 executes the communication state detection process based on the correct code identification signal Sf. In this communication state detection process, the processing unit 15 first executes a connection determination process to determine whether or not the probe PLa is correctly connected to the corresponding covered lead wire La. In this case, since the correct code specifying signal Sf is input to the processing unit 15, the processing unit 15 sets the longest continuous period length _TSH for the code specifying signal Sf and the longest for the code specifying signal Sf. Continuous period length Measured as a time longer than _{T SL.} As a result, the processing unit 15 determines that the probe PLa is correctly connected to the coated lead wire La. Further, the processing unit 15 determines that the execution of the switching process is unnecessary.

Next, the processing unit 15 refers to the CAN frame transmitted to the communication path SB based on the bit length of the logic signal Sa and the waveform data of the acquired correct code identification signal Sf without executing the switching process. Specify the code Cs (“1” or “0”) of, and based on the specified code Cs, various communication states (signal format, communication speed, load factor, number of errors, error rate, received data) for the CAN frame. Information indicating the communication status such as the number of bits of) is detected and stored.

Finally, the processing unit 15 is the information instructed by the operation on the operation unit 17 of the user among the information indicating the communication state such as the communication speed, the load factor, the number of errors, the error rate, and the number of bits of the received data. Is displayed on the display unit 16. The processing unit 15 updates the information displayed on the display unit 16 by repeatedly executing this communication state detection process at a specified cycle (cycle specified by the operation of the user's operation unit 17). To do.

In this way, since the communication path checker 1C can check (detect) and display the communication status of the communication path SB by itself, the user of the communication path checker 1C can use a separate analysis device (analyzer). It is possible to check the communication status of the communication path SB only with the communication path checker 1C without preparing. Since the probe PLa in which the electrode 22a is arranged at the free end is used, the electrode 22a can be easily attached to a portion of the communication path SB having a small gap in the periphery.

On the other hand, when the probe PLa is not correctly connected to the coated lead wire La (when the probe PLa is erroneously connected to the coated lead wire Lb), the first detection unit 31 passes through the input terminal unit 12 and the probe PLa. A voltage signal Vc whose voltage changes according to the voltage Vb of the connected covered lead wire Lb is output. In this case, the voltage signal Vc is a voltage signal having the same phase as the second voltage signal Vc2 in FIG. The non-inverting amplifier 36 inputs a voltage signal Vc and outputs a voltage signal Vd1 having the same phase as this signal (a voltage signal having the same phase as the second voltage signal Vc2 in FIG. 2), and the inverting amplifier 37 outputs a voltage signal. Vc is input, and a voltage signal Vd2 (a voltage signal having the same phase as the first voltage signal Vc1 in FIG. 2) whose phase is inverted with respect to this signal is output.

As a result, the signal switching unit 33B in the initial state (first output state) outputs the voltage signal Vd1 as the output signal Vo to the comparator 35.

As described above, when the probe PLa on which the electrode 22a is arranged is erroneously connected to the coated conducting wire Lb different from the corresponding coated conducting wire La and the signal switching unit 33B is in the first output state, the comparator 35 is connected. Outputs an output signal Vo that has the same phase as the second voltage signal Vc2 shown in FIG. 2 (that is, has the same phase as the output signal Vo shown by the broken line in FIG. 2).

The comparator 35 binarizes this output signal Vo based on the threshold voltage Vth output from the processing unit 15, so that the phase is inverted with respect to the correct sign identification signal Sf shown in FIG. The code specifying signal Sf is generated and output to the processing unit 15.

The processing unit 15 executes the communication state detection process based on the erroneous code identification signal Sf. In this communication state detection process, the processing unit 15 first executes a connection determination process to determine whether or not the probe PLa is correctly connected to the corresponding covered lead wire La. In this case, since an erroneous code specifying signal Sf is input to the processing unit 15, the processing unit 15 sets the longest continuous period length _TSH for the code specifying signal Sf and the code specifying signal Sf. The longest continuous period is measured as a time shorter than _{T SL.} As a result, the processing unit 15 determines that the probe PLa is not correctly connected (misconnected) to the coated lead wire La. Further, the processing unit 15 determines that it is necessary to execute the switching process.

Therefore, the processing unit 15 executes the switching process and outputs the control signal Scnt for switching the signal switching unit 33B from the initial state (first output state) to the second output state. The signal switching unit 33B switched to the second output state outputs a voltage signal Vd2 (a voltage signal having the same phase as the first voltage signal Vc1 shown in FIG. 2) as an output signal Vo, as shown by a broken line in FIG. ..

The comparator 35 binarizes this output signal Vo based on the threshold voltage Vth output from the processing unit 15 to generate a code identification signal Sf having the correct phase shown in FIG. 2, and causes the processing unit 15 to generate the signal Sf. Output. As a result, the processing unit 15 executes the communication state detection process, and the CAN is transmitted to the communication path SB based on the bit length of the logic signal Sa and the waveform data of the acquired correct code identification signal Sf. Specify the code Cs (“1” or “0”) for the frame, and based on the specified code Cs, various communication states (signal format, communication speed, load factor, number of errors, error rate, etc.) for the CAN frame. Information indicating the communication status such as the number of bits of received data) is detected and stored. Further, the processing unit 15 uses the information indicating the communication state such as the communication speed, the load factor, the number of errors, the error rate, and the number of bits of the received data, which is instructed by the operation of the user for the operation unit 17. It is displayed on the display unit 16.

In this way, even when the probe PLa is erroneously connected to the coated lead wire Lb, the communication path checker 1C is a single communication path without the user reconnecting the probe PLa to the corresponding covered lead wire La. Since the communication status of the SB can be checked (detected) and displayed, the user of the communication path checker 1C can use only the communication path checker 1C without preparing a separate analyzer (analyzer). It is possible to check the communication status of. Further, also in this communication path checker 1C, since the electrode 22a is capacitively coupled to the coated lead wire La, it is possible to prevent a trouble from occurring in the communication path SB.

Further, the same change as the change for configuring the communication path checker 1B by omitting the probes PLa, PLb and the input terminal portions 12 and 13 from the communication path checker 1A is applied to the communication path checker 1C, and the communication path shown in FIG. 6 is applied. It can also be a checker 1D. The circuit configuration of the communication path checker 1D differs from the circuit configuration of the communication path checker 1C only in the configuration in which the probe PLa and the input terminal portion 12 are omitted, and the shape of the communication path checker 1D (the configuration of the case 11). Is different from the communication path checker 1B only in the configuration in which the concave groove formed on the other end surface 11c of the case 11 is one of the concave grooves 11e. Therefore, the same components as those of the communication path checkers 1B and 1C are designated by the same reference numerals, and duplicate explanations are omitted.

The user holds the checker body 2 with one hand and holds the coated conductors La and Lb with the other hand so that the coated conductors La are fitted into the concave grooves 11e formed on the other end surface 11c of the case 11. The other end face 11c is brought into contact with the coated lead wire La. As a result, the electrode 22a corresponding to the coated lead wire La is in a state of being close to the coated lead wire La and is capacitively coupled to the core wire CR of the coated lead wire La.

As a result, in the communication path checker 1D, the signal generation unit 14, the processing unit 15, the display unit 16, the operation unit 17, and the power supply unit 18 operate in the same manner as the communication path checker 1C described above, and the communication speed, the load factor, and the like. Among the information indicating the communication status such as the number of errors, the error rate, and the number of bits of received data, the information instructed by the operation on the operation unit 17 of the user is displayed on the display unit 16. Therefore, the communication path checker 1D can check (detect) and display the communication status of the communication path SB by the communication path checker 1D alone in the same manner as the communication path checker 1C described above, so that the communication path checker 1D can be displayed. The user can check the communication status of the communication path SB only with the communication path checker 1D without preparing a separate analyzer (analyzer). Further, since the probe PLa is not required in this communication path checker 1D, the outer shape can be made compact and the trouble of connecting the probe PLa to the checker main body 2 can be saved. Further, also in this communication path checker 1D, since the electrode 22a is capacitively coupled to the coated lead wire La, it is possible to prevent a trouble from occurring in the communication path SB.

Further, for each of the above communication path checkers 1A to 1D, information indicating the communication status such as the checked communication speed, load factor, number of errors, error rate, and number of bits of received data can be stored in the memory in the processing unit 15 or the information indicating the communication status. A storage unit (not shown) provided in the case 11 separately from the processing unit 15 stores the communication path checkers 1A to 1D in time series, that is, a configuration in which the communication path checkers 1A to 1D function as a data logger (measurement data recording device). It can also be adopted.

Further, as described above, the signal generation units 14 constituting the communication path checkers 1A to 1D finally generate and output the correct code identification signal Sf. Therefore, the code identification signal Sf so that an external (separate) analysis device (analyzer) can perform advanced analysis that cannot be checked by the communication path checkers 1A to 1D (specifically, the processing unit 15). Can be configured to include a signal conversion unit that converts the signal into a signal of a communication method that matches the input specifications of the analysis device and outputs the signal to the analysis device.

In this case, when this analysis device is used by being directly connected to the communication path SB to be analyzed, the input specifications of the analysis device are among the logic signals conforming to the various communication protocols (communication methods) described above. It matches the communication method of the logic signal transmitted to this communication path SB. Therefore, the above-mentioned signal conversion unit converts the input code identification signal Sf into a communication method signal of the logic signal Sa of the communication path SB to which the communication path checkers 1A to 1D are connected (connected by capacitive coupling). It is configured so that it can be output.

Further, regarding the signal conversion unit, the first configuration accommodated in the case (case 11 in the above example) accommodating the signal generation unit 14 and the processing unit 15, and the signal generation unit 14 and the processing unit 15 and the like are accommodated. A second configuration (in this case, also referred to as a second case for distinction) different from the case (case 11; hereinafter, also referred to as a first case 11 for distinction). Can adopt either the first case and the second case (the first case and the second case are connected by a cable).

Hereinafter, the communication path checker having the configuration including the signal conversion unit and the communication path checker using the two electrodes 22a and 22b will be described with reference to an example applied to the above communication path checker 1A, and one electrode 22a will be used. The communication path checker to be used will be described with reference to an example applied to the above communication path checker 1C.

First, an example applied to the communication path checker 1A will be described with reference to FIG.

As shown by the broken line in FIG. 1, the signal conversion unit 19 is housed in the case 11 and operates at the DC voltage Vcc output from the power supply unit 18. Further, the signal conversion unit 19 inputs the code identification signal Sf output from the processing unit 15 and converts it into a signal So of a predetermined communication method (communication method of an analysis device arranged outside). And output to the outside of the case 11. Specifically, on the wall surface of the case 11, an output connector CN (connector shown by a broken line in FIG. 1) connected to the analyzer via a connection cable (not shown) is arranged together with the input terminal portions 12 and 13. The signal conversion unit 19 outputs the signal So to the analyzer via the output connector CN and the connection cable connected to the output connector CN.

Further, the signal conversion unit 19 can be configured by, for example, a CAN controller or the like. Further, the processing unit 15 may adopt a configuration in which the code identification signal Sf input from the signal generation unit 14 is output to the signal conversion unit 19 as it is, but the erroneous code identification signal Sf is not output. It is preferable to adopt a configuration in which only the correct code specifying signal Sf is output to the signal conversion unit 19.

Further, FIG. 5 shows an example in which the configuration including the signal conversion unit 19 is applied to the communication path checker 1C. The signal conversion unit 19 and the output connector CN are shown by broken lines, and the configuration thereof is the same as the example applied to the communication path checker 1C, and thus the description thereof will be omitted.

In this way, in the communication path checkers 1A and 1C having the signal conversion unit 19, the code identification signal Sf generated by the signal generation unit 14 is converted into the signal So of the communication method by the external analysis device. Can be output. Therefore, according to the communication path checkers 1A and 1C, while detecting the communication state of the communication path SB by itself and displaying the detection result on the display unit 16, more advanced analysis is performed with respect to the external analysis device. Can be executed. Further, according to the communication path checkers 1A and 1C having the signal conversion unit 19 housed in the case 11, the signal conversion unit 19 is housed in a second case different from the first case 11 in which the signal generation unit 14 and the processing unit 15 are housed. The configuration of the entire communication path checker can be a simple configuration, unlike the configuration of the above.

Next, with reference to FIGS. 7 and 8 regarding the communication path checkers 1E and 1F having the configuration in which the signal conversion unit 19 is housed in the second case 41 different from the first case 11 in which the signal generation unit 14 and the processing unit 15 are housed. explain.

First, the communication path checker 1E will be described with reference to FIG. 7. The communication path checker 1E omits the signal conversion unit 19 shown by the broken line in FIG. 1 from the first case 11 and accommodates the signal conversion unit 19 in the second case 41, and the code identification signal Sf generated in the first case 11 Is supplied to the signal conversion unit 19 in the second case 41 via the connection cable CB (the signal conversion unit 19 inputs the code identification signal Sf from the first case 11 via the connection cable CB). ing. In this communication path checker 1E, the checker body 2 is the same as the checker body 2 shown in FIG. 1, and the signal conversion unit 19 is the same as the signal conversion unit 19 described above, so detailed description thereof will be omitted.

The second case 41 uses the same material as the first case 11, and is formed in a box body having a rectangular parallelepiped outer shape as in the first case 11. Further, the signal conversion unit 19 in the second case 41 operates at the DC voltage Vcc supplied from the power supply unit 18 on the first case 11 side via the connection cable CB.

Next, the communication path checker 1F will be described with reference to FIG. The communication path checker 1F omits the signal conversion unit 19 shown by the broken line in FIG. 5 from the first case 11 and accommodates the signal conversion unit 19 in the second case 41, and the code identification signal Sf generated in the first case 11 Is supplied to the signal conversion unit 19 in the second case 41 via the connection cable CB. In this communication path checker 1F, the checker body 2 is the same as the checker body 2 shown in FIG. 5, and the signal conversion unit 19 is the same as the signal conversion unit 19 described above, so detailed description thereof will be omitted. Further, since the supply configuration of the DC voltage Vcc to the second case 41 and the signal conversion unit 19 in the second case 41 is the same as that of the communication path checker 1E described above, detailed description thereof will be omitted. ..

Even with the communication path checkers 1E and 1F, the user (specifically, the checker body 2 of the communication path checkers 1E and 1F) detects the communication state of the communication path SB and displays the detection result on the display unit 16. , It is possible to have an external analysis device perform more advanced analysis.

Although not shown, the communication path checkers 1E and 1F adopt a configuration in which only the signal conversion unit 19 is housed in the second case 41, but the configuration is not limited to this configuration. For example, at least one of the display unit 16 and the operation unit 17 housed in the first case 11 may be omitted from the first case 11 and housed in the second case 41. Further, although not shown, a display unit equivalent to the display unit 16 arranged in the first case 11 is also arranged in the second case 41, and the display unit 16 is also arranged in the display unit on the second case 41 side. It is also possible to adopt a configuration in which information equivalent to the information displayed in is displayed.

1A, 1B, 1C, 1D, 1E, 1F Communication path checker 11 Case 14 Signal generation unit 15 Processing unit 16 Display unit 22a, 22b Electrodes La, Lb Covered conductor Sa Logic signal SB Communication path Sf Code identification signal Va, Vb Voltage (Voltage transmitted to the coated lead wire)
Vc1, Vc2 Voltage signal Vo Difference output signal

Claims (12)

The pair of electrodes that are connected to a pair of electrodes that are arranged in close proximity to each of the pair of coated conductors that make up a communication path through which a logic signal of a two-wire differential voltage system is transmitted, and that is capacitively coupled to the pair of electrodes. A pair of voltage signals whose voltage changes according to the voltage transmitted to each of the covered conductive wires of the above are generated, and a code corresponding to the logic signal can be specified based on the difference voltage of the pair of voltage signals. A signal generator that generates a signal for
Display and
The communication state detection process for specifying the code corresponding to the logic signal from the code specifying signal and detecting the communication state of the communication path based on the specified code, and the detection result in the communication state detection process are obtained. A communication path checker including a processing unit that executes display processing to be displayed on the display unit, the signal generation unit and the processing unit are housed in the same case, and the display unit is arranged in the case. .. The case is provided with a connector to which the base ends of a pair of probes whose free ends are attached to the pair of coated leads are connected.
The communication path checker according to claim 1, wherein the electrode is arranged at the free end portion of the pair of probes. The case is formed with a contact surface that is brought into contact with the pair of coated conductors.
The communication path checker according to claim 1, wherein the electrode is arranged in the case in the vicinity of a contact portion with the pair of coated conductive wires on the contact surface. The signal generation unit inputs the differential amplification unit that outputs the difference voltage based on the pair of voltage signals input to the pair of input terminals, and the pair of voltage signals to either of the pair of input terminals. Equipped with a signal switching unit that can selectively switch between
When the code specifying signal cannot specify the code corresponding to the logic signal, the processing unit reverses the input state of the pair of voltage signals to the pair of input terminals to the current input state. The communication path checker according to any one of claims 1 to 3, which executes a switching process for switching to the signal switching unit so as to be in the input state of. The one electrode is connected to one electrode arranged in a state close to one of the pair of coated conductors constituting the communication path through which the logic signal of the two-wire differential voltage system is transmitted. A code identification signal that can generate a voltage signal whose voltage changes according to the voltage transmitted to the one coated lead wire that is capacitively coupled to and can specify a code corresponding to the logic signal based on the voltage signal. And the signal generator that generates
Display and
The communication state detection process for specifying the code corresponding to the logic signal from the code specifying signal and detecting the communication state of the communication path based on the specified code, and the detection result in the communication state detection process are obtained. A communication path checker including a processing unit that executes display processing to be displayed on the display unit, the signal generation unit and the processing unit are housed in the same case, and the display unit is arranged in the case. .. The case is provided with a connector to which the base end of a probe whose free end is attached to the one covered lead wire is connected.
The communication path checker according to claim 5, wherein the electrode is arranged at the free end portion of the probe. The case is formed with a contact surface that is brought into contact with the one covered lead wire.
The communication path checker according to claim 5, wherein the electrode is arranged in the case in the vicinity of a contact portion with the one coated lead wire on the contact surface. The signal generation unit is a signal switching capable of switching between an inverting amplifier that inverts the phase of the voltage signal and outputs it as an inverting voltage signal, and which of the voltage signal and the inverting voltage signal is input. With a department,
When the code specifying signal cannot specify the code corresponding to the logic signal, the processing unit uses one of the voltage signal and the inverted voltage signal to the signal switching unit. The communication path checker according to any one of claims 5 to 7, wherein a switching process for switching to the other voltage signal is executed. The communication path checker according to any one of claims 1 to 8, wherein the case has a handy outer shape. The communication path checker according to any one of claims 1 to 9, further comprising a signal conversion unit that converts the code specifying signal into a signal of a communication method specified in advance and outputs the signal to the outside of the case. The pair of electrodes that are connected to a pair of electrodes that are arranged in close proximity to each of the pair of coated conductors that make up a communication path through which a logic signal of a two-wire differential voltage system is transmitted, and that is capacitively coupled to the pair of electrodes. A pair of voltage signals whose voltage changes according to the voltage transmitted to each of the covered conductive wires of the above are generated, and a code corresponding to the logic signal can be specified based on the difference voltage of the pair of voltage signals. A signal generator that generates a signal for
Display and
The communication state detection process for specifying the code corresponding to the logic signal from the code specifying signal and detecting the communication state of the communication path based on the specified code, and the detection result in the communication state detection process are obtained. A processing unit that executes display processing to be displayed on the display unit, and
It is provided with a signal conversion unit that converts the code identification signal into a signal of a predetermined communication method and outputs the signal.
The signal generation unit and the processing unit are housed in the first case.
The signal conversion unit is housed in a second case connected to the first case via a connection cable, and inputs the code identification signal via the connection cable.
The display unit is a communication path checker arranged in at least one of the first case and the second case. The one electrode is connected to one electrode arranged in a state close to one of the pair of coated conductors constituting the communication path through which the logic signal of the two-wire differential voltage system is transmitted. A code identification signal that can generate a voltage signal whose voltage changes according to the voltage transmitted to the one coated lead wire that is capacitively coupled to and can specify a code corresponding to the logic signal based on the voltage signal. And the signal generator that generates
Display and
The communication state detection process for specifying the code corresponding to the logic signal from the code specifying signal and detecting the communication state of the communication path based on the specified code, and the detection result in the communication state detection process are obtained. A processing unit that executes display processing to be displayed on the display unit, and
It is provided with a signal conversion unit that converts the code identification signal into a signal of a predetermined communication method and outputs the signal.
The signal generation unit and the processing unit are housed in the first case.
The signal conversion unit is housed in a second case connected to the first case via a connection cable, and inputs the code identification signal via the connection cable.
The display unit is a communication path checker arranged in at least one of the first case and the second case.

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