JP2019066896A - Semiconductor device - Google Patents

Abstract

To provide a display device capable of compensating for variations in threshold voltage of a transistor and suppressing for variations in brightness, and a driving method using the same.SOLUTION: Current is supplied to a light-emitting element to cause the light-emitting element to emit light by holding an initial voltage in a holding capacitor in a first period, holding in the holding capacitor in a second period a voltage based on a video signal voltage and a threshold voltage of a transistor, and by applying to a gate electrode of the transistor in a third period the voltage held in the holding capacitor in the second period. This operation process can supply the light-emitting element with current obtained by compensating for the influence of variations in the threshold voltage of the transistor, thereby brightness variations being suppressed.SELECTED DRAWING: Figure 3

Description

The present invention relates to a structure of a display device having a transistor and a driving method thereof. In particular, the present invention relates to a configuration of an active matrix display device having a thin film transistor and a driving method thereof. The present invention also relates to an electronic device using such a display device as a display portion.

2. Description of the Related Art In recent years, a so-called self-light emitting display device in which pixels are formed by light emitting elements such as light emitting diodes (LEDs) attracts attention. As a light emitting element used for such a self light emitting display device, an organic light emitting diode (OLED (Organic Light Emitting
Diode, organic EL element, electro luminescence (Electro Lumi)
(also referred to as “nescence” (EL) elements) have attracted attention and are now used for EL displays and the like. Since light emitting elements such as OLEDs are self-luminous,
As compared with the liquid crystal display, there is an advantage that the visibility of the pixel is high, the back light is unnecessary and the response speed is fast. Further, the luminance of the light emitting element is controlled by the current value flowing therethrough.

Further, in recent years, development of an active matrix display device in which a light emitting element and a transistor for controlling light emission of the light emitting element are provided for each pixel has been advanced. Active matrix display devices not only enable high-resolution and large-screen displays, which is difficult with passive matrix display devices, but also realize low power consumption operation over passive matrix display devices, and have high reliability. And is expected to be put to practical use.

As a method of driving a pixel in an active matrix display device, a voltage input method and a current input method can be mentioned according to the type of signal input to the pixel. The former voltage input method is a method in which a video signal (voltage) input to a pixel is input to a gate electrode of a driving element, and the luminance of the light emitting element is controlled using the driving element. In the latter current input method, the luminance of the light emitting element is controlled by supplying a set signal current to the light emitting element.

Here, an example of a pixel configuration in a display device to which a voltage input method is applied and a driving method thereof are briefly described with reference to FIG. An EL display device will be described as an example of a typical display device.

FIG. 67 is a diagram illustrating an example of a pixel configuration in a display device to which a voltage input method is applied (see Patent Document 1). The pixel illustrated in FIG. 67 includes a driver transistor 6701, a switching transistor 6702, a storage capacitor 6703, a signal line 6704, a scan line 6705, first and second power supply lines 6706 and 6707, and a light emitting element 6708.

In the present specification, the fact that the transistor is on means that the gate of the transistor
When the voltage between the source exceeds its threshold voltage and current flows between the source and drain, and the transistor is off, the voltage between the gate and source of the transistor falls below the threshold voltage, and the source and drain And the current does not flow between them.

When the potential of the scan line 6705 changes and the switching transistor 6702 is turned on, the video signal input to the signal line 6704 is input to the gate electrode of the driving transistor 6701. The voltage between the gate and the source of the driving transistor 6701 is determined in accordance with the potential of the input video signal, and the current flowing between the source and the drain of the driving transistor 6701 is determined. This current is supplied to the light emitting element 6708, and the light emitting element 6708
Emits light.

Thus, in the voltage input method, the gate of the driving transistor is set by the potential of the video signal.
This method is a method in which the voltage between the source and the current flowing between the source and the drain are set, and the light emitting element is made to emit light with a luminance according to this current.

As a semiconductor element for driving a light emitting element, a polysilicon (p-Si) transistor is used. However, in polysilicon transistors, variations in electrical characteristics such as threshold voltage, on current, mobility, and the like are likely to occur due to defects at grain boundaries. In the pixel shown in FIG. 67, when the characteristics of the driving transistor 6701 vary from pixel to pixel, even when the same video signal is input, the magnitude of the drain current of the driving transistor 6701 varies accordingly. The brightness of the 6708 will vary.

Further, in the conventional pixel circuit (FIG. 67), the storage capacitor is connected between the gate and the source of the driving transistor, but when this storage capacitor is formed of a MOS transistor, the voltage between the gate and the source of the MOS transistor Becomes substantially equal to the threshold voltage of the MOS transistor, the channel region is not induced in the MOS transistor, and the MOS transistor does not function as a storage capacitor. As a result, the video signal can not be held properly.

JP 2001-147659 A

As described above, in the conventional voltage input method, variations in luminance occur due to variations in the electrical characteristics of the transistors.

In view of such problems, it is an object of the present invention to provide a semiconductor device, a display device, and a driving method thereof that can compensate for variations in threshold voltage of transistors and can reduce variations in luminance. .

Note that not only semiconductor devices having light emitting elements and display devices are intended, but it is an object of the present invention to suppress variations in drain current due to variations in threshold voltage of transistors. Therefore, the supply destination of the drain current of the driving transistor is not limited to the light emitting element. Hereinafter, the source to which the drain current is supplied is also generically referred to as a load.

The present invention is a semiconductor device having a pixel, in which at least a signal line to which a video signal is applied, a capacitor line, and a first electrode are electrically connected to the signal line, and a second electrode A second transistor having a function as a switch which selects whether or not the first transistor electrically connected to the load is electrically connected to the second electrode of the first transistor and the gate electrode And a storage capacitor having a first electrode electrically connected to the gate electrode of the first transistor and a second electrode electrically connected to the capacitance line, and the first electrode of the storage capacitor and The voltage flows to the load by the potential obtained by adding or subtracting the absolute value of the threshold voltage of the first transistor from the video signal voltage applied to the gate electrode of the first transistor and the potential of the first electrode of the first transistor The amount of current is determined A wherein a is.

The present invention is a semiconductor device having a pixel, in which at least a signal line, a capacitor line, and a first electrode are electrically connected to the signal line, and a second electrode is electrically connected to a load. Connected first
, A second transistor having a function as a switch for selecting whether to electrically connect the second electrode of the first transistor and the gate electrode, and the first transistor is a first transistor. A storage capacitor electrically connected to the gate electrode of the second transistor and the second electrode electrically connected to the capacitor line, and based on the video signal voltage applied to the signal line and the threshold voltage of the first transistor The semiconductor device is characterized in that the storage voltage is held by the storage capacitor, and the current set in the first transistor according to the voltage is supplied to the load.

The present invention is a semiconductor device having a pixel, and the pixel includes a signal line, a capacitor line, and a power supply line.
A first transistor having a function of supplying current to a load, a second transistor having a function of a switch electrically connecting a first electrode of the first transistor to the signal line, and a first transistor Whether or not to electrically connect the third electrode having the function of a switch electrically connecting the first electrode of the first transistor to the power supply line, and the second electrode of the first transistor and the gate electrode; A fourth transistor having a function as a switch to be selected, a fifth transistor having a function as a switch electrically connecting the second electrode of the first transistor to the load, and the first electrode A storage capacitor electrically connected to the gate electrode of the first transistor and the second electrode electrically connected to the capacitor line, and the video signal voltage applied to the signal line and the first gate A voltage based on the threshold voltage of Njisuta is held in the storage capacitor, a semiconductor device and supplying the current set to the first transistor in accordance with the voltage to a load from the power source line.

The present invention is a semiconductor device having a pixel, and the pixel includes a signal line, a capacitor line, and a power supply line.
A first transistor having a function of supplying current to a load, a second transistor having a function of a switch electrically connecting a first electrode of the first transistor to the signal line, and a first transistor Whether or not to electrically connect the third electrode having the function of a switch electrically connecting the first electrode of the first transistor to the power supply line, and the second electrode of the first transistor and the gate electrode; A fourth transistor having a function as a switch to be selected, a storage capacitor having a first electrode electrically connected to the gate electrode of the first transistor and a second electrode electrically connected to the capacitor line; And a voltage based on the video signal voltage applied to the signal line and the threshold voltage of the first transistor is held in the storage capacitor, and the current set to the first transistor according to the voltage A semiconductor device which is characterized in that the power source line is supplied to the load.

Note that in the semiconductor device of the present invention, the pixel may further include a sixth transistor, and an initial potential may be applied to the second electrode of the first transistor through the sixth transistor.

Note that in the semiconductor device of the present invention, the second electrode of the first transistor may be electrically connected to the wiring of the pixel through the sixth transistor.

Note that in the semiconductor device of the present invention, the pixel may further include an initialization line electrically connected to the second electrode of the first transistor through the sixth transistor.

Note that in the semiconductor device of the present invention, other wirings included in the pixel may be used for the capacitor line.

Note that in the semiconductor device of the present invention, among the values of the ratio W / L of the channel length L and the channel width W of each transistor included in the pixel, the value of W / L of the first transistor is the largest. It is desirable to have one.

Note that in the semiconductor device of the present invention, the second transistor and the third transistor are
The conductive types may be different from each other.

Note that in the semiconductor device of the present invention, the pixel may further include a plurality of scan lines, and gate electrodes of at least two transistors included in the pixel may be electrically connected to the same scan line.

Note that in the semiconductor device of the present invention, each of the gate electrodes of the plurality of transistors in the pixel further including the plurality of scan lines may be electrically connected to different scan lines.

Note that in the semiconductor device of the present invention, the fourth transistor may be an n-channel transistor.

The present invention relates to a first transistor in which a signal line, a capacitance line, a power supply line, and a first electrode are electrically connected to the signal line, and a second electrode is electrically connected to a load, Second of transistor 1
A second transistor having a function as a switch for selecting whether or not to electrically connect the gate electrode with the first electrode, and the first electrode is electrically connected to the gate electrode of the first transistor; The second electrode has a pixel including a storage capacitor electrically connected to a capacitance line, and the storage capacitor holds a predetermined initial voltage by supplying a current to a load, and then the second transistor is turned on. In the state, a voltage based on the video signal voltage supplied from the signal line and the threshold voltage of the first transistor is held in the storage capacitor, and a voltage based on the voltage is applied to the gate electrode of the first transistor, A current is supplied to a load from a power supply line through a first transistor.

The present invention relates to a first transistor in which a signal line, a capacitance line, a power supply line, and a first electrode are electrically connected to the signal line, and a second electrode is electrically connected to a load, Second of transistor 1
And a switch for applying an initial potential to the second electrode of the first transistor. The second transistor has a function as a switch for selecting whether or not to electrically connect the gate electrode to the gate electrode. There is a pixel including a third transistor having a function and a storage capacitor in which a first electrode is electrically connected to a gate electrode of the first transistor and a second electrode is electrically connected to a capacitor line. The third transistor is turned on to apply an initial potential to the second electrode of the first transistor, and then the second transistor is turned on to supply a video signal to the storage capacitor from the signal line. Holding a voltage based on the voltage and the threshold voltage of the first transistor, and applying a voltage based on the voltage to the gate electrode of the first transistor,
A current is supplied to a load from a power supply line through a first transistor.

In the driving method of the present invention, an initialization line electrically connected to the second electrode of the first transistor through the third transistor is further provided, and an initial potential is supplied from the initialization line. May be

Note that in the driving method of the present invention, the power supply line is maintained between the period in which the storage capacitance is held based on the video signal voltage supplied from the signal line and the threshold voltage of the first transistor and the period other than the period. The applied voltage may be different.

Further, in the above configuration, the load may be a light emitting element.

Note that in the transistor, it is difficult to distinguish between the source and the drain. Furthermore, depending on the operation of the circuit, the potential level may be switched. Therefore, in the present specification,
The source and drain are not particularly specified, and are described as a first electrode and a second electrode. For example, in the case where the first electrode is a source, the second electrode refers to the drain, and conversely, in the case where the first electrode is a drain, the second electrode refers to the source. .

Note that in this document (specification, claims, drawings, and the like), one pixel represents one color element. Therefore, in the case of a color display device consisting of R (red) G (green) B (blue) color elements, the minimum unit of the image is composed of three R pixels, G pixels and B pixels. Shall be The color elements are not limited to three colors, and may use more than three colors, or may use colors other than RGB. For example, white (W) may be added to make RGBW. Also, RGB may have one or more colors such as yellow, cyan and magenta added. Also, similar colors may be added, for example, for at least one of RGB. For example, R, G, B1 and B2 may be used. Although B1 and B2 are both blue, they have different wavelengths. By using such a color element, it is possible to perform display closer to the real thing and to realize reduction of power consumption. Note that brightness may be controlled using a plurality of regions for one color element. In this case, one color element is one pixel, and each region for controlling the brightness is a sub-pixel. Therefore, for example, in the case of performing the area gray scale method, there are a plurality of areas for controlling the brightness for one color element, and the gradation is expressed by the whole, but each area for controlling the brightness is Let it be a pixel. Therefore, in this case, one color element is composed of a plurality of sub-pixels. In that case, the size of the area contributing to the display may differ depending on the sub-pixel. In addition, in a plurality of brightness control areas for one color element, that is, in a plurality of sub-pixels constituting one color element, the viewing angles are made to be slightly different from each other by supplying different signals. It may be expanded.

Note that in this document (specification, claims, drawings, and the like), pixels include a case where they are arranged (arranged) in matrix. Here, that the pixels are arranged (arranged) in a matrix includes the case where the pixels are arranged linearly in the vertical direction or the horizontal direction, or the case where they are arranged in a jagged line. Thus, for example, three color elements (
For example, in the case of performing full-color display in RGB), the case where stripes are arranged, and the case where dots of three color elements are so-called delta arrangement are also included. Furthermore, it includes the case of Bayer arrangement. The size of the display area may be different for each dot of the color element. Accordingly, power consumption can be reduced or the lifetime of the display element can be lengthened.

Note that a light-emitting element in this document (specification, claims, drawings, and the like) refers to an element whose emission luminance can be controlled by the value of current flowing in the element. Typically E
An L element can be applied. In addition, an organic EL element may be sufficient as EL element, and inorganic EL
It may be an element. Besides the EL element, for example, a field emission display (FE
Element used in D), SED (Surface-conduction) which is a kind of FED
A light emitting element such as an electron-emitter display can be applied.

Note that various types of transistors can be used as the transistors described in this document (specification, claims, drawings, and the like). Thus, the type of transistor used is not limited. For example, a thin film transistor (TFT) having a non-single-crystal semiconductor film typified by amorphous silicon, polycrystalline silicon, microcrystalline (also referred to as microcrystalline or semi-amorphous) silicon, or the like can be used. There are various advantages when using a TFT. For example, since manufacturing can be performed at a lower temperature than in the case of single crystal silicon, manufacturing cost can be reduced or the manufacturing apparatus can be enlarged. Since the manufacturing apparatus can be enlarged, it can be manufactured on a large substrate. Therefore, a large number of display devices can be manufactured at the same time, so manufacturing can be performed at low cost. Furthermore, since the manufacturing temperature is low, a substrate with low heat resistance can be used. Therefore, the transistor can be manufactured on a transparent substrate. Then, transmission of light in the display element can be controlled by using a transistor on a transparent substrate. Alternatively, since the thickness of the transistor is thin, part of a film included in the transistor can transmit light. Therefore, the aperture ratio can be improved.

Note that by using a catalyst (such as nickel) when polycrystalline silicon is manufactured, crystallinity can be further improved, and a transistor with excellent electric characteristics can be manufactured. As a result, gate driver circuits (scanning line driving circuits) and source driver circuits (signal line driving circuits)
And a signal processing circuit (a signal generation circuit, a gamma correction circuit, a DA conversion circuit, etc.) can be integrally formed on the substrate.

Note that by using a catalyst (eg, nickel) when microcrystalline silicon is manufactured, crystallinity can be further improved, and a transistor with excellent electric characteristics can be manufactured. At this time, crystallinity can be improved only by heat treatment without using a laser. As a result, the gate driver circuit (scanning line driver circuit) and part of the source driver circuit (such as an analog switch) can be integrally formed on the substrate. Furthermore, in the case where a laser is not used for crystallization, unevenness in crystallinity of silicon can be suppressed. Therefore, a beautiful image can be displayed.

However, polycrystalline silicon or microcrystalline silicon can be manufactured without using a catalyst (such as nickel).

Alternatively, the transistor can be formed using a semiconductor substrate, an SOI substrate, or the like. Accordingly, it is possible to manufacture a transistor with a small size, a high variation in current supply capability, and a small variation in characteristics, size, and shape. When these transistors are used, power consumption of the circuit can be reduced or integration of the circuit can be increased.

Alternatively, a transistor including a compound semiconductor or oxide semiconductor such as ZnO, a-InGaZnO, SiGe, GaAs, IZO, ITO, or SnO, or a thin film transistor in which the compound semiconductor or oxide semiconductor is thinned can be used. It can. By these, the manufacturing temperature can be lowered and, for example, the transistor can be manufactured at room temperature. As a result, the transistor can be formed directly on a substrate with low heat resistance, such as a plastic substrate or a film substrate. In addition, these compound semiconductors or oxide semiconductors are
As well as being used for the channel portion of the transistor, it can also be used for other applications. For example, these compound semiconductors or oxide semiconductors can be used as a resistor, a pixel electrode, and a transparent electrode. Furthermore, since they can be deposited or formed at the same time as transistors, cost can be reduced.

Alternatively, a transistor or the like formed using an inkjet method or a printing method can be used. They can be manufactured at room temperature, manufactured at low vacuum, or manufactured on a large substrate. In addition, since the transistor can be manufactured without using a mask (reticle), the layout of the transistor can be easily changed. Furthermore, since it is not necessary to use a resist, the material cost can be reduced and the number of processes can be reduced. Furthermore, since the film is applied only to the necessary portions, the material is not wasted and the cost can be reduced compared to the manufacturing method in which the film is formed on the entire surface and then etched.

Alternatively, a transistor or the like including an organic semiconductor or a carbon nanotube can be used. Thus, the transistor can be formed over a bendable substrate.
Therefore, it can withstand shocks.

Furthermore, transistors with various structures can be used. For example, a MOS transistor, a junction transistor, a bipolar transistor, or the like can be used as the transistor described in this document (specification, claims, drawings, and the like). By using a MOS transistor, the size of the transistor can be reduced. Therefore,
A large number of transistors can be mounted. By using a bipolar transistor, a large current can flow. Thus, the circuit can be operated at high speed.

Note that MOS transistors, bipolar transistors, and the like may be mixed on one substrate. Thus, low power consumption, miniaturization, high speed operation, and the like can be realized.

Other various transistors can be used.

Note that various types of substrates can be used as a substrate on which the transistor is formed, and the type is not limited to a specific type. As a substrate on which a transistor is formed, for example, a single crystal substrate, an SOI substrate, a glass substrate, a quartz substrate, a plastic substrate, a paper substrate, a cellophane substrate, a stone substrate, a wood substrate, a cloth substrate (natural fibers (silk, cotton, hemp ) Synthetic fibers (nylon, polyurethane, polyester) or regenerated fibers (acetate, cupra, rayon, regenerated polyester, etc.), leather substrates, rubber substrates, stainless steel substrates, substrates with stainless steel foils, etc. It can be used. Alternatively, the skin (skin, dermis) or subcutaneous tissue of animals such as humans may be used as a substrate. Alternatively, a transistor may be formed on one substrate, and then transposed on another substrate, and the transistor may be placed on another substrate. As a substrate on which the transistor is transposed, a single crystal substrate, an SOI substrate,
Glass substrate, quartz substrate, plastic substrate, paper substrate, cellophane substrate, stone substrate, wood substrate, cloth substrate (natural fiber (silk, cotton, hemp), synthetic fiber (nylon, polyurethane, polyester) or regenerated fiber (acetate, And the like), leather substrates, rubber substrates, stainless steel substrates, substrates having stainless steel foils, and the like. Alternatively, the skin (skin, dermis) or subcutaneous tissue of animals such as humans may be used as a substrate. Alternatively, a transistor may be formed over a certain substrate, and the substrate may be polished and thinned. Substrates to be polished include single crystal substrates, SOI substrates, glass substrates, quartz substrates, plastic substrates, paper substrates, cellophane substrates, stone substrates, wood substrates, cloth substrates (natural fibers (silk, cotton, hemp), synthetic Use of fibers (nylon, polyurethane, polyester) or regenerated fibers (acetate, cupra, rayon, regenerated polyester, etc.), leather substrates, rubber substrates, stainless steel substrates, substrates with stainless steel foils, etc. it can. Alternatively, the skin (skin, dermis) or subcutaneous tissue of animals such as humans may be used as a substrate. By using these substrates, formation of a transistor with good characteristics, formation of a transistor with low power consumption, manufacture of a device that is not easily broken, provision of heat resistance, weight reduction, or thickness reduction can be achieved.

Note that in this document (specification, claims, drawings, and the like), being connected is synonymous with being electrically connected. Therefore, in the configuration disclosed in the present invention, in addition to the predetermined connection relationship, another element (for example, another element, a switch, or the like) that enables electrical connection therebetween may be disposed.

Note that various types of switches can be used as a switch shown in this document (specification, claims, drawings, and the like), and examples thereof include an electrical switch and a mechanical switch. That is, as long as it can control the flow of current, it is not limited to a specific one, and various ones can be used. For example, a transistor or a diode (eg, P
It may be an N diode, a PIN diode, a Schottky diode, a diode-connected transistor, or the like, a thyristor, or a logic circuit combining them. Therefore, in the case of using a transistor as a switch, the transistor operates as a simple switch, and thus the polarity (conductivity type) of the transistor is not particularly limited. However,
When it is desirable that the off current be small, it is desirable to use a transistor of the polarity having the smaller off current. As a transistor with a small off current, there is one having an LDD region, one having a multi-gate structure, and the like. If the source terminal of the transistor operated as a switch operates close to the low-potential power supply (VSS, GND, 0 V, etc.), then the N-channel type operates; When operating in a state close to a side power supply (such as VDD), it is desirable to use a P-channel type. Because the absolute value of the gate-source voltage can be increased, it is easy to function as a switch.
Note that a CMOS switch may be used by using both an n-channel type and a p-channel type. In the case of a CMOS type switch, when either a P-channel type switch or an N-channel type switch can conduct current, it can easily function as a switch. For example,
Even if the voltage of the input signal to the switch is high or low, the voltage can be output properly. In addition, since the voltage amplitude value of the signal for turning on / off the switch can be reduced, power consumption can also be reduced.

Note that in this document (specification, claims, drawings, etc.), it is formed on a certain object or is formed on-, or on-or- The description above is not limited to direct contact with an object. It also includes the case where they are not in direct contact with each other, that is, there is another thing in between. Thus, for example, when layer B is formed on layer A (or on layer A), layer B is formed directly on layer A, and layer B is formed on layer A. Directly in contact with another layer (eg, layer C)
And layer D), and the layer B is formed on and in direct contact therewith. In addition, the same applies to the description above, and the present invention is not limited to direct contact on an object, and includes cases in which another object is sandwiched. Thus, for example, in the case where the layer B is formed above the layer A, the case where the layer B is formed directly on the layer A, and another layer directly on the layer A This includes the case where (for example, layer C, layer D, etc.) is formed, and layer B is formed on and in direct contact with it. In addition, the same applies to the case of below or at the case of below, and includes cases of direct contact and cases of non-contact.

According to the present invention, variation in current value due to variation in threshold voltage of a transistor can be suppressed. Therefore, a desired current can be supplied to the load including the light emitting element. In particular, in the case of using a light-emitting element as a load, in the display device of the present invention, variations in threshold voltage of the transistor can be compensated, so that the current flowing through the light-emitting element is determined independently of the threshold voltage of the transistor. Thereby, the variation in luminance of the light emitting element can be reduced, and the image quality of the display device can be improved.

FIG. 5 is a diagram showing an example of a basic configuration of a pixel in a display device of the present invention. FIG. 5 is a diagram showing an example of a basic configuration of a pixel in a display device of the present invention. FIG. 6 shows an example of a pixel configuration in a display device of the present invention. 5A to 5C illustrate timing charts of pixel circuits in a display device of the present invention. 5A to 5C illustrate an operation of a pixel circuit in a display device of the present invention. 5A to 5C illustrate an operation of a pixel circuit in a display device of the present invention. 5A to 5C illustrate an operation of a pixel circuit in a display device of the present invention. FIG. 6 shows an example of a pixel configuration in a display device of the present invention. 5A to 5C illustrate timing charts of pixel circuits in a display device of the present invention. FIG. 6 shows an example of a pixel configuration in a display device of the present invention. FIG. 6 shows an example of a pixel configuration in a display device of the present invention. FIG. 6 shows an example of a pixel configuration in a display device of the present invention. FIG. 6 shows an example of a pixel configuration in a display device of the present invention. FIG. 6 shows an example of a pixel configuration in a display device of the present invention. FIG. 6 shows an example of a pixel configuration in a display device of the present invention. FIG. 6 shows an example of a pixel configuration in a display device of the present invention. 5A to 5C illustrate timing charts of pixel circuits in a display device of the present invention. FIG. 6 shows an example of a pixel configuration in a display device of the present invention. 5A to 5C illustrate timing charts of pixel circuits in a display device of the present invention. FIG. 6 shows an example of a pixel configuration in a display device of the present invention. FIG. 6 shows an example of a pixel configuration in a display device of the present invention. 5A to 5C illustrate timing charts of pixel circuits in a display device of the present invention. FIG. 6 shows an example of a pixel configuration in a display device of the present invention. 5A to 5C illustrate timing charts of pixel circuits in a display device of the present invention. FIG. 6 shows an example of a pixel configuration in a display device of the present invention. 5A to 5C illustrate timing charts of pixel circuits in a display device of the present invention. 5A to 5C illustrate an operation of a pixel circuit in a display device of the present invention. FIG. 6 shows an example of a pixel configuration in a display device of the present invention. FIG. 6 shows an example of a pixel configuration in a display device of the present invention. FIG. 6 shows an example of a pixel configuration in a display device of the present invention. 5A to 5C illustrate an operation of a pixel circuit in a display device of the present invention. FIG. 6 shows an example of a pixel configuration in a display device of the present invention. FIG. 6 shows an example of a pixel configuration in a display device of the present invention. 5A to 5C illustrate timing charts of pixel circuits in a display device of the present invention. FIG. 6 shows an example of a pixel configuration in a display device of the present invention. FIG. 6 shows an example of a pixel configuration in a display device of the present invention. FIG. 5 is a diagram showing an example of a layout of pixel configurations in a display device of the present invention. FIG. 2 is a diagram showing an example of a configuration of a display device of the present invention. 5A and 5B illustrate a configuration example of a scan line driver circuit in a display device of the present invention. 5A and 5B illustrate a configuration example of a signal line driver circuit in a display device of the present invention. FIG. 2 is a diagram showing an example of a configuration of a display device of the present invention. FIG. 2 is a diagram showing an example of a configuration of a display device of the present invention. FIG. 2 is a diagram showing an example of a configuration of a display device of the present invention. FIG. 5 is a diagram showing an example of a configuration of a display panel used for a display device of the present invention. FIG. 7 shows an example of a structure of a light emitting element used for a display device of the present invention. FIG. 6 shows an example of a configuration of a display device of the present invention. FIG. 6 shows an example of a configuration of a display device of the present invention. FIG. 6 shows an example of a configuration of a display device of the present invention. FIG. 6 shows an example of a configuration of a display device of the present invention. FIG. 6 shows an example of a configuration of a display device of the present invention. FIG. 6 shows an example of a configuration of a display device of the present invention. FIG. 6 shows an example of a configuration of a display device of the present invention. FIG. 6 shows an example of a configuration of a display device of the present invention. FIG. 7 shows a structure of a transistor used for a display device of the present invention. 5A to 5C illustrate a method for manufacturing a transistor used in a display device of the present invention. 5A to 5C illustrate a method for manufacturing a transistor used in a display device of the present invention. 5A to 5C illustrate a method for manufacturing a transistor used in a display device of the present invention. 5A to 5C illustrate a method for manufacturing a transistor used in a display device of the present invention. 5A to 5C illustrate a method for manufacturing a transistor used in a display device of the present invention. 5A to 5C illustrate a method for manufacturing a transistor used in a display device of the present invention. The figure which shows an example of the hardware which controls the display apparatus of this invention. FIG. 5 is a diagram showing an example of an EL module using a display device of the present invention. FIG. 7 is a diagram showing a configuration example of a display panel using the display device of the present invention. FIG. 7 is a diagram showing a configuration example of a display panel using the display device of the present invention. FIG. 7 is a diagram showing an example of an EL television receiver using a display device of the present invention. FIG. 18 is a diagram showing an example of an electronic device to which the display device of the present invention is applied. The figure which shows the conventional pixel structure.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, it will be readily understood by those skilled in the art that the present invention can be practiced in many different ways and that various changes in form and detail can be made without departing from the spirit and scope of the present invention. Be done. Therefore, the present invention is not construed as being limited to the description of the present embodiment.

Embodiment 1
First, the basic configuration of the pixel circuit in the display device of the present embodiment will be described with reference to FIG. Note that an EL element is described as an example of the light-emitting element.

FIG. 1 is a diagram showing a circuit configuration for acquiring a voltage based on a video signal voltage and a threshold voltage of a transistor in the pixel configuration of the present embodiment. FIG. 1 shows first and second transistors 101 and 102, a storage capacitor 103, a scanning line 104, a signal line 105, a power supply line 106, and the like.
A capacitor line 107 and a light emitting element 108 are formed.

Note that in FIG. 1, both the first and second transistors 101 and 102 are p-channel transistors.

The first transistor 101 has a gate electrode that is a second electrode of the second transistor 102,
And a first electrode of the storage capacitor 103, and the first electrode is connected to the signal line 105,
The second electrode is connected to the first electrode of the second transistor 102. The gate electrode of the second transistor 102 is connected to the scan line 104. The second electrode of the storage capacitor 103 is connected to the capacitor line 107. In the light emitting element, the second electrode is connected to the power supply line 106.
It is connected to the.

Further, the video signal voltage V _data is applied to the signal line 105, and the potential V _CL is applied to the capacitance line 107. Note that the magnitude relationship of the potentials is V _data > V _CL . Further, the power supply potential VSS is applied to the power supply line 106.

Here, the first transistor 101 has a function of supplying current to the light-emitting element 108.
Further, the second transistor has a function as a switch which makes the first transistor 101 in a diode connection state.

Note that in this specification, diode connection refers to a state in which a gate electrode of a transistor and a first or second electrode are connected.

In the pixel circuit shown in FIG. 1, by turning on the second transistor 102, the first transistor 101 is diode-connected, and a current flows in the storage capacitor 103,
The storage capacity 103 is charged. Charging of the storage capacitor 103, the voltage stored in the storage capacitor 103, the video signal voltage _{V data} and the first threshold voltage of the transistor 101 _{| V th} | difference between the potential _{V CL} of the capacitor line 107 _{V data} - | Following until _{-V CL,} voltage _V data stored in the storage capacitor _{103 | V th - | V th} | becomes the _{-V CL} first transistor 101 is turned off and current does not flow to the storage capacitor 103.

By the above operation, the storage capacitor 103 can hold a voltage based on the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 101.

Further, FIG. 2 shows a circuit configuration for acquiring a threshold voltage of the first transistor in the case where the first transistor is an N-channel type.

FIG. 2 shows the first and second transistors 201 and 202, the storage capacitor 203, the scanning line 204, and the like.
A signal line 205, a power supply line 206, a capacitance line 207, and a light emitting element 208 are included.

Note that in FIG. 2, the second transistor 202 is an n-channel transistor.

Note that the video signal voltage V _data is applied to the signal line 205, and the potential V _CL is applied to the capacitor line 207. Note that the magnitude relationship of the potentials is V _CL > V _data . Further, the power supply potential VDD is applied to the power supply line 206.

In the pixel circuit shown in FIG. 2, by turning on the second transistor 202, the first transistor 201 becomes diode-connected, and a current flows in the storage capacitor 203,
The holding capacity 203 is charged. When the storage capacitor 203 is charged, the voltage held by the storage capacitor 203 is the potential V _CL of the capacitor line 207 and the video signal voltage V _data and the first transistor 20.
1 until the difference between the threshold voltage | V _th | and the difference V _CL −V _data − | V _th | becomes equal to V _CL − V _data − | V _th | The transistor 201 is turned off, and the current does not flow to the storage capacitor 203.

By the above-described operation, the storage capacitor 203 can hold a voltage based on the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 101.

Note that in FIGS. 1 and 2, the second transistor has a function as a switch that makes the first transistor in a diode connection state. Thus, instead of the second transistor, another element having a function as a switch may be used. For example, a diode (for example, a PN diode, a PIN diode, a Schottky diode, a diode-connected transistor, or the like), a thyristor, or a logic circuit combining them may be used.

Next, the pixel configuration of the present embodiment having the basic circuit configuration shown in FIG. 1 or 2 will be described. Note that an EL element is described as an example of the light-emitting element.

FIG. 3 is a diagram showing a circuit diagram of the pixel circuit of the present embodiment. The pixel circuit of this embodiment is the first.
To fifth transistors 301 to 305, storage capacitance 306, signal line 307, first to fourth scan lines 308 to 311, first and second power supply lines 312 and 313, capacitance line 314, light emitting element 3
It consists of 15 and so on.

Here, the first transistor 301 is used as a transistor for supplying current to the light emitting element 316, and the second to fifth transistors 302 to 305 are used as switches for selecting whether or not to connect a wiring.

The first transistor 301 has a gate electrode that is the second electrode of the fourth transistor 304,
And a first electrode of the storage capacitor 306, the first electrode being connected to the second transistor 302.
A second electrode of the third transistor 303 and a second electrode of the third transistor 303,
The first electrode of the fourth transistor 304 and the first electrode of the fifth transistor 305 are connected. The gate electrode of the second transistor 302 is connected to the first scan line 308, and the first electrode is connected to the signal line 307. The third transistor 303 is
The gate electrode is connected to the second scan line 309, and the first electrode is connected to the first power supply line 312. The gate electrode of the fourth transistor 304 is connected to the third scan line 310. The gate electrode of the fifth transistor 305 is connected to the fourth scan line 311, and the second electrode is connected to the first electrode of the light-emitting element 315. The storage capacity 306 is
The second electrode is connected to the capacitance line 314. The light emitting element 315 has a second electrode
Is connected to the power supply line 313 of FIG.

Further, the power supply potential VDD is applied to the first power supply line 312, and the second power supply line 313 is
The power supply potential VSS is applied, and the potential V _CL is applied to the capacitor line 314. Note that the magnitude relationship of potentials is VDD> VSS and VDD> _VCL .

Note that, in the pixel circuit shown in FIG. 3, all of the first to fifth transistors 301 to 305 are p-channel transistors.

Note that the first transistor 301 in FIG. 3 corresponds to the first transistor 10 in FIG.
Corresponds to 1. Further, the fourth transistor 304 in FIG. 3 corresponds to the second transistor 102 in FIG. The second power supply line 313 in FIG. 3 corresponds to the power supply line 106 in FIG.

Next, the operation of the pixel circuit according to the present embodiment will be described with reference to FIGS.

FIG. 4 shows a timing chart of video signal voltages and pulses inputted to the signal line 307 and the first to fourth scanning lines 308 to 311, and corresponds to each operation of the pixel circuit shown in FIGS. The first to third periods T1 to T3 are divided into three periods.

5 to 7 are diagrams showing the connection state of the pixel circuit of the present embodiment in each period.
In FIGS. 5 to 7, portions shown by solid lines are conductive, and portions shown by broken lines are not conductive.

First, the operation of the pixel circuit in the first period T1 is described with reference to FIG. FIG. 5 is a diagram showing a connection state of the pixel circuit in the first period T1. In the first period T1, the second to fourth scan lines 309 to 311 become L level, and the third to fifth transistors 303 to 303
305 turns on. In addition, the first scan line 308 becomes H level, and the second transistor 3
02 turns off. Accordingly, the first transistor 301 is in a diode connection state, and a current flows in the light emitting element 315. As a result, the second electrode of the first transistor 301,
The potential of the first electrode of the storage capacitor 306 is lowered, and the storage capacitor 306 holds an initial voltage.

By the above operation, in the first period T1, a certain initial voltage is held in the holding capacitor 306.
In this specification, this operation is called initialization.

Next, the operation of the pixel circuit in the second period T2 will be described with reference to FIG. FIG. 6 is a diagram showing the connection state of the pixel circuit in the second period T2. In the second period T2, the first and third scan lines 308 and 310 become L level, and the second and fourth transistors 30
2, 304 turns on. Also, the second and fourth scanning lines 309 and 311 become H level,
The third and fifth transistors 303 and 305 are turned off. Further, the video signal voltage V _data is applied to the signal line 307. As a result, the second electrode of the first transistor 301 is connected to the signal line 307, and the first transistor 301 is diode-connected, a current flows to the storage capacitor 306, and the storage capacitor 306 is charged. Ru. Holding capacity 3
In the charging of 06, the voltage held in the holding capacitance 306 is the difference V _data between the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 301 and the potential V _CL of the capacitance line 314.
It continues until it becomes-| V _th |-V _CL and the voltage held in the holding capacitance 306 is V _data-
When | V _th | −V _CL is reached, the first transistor 301 is turned off, and the current does not flow to the storage capacitor 306.

By the above operation, in the second period T2, the video signal voltage V _{data is} stored in the storage capacitor 306.
And a voltage based on the threshold voltage | V _th | of the first transistor 301.

Note that in order to hold a voltage based on the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 301 in the holding capacitor 306 in the second period T 2, the first transistor 301 is in advance. The potential of the second electrode of V must be lower than the difference V _data − | V _th | between the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 301. Therefore, by flowing current to the light emitting element 315 in the first period T1,
The potential of the second electrode of the first transistor 301 can be reliably made lower than V _data − | V _th |, so that acquisition of the threshold voltage can be performed reliably.

Next, the operation of the pixel circuit in the third period T3 will be described with reference to FIG. FIG. 7 is a diagram showing a connection state of the pixel circuit in the third period T3. In the third period T3, the second and fourth scan lines 309 and 311 become L level, and the third and fifth transistors 30
3, 305 turns on. Also, the first and third scan lines 308 and 310 become H level,
The second and fourth transistors 302, 304 are turned off. Thus, the second electrode of the first transistor 301 is connected to the first power supply line 312. In addition, the voltage V _data − | V held in the storage capacitor 306 in the period T1 is applied to the gate electrode of the first transistor 301.
_th | _{-V CL} and the sum _V data between the potential _{V CL} of the capacitor line 314 - _{| V th |} order is applied, the first gate-source voltage of the transistor 301 in the period T3 _V gs (T3)
Then, V _gs (T3) is expressed as the following equation (1).

Therefore, the current I _OLED flowing between the drain and source of the first transistor 301 is expressed by the following equation (2), and this current flows to the light emitting element 315 through the fifth transistor 305, and the light emitting element 315 Emits light.

Here, β is a constant given by the mobility and size of the transistor, the capacitance by the oxide film, and the like.

By the above operation, in the third period T3, the current I _OLED depending on the video signal voltage V _data is supplied to the light emitting element 315 to cause the light emitting element 315 to emit light.

Here, in the operation process of the pixel circuit shown in FIG.
The functions possessed by 305 will be described again.

The first transistor 301 has a function of supplying current to the light-emitting element 315 in the third period T3.

The second transistor 302 functions as a switch for connecting the first electrode of the first transistor 301 and the signal line 307 in order to input the video signal voltage V _data to the pixel in the second period T2.

The third transistor 303 is connected to the first transistor 30 in the first and third periods T1 and T3.
In order to apply the potential of the first power supply line 312 to the first electrode of the first transistor 1, the first transistor 3
It functions as a switch for connecting the first electrode 01 and the first power supply line 312.

The fourth transistor 304 transmits the first transistor 3 to the holding capacitor 306 in the second period T2.
In order to hold a voltage based on the threshold voltage | V _th | of 01, the first transistor 301
Function as a switch to make a diode connection.

The fifth transistor 305 operates so that current flows to the light emitting element 315 in the first and third periods T1 and T3 and does not flow to the light emitting element 315 in the second period T2. That is, in order to control supply of current to the light emitting element 315, the second electrode of the first transistor 301 functions as a switch for connecting the first electrode of the light emitting element 315.

By the above operation process, the current I _OLED is supplied to the light emitting element 315, and the light emitting element 3
15 can be made to emit light at a luminance corresponding to the current I _OLED . At this time, as shown in the equation (2), the current I _OLED flowing through the light emitting element 315 is expressed without depending on the threshold voltage | V _th | of the first transistor 301. Variations can be compensated.

Note that a voltage based on the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 301 can be held in the storage capacitor 306 in the second period T2, and the third period T3 can be used to In order to turn on the transistor 301 of 1, the range of the video signal voltage V _data is set to V _CL + | V _th | <V _data ≦ VDD.

Note that the potential V _CL of the capacitance line 314 is the video signal voltage V _data and the first transistor 3.
01 threshold voltage _{| V th} | difference between _V data - _{| V th |} may be a potential lower than.
Note that the potential V _CL of the capacitor line 314 is set higher so that the storage capacitor 306 can reliably hold a voltage based on the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 301. Lower is desirable.

In the pixel circuit shown in FIG. 3, the first transistor 301 is a P-channel type, but the first transistor may be an N-channel type. Here, FIG. 8 illustrates a pixel configuration in the case where the first transistor is an n-channel transistor.

FIG. 8 is a diagram showing a circuit diagram of the pixel circuit of the present embodiment. The pixel circuit of this embodiment is the first.
The fifth transistor 801 to 805, the storage capacitor 806, the signal line 807, the first to fourth scan lines 808 to 811, the first and second power supply lines 812, 813, the capacitance line 814, the light emitting element 8
It consists of fifteen.

Note that, in the pixel circuit of FIG. 8, all of the second to fifth transistors 802 to 805 are n-channel transistors.

Here, the first transistor 801 is used as a transistor for supplying a current to the light emitting element 815, and the second to fifth transistors 802 to 805 are used as switches for selecting whether to connect a wiring.

The first transistor 801 has a gate electrode that is the second electrode of the fourth transistor 804,
And a first electrode of the storage capacitor 806, and the first electrode is connected to the second transistor 802.
A second electrode of the third transistor 803 and a second electrode of the third transistor 803,
It is connected to the first electrode of the fourth transistor 804 and the first electrode of the fifth transistor 805. The gate electrode of the second transistor 802 is connected to the first scan line 808, and the first electrode is connected to the signal line 807. The third transistor 803 is
The gate electrode is connected to the second scan line 809, and the first electrode is connected to the first power supply line 812. The gate electrode of the fourth transistor 804 is connected to the third scan line 810. The gate electrode of the fifth transistor 805 is connected to the fourth scan line 811, and the second electrode is connected to the second electrode of the light-emitting element 815. The storage capacity 806 is
The second electrode is connected to the capacitance line 814. The light emitting element 815 has a first electrode connected to the second electrode.
Power supply line 813 of the

Further, the power supply potential VSS is applied to the first power supply line 812, and the second power supply line 813 is
The power supply potential VDD is applied, and the potential V _CL is applied to the capacitor line 814. Note that the magnitude relationship of the potentials is VDD> VSS and V _CL > VSS.

The first transistor 801 in FIG. 8 corresponds to the first transistor 20 in FIG.
Corresponds to 1. The fourth transistor 804 in FIG. 8 corresponds to the second transistor 202 in FIG. The second power supply line 813 in FIG. 8 corresponds to the power supply line 206 in FIG.

Next, the operation of the pixel circuit of the present embodiment will be described using FIG.

FIG. 9 shows a timing chart of video signal voltages and pulses inputted to the signal line 807 and the first to fourth scanning lines 808 to 811. Since all of the first to fifth transistors are N-channel transistors, the timing of the pulses input to the first to fourth scan lines 808 to 811 is P-channel (see FIG. 4). H level and L level are inverted. In addition, according to each operation of the pixel circuit, the first to third periods T1 to T1 are
It is divided into three periods of T3.

The operation of the pixel circuit of FIG. 8 in the first to third periods T1 to T3 is the same as the operation of the pixel circuit shown in FIG. That is, in the first period T1, the storage capacitor 806 holds a certain initial voltage. That is, initialization is performed. Next, in the second period T 2, the storage capacitor 806 holds a voltage based on the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 801. Then, in the third period T3, the current I _OLED depending on the video signal voltage V _data is supplied to the light emitting element 815, and the light emitting element 815 emits light. Note that the light emitting element 815
The current I _OLED flowing through is expressed by the following equation (3).

Note that in order to hold a voltage based on the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 801 in the storage capacitor 806 in the second period T 2, the first transistor 801 is in advance. The potential of the second electrode of V must be higher than the sum V _data + | V _th | of the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 801. Therefore, by supplying a current to the light emitting element 815 in the first period T1,
The potential of the second electrode of the first transistor 801 can be reliably made higher than V _data + | V _th |, so that acquisition and compensation of the threshold voltage can be reliably performed.

In the operation process of the pixel circuit shown in FIG.
The functions of the transistor 05 have the same functions as the first to fifth transistors 301 to 305 in the pixel circuit shown in FIG.

By the above-described operation process, the current I _OLED is supplied to the light emitting element 815 to
15 can be made to emit light at a luminance corresponding to the current I _OLED . At this time, as shown in the equation (3), the current I _OLED flowing through the light emitting element 815 is expressed without depending on the threshold voltage | V _th | of the first transistor 801. Variations can be compensated.

Note that a voltage based on the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 801 can be held in the storage capacitor 806 in the second period T2, and the third period T3 can be used to In order to turn on the one transistor 801, the range of the video signal voltage V _data is set as VSS ≦ V _data <V _CL − | V _th |.

Note that the potential V _CL of the capacitance line 814 is the video signal voltage V _data and the first transistor 3.
01 of the threshold voltage _{| V th |} sum of the _V data + _{| V th |} may be a potential higher than.
Note that the potential V _CL of the capacitance line 814 is set higher so that the holding capacitance 806 can reliably hold a voltage based on the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 801. Higher is desirable.

As described above, according to the pixel configuration of this embodiment, the variation in threshold voltage of the transistor can be compensated and the variation in luminance can be reduced, so that the image quality can be improved.

Further, in the pixel circuit of the present embodiment, as shown in the equations (2) and (3), the current I _OLED flowing through the light emitting element has a substantially constant value when the magnitude of the video signal voltage V _data is determined. Become. Therefore, a constant current corresponding to the video signal voltage can be supplied to the light emitting element, and the light emitting element can emit light with a constant luminance, so that the luminance unevenness during the light emitting period (T3) is reduced.

Further, since the current I _OLED flowing through the light emitting element does not depend on the capacitance value of the storage capacitance, for example, even if the capacitance value varies from pixel to pixel due to a manufacturing error such as misalignment of the mask pattern at the time of manufacturing, It is possible to supply a constant current to the light emitting element.

Further, in the pixel circuit of this embodiment, the preparation period until the light emitting element emits light by acquiring the threshold voltage | V _th | of the first transistor and acquiring the video signal voltage V _{data in} the same period. Can be made shorter, so that the light emission period can be made longer for one frame period. Therefore, the duty ratio (the ratio of the light emitting period in one frame period) can be increased, and the voltage applied to the light emitting element can be reduced.
Thus, power consumption can be reduced, and deterioration of the light emitting element can be reduced.

Further, since the preparation period until the light emitting element emits light can be further shortened, the length of one frame period can be further shortened, and the frame frequency can be further increased.
As a result, it is possible to suppress false contours and flickers in moving image display and the like, and to improve the image quality.

In this embodiment, when the initialization is performed in the period T1, the first electrode of the first transistor is connected to the first power supply line through the third transistor. The connection destination of the first electrode is not limited to this. The first electrode of the first transistor
The initialization may be performed by connecting to the signal line through the second transistor and applying a potential such that the first transistor is turned on to the signal line.

In the present embodiment, the first electrode of the first transistor is connected to the first power supply line through the third transistor when current is supplied to the light emitting element in the period T3.
The connection destination of the first electrode of the transistor is not limited to this. The first electrode of the first transistor is connected to the signal line through the second transistor, and a potential is applied to the signal line such that the first transistor is turned on, whereby current is supplied to the light-emitting element. May be supplied.

In the present embodiment, the storage capacitor may be formed of metal or may be formed of a MOS transistor. In particular, when the storage capacitor is formed of a MOS transistor, the area occupied by the storage capacitor can be made smaller than when the storage capacitor is formed of metal, and hence the aperture ratio of the pixel can be increased.

For example, in the pixel circuit shown in FIG. 3, an example in which the storage capacitor is formed of a MOS transistor is shown in FIGS.

FIG. 10 shows the case where the storage capacitor 306 is formed of a P-channel transistor. P
In the case of forming a storage capacitor with a channel transistor, it is necessary to induce a channel region in the P channel transistor in order to retain charge, so the potential of the gate electrode of the P channel transistor is set to the P channel transistor. It must be lower than the potential of the first and second electrodes of the transistor. By the way, in the case of the pixel circuit shown in FIG.
The potential of the first electrode is higher than that of the second electrode. Therefore, in order to cause the P-channel transistor to function as a storage capacitor, the first and second electrodes of the P-channel transistor are used as the first electrode of the storage capacitor 306, and the gate electrode of the first transistor 301 and the first electrode It is connected to the second electrode of the fourth transistor 304. Further, a gate electrode of the P-channel transistor is used as a second electrode of the storage capacitor 306 and is connected to the capacitor line 314.

FIG. 11 shows the case where the storage capacitor 306 is formed of an N-channel transistor. N
In the case of forming a storage capacitor with a channel transistor, it is necessary to induce a channel region in the N channel transistor in order to hold charge, so the potential of the gate electrode of the N channel transistor is set to the N channel transistor. It must be higher than the potential of the first and second electrodes of the transistor. Therefore, in order to cause the N-channel transistor to function as a storage capacitor, the gate electrode of the N-channel transistor is used as the first of the storage capacitors 306.
And connected to the gate electrode of the first transistor 301 and the second electrode of the fourth transistor 304. In addition, the first and second electrodes of the N-channel transistor are used as a second electrode of the storage capacitor 306 and connected to the capacitor line 314.

As another example, in the pixel circuit shown in FIG. 8, the first and second storage capacitances
12 and 13 show an example of the case where a transistor is used.

FIG. 12 shows the case where the storage capacitor 806 is formed of an N-channel transistor. In the case of the pixel circuit illustrated in FIG. 8, in the storage capacitor 806, the potential of the second electrode is higher than that of the first electrode. Therefore, in order to cause the N-channel transistor to function as a storage capacitor, the first and second electrodes of the N-channel transistor are used as the first electrode of the storage capacitor 806, and the gate electrode of the first transistor 801 and the first electrode The second of the four transistors 804
Connect with the electrode of In addition, a gate electrode of the N-channel transistor is used as a second electrode of the storage capacitor 806 and is connected to the capacitor line 814.

FIG. 13 shows the case where the storage capacitor 806 is formed of a P-channel transistor. P
In order to cause a channel transistor to function as a storage capacitor, the gate electrode of the P-channel transistor is used as a first electrode of the storage capacitor 806, and the gate electrode of the first transistor 801 and the second electrode of the fourth transistor 804. Connect with In addition, the first and second electrodes of the P-channel transistor are used as a second electrode of the storage capacitor 806 and connected to the capacitor line 814.

As in the present embodiment, when the storage capacitor is formed of a MOS transistor by connecting the storage capacitor between the gate electrode of the first transistor and the capacitor line, in particular, between the gate and source of the MOS transistor, Since a voltage larger than the threshold voltage of the MOS transistor is always applied, a channel region can always be induced in the MOS transistor, and can always function as a storage capacitor. Therefore, in the operation process of the pixel circuit, it is possible to correctly hold a desired voltage in the holding capacitor.

Further, in the pixel configuration of this embodiment, among the values of the ratio W / L of the channel length L and the channel width W of each of the first to fifth transistors, the value of W / L that the first transistor has Can be made larger, the current flowing between the drain and source of the first transistor can be made larger. As a result, when acquiring a voltage based on the video signal voltage V _data and the threshold voltage | V _th | of the first transistor in the period T2, the operation can be performed with a larger current, and therefore, the operation can be performed more quickly. become able to. Further, the current I _OLED flowing to the light emitting element in the period T3 can be further increased, and the luminance can be further increased.

Note that in this embodiment, since the timings of pulses input to the second scan line and the fourth scan line are the same, the third transistor and the fifth transistor can be used as the second scan line or the Control may be performed by any one of the four scan lines.

For example, FIG. 14 shows an example in which the third and fifth transistors 303 and 305 are controlled by the second scan line 309 in the pixel circuit shown in FIG. In FIG. 14, the third
The gate electrode of the transistor 303 and the gate electrode of the fifth transistor 305 are connected to the second scan line 309.

As another example, the third and fifth transistors 80 in the pixel circuit shown in FIG.
An example in the case where the third scan line 805 is controlled by the fourth scan line 811 is shown in FIG. Figure 1
At 5, the gate electrode of the third transistor 803 and the gate electrode of the fifth transistor 805 are connected to the fourth scan line 811.

As described above, by controlling the third and fifth transistors with the same scan line, the number of scan lines can be reduced and the aperture ratio of the pixel can be increased.

In the present embodiment, the second to fifth transistors are all transistors of the same conductivity type such as P channel type or all N channel type, but the present invention is not limited to this. The circuit may be configured using both P-channel and N-channel types.

For example, in FIG. 3, the fourth transistor 304 may be an n-channel transistor, and a transistor other than the fourth transistor 304 may be a p-channel transistor. This pixel circuit is shown in FIG. A timing chart of video signal voltages and pulses input to the signal line 307 and the first to fourth scanning lines 308 to 311 is shown in FIG.

Thus, assuming that the fourth transistor 304 is an n-channel transistor, the fourth transistor 3
Because the leakage current at 04 is smaller than that of the P-channel transistor,
Leakage of the charge held at 06 decreases, and fluctuation of the voltage held by the holding capacitor 306 decreases. Thus, a constant current is constantly applied to the gate electrode of the first transistor 301 particularly in the light emission period (T3), so that a constant current can be supplied to the light emitting element 315. As a result, the light-emitting element 315 can emit light at a constant luminance, and unevenness in luminance can be reduced.

As another example, in FIG. 3, the second transistor 302 may be an n-channel transistor, and a transistor other than the second transistor 302 may be a p-channel transistor. This pixel circuit is shown in FIG. A timing chart of video signal voltages and pulses input to the signal line 307 and the first to fourth scanning lines 308 to 311 is shown in FIG.

As described above, when the second transistor 302 is an n-channel transistor, the timings of pulses input to the first scan line 308, the second scan line 309, and the fourth scan line 311 are the same. Second transistor 302, third transistor 303, and fifth transistor 3
05 can be controlled by any one scan line of the first scan line 308 or the second scan line 309 or the fourth scan line 311.

Here, the second transistor 302, the third transistor 303, and the fifth transistor 3
An example in the case of controlling 05 by the first scan line 308 is shown in FIG. Note that in FIG. 20, the gate electrode of the second transistor 302, the gate electrode of the third transistor 303, and the gate electrode of the fifth transistor 305 are connected to the first scan line 308.

As described above, the number of scan lines can be reduced and the aperture ratio of the pixel can be increased by making the second transistor different in conductivity type from the transistors other than the second transistor.

Note that which of the second to fifth transistors has which conductivity type is not limited to the above content.

Note that this embodiment is an example in the case of embodying the contents (may be a part) described in the other embodiments, an example in the case of slight modification, an example in the case of changing a part, an improvement An example of the case,
An example of the case described in detail, an example of the case of application, an example of the relevant part, and the like are shown. Therefore, the contents described in the other embodiments can be freely applied to, combined with, or replaced with this embodiment.

Note that although the present embodiment has been described using various figures, the contents described in each figure (
Some parts may be applied to, or combined with, the contents described in another figure (or some parts).
Or, replacement can be freely performed. Furthermore, in the figures described above, more figures can be constructed by combining other parts with respect to each part.

Similarly, the contents (or a part) described in each figure of this embodiment can be applied to, combined with, or replaced with the contents (or a part) described in the figure of another embodiment. Can do it freely. Furthermore, in the drawings of the present embodiment, more parts can be configured by combining the parts of the other embodiments with respect to the respective parts.

Second Embodiment
Although the capacitance line is separately provided in the first embodiment, another existing wiring may be used instead of the capacitance line. For example, by using any one of the first to fourth scan lines included in pixels in another row as a substitute for a capacitor line, a capacitor line included in the pixel can be deleted. In this embodiment, instead of the capacitance line of the pixel, the first to the pixels of the other rows are included.
The case where any one of the fourth scan lines is used will be described. As a light emitting element, E
An L element will be described as an example.

For example, in the pixel circuit shown in FIG. 3, an example of the pixel circuit in the case of using the second scanning line of the pixel in the previous row is shown in FIG. 21 instead of the capacitor line of the pixel.

FIG. 21 shows a configuration of a certain pixel i-th pixel Pixel (i) and a pixel i-th pixel i (i-1) which is the previous row, i. Pixel (Pix-1) on the (i-1) th row
Is composed of first to fifth transistors 2101 to 2105, a storage capacitor 2106, first to fourth scanning lines 2108 to 2111, a light emitting element 2115, and the like. In addition, the pixel Pixel (i) in the i-th row includes the first to fifth transistors 212
26, the first to fourth scanning lines 2128 to 2131, the light emitting element 2135, and the like. In addition, the pixel Pixel (i) in the i-th row and the pixel Pixel (i-1) in the (i-1) -th row
Thus, the signal line 2107 and the first and second power supply lines 2112 and 2113 are shared.

In FIG. 21, since the connection of each element in each pixel is substantially the same as the pixel circuit shown in FIG. 3, the detailed description will be omitted. The difference between FIG. 3 and FIG. 21 is that instead of the capacitance line of the pixel Pixel (i) in the i-th row, the second scan line 2109 of the pixel (i-1) -th pixel Pixel (i-1) is used.
The second electrode of the storage capacitor 2126 of the pixel Pixel (i) in the i-th row is connected to the second scan line 2109 of the pixel Pixel (i-1) in the (i-1) -th row. It is the point that is done.

In the pixel (Pi) of the (i-1) th row, the pixel Pixe of the (i-1) th row is
The second scan line 2149 of the pixel (Pi-2) of the (i-2) th row is used instead of the capacitance line of l (i-1), and the pixel (Pi) of the (i-1) th row is used. i-1) holding capacity 21
The second electrode 06 is a second scan line 214 of the pixel (Pi-2) on the (i-2) th row.
Connected to 9

Here, the signal line 2107 and the first to fourth pixels of the pixel (i-1) of the (i-1) th row
Timing charts of video signal voltages and pulses input to the first to fourth scanning lines 2128 to 2131 of the scanning lines 2108 to 2111 of the pixel and the pixel (i) in the i-th row.
Shown in 2. The periods T1 to T3 shown in FIG. 22 correspond to the operation of the pixel Pixel (i) in the i-th row.

In the pixel configuration as shown in FIG. 21, the storage capacitance 212 of the pixel Pixel (i) in the i-th row is
And the second scan line 210 of the pixel (i-1) of the pixel Pixel (i-1).
A potential applied to 9 is applied. Therefore, a potential of H level is applied to the second electrode of the storage capacitor 2126 of the pixel Pixel (i) in the i-th row during the period T1, and the periods T2 and T3 are applied.
At the L level potential is applied. Thus, in each period, the pixel Pixel (i
Since a constant potential can be applied to the second electrode of the storage capacitor 2126), the operation of the pixel circuit as described in Embodiment 1 can be performed.

Note that in FIG. 21, the same operation as described above can be performed even when a fourth scan line included in the pixel in the previous row is used as a substitute for a capacitor line included in the pixel. The reason is that the timings of the pulses input to the second scan line and the fourth scan line of the pixel (i-1) of the pixel (i-1) are the same.

Note that a scan line used as a substitute for a capacitor line of the pixel is a second scan line of a pixel in the previous row.
Alternatively, it is not limited to the fourth scan line. The first or third scan line included in the pixel in the previous row may be used instead of the capacitor line included in the pixel. In addition, the first to the pixels of the next row have
Any one of the fourth scan lines may be used.

Note that in the pixel, it is preferable that a constant potential be applied to the capacitor line during the periods T2 and T3. In addition, it is desirable that a low potential be applied to the capacitor line during the periods T2 and T3. In this way, the threshold voltage of the first transistor and the video signal voltage can be obtained more accurately, and the current flowing to the light emitting element can be maintained at a constant value during the light emission period of the pixel. The device can emit light at a constant luminance. In view of the above, instead of the capacitance line of the pixel, the second or fourth of the pixels in the previous row has
It is desirable to use a scan line of

As another example, FIG. 23 shows an example in which, in the pixel circuit shown in FIG. 8, a second scan line included in the pixel in the previous row is used instead of the capacitor line included in the pixel.

FIG. 23 shows the configuration of a certain pixel i-th row pixel (i) and a pixel i-th row (i-1) which is the previous row, i.e., the pixel i (i-1). Pixel (Pix-1) on the (i-1) th row
Is composed of first to fifth transistors 2301 to 2305, a storage capacitor 2306, first to fourth scanning lines 2308 to 2311, a light emitting element 2315, and the like. In addition, the pixel Pixel (i) in the i-th row includes the first to fifth transistors 2321 to 2325 and the storage capacitor 23.
26, the first to fourth scanning lines 2328 to 2331, the light emitting element 2335, and the like. In addition, the pixel Pixel (i) in the i-th row and the pixel Pixel (i-1) in the (i-1) -th row
Thus, the signal line 2307 and the first and second power supply lines 2312 and 2313 are shared.

In FIG. 23, since the connection of each element in each pixel is substantially the same as the pixel circuit shown in FIG. 8, the detailed description will be omitted. The difference between FIG. 8 and FIG. 23 is that instead of the capacitance line of the pixel Pixel (i) in the i-th row, the second scan line 2309 of the pixel (i-1) -th pixel Pixel (i-1) is used.
, And the second electrode of the storage capacitor 2326 of the pixel Pixel (i) in the i-th row is connected to the second scan line 2309 of the pixel Pixel (i-1) in the (i-1) -th row. It is the point that is done.

In the pixel (Pi) of the (i-1) th row, the pixel Pixe of the (i-1) th row is
The second scan line 2349 of the pixel (Pi-2) of the (i-2) th row is used instead of the capacitance line of l (i-1), and the pixel (Pi) of the (i-1) th row is used. i-1) holding capacity 23
The second electrode 06 is a second scanning line 234 of the pixel (Pi-2) on the (i-2) -th row.
Connected to 9

Here, the signal line 2307 and the first to fourth pixels of the pixel (Pi-1) of the (i-1) th row
Timing charts of video signal voltages and pulses input to the first to fourth scanning lines 2238 to 2331 of the scanning lines 2308 to 2311 of the pixel and the pixel (i) in the i-th row.
Shown in 4. The periods T1 to T3 shown in FIG. 24 correspond to the operation of the pixel Pixel (i) in the i-th row.

In the pixel configuration as shown in FIG. 23, the storage capacitance 232 of the pixel Pixel (i) in the i-th row is used.
The second scan line 230 of the pixel (Pi) (i-1) of the pixel Pixel (i-1)
A potential applied to 9 is applied. Therefore, a potential of L level is applied to the second electrode of the storage capacitor 2326 of the pixel Pixel (i) in the i-th row during the period T1, and the periods T2 and T3 are applied.
At this point, an H level potential is applied. Thus, in each period, the pixel Pixel (i
Since a constant potential can be applied to the second electrode of the storage capacitor 2326), the operation of the pixel circuit as described in Embodiment 1 can be performed.

Note that in FIG. 23, the same operation as described above can be performed even when a fourth scan line included in the pixel in the previous row is used instead of the capacitor line included in the pixel. The reason is that the timings of the pulses input to the second scan line and the fourth scan line of the pixel (i-1) of the pixel (i-1) are the same.

Note that a scan line used as a substitute for a capacitor line of the pixel is a second scan line of a pixel in the previous row.
Alternatively, it is not limited to the fourth scan line. The first or third scan line included in the pixel in the previous row may be used instead of the capacitor line included in the pixel. In addition, the first to the pixels of the next row have
Any one of the fourth scan lines may be used.

Note that in the pixel, it is preferable that a constant potential be applied to the capacitor line during the periods T2 and T3. In addition, it is desirable that a high potential be applied to the capacitor line during the periods T2 and T3. In this way, the threshold voltage of the first transistor and the video signal voltage can be obtained more accurately, and the current flowing to the light emitting element can be maintained at a constant value during the light emission period of the pixel. The device can emit light at a constant luminance. In view of the above, instead of the capacitance line of the pixel, the second or fourth of the pixels in the previous row has
It is desirable to use a scan line of

In this manner, by using the second scan line of the pixel in the previous row instead of the capacitor line of the pixel, there is no need to newly provide a capacitor line in the pixel, so the number of wirings can be reduced. And increase the aperture ratio of the pixel. In addition, since it is not necessary to newly generate a voltage to be applied to the capacitor line, it is possible to reduce the number of circuits therefor and to reduce power consumption.

Note that this embodiment is an example in the case of embodying the contents (may be a part) described in the other embodiments, an example in the case of slight modification, an example in the case of changing a part, an improvement An example of the case,
An example of the case described in detail, an example of the case of application, an example of the relevant part, and the like are shown. Therefore, the contents described in the other embodiments can be freely applied to, combined with, or replaced with this embodiment.

Note that although the present embodiment has been described using various figures, the contents described in each figure (
Some parts may be applied to, or combined with, the contents described in another figure (or some parts).
Or, replacement can be freely performed. Furthermore, in the figures described above, more figures can be constructed by combining other parts with respect to each part.

Similarly, the contents (or a part) described in each figure of this embodiment can be applied to, combined with, or replaced with the contents (or a part) described in the figure of another embodiment. Can do it freely. Furthermore, in the drawings of the present embodiment, more parts can be configured by combining the parts of the other embodiments with respect to the respective parts.

Third Embodiment
In Embodiment 1 and Embodiment 2, although current is supplied to the light emitting element at the time of initialization, initialization is performed by adding an initialization transistor to the pixel circuit shown so far. It is also possible to In this embodiment, a method for performing initialization using an initialization transistor will be described. Note that an EL element is described as an example of the light-emitting element.

In order to perform initialization, it is necessary to set the second electrode of the first transistor to a certain initial potential. At this time, the second electrode of the first transistor is connected to the electrode of another element or another wiring through the initialization transistor, and the initialization transistor is turned on to connect the first transistor. The second electrode can be set to a potential of a connection destination electrode or a wiring.

That is, in order to set the potential of the second electrode of the first transistor to a certain initial potential, the initialization transistor uses the second electrode of the first transistor and the electrode or other wiring of another element. It functions as a switch to connect.

For example, in the case of the pixel circuit shown in FIG. 3, in order to hold the voltage based on the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 301 in the holding capacitance 306, The potential of the second electrode of the transistor 301 is set to the video signal voltage V _data and the first
And the difference between the threshold voltage | V _th | of the transistor 301 and the _data V _data − | V _th |. Therefore, in the first period T1, the second transistor 301
The potential of the second electrode of the first transistor 301 is set to an initial value lower than V _data − | V _th | by connecting the electrode of the transistor and the electrode or other wiring of another element through the initialization transistor. It can be set to voltage.

Here, FIG. 25 shows an example in which an initialization transistor is provided in the pixel circuit shown in FIG. FIG. 25 illustrates an example in which the second electrode of the first transistor 301 and the capacitor line 314 are connected to each other through the initialization transistor.

In FIG. 25, the sixth transistor 2516 and the fifth scan line 2517, which are initialization transistors, are newly added to the pixel circuit shown in FIG. Note that the sixth transistor 251
6, a gate electrode is connected to a fifth scan line 2517, a first electrode is a second electrode of the first transistor 301, a first electrode of the fourth transistor 304, and a fifth electrode The second electrode is connected to the first electrode of the transistor 305, and the second electrode is connected to the capacitor line 314.

Next, the operation of the pixel circuit shown in FIG. 25 will be described using FIG. 26 and FIG.

FIG. 26 shows a timing chart of video signal voltages and pulses inputted to the signal line 307 and the first to fifth scanning lines 308 to 311, 2517, and in accordance with each operation of the pixel circuit, T1 to T3. It is divided into three periods.

The operation of the pixel circuit in the first period T1 is described with reference to FIG. In the period T1, the second, third, and fifth scan lines 309, 310, and 2517 are at L level, and the third, fourth, and fifth
, The sixth transistors 303, 304, 2516 are turned on. In addition, the first and fourth scan lines 308 and 311 become H level, and the second and fifth transistors 302 and 305 are turned off. Thus, the second electrode of the first transistor 302 and the capacitor line 314 are connected; thus, the second electrode of the first transistor 301, the first electrode of the first storage capacitor 306, and the storage capacitor The potential of the first electrode 306 becomes equal to the potential V _CL of the capacitor line 314.

Through the above operation, in the period T1, the potential of the second electrode of the first transistor 301 and the first electrode of the storage capacitor 306 is set to the potential V _CL of the capacitor line 314 as an initial potential.

Thus, in the period T1, the potential of the second electrode of the first transistor 301 is V _data
By setting the potential V _CL of the capacitor line 314 which is a potential lower than _{-│V th} │, the potential of the second electrode of the first transistor 301 is reliably made lower than V _{data -│V th} │. It is possible to ensure that the compensation of the threshold voltage can be performed.

Note that in the periods T2 and T3, the fifth scan line 2517 is at H level and the sixth transistor 2516 is off. Then, the same operation as the pixel circuit shown in FIG. 3 is performed. That is, in the period T2, the video signal voltage V _data and the first transistor
The voltage based on the threshold voltage | V _th | of 01 is held. Then, in the period T 3, the current I _OLED depending on the video signal voltage V _data is supplied to the light emitting element 315, and the light emitting element 315
To make it glow.

Note that in the sixth transistor 2516, the second electrode of the first transistor 301 is at V _d
It may be connected so as to be set to a potential lower than _ata − | V _th |. For example, FIG.
The first electrode of the sixth transistor 2516 is connected to the first transistor 301 as shown in FIG.
And a second electrode of the fourth transistor 304, and a first of the storage capacitors 306.
It may be connected to the electrode of

Although the second electrode of the sixth transistor 2516 is connected to the capacitor line 314 in FIG. 25, the second electrode of the sixth transistor 2516 may be connected to an existing wiring other than the capacitor line. . In particular, it may be a wiring to which a potential lower than V _data − | V _th | is applied in the period T1.

For example, as shown in FIG. 29, the second electrode of the sixth transistor 2516 may be connected to the second scan line 309. In the period T1, a potential at the L level is applied to the second scan line 309; therefore, the potential of the second electrode of the first transistor 301 is set to V _data − | V _th |
It can be set to a lower potential.

Note that since a potential at L level is also applied to the third scan line 310 in the period T 1, the second electrode of the sixth transistor 2516 may be connected to the third scan line 310.

Further, in order to set the second electrode of the first transistor 301 to a certain initial potential, an initialization line (initialization power supply line) may be additionally provided.

For example, FIG. 30 shows an example in the case where an initialization transistor and an initialization line are provided in the pixel circuit shown in FIG. In FIG. 30, a sixth transistor 2516, a fifth scan line 2517, and an initialization line 3018, which are initialization transistors, are newly added to the pixel circuit shown in FIG.
Note that in the sixth transistor 2516, the gate electrode is connected to the fifth scan line 2517, the first electrode is the second electrode of the first transistor 301, and the fourth transistor 30.
The second electrode is connected to the initialization line 3018 and is connected to the first electrode of the fourth transistor and the first electrode of the fifth transistor 305.

Further, the initialization potential V _ini is applied to the initialization line 3018. Note that the magnitude relation of potentials is V _ini <V _data − | V _th |.

The operation in the first period T1 of the pixel circuit shown in FIG. 30 is shown in FIG. In the period T1, the first transistor 301 is diode-connected, and a current flows in the initialization line 3018. As a result, the potentials of the second electrode of the first transistor 301 and the first electrode of the storage capacitor 306 become equal to the potential of the initialization line 3018, and the storage capacitor 306 receives the initialization potential V _in.
The difference V _ini −V _CL between _i and the potential V _CL of the capacitance line 314 is held.

By the above-described operation, in period T1, initialization voltage 3018 is applied to holding capacitance 306 as an initial voltage.
The potential difference V _{ini −} V _CL between the potential V _ini of the capacitor and the potential V _CL of the capacitance line 314 is held.

Thus, the initialization line 3018 is provided, and the potential of the second electrode of the first transistor 301 is set to the initialization potential V _ini which is lower than V _{data −│V th} │. The potential of the second electrode of the one transistor 301 can be reliably made lower than V _data − | V _th |, and compensation of the threshold voltage can be performed reliably.

In particular, the initialization potential V _{ini is set} to V _data − | V _th by newly providing an initialization line.
The second transistor 301 can be set to any potential lower than ||
The potential of the electrode of V can be made lower than V _data − | V _th | more reliably, and compensation of the threshold voltage can be performed more reliably.

Note that the sixth transistor 2516 may be connected so that the second electrode of the first transistor 301 is set to the initialization potential V _ini . For example, as shown in FIG.
The first electrode of the transistor 2516 may be connected to the gate electrode of the first transistor 301, the second electrode of the fourth transistor 304, and the first electrode of the storage capacitor 306.

Thus, by newly adding an initialization transistor and an initialization line and performing initialization, acquisition and compensation of the threshold voltage of the first transistor can be performed more reliably.

Further, in the method of initialization described in Embodiment 1, a current flows to the light emitting element during the initialization, and thus the light emitting element emits light in the period T1, but the light emitting element is shown in this embodiment. In the method, since current does not flow to the light emitting element during initialization, the light emitting element does not emit light in the period T1, and light emission of the light emitting element in periods other than the light emitting period can be suppressed.

In the present embodiment, the sixth transistor, which is an initialization transistor, is a P-channel transistor, but is not limited to this. It may be an N-channel type.

Although the sixth transistor is controlled using the fifth scan line in this embodiment, another existing wiring of pixels in other rows may be used instead of the fifth scan line. In particular, a wiring to which a voltage is applied so that the sixth transistor is turned on in the initialization period T1 is preferably used. For example, if the sixth transistor is a P-channel transistor, the fifth transistor
The first scan line of the pixels in the previous row may be used instead of the scan line of. In the case where the sixth transistor is an n-channel transistor, the second scan line of the pixels in the previous row may be used instead of the fifth scan line of the pixel. Thus, by using the existing wiring instead of the fifth scanning line, it is not necessary to newly provide the fifth scanning line in the pixel, so the number of wirings can be reduced, and the aperture ratio of the pixel can be reduced. Can raise

In the present embodiment, only the example in the case where the first transistor is a P-channel type (FIG. 3) has been described. However, the contents of the present embodiment are similar to the pixel circuit shown in FIG. The same applies to the case where the first transistor is an N-channel type.

Note that in the case where an initialization transistor is added to the pixel circuit shown in FIG. 8, the potential of the second electrode of the first transistor 801 is the video signal voltage V _data and the first transistor 801.
_{V th |} | _{V th} | | the sum _V data + threshold voltage of the connection to be set to a potential higher than. When an initialization line is added, the potential V _ini applied to the initialization line is V _da
The potential is set higher than _ta + | V _th |.

Note that this embodiment is an example in the case of embodying the contents (may be a part) described in the other embodiments, an example in the case of slight modification, an example in the case of changing a part, an improvement An example of the case,
An example of the case described in detail, an example of the case of application, an example of the relevant part, and the like are shown. Therefore, the contents described in the other embodiments can be freely applied to, combined with, or replaced with this embodiment.

Note that although the present embodiment has been described using various figures, the contents described in each figure (
Some parts may be applied to, or combined with, the contents described in another figure (or some parts).
Or, replacement can be freely performed. Furthermore, in the figures described above, more figures can be constructed by combining other parts with respect to each part.

Similarly, the contents (or a part) described in each figure of this embodiment can be applied to, combined with, or replaced with the contents (or a part) described in the figure of another embodiment. Can do it freely. Furthermore, in the drawings of the present embodiment, more parts can be configured by combining the parts of the other embodiments with respect to the respective parts.

Embodiment 4
In the first to third embodiments, the potential of the second power supply line is set to the fixed potential.
The potential of the second power supply line may be changed according to the fourth period. In the present embodiment, the first to fourth
The case where the potential of the second power supply line is changed according to the period of (1) will be described. Note that an EL element is described as an example of the light-emitting element.

For example, in the pixel circuit shown in FIG. 3, the fifth transistor 30 is used in the second period T2.
Although current is not supplied to the light emitting element 315 by turning off the transistor 5, for example, the fifth transistor 305 is eliminated and the second electrode of the first transistor 301 and the second element of the light emitting element 315 are removed. The current is not supplied to the light emitting element 315 by directly connecting the first electrode and setting the potential of the second power supply line 313 higher than the potential of the first electrode of the light emitting element 315 in the second period T2 can do. This is because the potential of the second power supply line 313 is set to the light emitting element 315
When the potential of the light emitting element 315 is higher than the potential of the first electrode of FIG. An example of this case is shown in FIG. 33 and FIG.

In FIG. 33, the second electrode of the first transistor 301 is directly connected to the first electrode of the light-emitting element 316 in the pixel circuit shown in FIG. Further, FIG. 34 shows a timing chart of video signal voltages and pulses inputted to the signal line 307 and the first to third scanning lines 308 to 310 and the second power supply line 313. First to third scanning lines 308 to 310
The timing of the pulses input to the pixel is the same as that of the pixel circuit shown in FIG.

In the second period T2, the potential of the second power supply line 313 is set to the difference V _data − | V _th | or more of the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 301. The light emitting element 315 can be reverse biased. Thus, period T
The current can not be supplied to the light emitting element 315 in 2.

In the first and third periods T1 and T3, the potential of the second power supply line 313 is set to the difference V _data − | V between the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 301.
By making the voltage lower than _{th 1} |, forward bias can be applied to the light emitting element 315. Thus, current can be supplied to the light emitting element 315 in the periods T1 and T3.

Note that as a method of initialization, the method of initialization using an initialization transistor described in Embodiment 3 may be used. An example of this case is shown in FIG.

In the pixel circuit shown in FIG. 35, the fifth transistor 305 and the fourth scan line 311 are removed in a diagram (FIG. 25) showing an example of performing initialization using an initialization transistor. The second electrode of the transistor 301 and the first electrode of the light emitting element 315 are connected. In this case, initialization is performed without flowing a current to the light-emitting element 315 by setting the potential of the second power supply line 313 higher than the potential of the second electrode of the first transistor 301 in the period T1. It becomes possible.

Further, as a method of initialization, the method of initialization using the initialization transistor and the initialization line described in Embodiment 3 may be used. An example of this case is shown in FIG.

In the pixel circuit shown in FIG. 36, the fifth transistor 305 and the fourth scan line 31 are shown in a diagram (FIG. 30) showing an example of performing initialization using an initialization transistor and an initialization line.
1 is removed, and the second electrode of the first transistor 301 and the first electrode of the light emitting element 315 are connected. In this case, the potential of the second power supply line 313 is set to the initialization potential V _{in in} the period T1.
By setting _i or more, initialization can be performed without flowing a current to the light emitting element 315.

In the present embodiment, only the example in the case where the first transistor is a P-channel type (FIG. 3) has been described. However, the contents of the present embodiment are similar to the pixel circuit shown in FIG. The same applies to the case where the first transistor is an N-channel type.

In the pixel circuit shown in FIG. 8, when the potential of the second power supply line 813 is changed in accordance with the period,
When the potential of the second power supply line 813 is lower than the potential of the second electrode of the light emitting element 815 in the period T2, reverse bias can be applied to the light emitting element 815. Accordingly, current can be prevented from flowing to the light emitting element 815 in the period T2.

Note that in the period T2, the potential of the second power supply line 813 is equal to or less than the sum V _data + | V _th | of the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 801. The above operation can be performed.

In the first and third periods T1 and T3, the potential of the second power supply line 813 is the sum of the video signal voltage V _data and the threshold voltage | V _th | of the first transistor 801 V _data + | V
_The light emitting element 815 can be forward biased by making it higher than _{th 1} |. Accordingly, current can be supplied to the light emitting element 815 in the periods T1 and T3.

Note that as a method of initialization, the method of initialization using an initialization transistor described in Embodiment 3 may be used. In this case, by making the potential of the second power supply line 813 lower than the potential of the second electrode of the first transistor 801 in the period T1, the light-emitting element 815 is formed.
It is possible to carry out initialization without flowing current.

Further, as a method of initialization, the method of initialization using the initialization transistor and the initialization line described in Embodiment 3 may be used. In this case, the second power supply line 813 in a period T1.
By setting the potential of _V.sub.in2 below the initialization potential _V.sub.ini , initialization can be performed without flowing a current to the light emitting element 815.

Thus, by changing the potential of the second power supply line according to the period, the light emission period (T3
In the period other than the above, current can not be supplied to the light emitting element, so that light emission of the light emitting element in the period other than the light emitting period can be suppressed. In addition, since it is not necessary to provide the fifth transistor and the fourth scan line, the aperture ratio of the pixel can be increased. In addition, since the number of scan line driver circuits can be reduced, power consumption can be reduced.

In addition, by changing the potential of the second power supply line depending on a period, reverse bias can be applied to the light emitting element. In particular, in the case where the light emitting element is an EL element, by applying a reverse bias, the deterioration state of the EL element can be improved, the reliability can be improved, and the life can be extended.

Note that the pixel configuration of the present invention may be applied to a pixel configuration in the case of performing an area gray scale method. That is, in the pixel configuration in which one pixel is divided into a plurality of sub-pixels, the pixel configuration of the present invention may be applied to each sub-pixel. As a result, the variation in luminance can be reduced for each sub-pixel, and high-quality, multi-gradation display can be performed.

Note that this embodiment is an example in the case of embodying the contents (may be a part) described in the other embodiments, an example in the case of slight modification, an example in the case of changing a part, an improvement An example of the case,
An example of the case described in detail, an example of the case of application, an example of the relevant part, and the like are shown. Therefore, the contents described in the other embodiments can be freely applied to, combined with, or replaced with this embodiment.

Note that although the present embodiment has been described using various figures, the contents described in each figure (
Some parts may be applied to, or combined with, the contents described in another figure (or some parts).
Or, replacement can be freely performed. Furthermore, in the figures described above, more figures can be constructed by combining other parts with respect to each part.

Similarly, the contents (or a part) described in each figure of this embodiment can be applied to, combined with, or replaced with the contents (or a part) described in the figure of another embodiment. Can do it freely. Furthermore, in the drawings of the present embodiment, more parts can be configured by combining the parts of the other embodiments with respect to the respective parts.

Fifth Embodiment
In this embodiment, the layout of pixels in the display device of the present invention will be described. For example,
A layout diagram of the pixel circuit shown in FIG. 3 is shown in FIG. The numbers given in FIG. 37 correspond to the numbers given in FIG. The layout diagram is not limited to FIG.

The pixel circuit shown in FIG. 3 includes first to fifth transistors 301 to 305, a storage capacitor 306, and the like.
Signal line 307, first to fourth scanning lines 308 to 311, first and second power supply lines 312 and 31
And 3, a capacitor line 314, and a light emitting element 315.

The first to fourth scanning lines 308 to 311 are formed by the first wiring, and the signal line 307, the first
The second power supply lines 312 and 313 and the capacitance line 314 are formed by the second wiring.

In the case of the top gate structure, the film is formed in the order of the substrate, the semiconductor layer, the gate insulating film, the first wiring, the interlayer insulating film, and the second wiring. In the case of the bottom gate structure, the film is formed in the order of the substrate, the first wiring, the gate insulating film, the semiconductor layer, the interlayer insulating film, and the second wiring.

In the pixel configuration of this embodiment, among the values of the ratio W / L of the channel length L and the channel width W of each of the first to fifth transistors, the value of W / L that the first transistor has To maximize the current flowing between the drain and source of the first transistor. As a result, when acquiring a voltage based on the video signal voltage V _data and the threshold voltage | V _th | of the first transistor in the period T2, the operation can be performed with a larger current, and therefore, the operation can be performed more quickly. become able to. Further, the current I _OLED flowing to the light emitting element in the period T3 can be further increased, and the luminance can be further increased. Therefore, in order to maximize the value of W / L that the first transistor has, in FIG. 37, the channel width W that the first transistor 301 has among the first to fifth transistors is maximized. I have to.

Although the first to fifth transistors 301 to 305 are described as single gate structures in this embodiment, the present invention is not limited to this. The structures of the first to fifth transistors 301 to 305 can take various forms. For example, a multi-gate structure in which two or more gate electrodes are provided may be used. In the multi-gate structure, channel regions are connected in series, so that a plurality of transistors are connected in series. The multi-gate structure reduces the off-state current, improves the withstand voltage of the transistor to improve reliability, and operates in the saturation region, even when the drain-source voltage changes. The inter-current does not change so much and flat characteristics can be achieved. In addition, gate electrodes may be disposed above and below the channel. With the structure in which the gate electrodes are arranged above and below the channel, the channel region is increased, so that the current value can be increased and the depletion layer can be easily formed, and the S coefficient (subthreshold coefficient) can be reduced. . When gate electrodes are disposed above and below the channel, a plurality of transistors are connected in parallel. In addition, the gate electrode may be disposed above the channel, the gate electrode may be disposed below the channel, a positive stagger structure, or an inverted stagger structure may be used. The channel region may be divided into a plurality of regions, may be connected in parallel, or may be connected in series. In addition, the source electrode or the drain electrode may overlap with the channel (or a part thereof). With the structure in which the source electrode and the drain electrode overlap with the channel (or a part thereof), charge can be prevented from being accumulated in part of the channel and the operation becomes unstable. Also, L
There may be a DD area. By providing the LDD region, the off current can be reduced, the withstand voltage of the transistor can be improved to improve the reliability, and when operating in the saturation region, the drain
Even if the voltage between sources changes, the current between drain and source does not change so much, and flat characteristics can be obtained.

Note that wiring, electrodes, conductive layers, conductive films, terminals, vias, plugs, etc. are made of aluminum (Al)
Tantalum (Ta), titanium (Ti), molybdenum (Mo), tungsten (W), neodymium (Nd), chromium (Cr), nickel (Ni), platinum (Pt), gold (Au), silver
Ag), copper (Cu), magnesium (Mg), scandium (Sc), cobalt (Co), zinc (Zn), niobium (Nb), silicon (Si), phosphorus (P)
), Boron (B), arsenic (As), gallium (Ga), indium (In), tin (
A compound containing one or more elements selected from the group consisting of Sn), oxygen (O), or one or more elements selected from the above group, an alloy material (for example, indium tin Oxide (ITO), indium zinc oxide (IZO), indium tin oxide (ITSO) containing silicon oxide, zinc oxide (ZnO), tin oxide (SnO), tin oxide cadmium (
CTO), aluminum neodymium (Al-Nd), magnesium silver (Mg-Ag), molybdenum-niobium (Mo-Nb), etc. are desirable. Alternatively, the wiring, the electrode, the conductive layer, the conductive film, the terminal, and the like are preferably formed using a material in which these compounds are combined. Alternatively, a compound (silicide) of one or more elements selected from the above group and silicon (eg, aluminum silicon, molybdenum silicon, nickel silicide, etc.), one or more elements selected from the above group, and nitrogen It is desirable that the layer be formed to have a compound (eg, titanium nitride, tantalum nitride, molybdenum nitride, or the like).

In addition, n-type impurities (phosphorus etc.) or p-type impurities (boron etc.) to silicon (Si)
May be included. Since the silicon contains impurities, the conductivity can be improved and the same behavior as a normal conductor can be achieved. Therefore, it becomes easy to utilize as wiring, an electrode, etc.

Note that as silicon, silicon having various crystallinity such as single crystal, polycrystal (polysilicon), microcrystalline (microcrystal silicon), and the like can be used. Alternatively, silicon which does not have crystallinity such as amorphous (amorphous silicon) can be used. By using single crystal silicon or polycrystalline silicon, resistance of a wiring, an electrode, a conductive layer, a conductive film, a terminal, and the like can be reduced. By using amorphous silicon or microcrystalline silicon, a wiring or the like can be formed by a simple process.

Note that aluminum or silver has high conductivity, so that signal delay can be reduced.
Furthermore, since it is easy to etch, it is easy to pattern and fine processing can be performed.

In addition, since copper has high conductivity, signal delay can be reduced. When using copper,
In order to improve adhesion, it is desirable to use a laminated structure.

Molybdenum or titanium is desirable because it has advantages such as not causing defects, easy etching, and high heat resistance even when in contact with an oxide semiconductor (ITO, IZO, or the like) or silicon.

Tungsten is desirable because it has advantages such as high heat resistance.

Neodymium is desirable because it has advantages such as high heat resistance. In particular, when an alloy of neodymium and aluminum is used, the heat resistance is improved and the aluminum is less likely to cause hillocks.

Note that silicon is preferable because it has advantages such as high heat resistance that can be formed at the same time as a semiconductor layer included in a transistor.

In addition, ITO, IZO, ITSO, zinc oxide (ZnO), silicon (Si), tin oxide (S
Since nO) and cadmium tin oxide (CTO) have translucency, they can be used in a part that transmits light. For example, it can be used as a pixel electrode or a common electrode.

Note that IZO is desirable because it is easy to etch and process. It is also less likely that IZO will leave a residue when it is etched. Therefore, when IZO is used as a pixel electrode, it is possible to reduce the occurrence of defects (such as short circuit or alignment disorder) in a liquid crystal element or a light emitting element.

Note that the wirings, electrodes, conductive layers, conductive films, terminals, vias, plugs, etc. may have a single-layer structure,
It may be a multilayer structure. With a single-layer structure, manufacturing steps of a wiring, an electrode, a conductive layer, a conductive film, a terminal, and the like can be simplified, the number of process days can be reduced, and the cost can be reduced. Alternatively, by using a multilayer structure, it is possible to reduce disadvantages and to form wirings, electrodes, and the like with high performance while taking advantage of the merits of the respective materials.
For example, by including a low resistance material (such as aluminum) in the multilayer structure, the resistance of the wiring can be reduced. In addition, by using a stacked structure in which a low heat resistant material is sandwiched between high heat resistant materials, the heat resistance of a wiring, an electrode, and the like can be increased while taking advantage of the low heat resistant material. For example, it is preferable to form a stacked structure in which a layer containing aluminum is sandwiched by layers containing molybdenum, titanium, neodymium and the like.

In addition, when wires, electrodes, and the like are in direct contact with each other, they may adversely affect each other. For example, one of the wires, electrodes, and the like is contained in the material of the other wire, electrode, and the like, and the properties are changed, and the original purpose can not be achieved. As another example, when forming or manufacturing a high resistance portion, a problem may occur and it can not be manufactured normally. In such a case, it is preferable to sandwich or cover a material that is more reactive due to the laminated structure with a less reactive material. For example, when connecting ITO and aluminum, it is desirable to sandwich titanium, molybdenum and neodymium alloy between ITO and aluminum. Also, when connecting silicon and aluminum, titanium, molybdenum, etc. between ITO and aluminum
It is desirable to sandwich a neodymium alloy.

Note that the wiring refers to one in which a conductor is disposed. It may be extended linearly, or may be arranged short without extension. Thus, the electrodes are included in the wiring.

Note that a carbon nanotube may be used as a wiring, an electrode, a conductive layer, a conductive film, a terminal, a via, a plug, or the like. Furthermore, since carbon nanotubes have translucency, they can be used in portions through which light is transmitted. For example, it can be used as a pixel electrode or a common electrode.

Note that this embodiment is an example in the case of embodying the contents (may be a part) described in the other embodiments, an example in the case of slight modification, an example in the case of changing a part, an improvement An example of the case,
An example of the case described in detail, an example of the case of application, an example of the relevant part, and the like are shown. Therefore, the contents described in the other embodiments can be freely applied to, combined with, or replaced with this embodiment.

Note that although the present embodiment has been described using various figures, the contents described in each figure (
Some parts may be applied to, or combined with, the contents described in another figure (or some parts).
Or, replacement can be freely performed. Furthermore, in the figures described above, more figures can be constructed by combining other parts with respect to each part.

Similarly, the contents (or a part) described in each figure of this embodiment can be applied to, combined with, or replaced with the contents (or a part) described in the figure of another embodiment. Can do it freely. Furthermore, in the drawings of the present embodiment, more parts can be configured by combining the parts of the other embodiments with respect to the respective parts.

Sixth Embodiment
In this embodiment, the configuration and operation of a signal line driver circuit, a scan line driver circuit, and the like in a display device are described.

First, the case of using a pixel configuration in which the operation is controlled using the signal line and the first to fourth scanning lines as illustrated in FIG. 3 and FIG. 8 as the pixel configuration will be described. Here, a case where the pixel configuration shown in FIG. 3 is used as the pixel configuration will be described as an example. An example of the configuration of the display device in this case is shown in FIG.

The display device illustrated in FIG. 38 includes a pixel portion 3801 and first to fourth scan line driver circuits 3
805, including the signal line driver circuit 3806, the first scan line driver circuit 3802 and the first scan line 308 are connected, and the second scan line driver circuit 3803 and the second scan line 309 are connected. The third scan line drive circuit 3804 and the third scan line 310 are connected, the fourth scan line drive circuit 3805 and the fourth scan line 311 are connected, and the signal line drive circuit 3806 and the signal are connected. The line 307 is connected. The reference numerals given to the first to fourth scanning lines and signal lines are shown in FIG.
It corresponds to the code attached to.

First, the scan line drive circuit will be described. The first scan line driver circuit 3802 is a circuit for sequentially outputting a selection signal to the first scan line 308. Second to fourth scan line drive circuits 3
The same applies to 803 to 3805. Thus, the selection signal is written to the pixel portion 3801.

Here, a configuration example of the first to fourth scanning line driving circuits 3802 to 3805 is shown in FIG. First
The fourth scan line driver circuits 3802 to 3805 mainly include a shift register 3901, an amplifier circuit 3902, and the like.

Next, the operation of the first to fourth scan line drive circuits 3802 to 3805 shown in FIG. 39 will be briefly described. The clock register (G-CLK) and the start pulse (
G-SP), clock inverted signal (G-CLKB) is input, and sampling pulses are sequentially output according to the timing of these signals. The output sampling pulse is amplified by the amplifier circuit 3902 and input to the pixel unit (X54) 01 from each scanning line.

Note that as a configuration of the amplifier circuit 3902, a buffer circuit may be included or a level shifter circuit may be included. In addition, the scan line driver circuit includes a shift register 3901 and an amplifier circuit 39.
In addition to 02, a pulse width control circuit or the like may be arranged.

Next, the signal line drive circuit will be described. The signal line driver circuit 3806 is a circuit for sequentially outputting a video signal to the signal line 307 connected to the pixel portion. Signal line drive circuit 3806
Are output to the pixel unit 3801. The pixel portion 3801 displays an image by controlling the light emission state of the pixel in accordance with the video signal.

Here, a configuration example of the signal line driver circuit 3806 is shown in FIG. FIG. 40A illustrates an example of the signal line driver circuit 3806 in the case of supplying signals to pixels by line sequential drive. The signal line driver circuit 3806 in this case mainly includes the shift register 4001 and the first latch circuit 4002.
, The second latch circuit 4003, the amplifier circuit 4004, and the like. The amplifier circuit 40
The structure of 04 may include a buffer circuit, a level shifter circuit, a circuit having a function of converting a digital signal into an analog, or a function of performing gamma correction. You may have the circuit which it has.

Next, the operation of the signal line driver circuit 3806 shown in FIG. 40A will be briefly described. The clock signal (S-CLK), the start pulse (S-SP), and the clock inverted signal (S-CLKB) are input to the shift register 4001, and sampling pulses are sequentially output according to the timing of these signals.

The sampling pulse output from shift register 4001 is transmitted to first latch circuit 400.
Input to 2 A video signal is input at a voltage V _data from the video signal line to the first latch circuit 4002, and the video signal is held in each column in accordance with the timing at which the sampling pulse is input.

In the first latch circuit 4002, when holding of the video signal is completed to the final column, a latch signal is input from the latch control line during the horizontal flyback period, and the video signal held in the first latch circuit 4002 is , All at once, to the second latch circuit (X56) 03. After that, the video signal held in the second latch circuit 4003 is amplified for one row at a time.
It is input to 4. Then, the amplitude of the video signal voltage V _data is amplified by the amplifier circuit 4004, and the video signal is input to the pixel portion 3801 from each signal line.

While the video signal held in the second latch circuit 4003 is input to the amplifier circuit 4004 and then input to the pixel portion 3801, the sampling pulse is output again in the shift register 4001. That is, two operations are performed simultaneously. This enables line sequential driving. Thereafter, this operation is repeated.

Note that there are also cases where signals are supplied to pixels by point-sequential driving. Signal line drive circuit 380 in that case
An example of 6 is shown in FIG. The signal line driver circuit 3806 in this case includes a shift register 4001, a sampling circuit 4005, and the like. From shift register 4001
The sampling pulse is output to the sampling circuit 4005. In addition, a video signal is input to the sampling circuit 4005 from the video signal line at a voltage V _data , and the video signal is sequentially output to the pixel portion 3801 in accordance with a sampling pulse. This enables point-sequential driving.

Note that the signal line driver circuit and a part thereof (a current source circuit, an amplifier circuit, and the like) do not exist on the same substrate as the pixel portion 3801 and may be configured using an external IC chip, for example.

The pixel circuit of the present invention can be driven by using the scan line driver circuit and the signal line driver circuit as described above.

Note that, for example, in the pixel circuits shown in FIG. 3 and FIG. 8, selection signals inverted to each other are input to the first and second scanning lines. Therefore, using either one of the first and second scan line driving circuits, a selection signal input to one of the first and second scan lines is controlled, and the other scan line is controlled by the selection signal. An inverted signal may be input. An example of the configuration of the display device in this case is shown in FIG.
Shown in.

The display device illustrated in FIG. 41 includes a pixel portion 3801 and first, third, and fourth scan line driver circuits 380.
2, 3804 and 3805, a signal line drive circuit 3806, and an inverter 3807,
The first scan line driving circuit 3802 and the first scan line 308 are connected, and the second scan line 309 is connected.
Are connected to the first scan line driver circuit 3802 via the inverter 3807. The connections of the other scanning line driving circuits and the signal line driving circuits are similar to those of the display device shown in FIG. 38, and thus the description thereof is omitted here. The reference numerals given to the first to fourth scanning lines and the signal lines correspond to the reference numerals given in FIG.

In the display device shown in FIG. 41, the first scan line 30 is formed using the first scan line drive circuit 3802.
The selection signal input to 8 is controlled, and the inverted signal of the selection signal input to the first scan line 308 generated using the inverter 3807 is input to the second scan line 309.

Further, for example, in the pixel configurations shown in FIG. 3 and FIG. 8, the same selection signal is input to the second and fourth scanning lines. Therefore, as in the pixel configuration shown in FIGS. 14 and 15, the third and fifth transistors may be controlled using the same scan line. An example of the configuration of the display device in this case is shown in FIG. The case of using the pixel configuration shown in FIG. 14 as the pixel configuration will be described as an example.

FIG. 42 is a configuration example of a display device in the case of controlling the third and fifth transistors 303 and 305 using the second scan line 309. The display device illustrated in FIG.
First to third scan line driver circuits 3802 to 3804 and a signal line driver circuit 3806 are provided. The connection of each drive circuit is similar to that of the display device shown in FIG. The reference numerals attached to the first to third scanning lines, the signal lines, and the third and fifth transistors correspond to the reference numerals in FIG.

In addition, for example, as in the pixel configuration illustrated in FIG. 20, the second transistor may be formed by changing the conductivity type to a transistor other than the second transistor.
And the third transistor and the fifth transistor can be controlled by the same scan line. A configuration example of the display device in this case is shown in FIG.

In FIG. 43, the second, third, and fifth transistors 302, 303, and 305 are connected to the first scan line 3;
It is an example of composition of a display in the case of controlling using 08. The display device illustrated in FIG. 43 includes a pixel portion 3801, first and third scan line driver circuits 3802 and 3804, and a signal line driver circuit 380.
It has six. The connection of each drive circuit is similar to that of the display device shown in FIG. The reference numerals attached to the first and third scanning lines, the signal line, and the second, third and fifth transistors correspond to the reference numerals in FIG.

As described above, the pixel circuit of the present invention can be driven by setting the configuration of the display device as shown in FIGS.

Note that the number of scan lines and scan line driver circuits can be reduced by configuring the display device as illustrated in FIGS. 41 to 43, so that the aperture ratio of the pixel portion can be increased. In addition, power consumption can be reduced. In addition, by reducing the number of scan line driver circuits, the frame can be narrowed and the area occupied by the pixel portion can be increased.

The configurations of the signal line driver circuit, the scan line driver circuit, and the like are not limited to those in FIGS.

Note that the transistor in the present invention may be any type of transistor or may be formed on any substrate. Therefore, all the circuits as shown in FIGS. 38 to 43 may be formed on a glass substrate, may be formed on a plastic substrate, or may be formed on a single crystal substrate. Or may be formed on an SOI substrate, or may be formed on any substrate. Alternatively, a part of the circuits in FIGS. 38 to 43 may be formed on one substrate, and another part of the circuits in FIGS. 38 to 43 may be formed on another substrate. That is, all the circuits in FIGS. 38 to 43 may not be formed on the same substrate. For example, in FIGS. 38 to 43, the pixel portion and the scan line driver circuit are formed using a transistor over a glass substrate, and the signal line driver circuit (or a part thereof) is formed over a single crystal substrate, COG (Chip On Glass) for the IC chip
) And may be disposed on a glass substrate. Or, the IC chip is TAB (Ta
It may be connected to the glass substrate using pe Automated Bonding or a printed circuit board. By thus forming part of the circuit on the same substrate, the number of components can be reduced to reduce the cost, and the number of connections to circuit components can be reduced to improve the reliability. In addition, since power consumption increases at portions where the drive voltage is high and portions where the drive frequency is high, improvement in power consumption can be prevented by not forming such portions on the same substrate.

Note that this embodiment is an example in the case of embodying the contents (may be a part) described in the other embodiments, an example in the case of slight modification, an example in the case of changing a part, an improvement An example of the case,
An example of the case described in detail, an example of the case of application, an example of the relevant part, and the like are shown. Therefore, the contents described in the other embodiments can be freely applied to, combined with, or replaced with this embodiment.

Note that although the present embodiment has been described using various figures, the contents described in each figure (
Some parts may be applied to, or combined with, the contents described in another figure (or some parts).
Or, replacement can be freely performed. Furthermore, in the figures described above, more figures can be constructed by combining other parts with respect to each part.

Similarly, the contents (or a part) described in each figure of this embodiment can be applied to, combined with, or replaced with the contents (or a part) described in the figure of another embodiment. Can do it freely. Furthermore, in the drawings of the present embodiment, more parts can be configured by combining the parts of the other embodiments with respect to the respective parts.

Seventh Embodiment
In this embodiment mode, a display panel used for a display device of the present invention will be described with reference to FIG. FIG. 44 (a) is a top view showing the display panel, and FIG. 44 (b) is a cross-sectional view of FIG. 44 (a) cut along the line AA '. Signal line drive circuit 4401 shown by dotted lines, pixel portion 44
And a first scan line driver circuit 4403 and a second scan line driver circuit 4406. Also,
A sealing substrate 4404 and a sealing material 4405 are provided, and the inside surrounded by the sealing material 4405 is a space 4407.

Note that a wiring 4408 is a wiring for transmitting a signal input to the first scan line driver circuit 4403, the second scan line driver circuit 4406, and the signal line driver circuit 4401, and from the FPC 4409 serving as an external input terminal. Receives signals, clock signals, start signals, etc. FP
An IC chip (a semiconductor chip on which a memory circuit, a buffer circuit, and the like are formed) 4422 and 4423 are formed on a junction between the C4409 and the display panel.
Etc.). Although only the FPC is shown here, a printed wiring board (PWB) may be attached to this FPC.

Next, the cross-sectional structure will be described with reference to FIG. The pixel portion 44 on the substrate 4410
02 and their peripheral drive circuits (first scan line drive circuit 4403, second scan line drive circuit 440
6 and the signal line drive circuit 4401), but here, the signal line drive circuit 440 is
1 and the pixel portion 4402 are shown.

Note that the signal line driver circuit 4401 is formed of a large number of transistors such as the transistor 4420 and the transistor 4421. Further, in the present embodiment, the display panel in which the peripheral drive circuit is integrally formed on the substrate is shown, but this is not always necessary. All or part of the peripheral drive circuit is formed on an IC chip or the like and mounted by COG or the like. May be

In addition, the pixel portion 4402 includes a plurality of circuits included in a pixel including the switching transistor 4411 and the driving transistor 4412. The driving transistor 4
The source electrode 412 is connected to the first electrode 4413. In addition, the first electrode 4413
An insulator 4414 is formed covering the end of the. Here, it is formed by using a positive photosensitive acrylic resin film.

In addition, in order to improve coverage, a curved surface having a curvature is formed at the upper end portion or the lower end portion of the insulator 4414. For example, in the case of using positive photosensitive acrylic as the material of the insulator 4414, the curvature radius (0.2 μm to 3 μm) is formed only at the upper end portion of the insulator 4414.
It is preferable to have a curved surface having m). Further, as the insulator 4414, either a negative type which becomes insoluble in etchant by photosensitive light or a positive type which becomes soluble in etchant by light can be used.

A layer 4416 containing an organic compound and a second electrode 4417 are formed over the first electrode 4413, respectively. Here, as a material used for the first electrode 4413 which functions as an anode, a material having a high work function is preferably used. For example, in addition to a single layer film such as an ITO (indium tin oxide) film, an indium zinc oxide (IZO) film, a titanium nitride film, a chromium film, a tungsten film, a Zn film, or a Pt film, titanium nitride and aluminum are main components A stacked structure with a film to be formed, a three-layer structure of a titanium nitride film, a film containing aluminum as a main component, and a titanium nitride film can be used. Note that when a stacked structure is employed, the resistance as a wiring is low, a favorable ohmic contact can be obtained, and the electrode can further function as an anode.

In addition, the layer 4416 containing an organic compound is formed by an evaporation method using an evaporation mask, or an inkjet method. In the layer 4416 containing an organic compound, a periodic table group 4 metal complex is used as a part thereof, and as a material that can be used in combination, even a low molecular weight material is a high molecular weight material. It may be. In addition, as a material used for the layer containing an organic compound, in general, an organic compound is often used in a single layer or a laminate, but in the present embodiment, an inorganic compound is used in part of a film made of an organic compound. I will include it.
Furthermore, it is also possible to use known triplet materials.

Furthermore, as a material used for the second electrode 4417 which is a cathode and formed over the layer 4416 containing an organic compound, a material having a small work function (Al, Ag, Li, Ca, or their alloy MgAg, MgIn, AlLi, CaF ₂ or calcium nitride may be used. Note that in the case where light generated in the layer 4416 containing an organic compound transmits the second electrode 4417, a metal thin film with a thin film thickness and a transparent conductive film (ITO (indium tin oxide) can be used as the second electrode 4417. ), Indium oxide-zinc oxide alloy (In ₂ O ₃ -ZnO), zinc oxide (ZnO), etc.) is preferably used.

Further, the sealing substrate 4404 is attached to the substrate 4410 with a sealant 4405, whereby a light emitting element 4418 is provided in a space 4407 surrounded by the substrate 4410, the sealing substrate 4404, and the sealant 4405. . In the space 4407, inert gas (
In addition to the case where nitrogen, argon, or the like is filled, a structure filled with a sealant 4405 is also included.

Note that an epoxy-based resin is preferably used for the sealing material 4405. In addition, it is desirable that these materials do not transmit moisture and oxygen as much as possible. In addition, the sealing substrate 440
In addition to glass and quartz substrates as materials used for 4, FRP (Fiberglass-Re
imposed Plastics), PVF (Polyvinyl Fluoride), Mylar,
A plastic substrate made of polyester or acrylic can be used.

As described above, a display panel having the pixel configuration of the present invention can be obtained.

By integrally forming the signal line driver circuit 4401, the pixel portion 4402, the first scan line driver circuit 4403, and the second scan line driver circuit 4406 as shown in FIG. 44, cost reduction of the display device can be achieved. Note that the signal line driver circuit 4401, the pixel portion 4402, and the first scan line driver circuit 4
By making the transistors used for the 403 and the second scan line driver circuit 4406 unipolar, the manufacturing process can be simplified and the cost can be further reduced. In addition, signal line drive circuit 4
401, a pixel portion 4402, a first scan line drive circuit 4403 and a second scan line drive circuit 44
Further cost reduction can be achieved by applying amorphous silicon to the semiconductor layer of the transistor used for 06.

Note that as the configuration of the display panel, as shown in FIG.
The present invention is not limited to the structure in which the pixel portion 4402, the first scan line drive circuit 4403, and the second scan line drive circuit 4406 are integrally formed, and a signal line drive circuit corresponding to the signal line drive circuit 4401 can
It may be formed on a C chip and mounted on a display panel by COG or the like.

That is, only the signal line driver circuit that requires high-speed operation of the driver circuit can be
It is formed on a C chip to reduce power consumption. Further, by using an IC chip as a semiconductor chip such as a silicon wafer, higher speed operation and lower power consumption can be achieved.

Further, cost reduction can be achieved by integrally forming the scanning line driving circuit with the pixel portion. Note that the cost can be further reduced by forming the scan line driver circuit and the pixel portion with unipolar transistors. The structure described in Embodiment 1 to 4 can be applied to the structure of the pixel included in the pixel portion. In addition, by using amorphous silicon for the semiconductor layer of the transistor, the manufacturing process can be simplified and the cost can be further reduced.

Thus, the cost of the high definition display device can be reduced. In addition, the FPC 4409 and the substrate 441
By mounting an IC chip in which a functional circuit (memory or buffer) is formed at the connection portion with 0, the substrate area can be effectively used.

In addition, the signal line drive circuit 4401 and the first scan line drive circuit 4403 and the second in FIG.
A signal line drive circuit corresponding to the scan line drive circuit 4406, a first scan line drive circuit, and a second scan line drive circuit may be formed on an IC chip and mounted on a display panel by COG or the like. . In this case, it is possible to reduce the power consumption of the high definition display device. Therefore, in order to obtain a display device with lower power consumption, polysilicon is preferably used for a semiconductor layer of a transistor used in a pixel portion.

In addition, cost reduction can be achieved by using amorphous silicon for the semiconductor layer of the transistor in the pixel portion 4402. Furthermore, it also becomes possible to produce a large display panel.

Note that the scan line driver circuit and the signal line driver circuit are not limited to being provided in the row direction and the column direction of the pixels.

Next, an example of a light emitting element applicable to the light emitting element 4418 is illustrated in FIG.

An anode 4502, a hole injection layer 4503 made of a hole injection material, a hole transport layer 4504 made of a hole transport material, a light emitting layer 4505, an electron transport layer 4506 made of an electron transport material, an electron In the device structure, an electron injection layer 4507 made of an injection material and a cathode 4508 are stacked. Here, the light emitting layer 4505 may be formed of only one kind of light emitting material, or may be formed of two or more kinds of materials. The structure of the device of the present invention is
It is not limited to this structure.

In addition to the laminated structure in which each functional layer shown in FIG. 45 is laminated, variations such as a device using a polymer compound, a high efficiency device using a triplet light emitting material emitting light from a triplet excited state for the light emitting layer, etc. A wide variety. The present invention can also be applied to a white light emitting element obtained by controlling the carrier recombination region by the hole blocking layer and dividing the light emitting region into two regions.

Next, a method for manufacturing a device of the present invention shown in FIG. 45 will be described. First, the anode 4502 (IT
A hole injecting material, a hole transporting material, and a light emitting material are sequentially deposited on a substrate 4501 having O (indium tin oxide). Next, an electron transport material and an electron injection material are deposited, and finally, a cathode 4508 is formed by deposition.

Next, materials suitable for the hole injection material, the hole transport material, the electron transport material, the electron injection material, and the light emitting material are listed below.

As the hole injection material, if it is an organic compound, a porphyrin type compound or phthalocyanine (
Hereinafter, “H ₂ Pc”), copper phthalocyanine (hereinafter “CuPc”) and the like are effective. In addition, as long as the material has a smaller ionization potential than the hole transport material to be used and has a hole transport function, it can also be used as a hole injection material. There are also materials obtained by chemically doping conductive polymer compounds, such as polyethylene dioxythiophene (hereinafter referred to as “PEDOT”) doped with polystyrene sulfonic acid (hereinafter referred to as “PSS”),
Polyaniline etc. are mentioned. In addition, a polymer compound of an insulator is also effective in terms of flattening of the anode, and polyimide (hereinafter referred to as "PI") is often used. Furthermore, inorganic compounds are also used, and in addition to metal thin films such as gold and platinum, there are ultra thin films of aluminum oxide (hereinafter referred to as "alumina") and the like.

The most widely used hole transport materials are aromatic amine compounds (ie, those having a benzene ring-nitrogen bond). As widely used materials, 4,4
'-Bis (diphenylamino) -biphenyl (hereinafter referred to as "TAD") or its derivative 4,4'-bis [N- (3-methylphenyl) -N-phenyl-amino] -biphenyl , “TPD”), 4,4′-bis [N- (1-naphthyl) -N-phenyl-amino] -biphenyl (hereinafter referred to as “α-NPD”). 4,4 ', 4 "-tris (N, N-diphenyl-amino) -triphenylamine (hereinafter referred to as" TDATA "), 4,4', 4" -tris [N- (3-methylphenyl) Starburst type aromatic amine compounds such as -N-phenyl-amino] -triphenylamine (hereinafter referred to as "MTDATA") can be mentioned.

As the electron transporting material, metal complexes are often used, and tris (8-quinolinolato) aluminum (hereinafter referred to as “Alq ₃ ”), BAlq, tris (4-methyl-8-quinolinolato) aluminum (hereinafter “Almq” Notation), bis (10-hydroxy benzo [h]-
And quinolinato) metal complexes having a quinoline skeleton such as beryllium (hereinafter referred to as "Bebq") or a benzoquinoline skeleton. In addition, bis [2- (2-hydroxyphenyl) -benzoxazolato] zinc (hereinafter referred to as “Zn (BOX) ₂ ”), bis [2- (2)
There are also metal complexes having an oxazole-based or thiazole-based ligand such as -hydroxyphenyl) -benzothiazolatozinc (hereinafter referred to as "Zn (BTZ) ₂ "). Furthermore, other than metal complexes, 2- (4-biphenylyl) -5- (4-tert-butylphenyl) -1,
3,4-oxadiazole (hereinafter referred to as "PBD"), oxadiazole derivatives such as OXD-7, TAZ, 3- (4-tert-butylphenyl) -4- (4-ethylphenyl) -5 -(4-biphenylyl) -1,2,4-triazole (hereinafter referred to as "p-EtTAZ"
And the like, and phenanthroline derivatives such as bathophenanthroline (hereinafter referred to as "BPhen") and BCP have electron transportability.

As the electron injecting material, the electron transporting material described above can be used. Besides, ultra thin films of insulators such as metal halides such as calcium fluoride, lithium fluoride and cesium fluoride and alkali metal oxides such as lithium oxide are often used. Further, alkali metal complexes such as lithium acetylacetonate (hereinafter referred to as "Li (acac)") and 8-quinolinolato-lithium (hereinafter referred to as "Liq") are also effective.

As the light emitting material, Alq ₃ , Almq, BeBq, BAlq, Zn (BOX described above) (BOX
₂ ) In addition to metal complexes such as Zn (BTZ) ₂ , various fluorescent dyes are effective. As a fluorescent dye, blue 4,4'-bis (2,2-diphenyl-vinyl) -biphenyl and reddish orange 4- (dicyanomethylene) -2-methyl-6- (p-dimethylaminostyryl)- 4
There is H-pyran and the like. In addition, a triplet light emitting material is also possible, and is mainly a complex having platinum or iridium as a central metal. As a triplet light emitting material, tris (2-phenylpyridine) iridium, bis (2- (4'-tolyl) pyridinato-N, C2 ^' ) acetylacetonato iridium (hereinafter referred to as "acacIr (tpy) ₂ "), 2, 3, 7, 8, 12
, 13, 17, 18-octaethyl-21H, 23H porphyrin-platinum and the like are known.

A highly reliable light-emitting element can be manufactured by combining the materials having the functions as described above.

Alternatively, a light-emitting element in which layers are formed in the reverse order to that in FIG. 45 can also be used. That is, the cathode 4508, the electron injection layer 4507 made of an electron injection material, the electron transport layer 4506 made of an electron transport material, the light emitting layer 4505, the hole transport layer 4504 made of a hole transport material, positive It is a device structure in which a hole injection layer 4503 made of a hole injection material and an anode 4502 are stacked.

In the light emitting element, at least one of the anode and the cathode may be transparent in order to extract light. Then, a transistor and a light emitting element are formed over the substrate, and light emission is extracted from the surface opposite to the substrate, or light emission from the surface of the substrate is extracted, or light emission is extracted from the surface on the substrate side. There is a light emitting element of double-sided emission structure for extracting light emission from the above, and the pixel configuration of the present invention can be applied to a light emitting element of any emission structure.

First, a light emitting element having a top emission structure will be described with reference to FIG.

The driving transistor 4601 is formed over the substrate 4600, and the driving transistor 4601 is formed.
The first electrode 4602 is formed in contact with the source electrode of the second layer, and the layer 46 containing an organic compound is formed thereon.
03 and a second electrode 4604 are formed.

The first electrode 4602 is an anode of a light emitting element. The second electrode 4604 is a cathode of the light emitting element. That is, a portion where the layer 4603 containing an organic compound is sandwiched between the first electrode 4602 and the second electrode 4604 is a light-emitting element.

Here, as a material used for the first electrode 4602 which functions as an anode, a material having a high work function is preferably used. For example, a single layer film such as a titanium nitride film, a chromium film, a tungsten film, a Zn film, or a Pt film, a stack of a film containing titanium nitride and aluminum as its main component, a film containing titanium nitride and aluminum as its main component A three-layer structure or the like and a titanium nitride film can be used. Note that when a stacked structure is employed, the resistance as a wiring is low, a favorable ohmic contact can be obtained, and the electrode can further function as an anode. By using a metal film that reflects light, an anode that does not transmit light can be formed.

In addition, as a material used for the second electrode 4604 which functions as a cathode, a material having a small work function (Al, Ag, Li, Ca, or an alloy of these materials MgAg, MgIn, AlLi, C
It is preferable to use a stack of a metal thin film made of aF ₂ or calcium nitride and a transparent conductive film (ITO (indium tin oxide), indium zinc oxide (IZO), zinc oxide (ZnO) or the like). Thus, by using a thin metal thin film and a transparent conductive film having transparency, a cathode capable of transmitting light can be formed.

Thus, as shown by the arrows in FIG. 46A, it is possible to extract light from the light emitting element on the top surface. That is, in the case of applying to the display panel in FIG. 44, light is emitted to the sealing substrate 4404 side. Therefore, in the case of using a light-emitting element having a top emission structure for a display device, the sealing substrate 4404 is a light-transmitting substrate.

In the case of providing an optical film, the optical film may be provided on the sealing substrate 4404.

Note that the first electrode 4602 can also be formed using a metal film formed of a material having a small work function, such as MgAg, MgIn, or AlLi, which functions as a cathode. In this case, the second
ITO (indium tin oxide) film, indium zinc oxide (IZO)
Etc. can be used. Therefore, according to this configuration, the transmittance of the top emission can be increased.

Next, a light emitting element with a bottom emission structure will be described with reference to FIG. Since the light emitting element is the same as that shown in FIG.

Here, as a material used for the first electrode 4602 which functions as an anode, a material having a high work function is preferably used. For example, a transparent conductive film such as an ITO (indium tin oxide) film or an indium zinc oxide (IZO) film can be used. By using a transparent conductive film, an anode capable of transmitting light can be formed.

In addition, as a material used for the second electrode 4604 which functions as a cathode, a material having a small work function (Al, Ag, Li, Ca, or an alloy of these materials MgAg, MgIn, AlLi, C
A metal film made of aF ₂ or calcium nitride can be used. Thus, by using a metal film which reflects light, a cathode which does not transmit light can be formed.

In this manner, light from the light emitting element can be extracted to the lower surface as shown by the arrow in FIG. That is, when applied to the display panel in FIG. 44, light is emitted to the substrate 4410 side. Therefore, when the light emitting element of the bottom emission structure is used for a display device, the substrate 4
Reference numeral 410 uses a light transmitting substrate.

In the case of providing an optical film, the substrate 4410 may be provided with an optical film.

Next, a light-emitting element having a dual emission structure will be described with reference to FIG. Since the light emitting element is the same as that shown in FIG.

Here, as a material used for the first electrode 4602 which functions as an anode, a material having a high work function is preferably used. For example, a transparent conductive film such as an ITO (indium tin oxide) film or an indium zinc oxide (IZO) film can be used. By using a transparent conductive film, an anode capable of transmitting light can be formed.

In addition, as a material used for the second electrode 4604 which functions as a cathode, a material having a small work function (Al, Ag, Li, Ca, or an alloy of these materials MgAg, MgIn, AlLi, C
Metal thin film made of aF ₂ or calcium nitride, transparent conductive film (ITO (indium tin oxide), indium oxide-zinc oxide alloy (In ₂ O ₃ -ZnO), zinc oxide (ZnO)
Etc.) should be used. Thus, by using a thin metal thin film and a transparent conductive film having transparency, a cathode capable of transmitting light can be formed.

Thus, as shown by the arrows in FIG. 46C, light from the light emitting element can be extracted on both sides. That is, when applied to the display panel of FIG. 44, light is emitted to the substrate 4410 side and the sealing substrate 4404 side. Therefore, in the case of using a light-emitting element having a dual emission structure for a display device, both the substrate 4410 and the sealing substrate 4404 use a light-transmitting substrate.

In the case of providing an optical film, the optical film may be provided on both the substrate 4410 and the sealing substrate 4404.

The present invention can also be applied to a display device that achieves full color display using a white light emitting element and a color filter.

As shown in FIG. 47, a base film 4702 is formed over a substrate 4700, a driver transistor 4701 is formed over the base film 4702, and a first electrode 4703 is formed in contact with the source electrode of the driver transistor 4701. A layer 4704 containing an organic compound and a second electrode 4705 are formed thereon.

The first electrode 4703 is an anode of a light emitting element. The second electrode 4705 is a cathode of the light emitting element. That is, a portion where the layer 4704 containing an organic compound is sandwiched between the first electrode 4703 and the second electrode 4705 corresponds to the light emitting element. In the configuration of FIG. 47, white light is emitted. A red color filter 4706R, a green color filter 4706G, and a blue color filter 4706B are provided over the light emitting element, so that full color display can be performed. In addition, a black matrix (also referred to as a BM) 4707 which isolates these color filters is provided.

The structures of the light emitting elements described above can be used in combination and can be appropriately used for the display device of the present invention. Further, the above-described configuration of the display panel and the light-emitting element are merely examples, and the present invention can be applied to a display device having another configuration different from the above-described configuration.

Next, a partial cross-sectional view of the pixel portion of the display panel is shown.

First, the case where a polysilicon (p-Si: H) film is used for a semiconductor layer of a transistor is described with reference to FIGS. 48, 49, and 50. FIG.

Here, for the semiconductor layer, for example, an amorphous silicon (a-Si) film is formed on a substrate by a known film formation method. Note that the semiconductor film is not limited to the amorphous silicon film, and any semiconductor film including an amorphous structure (including a microcrystalline semiconductor film) may be used. Furthermore, a compound semiconductor film containing an amorphous structure such as an amorphous silicon germanium film may be used.

Then, the amorphous silicon film is crystallized by a laser crystallization method, a thermal crystallization method using RTA or a furnace, a thermal annealing method using a metal element promoting crystallization, or the like. Of course, these may be combined.

By the above-described crystallization, a partially crystallized region is formed in the amorphous semiconductor film.

Furthermore, a crystalline semiconductor film whose crystallinity is partially enhanced is formed into a pattern in a desired shape, and an island-shaped semiconductor film is formed from the crystallized region. This semiconductor film is used as a semiconductor layer of a transistor.

As shown in FIG. 48A, a base film 4802 is formed on a substrate 4801, and a semiconductor layer is formed thereon. The semiconductor layer corresponds to the channel formation region 4 of the driving transistor 4818.
803, an LDD region 4804 and an impurity region 4805 to be a source region or a drain region
, And a channel formation region 4806 which becomes a lower electrode of the capacitor 4819, an LDD region 48
07 and the impurity region 4808. Note that channel doping may be performed on the channel formation region 4803 and the channel formation region 4806.

As the substrate, a glass substrate, a quartz substrate, a ceramic substrate, or the like can be used. As the base film 4802, a single layer of aluminum nitride (AlN), silicon oxide (SiO ₂ ), silicon oxynitride (SiO _x N _y ), or the like, or a stacked layer thereof can be used.

Over the semiconductor layer, the gate electrode 4810 and the capacitor 481 are provided with the gate insulating film 4809 interposed therebetween.
Nine upper electrodes 4811 are formed.

An interlayer insulating film 4812 is formed to cover the capacitor 4819 and the driving transistor 4818, and the wiring 4813 is formed over the interlayer insulating film 4812 through a contact hole.
It is in contact with 05. A pixel electrode 4814 is formed in contact with the wiring 4813, and the pixel electrode 481 is formed.
An insulator 4815 is formed so as to cover the end portion of 4 and the wiring 4813. Here, it is formed by using a positive photosensitive acrylic resin film. Then, a layer 4816 containing an organic compound and a counter electrode 4817 are formed over the pixel electrode 4814, and a light emitting element 4820 is formed in a region where the layer 4816 containing an organic compound is sandwiched between the pixel electrode 4814 and the counter electrode 4817. There is.

In addition, as shown in FIG. 48B, an LDD that constitutes a part of the lower electrode of the capacitive element 4819
A region 4821 may be provided so that the region overlaps with the upper electrode 4811 of the capacitor 4819. Note that portions common to FIG. 48A are denoted by the same reference numerals, and descriptions thereof will be omitted.

Further, as shown in FIG. 49A, the capacitor 4823 is formed in the same layer as the wiring 4813 in contact with the impurity region 4805 of the driver transistor 4818.
May be included. Note that portions common to FIG. 48A are denoted by the same reference numerals, and descriptions thereof will be omitted. Since the second upper electrode 4822 is in contact with the impurity region 4808, the upper electrode 48
A first gate insulating film 4809 sandwiched between the first and second channel forming regions
And the second capacitive element formed by sandwiching the interlayer insulating film 4812 between the upper electrode 4811 and the second upper electrode 4822 are connected in parallel to form the first capacitive element and the second capacitive element. A capacitive element 4823 formed of a capacitive element is formed. The capacitance of the capacitor 4823 is a combined capacitance obtained by adding the capacitances of the first capacitor and the second capacitor, so that a capacitor having a large area and a large capacitance can be formed. That is, the aperture ratio can be further improved by using the capacitor of the pixel configuration of the present invention.

Alternatively, a configuration of a capacitive element as shown in FIG. 49 (b) may be employed. A base film 4902 is formed over a substrate 4901 and a semiconductor layer is formed thereon. The semiconductor layer includes a channel formation region 4903 of the driver transistor 4918, an LDD region 4904, and an impurity region 4905 which is to be a source region or a drain region. Note that channel formation may be performed on the channel formation region 4903.

As the substrate, a glass substrate, a quartz substrate, a ceramic substrate, or the like can be used. In addition, as the base film 4902, a single layer of aluminum nitride (AlN), silicon oxide (SiO ₂ ), silicon oxynitride (SiO _x N _y ), or the like, or a stacked layer thereof can be used.

Over the semiconductor layer, a gate electrode 4907 and a first electrode 49 are formed via a gate insulating film 4906.
08 has been formed.

A first interlayer insulating film 4909 covers the driving transistor 4918 and the first electrode 4908.
The wiring 4910 is in contact with the impurity region 4905 over the first interlayer insulating film 4909 through the contact hole. In addition, a second electrode 4911 formed of the same material as the wiring 4910 is formed in the same layer as the wiring 4910.

Further, a second interlayer insulating film 4912 is formed to cover the wiring 4910 and the second electrode 4911, and a pixel electrode 4913 is formed on the second interlayer insulating film 4912 in contact with the wiring 4910 through a contact hole. It is done. In addition, the pixel electrode 4 in the same layer as the pixel electrode 4913
A third electrode 4914 made of the same material as 913 is formed. Here, the first electrode 4
A capacitor element 4919 including the second electrode 4911 and the third electrode 4914 is formed.

In a region where the layer 4916 containing an organic compound and the counter electrode 4917 are formed over the pixel electrode 4913 and the layer 4916 containing an organic compound is sandwiched between the pixel electrode 4913 and the counter electrode 4917,
A light emitting element 4920 is formed.

As described above, the configuration of the transistor in which the crystalline semiconductor film is used for the semiconductor layer includes the configurations as shown in FIGS. The structures of the transistors illustrated in FIGS. 48 and 49 are examples of top-gate transistors. That is, the LDD region may overlap with the gate electrode or may not overlap with the gate electrode. In addition, partial regions of the LDD regions may overlap. Furthermore, the gate electrode may have a tapered shape, and an LDD region may be provided in a self-aligned manner below the tapered portion of the gate electrode. Further, the number of gate electrodes is not limited to two, and may be three or more multi-gate structure or one gate electrode.

A scanning line driver circuit and a signal line driver circuit are integrally formed with a pixel portion by using a crystalline semiconductor film for a semiconductor layer (such as a channel formation region, a source region, or a drain region) of a transistor included in a pixel of the present invention. Becomes easier. Alternatively, a portion of the signal line driver circuit may be integrally formed with the pixel portion, and a portion may be formed over an IC chip and mounted by COG or the like as shown in the display panel in FIG. With such a configuration, the manufacturing cost can be reduced.

In addition, as a configuration of a transistor in which polysilicon (p-Si: H) is used for a semiconductor layer, a structure in which a gate electrode is sandwiched between a substrate and a semiconductor layer, that is, a bottom where the gate electrode is located below the semiconductor layer. A transistor with a gate structure may be applied. Here, FIG. 50 shows a partial cross-sectional view of a pixel portion of a display panel to which a bottom gate transistor is applied.

As shown in FIG. 50A, a base film 5002 is formed on a substrate 5001. Further, a gate electrode 5003 is formed on the base film 5002. In addition, a first electrode 5004 formed of the same material as the gate electrode 5003 is formed in the same layer as the gate electrode 5003.
As a material of the gate electrode 5003, polycrystalline silicon to which phosphorus is added can be used. Besides polycrystalline silicon, silicide which is a compound of metal and silicon may be used.

A gate insulating film 5005 is formed to cover the gate electrode 5003 and the first electrode 5004. As the gate insulating film 5005, a silicon oxide film, a silicon nitride film, or the like is used.

A semiconductor layer is formed over the gate insulating film 5005. The semiconductor layer includes a channel formation region 5006, an LDD region 5007, an impurity region 5008 to be a source or drain region, a channel formation region 5009 to be a second electrode of the capacitor 5023, an LDD region 5010, and an impurity region. It has 5011. The channel formation region 5006 and the channel formation region 5009 may be channel-doped.

As the substrate, a glass substrate, a quartz substrate, a ceramic substrate, or the like can be used. As the base film 5002, a single layer of aluminum nitride (AlN), silicon oxide (SiO ₂ ), silicon oxynitride (SiO _x N _y ), or the like, or a stacked layer thereof can be used.

A first interlayer insulating film 5012 is formed to cover the semiconductor layer, and a wiring 5013 is in contact with the impurity region 5008 over the first interlayer insulating film 5012 through a contact hole. In addition, a third electrode 5014 is formed of the same material as the wiring 5013 in the same layer as the wiring 5013.
A capacitive element 5023 is formed of the first electrode 5004, the second electrode, and the third electrode 5014.

Further, an opening 5015 is formed in the first interlayer insulating film 5012. Second interlayer insulating film 50 so as to cover driving transistor 5022, capacitance element 5023 and opening 5015.
16 are formed, and the pixel electrode 5 is formed on the second interlayer insulating film 5016 through the contact hole.
017 is formed. In addition, an insulator 5018 is formed to cover an end portion of the pixel electrode 5017. For example, a positive photosensitive acrylic resin film can be used. Then, a layer 5019 containing an organic compound and a counter electrode 5020 are formed over the pixel electrode 5017, and a light emitting element 5021 is formed in a region where the layer 5019 containing an organic compound is sandwiched between the pixel electrode 5017 and the counter electrode 5020. There is. The opening 5015 is located below the light emitting element 5021. That is, when light emission from the light emitting element 5021 is extracted from the substrate side, the transmittance can be increased because the opening 5015 is provided.

Alternatively, in FIG. 50A, the fourth electrode 5024 may be formed using the same material and in the same layer as the pixel electrode 5017, as shown in FIG. 50B. Then, the first electrode 50
A capacitor element 5025 can be formed which includes the fourth, second, third, and fourth electrodes 5014, 5024.

Next, the case where an amorphous silicon (a-Si: H) film is used for a semiconductor layer of a transistor is described with reference to FIGS. 51, 52, and 53. FIG.

A partial cross-sectional view of a pixel portion of a display panel to which a top gate transistor using amorphous silicon as a semiconductor layer is applied is shown in FIG. As shown in FIG. 51 (a), the substrate 510
A base film 5102 is formed on top of the first. Furthermore, the pixel electrode 5103 is formed on the base film 5102.
Is formed. In addition, a first electrode 5104 formed of the same material as the pixel electrode 5103 is formed in the same layer as the pixel electrode 5103.

As the substrate, a glass substrate, a quartz substrate, a ceramic substrate, or the like can be used. In addition, as the base film 5102, a single layer of aluminum nitride (AlN), silicon oxide (SiO ₂ ), silicon oxynitride (SiO _x N _y ), or the like, or a stacked layer thereof can be used.

Wiring 5105 and wiring 5106 are formed over the base film 5102, and an end portion of the pixel electrode 5103 is covered with the wiring 5105. Over the wiring 5105 and the wiring 5106, an N-type semiconductor layer 5107 and an N-type semiconductor layer 5108 having N-type conductivity are formed. In addition, a semiconductor layer 5109 is formed over the base film 5102 between the wiring 5105 and the wiring 5106. Then, part of the semiconductor layer 5109 corresponds to the N-type semiconductor layer 5107 and the N-type semiconductor layer 5.
It is extended to above 108. Note that this semiconductor layer 5109 is amorphous silicon (
A non-crystalline semiconductor film such as a-Si: H) or a microcrystalline semiconductor (μ-Si: H) is used.

A gate insulating film 5110 is formed over the semiconductor layer 5109. Also, gate insulating film 5
An insulating film 5111 formed of the same material as the gate insulating film 5110 is formed over the first electrode 5104 in the same layer as the layer 110. Note that a silicon oxide film, a silicon nitride film, or the like is used as the gate insulating film 5110.

A gate electrode 5112 is formed on the gate insulating film 5110. Also, the gate electrode 5
A second electrode 5113 formed of the same material as the gate electrode 5112 is formed over the first electrode 5104 in the same layer as the electrode 112 with the insulating film 5111 interposed therebetween. Thereby, the first electrode 51
A capacitor element 5119 having a structure in which the insulating film 5111 is sandwiched between the 04 and the second electrode 5113 is formed. Further, an interlayer insulating film 5114 is formed to cover an end portion of the pixel electrode 5103, the driving transistor 5118, and the capacitor 5119.

The layer 5115 containing an organic compound and the counter electrode 5116 are formed on the interlayer insulating film 5114 and the pixel electrode 5103 located in the opening, and the layer 5115 containing an organic compound is sandwiched between the pixel electrode 5103 and the counter electrode 5116 A light emitting element 5117 is formed in the region.

Alternatively, the first electrode 5104 shown in FIG. 51A may be formed of the first electrode 5120 as shown in FIG. 51B. Note that the first electrode 5120 shown in FIG.
It is formed of the same material as the wirings 5105 and 5106 in the same layer as the layers 105 and 5106.

Next, FIGS. 52 and 53 show partial cross-sectional views of a pixel portion of a display panel to which a bottom gate transistor using amorphous silicon for a semiconductor layer is applied.

As shown in FIG. 52A, a base film 5202 is formed on a substrate 5201. Further, a gate electrode 5203 is formed on the base film 5202. In addition, the gate electrode 5203
In the same layer, a first electrode 5204 formed of the same material as the gate electrode 5203 is formed. As a material of the gate electrode 5203, polycrystalline silicon to which phosphorus is added can be used. Besides polycrystalline silicon, silicide which is a compound of metal and silicon may be used.

A gate insulating film 5205 is formed to cover the gate electrode 5203 and the first electrode 5204. As the gate insulating film 5205, a silicon oxide film, a silicon nitride film, or the like is used.

A semiconductor layer 5206 is formed over the gate insulating film 5205. In addition, the semiconductor layer 520
A semiconductor layer 5207 formed of the same material as the semiconductor layer 5206 is formed in the same layer as the semiconductor layer 5206.

As the substrate, a glass substrate, a quartz substrate, a ceramic substrate, or the like can be used. In addition, as the base film 5202, a single layer of aluminum nitride (AlN), silicon oxide (SiO ₂ ), silicon oxynitride (SiO _x N _y ), or the like, or a stacked layer thereof can be used.

N-type semiconductor layers 5208 and 5209 having N-type conductivity are formed on the semiconductor layer 5206, and an N-type semiconductor layer 5210 is formed on the semiconductor layer 5207.

Wirings 5211 and 5212 are formed on the N-type semiconductor layers 5208 and 5209, respectively.
In addition, a conductive layer 5213 formed of the same material as the wirings 5211 and 5212 is formed over the N-type semiconductor layer 5210 in the same layer as the wirings 5211 and 5212.

Thus, the second layer including the semiconductor layer 5207, the N-type semiconductor layer 5210, and the conductive layer 5213 is formed.
The electrode of Note that a gate insulating film 520 is formed by the second electrode and the first electrode 5204.
A capacitive element 5220 having a structure in which 5 is sandwiched is formed.

Further, one end portion of the wiring 5211 extends, and a pixel electrode 5214 is formed in contact with an upper portion of the extended wiring 5211.

In addition, an insulator 5215 is formed to cover an end portion of the pixel electrode 5214, the driving transistor 5219, and the capacitor 5220.

A layer 5216 containing an organic compound and a counter electrode 5217 are formed over the pixel electrode 5214 and the insulator 5215, and the layer 52 containing an organic compound is formed of the pixel electrode 5214 and the counter electrode 5217.
A light emitting element 5218 is formed in a region where 16 is sandwiched.

Note that the semiconductor layer 5207 and the N-type semiconductor layer 5 to be part of the second electrode of the capacitor 5220
210 may not be provided. That is, the second electrode of the capacitor 5220 may be the conductive layer 5213, and the structure of the capacitor 5220 may be a structure in which the gate insulating film is sandwiched between the first electrode 5204 and the conductive layer 5213.

Note that in FIG. 52A, the pixel electrode 5214 is formed before forming the wiring 5211, so that the same layer as the pixel electrode 5214 as shown in FIG. 52B is made of the same material as the pixel electrode 5214. The second electrode 5221 can be formed. Thereby, the second electrode 5
A capacitor 522 having a structure in which the gate insulating film 5205 is sandwiched between the first electrode 5204 and the first electrode 5204.
2 can be formed.

Although FIG. 52 shows an example in which a reverse stagger type channel etch type transistor is applied, it is needless to say that a channel protective type transistor may be applied. The case where a channel protective transistor is applied is described with reference to FIGS. 53 (a) and 53 (b).

The transistor of the channel protection type shown in FIG. 53A is a mask for etching on the region where the channel of the semiconductor layer 5206 of the driving transistor 5219 of the channel etching structure shown in FIG. 52A is formed. The insulator 5301 is different in that the insulator 5301 is provided, and other common points use the same reference numerals.

Similarly, the transistor of the channel protection type structure shown in FIG. 53 (b) is similar to that of FIG. 52 (b).
The insulator 5301 which is to be a mask for etching is provided on the region where the channel of the semiconductor layer 5206 of the driver transistor 5219 having a channel etch structure shown in FIG. Common symbols are used.

By using an amorphous semiconductor film for a semiconductor layer (a channel formation region, a source region, a drain region, or the like) of a transistor included in the pixel of the present invention, manufacturing cost can be reduced.

Note that the structure of the transistor that can be applied to the pixel portion of the display device of the present invention and the structure of the capacitor are not limited to the above-described structures, and various structures of transistors and capacitors may be used. it can.

Note that this embodiment is an example in the case of embodying the contents (may be a part) described in the other embodiments, an example in the case of slight modification, an example in the case of changing a part, an improvement An example of the case,
An example of the case described in detail, an example of the case of application, an example of the relevant part, and the like are shown. Therefore, the contents described in the other embodiments can be freely applied to, combined with, or replaced with this embodiment.

Note that although the present embodiment has been described using various figures, the contents described in each figure (
Some parts may be applied to, or combined with, the contents described in another figure (or some parts).
Or, replacement can be freely performed. Furthermore, in the figures described above, more figures can be constructed by combining other parts with respect to each part.

Similarly, the contents (or a part) described in each figure of this embodiment can be applied to, combined with, or replaced with the contents (or a part) described in the figure of another embodiment. Can do it freely. Furthermore, in the drawings of the present embodiment, more parts can be configured by combining the parts of the other embodiments with respect to the respective parts.

Eighth Embodiment
In this embodiment, a method for manufacturing a semiconductor device using plasma treatment will be described as a method for manufacturing a semiconductor device including a transistor.

FIG. 54 is a diagram showing a structural example of a semiconductor device including a transistor. In FIG. 54, FIG. 54 (B) corresponds to a cross-sectional view between a and b in FIG. 54 (A), and FIG. 54 (C) is
It corresponds to the cross-sectional view between cd of (A).

The semiconductor device shown in FIG. 54 includes semiconductor films 5403 a and 5403 b provided over a substrate 5401 with an insulating film 5402 interposed therebetween, and a gate insulating film 5 over the semiconductor films 5403 a and 5403 b.
A gate electrode 5405 provided through 404, insulating films 5406 and 5407 provided to cover the gate electrode, and source and drain regions of the semiconductor films 5403a and 5403b are provided and provided over the insulating film 5407. And the conductive film 5408. Note that FIG. 54 shows a case where an n-channel transistor 5410a using a part of the semiconductor film 5403a as a channel region and a p-channel transistor 5410b using a part of the semiconductor film 5403b as a channel region are provided. However, it is not limited to this configuration. For example, in FIG. 54, the LDD region is provided in the N-channel transistor 5410a, and the LDD region is not provided in the P-channel transistor 5410b, but may be provided in both or both. It is possible.

In the present embodiment, the substrate 5401, the insulating film 5402, and the semiconductor films 5403 a and 5
As illustrated in FIG. 54, the semiconductor film or the insulating film is oxidized or nitrided by performing oxidation or nitridation on at least one of the gate insulating film 5404, the gate insulating film 5404, the insulating film 5406, and the insulating film 5407 using plasma treatment. The semiconductor device shown in FIG. As described above, the surface of the semiconductor film or the insulating film is reformed by oxidizing or nitriding the semiconductor film or the insulating film using plasma treatment, and the insulating film formed by the CVD method or the sputtering method can be further improved. Since a dense insulating film can be formed, defects such as pinholes can be suppressed and the characteristics and the like of the semiconductor device can be improved.

Note that in this embodiment, plasma treatment is performed on the semiconductor films 5403a and 5403b or the gate insulating film 5404 in FIG. 54, and the semiconductor films 5403a and 5403b or the gate insulating film 5404 are oxidized or nitrided to manufacture a semiconductor device. The method will be described with reference to the drawings.

First, in the case of an island-shaped semiconductor film provided over a substrate, the case where the end portion of the island-shaped semiconductor film is provided in a shape close to a right angle is described.

First, island-shaped semiconductor films 5403 a and 5403 b are formed over a substrate 5401 (see FIG. 55 (A).
)). The island-shaped semiconductor films 5403 a and 5403 b are mainly composed of silicon (Si) by a known means (a sputtering method, an LPCVD method, a plasma CVD method, etc.) on the insulating film 5402 previously formed on the substrate 5401. An amorphous semiconductor film is formed using a material (eg, Si _x Ge _{1 -x} or the like) or the like, the amorphous semiconductor film is crystallized, and the semiconductor film can be selectively etched. Note that crystallization of the amorphous semiconductor film may be performed by laser crystallization, thermal crystallization using RTA or a furnace for annealing, thermal crystallization using a metal element that promotes crystallization, or a combination of these methods, etc. It can be carried out by the known crystallization method of Note that in FIG. 55, end portions of the island-shaped semiconductor films 5403 a and 5403 b are provided in a shape (θ = 85 to 100 °) close to a right angle.

Next, plasma treatment is performed to oxidize or nitride the semiconductor films 5403a and 5403b, thereby forming an oxide film or a nitride film 54 on the surfaces of the semiconductor films 5403a and 5403b, respectively.
21a and 5421b (hereinafter also referred to as an insulating film 5421a and an insulating film 5421b) are formed (FIG. 55B). For example, in the case of using Si as the semiconductor films 5403a and 5403b,
As the insulating film 5421 a and the insulating film 5421 b, silicon oxide (SiOx) or silicon nitride (
SiNx) is formed. Alternatively, the semiconductor films 5403 a and 5403 b may be oxidized by plasma treatment and then may be nitrided by plasma treatment again. In this case, silicon oxide (SiOx) is formed in contact with the semiconductor films 5403a and 5403b, and silicon nitride oxide (SiNxOy) (x> y) is formed on the surface of the silicon oxide. Note that in the case where the semiconductor film is oxidized by plasma treatment, for example, oxygen (O ₂ ) and a rare gas (He) are used under an oxygen atmosphere.
, Ne, Ar, Kr, and at least one of Xe) or oxygen and hydrogen (H ₂ )
And plasma treatment under a rare gas atmosphere or under an atmosphere of dinitrogen monoxide and a rare gas). on the other hand,
In the case of nitriding the semiconductor films by plasma treatment in a nitrogen atmosphere (e.g., nitrogen (N ₂₎
And plasma treatment under an atmosphere of a rare gas (including at least one of He, Ne, Ar, Kr, and Xe), or under an atmosphere of nitrogen and hydrogen and a rare gas, or under an atmosphere of NH ₃ and a rare gas. For example, Ar can be used as the noble gas. Alternatively, a mixture of Ar and Kr may be used. Therefore, the insulating films 5421 a and 5421 b are formed using the rare gas (H
e) contains at least one of Ne, Ar, Kr, and Xe), and in the case of using Ar, the insulating films 5421a and 5421b include Ar.

In the plasma treatment, the electron density is 1 × 10 ¹¹ cm ^{−3 in the} above gas atmosphere.
1 × 10 ¹³ cm ⁻³ or less, and plasma electron temperature is 0.5 eV or more and 1.5 eV
Do the following. Since the electron density of plasma is high and the electron temperature in the vicinity of an object (here, the semiconductor films 5403 a and 5403 b) formed over the substrate 5401 is low, plasma damage to the object is prevented. Can. Also, the electron density of plasma is 1 ×
An oxide or nitride film formed by oxidizing or nitriding an object to be irradiated using plasma treatment is a film formed by a CVD method, a sputtering method, or the like because it has a high density of 10 ¹¹ cm ⁻³ or more. Compared to the above, it is possible to form a dense film with excellent uniformity of film thickness and the like.
In addition, since the plasma electron temperature is as low as 1 eV or less, the oxidation or nitridation treatment can be performed at a lower temperature as compared with the conventional plasma treatment or thermal oxidation method. For example, even if plasma treatment is performed at a temperature lower by at least 100 ° C. than the strain point temperature of the glass substrate, sufficient oxidation or nitridation treatment can be performed. As a frequency for forming plasma, microwave (2.4
A high frequency such as 5 GHz can be used. Note that, unless otherwise specified below, the plasma treatment is performed using the above conditions.

Next, a gate insulating film 5404 is formed to cover the insulating films 5421 a and 5421 b (FIG. 55C). The gate insulating film 5404 is formed of silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), or the like by using a known method (a sputtering method, an LPCVD method, a plasma CVD method, etc.). A single-layer structure of an insulating film containing oxygen or nitrogen such as silicon oxide (SiNxOy) (x> y), or a stacked structure of these can be provided. For example, Si is used as the semiconductor films 5403a and 5403b, and the Si is oxidized by plasma treatment to form the insulating film 5421a on the surfaces of the semiconductor films 5403a and 5403b,
In the case where silicon oxide is formed as 5421 b, silicon oxide (SiO x) is formed over the insulating films 5421 a and 5421 b as a gate insulating film. Further, in FIG. 55B, in the case where the insulating films 5421 a and 5421 b formed by oxidizing or nitriding the semiconductor films 5403 a and 5403 b by plasma treatment have a sufficient film thickness, the insulating films 542 a and 5421 b are formed.
It is also possible to use 1a and 5421b as a gate insulating film.

Next, a gate electrode 5405 and the like are formed over the gate insulating film 5404 to manufacture a semiconductor device having an n-channel transistor 5410a and a p-channel transistor 5410b using island-shaped semiconductor films 5403a and 5403b as channel regions. (FIG. 55 (D)).

Thus, before the gate insulating film 5404 is provided over the semiconductor films 5403a and 5403b,
By oxidizing or nitriding the surface of the semiconductor films 5403a and 5403b by plasma treatment, short circuit between the gate electrode and the semiconductor film due to coverage failure of the gate insulating film 5404 at the end portions 5451a and 5451b of the channel region can be prevented. Can. That is, when the end of the island-shaped semiconductor film has a shape close to a right angle (θ = 85 to 100 °), C
When the gate insulating film is formed to cover the semiconductor film by the VD method, sputtering method or the like, there is a possibility that the problem of covering failure may occur due to the disconnection of the gate insulating film or the like at the end of the semiconductor film.
By oxidizing or nitriding the surface of the semiconductor film in advance by plasma treatment, coverage failure or the like of the gate insulating film at the end portion of the semiconductor film can be prevented.

Further, in FIG. 55, the gate insulating film 5404 may be oxidized or nitrided by plasma treatment after the gate insulating film 5404 is formed. In this case, a gate insulating film 5404 formed to cover the semiconductor films 5403a and 5403b (FIG. 56A).
Plasma treatment is performed to oxidize or nitride the gate insulating film 5404 to form an oxide film or a nitride film (hereinafter also referred to as an insulating film 5423) on the surface of the gate insulating film 5404 (FIG. 56B). The conditions for the plasma treatment can be performed in the same manner as in FIG. In addition, the insulating film 5523 contains a rare gas used for plasma treatment, for example, Ar
In the case where is used, the insulating film 5523 contains Ar.

Alternatively, in FIG. 56B, the gate insulating film 5404 may be oxidized by performing plasma treatment once in an oxygen atmosphere, and then may be nitrided by performing plasma treatment again in a nitrogen atmosphere. In this case, silicon oxide (SiOx) is used as the semiconductor films 5403a and 5403b.
Alternatively, silicon oxynitride (SiO x N y) (x> y) is formed, and silicon nitride oxide (SiN x O y) (x> y) is formed in contact with the gate electrode 5405. After that, a gate electrode 5405 or the like is formed over the insulating film 123, whereby a semiconductor device having an n-channel transistor 5410a and a p-channel transistor 5410b using island-shaped semiconductor films 5403a and 5403b as channel regions is manufactured. Can be done (Fig. 56 (C)). As described above, by performing plasma treatment on the gate insulating film, the surface of the gate insulating film can be reformed to form a dense film by oxidizing or nitriding the surface of the gate insulating film. The insulating film obtained by the plasma treatment is denser and has fewer defects such as pinholes as compared with an insulating film formed by a CVD method or a sputtering method, so that the characteristics of the transistor can be improved.

Note that FIG. 56 shows the case where the surfaces of the semiconductor films 5403a and 5403b are oxidized or nitrided by performing plasma treatment on the semiconductor films 5403a and 5403b in advance, but plasma treatment is performed on the semiconductor films 5403a and 5403b. Alternatively, plasma treatment may be performed after the gate insulating film 5404 is formed. As described above, by performing plasma treatment before forming the gate electrode, the semiconductor film exposed due to the covering defect even if the covering defect due to the step disconnection or the like of the gate insulating film occurs at the end of the semiconductor film. Can be oxidized or nitrided, so that short circuit between the gate electrode and the semiconductor film due to poor coverage of the gate insulating film at the end portion of the semiconductor film can be prevented.

As described above, even when the end portions of the island-shaped semiconductor film are provided in a shape close to a right angle, plasma treatment is performed on the semiconductor film or the gate insulating film to oxidize or nitride the semiconductor film or the gate insulating film. As a result, a short circuit or the like of the gate electrode and the semiconductor film due to a coverage defect of the gate insulating film at the end portion of the semiconductor film can be prevented.

Next, in the case of an island-shaped semiconductor film provided over a substrate, a case where the end portion of the island-shaped semiconductor film is provided in a tapered shape (θ = 30 to 85 °) will be described.

First, island-shaped semiconductor films 5403 a and 5403 b are formed over the substrate 5401 (see FIG. 57 (A).
)). The island-shaped semiconductor films 5403 a and 5403 b are mainly composed of silicon (Si) by a known means (a sputtering method, an LPCVD method, a plasma CVD method, etc.) on the insulating film 5402 previously formed on the substrate 5401. An amorphous semiconductor film is formed using a material (for example, Si _x Ge _{1 -x} or the like), and the amorphous semiconductor film is subjected to laser crystallization, thermal crystallization using RTA or furnace annealing, crystallization The semiconductor film is selectively crystallized by etching and removed by a known crystallization method such as a thermal crystallization method using a metal element that promotes H. In FIG. 57, the end of the island-shaped semiconductor film has a tapered shape (θ = 3
0 to 85 °).

Next, a gate insulating film 5404 is formed to cover the semiconductor films 5403a and 5403b (see FIG.
FIG. 57 (B). The gate insulating film 5404 is formed of silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), or the like by using a known method (a sputtering method, an LPCVD method, a plasma CVD method, etc.). A single-layer structure of an insulating film containing oxygen or nitrogen such as silicon oxide (SiNxOy) (x> y), or a stacked structure of these can be provided.

Next, plasma treatment is performed to oxidize or nitride the gate insulating film 5404 to form an oxide film or a nitride film (hereinafter also referred to as an insulating film 5424) on the surface of the gate insulating film 5404 (FIG. 57 (C )). The conditions for plasma treatment can be performed in the same manner as described above. For example, in the case of using silicon oxide (SiO x) or silicon oxynitride (SiO x N y) (x> y) as the gate insulating film 5404, plasma treatment is performed in an oxygen atmosphere to oxidize the gate insulating film 5404; A dense film with less defects such as pinholes can be formed on the surface of the gate insulating film compared to a gate insulating film formed by a CVD method, a sputtering method or the like. On the other hand, silicon nitride oxide (SiN x O y) (x> y) can be provided as the insulating film 5424 on the surface of the gate insulating film 5404 by performing plasma treatment in a nitrogen atmosphere to nitride the gate insulating film 5404. Alternatively, the gate insulating film 5404 may be oxidized by performing plasma treatment once in an oxygen atmosphere, and then may be nitrided by performing plasma treatment again in a nitrogen atmosphere. In addition, the insulating film 5424 contains a rare gas used for plasma treatment. For example, in the case of using Ar, the insulating film 5424 contains Ar.

Next, a gate electrode 5405 and the like are formed over the gate insulating film 5404 to manufacture a semiconductor device having an n-channel transistor 5410a and a p-channel transistor 5410b using island-shaped semiconductor films 5403a and 5403b as channel regions. (FIG. 57D).

Thus, by performing plasma treatment on the gate insulating film, an insulating film formed of an oxide film or a nitride film can be provided on the surface of the gate insulating film, and the surface of the gate insulating film can be reformed.
Since the insulating film oxidized or nitrided by plasma treatment is denser and has fewer defects such as pinholes as compared with a gate insulating film formed by a CVD method or a sputtering method, the characteristics of the transistor can be improved. it can. In addition, by forming the end portion of the semiconductor film into a tapered shape, a short circuit or the like between the gate electrode and the semiconductor film due to a coverage failure of the gate insulating film at the end portion of the semiconductor film can be suppressed. By performing plasma treatment after formation, short circuit or the like of the gate electrode and the semiconductor film can be further prevented.

Next, a manufacturing method of a semiconductor device different from that of FIG. 57 is described with reference to the drawings. Specifically, the case where the plasma treatment is selectively performed on the end portion of the tapered semiconductor film is described.

First, island-shaped semiconductor films 5403 a and 5403 b are formed over a substrate 5401 (see FIG. 58 (A).
)). The island-shaped semiconductor films 5403 a and 5403 b are mainly composed of silicon (Si) by a known means (a sputtering method, an LPCVD method, a plasma CVD method, etc.) on the insulating film 5402 previously formed on the substrate 5401. An amorphous semiconductor film is formed using a material (eg, Si _x Ge _{1 -x} or the like), and the amorphous semiconductor film is crystallized to form resists 5425 a and 542.
It can be provided by selectively etching the semiconductor film using 5b as a mask.
Note that crystallization of the amorphous semiconductor film may be performed by laser crystallization, thermal crystallization using RTA or a furnace for annealing, thermal crystallization using a metal element that promotes crystallization, or a combination of these methods, etc. It can be carried out by the known crystallization method of

Next, before removing the resists 5425a and 5425b used for etching the semiconductor film, plasma treatment is performed to selectively oxidize or nitride the end portions of the island-shaped semiconductor films 5403a and 5403b, thereby the semiconductor An oxide film or a nitride film (hereinafter also referred to as an insulating film 5426) is formed at end portions of the films 5403a and 5403b (FIG. 58B). Plasma treatment is performed under the conditions described above. The insulating film 5426 contains a rare gas used for plasma treatment.

Next, a gate insulating film 5404 is formed to cover the semiconductor films 5403a and 5403b (see FIG.
FIG. 58 (C). The gate insulating film 5404 can be provided as described above.

Next, a gate electrode 5405 and the like are formed over the gate insulating film 5404 to manufacture a semiconductor device having an n-channel transistor 5410a and a p-channel transistor 5410b using island-shaped semiconductor films 5403a and 5403b as channel regions. (FIG. 58 (D)).

When the end portions of the semiconductor films 5403 a and 5403 b are tapered, the semiconductor film 5403 is formed.
Since the end portions 5452a and 5452b of the channel region formed in part of a and 5403b are also tapered and the film thickness of the semiconductor film and the film thickness of the gate insulating film are changed as compared with the central portion,
The characteristics of the transistor may be affected. Therefore, here, by selectively oxidizing or nitriding an end portion of the channel region by plasma treatment and forming an insulating film in a semiconductor film to be an end portion of the channel region, a transistor caused by the end portion of the channel region The impact on the environment can be reduced.

Although FIG. 58 shows an example in which oxidation or nitridation is performed by plasma treatment only at the end portions of the semiconductor films 5403a and 5403b, it is needless to say that plasma treatment is also performed on the gate insulating film 5404 as shown in FIG. It is also possible to conduct oxidation and nitridation (FIG. 60 (A
)).

Next, a method for manufacturing a semiconductor device different from the above is described with reference to the drawings. Specifically, the case of performing plasma treatment on a semiconductor film having a tapered shape is described.

First, island-shaped semiconductor films 5403 a and 5403 b are formed over the substrate 5401 in the same manner as described above (FIG. 59A).

Next, plasma treatment is performed to oxidize or nitride the semiconductor films 5403a and 5403b, thereby forming an oxide film or a nitride film 54 on the surfaces of the semiconductor films 5403a and 5403b, respectively.
27a and 5427b (hereinafter, also referred to as insulating films 5427a and 5427b) are formed (FIG. 59B). Plasma treatment can be performed similarly under the conditions described above. For example,
When Si is used as the semiconductor films 5403a and 5403b, silicon oxide (SiOx) or silicon nitride (SiNx) is formed as the insulating films 5427a and 5427b. Alternatively, the semiconductor films 5403 a and 5403 b may be oxidized by plasma treatment and then may be nitrided by plasma treatment again. In this case, the semiconductor films 5403 a and 5403
Silicon oxide (SiOx) or silicon oxynitride (SiOxNy) (x> y) is formed in contact with b, and silicon nitride oxide (SiNxOy) (x> y) is formed on the surface of the silicon oxide. Therefore, the insulating films 5427a and 5427b contain the rare gas used for the plasma treatment.
Note that end portions of the semiconductor films 5403 a and 5403 b are simultaneously oxidized or nitrided by plasma treatment.

Next, a gate insulating film 5404 is formed to cover the insulating films 5427a and 5427b (FIG. 59C). The gate insulating film 5404 is formed of silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), or the like by using a known method (a sputtering method, an LPCVD method, a plasma CVD method, etc.). A single-layer structure of an insulating film containing oxygen or nitrogen such as silicon oxide (SiNxOy) (x> y), or a stacked structure of these can be provided. For example, the insulating films 5427a and 5427 are formed over the surfaces of the semiconductor films 5403a and 5403b by oxidizing them by plasma treatment using Si as the semiconductor films 5403a and 5403b.
When silicon oxide is formed as b, silicon oxide (SiOx) is formed over the insulating films 5427a and 5427b as a gate insulating film.

Next, a gate electrode 5405 and the like are formed over the gate insulating film 5404 to manufacture a semiconductor device having an n-channel transistor 5410a and a p-channel transistor 5410b using island-shaped semiconductor films 5403a and 5403b as channel regions. (FIG. 59 (D)).

When the end portion of the semiconductor film is tapered, the end portions 5453a and 5453b of the channel region formed in part of the semiconductor film are also tapered, which may affect the characteristics of the semiconductor element. Therefore, by oxidizing or nitriding the semiconductor film by plasma treatment, the end of the channel region is also oxidized or nitrided as a result, and the influence on the semiconductor element can be reduced.

Although FIG. 59 shows an example in which oxidation or nitridation is performed by plasma treatment only for the semiconductor films 5403a and 5403b, it is needless to say that the gate insulating film 540 is formed as shown in FIG.
It is also possible to perform plasma treatment to oxidize or nitride 4 (FIG. 60 (B)). In this case, the gate insulating film 5404 may be oxidized by performing plasma treatment once in an oxygen atmosphere, and then may be nitrided by performing plasma treatment again in a nitrogen atmosphere. In this case, silicon oxide (SiO x) or silicon oxynitride (type silicon oxide) is used as the semiconductor film 5403 a or 5403 b.
SiO x N y) (x> y) is formed, and silicon nitride oxide (Si) is in contact with the gate electrode 5405.
NxOy) (x> y) is formed.

As described above, by performing plasma treatment to oxidize or nitride the semiconductor film or the gate insulating film to reform the surface, a dense and high-quality insulating film can be formed. As a result, even when the insulating film is formed thin, defects such as pinholes can be prevented, and miniaturization and high performance of semiconductor elements such as transistors can be achieved.

Note that in this embodiment, plasma treatment is performed on the semiconductor films 5403a and 5403b or the gate insulating film 5404 in FIG. 54, and the semiconductor films 5403a and 5403b or the gate insulating film 5404 are oxidized or nitrided. The layer to be oxidized or nitrided is not limited to this. For example, plasma treatment may be performed on the substrate 5401 or the insulating film 5402, or plasma treatment may be performed on the insulating film 5406 or 5407.

Note that this embodiment is an example in the case of embodying the contents (may be a part) described in the other embodiments, an example in the case of slight modification, an example in the case of changing a part, an improvement An example of the case,
An example of the case described in detail, an example of the case of application, an example of the relevant part, and the like are shown. Therefore, the contents described in the other embodiments can be freely applied to, combined with, or replaced with this embodiment.

Note that although the present embodiment has been described using various figures, the contents described in each figure (
Some parts may be applied to, or combined with, the contents described in another figure (or some parts).
Or, replacement can be freely performed. Furthermore, in the figures described above, more figures can be constructed by combining other parts with respect to each part.

Similarly, the contents (or a part) described in each figure of this embodiment can be applied to, combined with, or replaced with the contents (or a part) described in the figure of another embodiment. Can do it freely. Furthermore, in the drawings of the present embodiment, more parts can be configured by combining the parts of the other embodiments with respect to the respective parts.

(Embodiment 9)
In this embodiment, hardware for controlling the driving method described in Embodiments 1 to 6 will be described.

A rough configuration diagram is shown in FIG. The pixel portion 6104, the signal line driver circuit 6106, and the scan line driver circuit 6105 are provided over the substrate 6101. Besides the above, a power supply circuit, a precharge circuit, a timing generation circuit, etc. may be arranged. Note that the signal line driver circuit 6106 or the scan line driver circuit 6105 may not be provided. In that case, the substrate 610
Those not disposed in 1 may be formed in the IC. The IC is on a substrate 6101
It may be arranged by COG (Chip On Glass). Alternatively, an IC may be disposed on a connection substrate 6107 which connects the peripheral circuit substrate 6102 and the substrate 6101.

A signal 6103 is input to the peripheral circuit board 6102. And the controller 6108
, And signals are stored in the memory 6109, 6110 or the like. If the signal 6103 is an analog signal, after performing analog-to-digital conversion, the memories 6109 and 611
It is often stored at 0 etc. Then, the controller 6108 controls the memories 6109 and 61.
A signal is output to the substrate 6101 using the signal stored in 10 or the like.

In order to realize the driving method described in the first to sixth embodiments, the controller 6108
Controls the appearance order of subframes and the like, and outputs a signal to the substrate 6101.

Note that this embodiment is an example in the case of embodying the contents (may be a part) described in the other embodiments, an example in the case of slight modification, an example in the case of changing a part, an improvement An example of the case,
An example of the case described in detail, an example of the case of application, an example of the relevant part, and the like are shown. Therefore, the contents described in the other embodiments can be freely applied to, combined with, or replaced with this embodiment.

Note that although the present embodiment has been described using various figures, the contents described in each figure (
Some parts may be applied to, or combined with, the contents described in another figure (or some parts).
Or, replacement can be freely performed. Furthermore, in the figures described above, more figures can be constructed by combining other parts with respect to each part.

Similarly, the contents (or a part) described in each figure of this embodiment can be applied to, combined with, or replaced with the contents (or a part) described in the figure of another embodiment. Can do it freely. Furthermore, in the drawings of the present embodiment, more parts can be configured by combining the parts of the other embodiments with respect to the respective parts.

Tenth Embodiment
In this embodiment, structural examples of an EL module and an EL television receiver using the display device of the present invention will be described.

FIG. 62 shows an EL module in which a display panel 6201 and a circuit board 6202 are combined. The display panel 6201 includes a pixel portion 6203, a scan line driver circuit 6204, and a signal line driver circuit 6205. For example, the control circuit 6206 is mounted on the circuit board 6202.
And a signal division circuit 6207 and the like. Display panel 6201 and circuit board 6202
Are connected by connection wiring 6208. An FPC or the like can be used for the connection wiring.

The control circuit 6206 corresponds to the controller 6108 or the memory 6 in the ninth embodiment.
109, 6110 and the like. The control circuit 6206 mainly controls the appearance order of subframes and the like.

The display panel 6201 integrally forms a pixel portion and a part of peripheral drive circuits (a drive circuit having a low operating frequency among a plurality of drive circuits) on a substrate using a transistor, and a part of peripheral drive circuits (a plurality of drive circuits). Among the circuits, a driver circuit having a high operating frequency may be formed over an IC chip, and the IC chip may be mounted on a display panel 6201 by COG (Chip On Glass) or the like. Or, TAB (Tape Automated Bonding) the IC chip
Or a printed circuit board may be mounted on the display panel 6201.

Further, by performing impedance conversion of a signal set to a scanning line or a signal line by a buffer circuit, writing time of pixels in each row can be shortened. Thus, a high definition display device can be provided.

In addition, in order to further reduce power consumption, a pixel portion is formed using a transistor on a glass substrate, all signal line driver circuits are formed on an IC chip, and the IC chip is COG (Ch).
It may be implemented on the ip On Glass display panel.

For example, the entire screen of the display panel is divided into several areas, and an IC chip in which some or all of the peripheral drive circuits (signal line drive circuits, scan line drive circuits, etc.) are formed in each area is arranged. You may mount in a display panel by (Chip On Glass) etc. The configuration of the display panel in this case is shown in FIG.

FIG. 63 shows an example in which the entire screen is divided into four regions and driven using eight IC chips. The structure of the display panel is the substrate 6310, the pixel portion 6311, and the FPCs 6312a to 631.
2h, has IC chips 6313a to 6313h. Of the eight IC chips, 6313
Signal lines driver circuits are formed in a to 6313 d, and scanning line driver circuits are formed in 6313 e to 6313 h. Then, by driving an arbitrary IC chip, it becomes possible to drive only an arbitrary screen area among the four screen areas. For example, IC chip 6
When only 313a and 6313e are driven, only the upper left region of the four screen regions can be driven. By doing this, it is possible to reduce power consumption.

An example of a display panel having another structure is shown in FIG. The display panel in FIG. 64 includes a pixel portion 6421 in which a plurality of pixels 6430 are arrayed over a substrate 6420, a scan line driver circuit 6422 which controls signals of a scan line 6433, and a signal line driver circuit 64 which controls signals of signal lines 6431.
There are twenty-three. In addition, a monitor circuit 6424 for correcting a change in luminance of a light-emitting element included in the pixel 6430 may be provided. The light emitting element included in the pixel 6430 and the light emitting element included in the monitor circuit 6424 have the same structure. The structure of the light-emitting element is formed by sandwiching a layer containing a material that develops electroluminescence between a pair of electrodes.

In the peripheral portion of the substrate 6420, an input terminal 6425 for inputting a signal from an external circuit to the scan line driver circuit 6422 and an input terminal 6426 for inputting a signal from an external circuit to the signal line driver circuit 6423.
, And an input terminal 6429 for inputting a signal to the monitor circuit 6424.

In order to make the light emitting element provided in the pixel 6430 emit light, power needs to be supplied from an external circuit. A power supply line 6432 provided in the pixel portion 6421 is connected to an external circuit at an input terminal 6427. It is preferable to provide a plurality of input terminals 6427 in the periphery of the substrate 6420 because resistance loss occurs due to the length of the power supply line 6432. Input terminal 6427
Are provided at both ends of the substrate 6420 so as to make luminance unevenness inconspicuous in the plane of the pixel portion 6421. That is, it prevents that one side is bright in the screen and the other side is dark. In addition, although the electrode on the opposite side to the electrode connected to the power supply line 6432 in the light emitting element provided with the pair of electrodes is formed as a common electrode shared by the plurality of pixels 6430, the resistance loss of this electrode is also reduced. For this purpose, a plurality of terminals 6428 are provided.

Such a display panel is particularly effective when the screen size is increased because the power supply line is formed of a low resistance material such as Cu. For example, when the screen size is 13 inches class, the diagonal length is 340 mm, but in the case of 60 inches class, it is 1500 mm or more. In such a case, since the wiring resistance can not be ignored, it is preferable to use a low resistance material such as Cu as the wiring. Further, in consideration of the wiring delay, signal lines and scanning lines may be formed in the same manner.

An EL television receiver can be completed by the EL module having the above-described panel configuration. FIG. 65 is a block diagram showing the main configuration of an EL television receiver. The tuner 6501 receives a video signal and an audio signal. The video signal is transmitted to a video signal amplifier circuit 6502
And a video signal processing circuit 6503 that converts signals output therefrom into color signals corresponding to red, green, and blue, and a control circuit 6206 that converts the video signal to the input specification of the drive circuit. Be done. The control circuit 6206 outputs signals to the scanning line side and the signal line side, respectively. In the case of digital driving, the signal dividing circuit 6207 may be provided on the signal line side, and the input digital signal may be divided into M pieces and supplied.

Among the signals received by the tuner 6501, an audio signal is sent to an audio signal amplifier circuit 6504, and an output thereof is supplied to a speaker 6506 through an audio signal processing circuit 6505. The control circuit 6507 receives control information of a receiving station (reception frequency) and volume from the input portion 6508, and sends a signal to the tuner 6501 and the audio signal processing circuit 6505.

The television set can be completed by incorporating the EL module into a housing. A display unit is formed by the EL module. In addition, speakers, video input terminals, etc. are provided as appropriate.

Of course, the present invention is not limited to a television receiver, but includes a monitor of a personal computer,
The present invention can be applied to various applications as a particularly large area display medium such as an information display board at a railway station or an airport, an advertisement display board at a street, etc.

As described above, by using the display device and the driving method of the present invention, it is possible to view a clear image with reduced variation in luminance.

Note that this embodiment is an example in the case of embodying the contents (may be a part) described in the other embodiments, an example in the case of slight modification, an example in the case of changing a part, an improvement An example of the case,
An example of the case described in detail, an example of the case of application, an example of the relevant part, and the like are shown. Therefore, the contents described in the other embodiments can be freely applied to, combined with, or replaced with this embodiment.

Note that although the present embodiment has been described using various figures, the contents described in each figure (
Some parts may be applied to, or combined with, the contents described in another figure (or some parts).
Or, replacement can be freely performed. Furthermore, in the figures described above, more figures can be constructed by combining other parts with respect to each part.

Similarly, the contents (or a part) described in each figure of this embodiment can be applied to, combined with, or replaced with the contents (or a part) described in the figure of another embodiment. Can do it freely. Furthermore, in the drawings of the present embodiment, more parts can be configured by combining the parts of the other embodiments with respect to the respective parts.

(Embodiment 11)
As electronic devices using the display device of the present invention, video cameras, digital cameras, goggle type displays (head mounted displays), navigation systems, sound reproducing devices (car audio, audio component etc.), notebook type personal computers, game machines, Mobile information terminals (mobile computers, mobile phones, portable game machines, electronic books, etc.),
Image reproduction apparatus provided with a storage medium (specifically, Digital Versatile Di
An apparatus provided with a display capable of reproducing a storage medium such as sc (DVD) and displaying the image, and the like. Specific examples of those electronic devices are shown in FIG.

FIG. 66A shows a self-emission display, which includes a housing 6601, a support 6602, a display portion 6603, a speaker portion 6604, a video input terminal 6605, and the like. The present invention can be used for a display device included in the display portion 6603. According to the present invention, it is possible to view a beautiful image with reduced variation in luminance. Since it is a self-luminous type, a backlight is not necessary, and the display portion can be thinner than a liquid crystal display. The display includes all display devices for displaying information, such as for personal computers, for receiving TV broadcasts, and for displaying advertisements.

FIG. 66B shows a digital still camera, which is a main body 6606, a display portion 6607, an image receiving portion 6
608, an operation key 6609, an external connection port 6610, a shutter 6611 and the like. The present invention can be used for a display device included in the display portion 6607, and according to the present invention, it is possible to view a clear image with reduced variation in luminance.

FIG. 66C shows a laptop personal computer, which includes a main body 6612, a housing 6613, and the like.
A display unit 6614, a keyboard 6615, an external connection port 6616, a pointing mouse 6617 and the like are included. The present invention can be used for a display device constituting the display portion 6614.
According to the present invention, it is possible to view a clear image with reduced variations in luminance.

FIG. 66D shows a mobile computer, which includes a main body 6618, a display portion 6619, a switch 6620, operation keys 6621, an infrared port 6622, and the like. The present invention relates to a display unit 661
The present invention can be used for the display device constituting the image display device 9, and the present invention makes it possible to view a clear image with reduced variation in luminance.

FIG. 66E shows an image reproduction apparatus (specifically, for example, a DVD reproduction apparatus) provided with a storage medium reading unit, which is a main body 6623, a housing 6624, a display portion A6625, a display portion B6626, a storage medium (DVD etc.) ) Includes a reading unit 6627, an operation key 6628, a speaker unit 6629, and the like.
The display portion A6625 mainly displays image information, and the display portion B6626 mainly displays text information. The present invention can be used for a display device forming the display portion A6625 and the display portion B6626, and according to the present invention, it is possible to view a beautiful image with reduced variation in luminance. The image reproduction apparatus provided with the recording medium also includes a home game machine and the like.

FIG. 66 (F) shows a goggle type display (head mounted display), and a main body 6
And 630, a display portion 6631, an arm portion 6632 and the like. The present invention can be used for a display device included in the display portion 6631. According to the present invention, it is possible to view a beautiful image with reduced variation in luminance.

FIG. 66G shows a video camera, which is a main body 6633, a display portion 6634, a housing 6635, an external connection port 6636, a remote control reception portion 6637, an image receiving portion 6638, a battery 6639
, Voice input unit 6640, operation keys 6641 and the like. The present invention can be used for a display device included in the display portion 6634. According to the present invention, it is possible to view a beautiful image with reduced variation in luminance.

FIG. 66H shows a mobile phone, which includes a main body 6642, a housing 6643, a display portion 6644, an audio input portion 6645, an audio output portion 6646, operation keys 6647, an external connection port 6648, an antenna 6649, and the like. The present invention can be used for a display device which constitutes the display portion 6644. Note that the display portion 6644 can suppress current consumption of the mobile phone by displaying white characters on a black background. Further, according to the present invention, it is possible to view a clear image with reduced variation in luminance.

Note that if a light emitting material with high light emission luminance is used, light including the output image information can be enlarged and projected by a lens or the like to be used for a front type or rear type projector.

Further, in recent years, the electronic device has often displayed information distributed through an electronic communication line such as the Internet or CATV (cable television), and in particular, the opportunity to display moving image information has increased. Since the response speed of the light emitting material is very high, the light emitting device is preferable for displaying moving pictures.

Further, since the light emitting portion consumes power in the light emitting display device, it is preferable to display information so that the light emitting portion is minimized. Therefore, when a light emitting display device is used for a display unit mainly composed of character information such as a portable information terminal, especially a cell phone or a sound reproducing device, the character information is formed of the light emitting portion with the non-light emitting portion as a background. It is desirable to drive.

As described above, the scope of application of the present invention is so wide that it can be used for electronic devices in all fields. In addition, the electronic device of the present embodiment may use the display device having any one of the structures shown in Embodiments 1 to 10.

101 transistor 102 transistor 103 storage capacitance 104 scan line 105 signal line 106 power source line 108 capacitance line 108 light emitting element 123 insulating film 201 transistor 202 storage capacity 204 scan line 205 signal line 206 power source line 207 capacitance line 208 light emitting element 301 transistor 302 Transistor 303 Transistor 304 Transistor 305 Transistor 306 Holding capacitance 307 Signal line 308 First scan line 309 Second scan line 310 Third scan line 311 Fourth scan line 312 Power line 313 Power line 314 Capacitance line 315 Light emitting element 316 Light-emitting element 801 Transistor 802 Transistor 803 Transistor 804 Transistor 805 Transistor 806 Holding capacitance 807 Signal line 808 First scan line 809 Second scan 810 third scanning line 811 fourth scanning line 812 power supply line 813 power supply line 814 capacitance line 815 light emitting element 2101 transistor 2102 transistor 2102 transistor 2103 transistor 2104 transistor 2105 transistor 2106 holding capacitance 2107 signal line 2108 first scanning line 2109 second Scan line 2110 third scan line 2111 fourth scan line 2112 power supply line 2115 power supply line 2115 light emitting element 2121 transistor 2122 transistor 2122 transistor 2124 transistor 2125 transistor 2125 storage capacity 2128 first scan line 2129 second scan line 2130 first scan line Three scanning lines 2131 Fourth scanning line 2135 Light emitting element 2149 Second scanning line 2301 Transistor 2302 Transistor 2303 Transistor 2304 Transistor 2305 Transistor 2306 Storage capacitor 2307 Signal line 2308 First scan line 2309 Second scan line 2310 Third scan line 2311 Fourth scan line 2312 Power supply line 2315 Light emitting element 2321 Transistor 2322 Transistor 2323 Transistor 2324 Transistor 2325 Transistor 2326 Storage capacitor 2328 first scan line 2329 second scan line 2330 third scan line 2331 fourth scan line 2335 light emitting element 2349 second scan line 2516 transistor 2517 fifth scan line

Claims (1)

A semiconductor device having a pixel, wherein the pixel is at least electrically connected to a signal line to which a video signal is applied, a capacitor line, and a first electrode, and the second electrode is a load. A second transistor having a function as a switch for selecting whether or not to electrically connect the second electrode of the first transistor and the gate electrode; A first electrode electrically connected to the gate electrode of the first transistor, and a second electrode electrically connected to the capacitance line. A potential obtained by adding or subtracting the absolute value of the threshold voltage of the first transistor from the video signal voltage, which is applied to the electrode and the gate electrode of the first transistor, and the first electrode of the first transistor potential More, wherein a the amount of current flowing through the load is determined.

Images