JP2017195659A - Electronic control device and motor control device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress a synchronization shift between a plurality of systems.SOLUTION: In a motor control device, two control systems as a control system having an operation part and a timer generation part that generates a processing timing of the operation part on the basis of a clock inputted from an oscillator. The two control systems includes timing storing parts 38a and 38b that store a reset determination value to be set so that a time-lag of the processing timing between control operation parts 21 and 22 not exceeds an acceptable limit on the basis of the time-lag generated between the clock itself and an optimal clock. The control operation parts 21 and 22 include reset determination parts 37a and 37b determining the starting of a reset operation for a timer generation part 33 of itself on the basis of the reset determination value to be stored in each of the timing storing parts 38a and 38b.SELECTED DRAWING: Figure 2

Description

  The present invention relates to an electronic control device and a motor control device.

  As an electronic control device that outputs a control signal to control the operation of a control target, for example, there is one described in Patent Document 1. Patent Document 1 discloses a motor control device that includes two microcomputers that control a motor and control the driving of the motor, each of which calculates and outputs a current command value. Each microcomputer calculates the current command value by executing the same current feedback calculation, and outputs it to a pair of switching arms constituting the drive circuit. Each switching arm operates independently according to its current command value. Each microcomputer determines a system abnormality when the current deviation between the current command value and the actual current exceeds a predetermined threshold.

  As described above, in recent years, driving of a motor is controlled by a motor control device having two control systems and having redundancy. In such a control device, a two-core operation, a lock step, or a two-phase operation in a microcomputer is performed and has a self-monitoring function.

JP 2011-20482 A

  In the above-mentioned Patent Document 1, the two microcomputers control the drive circuits in synchronization with each other, but a method for dealing with the case where the synchronization is shifted is not disclosed. Such a problem is not limited to the case where the motor is a control target, but is the same as long as the control target is operated by electronic control.

  The present invention has been made in view of such circumstances, and an object of the present invention is to provide an electronic control device and a motor control device capable of suppressing a synchronization shift among a plurality of systems.

  An electronic control device that solves the above problems includes a control unit that outputs a control signal to control the operation of a control target, a timer generation unit that generates processing timing of the control unit based on a clock input from an oscillator, As a control system having a plurality of control systems, a plurality of control systems are configured. In this electronic control device, at least one control system of the plurality of control systems is based on a time lag that occurs between the clock of the own (the at least one control system) and a predetermined reference clock. Based on the reset storage stored in the timing storage unit, a timing storage unit that stores a preset reset timing within a range in which a time lag in processing timing with another control system is allowed, A reset determination unit that determines that the timer generation unit of itself (the at least one control system) starts a reset operation in order to reset the processing timing of itself (the at least one control system). ing.

  According to the above configuration, the electronic control device determines the start of the reset operation based on the reset timing stored therein during the operation. In this case, since the reset timing is stored in advance in the electronic control device, a time lag in processing timing among a plurality of systems is detected via communication to start a reset operation, There is no need to instruct the start of the reset operation between the systems via communication. Thereby, the electronic control apparatus which has a timing memory | storage part and a reset determination part inside can start reset operation | movement, without requiring communication between several control systems. Accordingly, it is possible to suppress the synchronization shift between the plurality of systems while maintaining the redundancy of the plurality of systems in the reset operation.

  In the electronic control device, the plurality of control systems each include a timing storage unit and a reset determination unit, and the reference clock is preferably an optimal clock that is optimized in designing the electronic control device. .

  According to the above configuration, the reset operation is started based on the reset timing stored in the respective timing storage units so that each of the plurality of control systems suppresses the synchronization shift. In this case, since the reset timing for starting the reset operation in each control system is predetermined based on the optimum clock, the reset is performed so that the deviation of the clock of each control system with respect to the optimum clock is reduced. Be operated. As a result, it is possible to maintain the processing timing of each control system within a range in which a time lag occurring between them is allowed, and to suppress synchronization lag with higher accuracy. And even if it is a case where a synchronization shift | offset | difference is suppressed with a higher precision, redundancy of multiple systems can be suitably maintained about reset operation.

  In addition, in the electronic control apparatus, the plurality of control systems include a first control system that does not include a timing storage unit and a reset determination unit, and a second control system that includes a timing storage unit and a reset determination unit. The timing storage unit in the second control system may store the reset timing using the clock of the oscillator of the first control system as a reference clock.

  According to the above configuration, the second control system starts the reset operation based on the reset timing stored in the timing storage unit so as to suppress the synchronization shift with respect to the first control system. In the second control system, the reset timing for starting the reset operation is predetermined based on the clock of the first control system, so that the processing timing of the second control system is the first control timing. Reset operation is performed so as to approach the processing timing of the system. As a result, the reset operation is performed only for the second control system between the first and second control systems, so that the first control system does not require the reset operation, and the first and second control systems The processing timing of the system can be maintained within a range in which these time lags are allowed. Even in this case, redundancy of a plurality of systems can be suitably maintained for the reset operation.

In the electronic control device, it is desirable that the reset timing stored in the timing storage unit is stored in an inspection process before shipment.
According to the above configuration, at the time of operation of the electronic control device after shipment, the setting for suppressing the synchronization shift among the plurality of systems, that is, the storage of the reset timing which is information necessary for the reset operation is stored in the electronic control device. Has already been completed in the pre-shipment inspection process. Thereby, prior to the operation of the electronic control unit, it is possible to suppress synchronization deviation among a plurality of systems without requiring any adjustment or setting by the user.

Such an electronic control device may be used as a motor control device that controls a motor.
According to the above configuration, the motor control device controls the drive of the motor using a plurality of control systems, so that even if a failure occurs in any of the control systems, the remaining control system controls the drive of the motor. Thus, redundancy of the motor control system can be realized. As described above, even when the motor control system is made redundant, it is possible to suppress the synchronization shift between the plurality of systems.

  ADVANTAGE OF THE INVENTION According to this invention, the synchronization shift between several systems can be suppressed.

The block diagram which shows the electric constitution about a motor control apparatus. The block diagram which shows the structure of the 1st control calculating part and 2nd control calculating part about a motor control apparatus. The figure which shows the shift | offset | difference of the process timing between control systems. The figure which shows the shift | offset | difference of the clock between control systems. The figure which shows the process of setting the reset determination value in 1st Embodiment. The flowchart which shows the flow of the reset process in 1st Embodiment. The figure which shows the process of setting the reset determination value in 2nd Embodiment.

(First embodiment)
Hereinafter, a first embodiment of an electronic control device and a motor control device will be described.
As shown in FIG. 1, the electronic control device of this embodiment is a motor control device 10 that controls the operation of the motor 11 with the motor 11 as a control target. The motor control device 10 controls the driving of the motor 11 to give a motor torque to a steering mechanism of the vehicle and execute a power steering control for assisting a user's steering operation, for example, a so-called “ ECU (Electronic Control Unit) ".

  The motor 11 is a surface magnet type brushless DC motor. The motor 11 includes a rotor 12 that rotates about its central axis m, and a stator 13 that is disposed on the outer periphery of the rotor 12. A permanent magnet is fixed to the surface of the rotor 12. The permanent magnets are alternately arranged with different polarities (N pole, S pole) in the circumferential direction of the rotor 12. Such a permanent magnet forms a magnetic field, that is, a field, when the motor 11 rotates. The stator 13 has a plurality of three-phase (U-phase, V-phase, W-phase) coils 14 arranged in an annular shape. The coils 14 are classified into a first coil group 14A and a second coil group 14B. The first coil group 14A and the second coil group 14B have U-phase, V-phase, and W-phase coils 14 that are star-connected, respectively. The motor 11 is connected to a motor control device 10 that controls driving of the motor 11 by controlling a current amount that is a control amount of the motor 11.

  As shown in FIG. 1, the motor control device 10 includes a control system A that controls power supply to the first coil group 14A of the motor 11, and a control system B that controls power supply to the second coil group 14B of the motor 11. It has. Each coil group 14 </ b> A, 14 </ b> B is configured such that the coils of each phase are alternately arranged for each system along the circumference of the motor 11, or the coils of each phase are arranged together along the circumference of the motor 11. They are arranged, or are laminated in the radial direction of the motor 11 on the same tooth.

  In the present embodiment, by providing the control system A and the control system B, the control system related to driving of the motor 11 is made redundant. For example, when the control system A has an abnormality in which control related to driving such as power supply to the motor 11 cannot be continued, control such as power supply to the motor 11 by the control system A is stopped, and the motor 11 is controlled only by the control system B. It shifts to the state of a failure in which the power supply to is controlled. On the other hand, when the control system B has an abnormality in which control related to driving such as power supply to the motor 11 cannot be continued, control of power supply to the motor 11 by the control system B is stopped, and the motor 11 is controlled only by the control system A. It shifts to the state of a failure in which the power supply to is controlled.

  The control system A includes a first control calculation unit 21, a first motor driving unit 23, a first current sensor 25, and an oscillator 27. The control system B includes a second control calculation unit 22, a second motor drive unit 24, a second current sensor 26, and an oscillator 28. Each motor drive unit 23, 24 is a three-phase (U-phase, V-phase, W-phase) inverter circuit having a plurality of switching elements such as MOSFETs. Each of the motor drive units 23 and 24 includes three sets of arms (single-phase half bridges) each including two FETs (field-effect transistors) connected in series, and a positive terminal and a negative terminal of a DC power source. Are connected in parallel. Each current sensor 25, 26 detects a current value I of each phase generated in a power feeding path between each motor driving unit 23, 24 and each phase coil 14.

  Here, functions of the first control calculation unit 21 and the second control calculation unit 22 will be described. In addition, since the 1st control calculating part 21 and the 2nd control calculating part 22 are the same structures, the 1st control calculating part 21 is demonstrated and about the structure of the 2nd control calculating part 22, the 1st control calculating part 21 The reference numerals attached to the respective parts constituting the are attached, and detailed description thereof is omitted.

  As shown in FIG. 2, the first control calculation unit 21 includes a micro process unit (MPU), and includes a calculation unit (CPU) 31, a clock generation unit 32a, a timer generation unit 33, a triangular wave generation unit 34, and an A / D conversion. A unit 35, a motor drive command generation unit 36, a reset determination unit 37a, and a timing storage unit 38a. In the present embodiment, the calculation unit 31 and the motor drive command generation unit 36 of the first control calculation unit 21 and the second control calculation unit 22 are examples of the control unit.

  The clock generation unit 32a is a multiplier, which multiplies a clock having a fundamental frequency input from an oscillator 27 made of a crystal element or the like by a predetermined multiple, and obtains the clock CLKa obtained thereby by a calculation unit (CPU) 31 and a timer generation unit. 33 respectively. The clock generator 32a receives the ignition signal IG, so that the clock having the fundamental frequency is input after the power supply to the oscillator 27 is started.

  The timer generation unit 33 includes a known frequency divider and an up / down counter. The clock CLKa divided by the frequency divider counts up and down with the up / down counter, and the count value is generated by the calculation unit 31 and the triangular wave. Output to the unit 34 and the A / D converter 35. The timer generation unit 33 counts the elapsed time based on the count of the clock CLKa, and outputs a timer value, which is information indicating the content of the count, to the reset determination unit 37a.

The triangular wave generation unit 34 generates a triangular wave as a carrier wave based on the count value input from the timer generation unit 33 and outputs the triangular wave to the motor drive command generation unit 36.
Further, the triangular wave generation unit 34 outputs an AD conversion execution timing signal to the A / D conversion unit 35 based on the generated triangular wave, and outputs a processing timing signal to the calculation unit 31. The AD conversion execution timing is the timing at which AD conversion is executed at the time when the peak (vertex) and valley (bottom point) of the triangular wave are reached. The timing at which the AD conversion execution timing signal is output is synchronized with the AD conversion execution timing.

  The processing timing is a timing at which the calculation unit 31 executes various types of calculation processing at the time when the peak (vertex) and valley (bottom point) in the triangular wave are reached. Note that the timing at which the processing timing signal is output is synchronized with the processing timing (the timing at which the calculation unit 31 executes various types of calculation processing). Therefore, the cycle of the processing timing is a period between a peak (vertex) and a valley (bottom point) of the triangular wave.

  The A / D conversion unit 35 performs AD conversion on detection signals (analog signals) input from various sensors (in the present embodiment, the current sensor 25 and the sensor 40) based on the AD conversion execution timing signal, and then calculates the calculation unit 31. To enter. The calculation unit 31 generates a motor drive command (Duty ratio) based on the detection signal input from the A / D conversion unit 35 and outputs it to the motor drive command generation unit 36.

  The motor drive command generation unit 36 generates a control signal (PWM signal) at the processing timing based on the triangular wave input from the triangular wave generation unit 34 and the motor drive command (Duty ratio) input from the calculation unit 31. Output to the motor drive unit 23. The first motor drive unit 23 converts the DC power supplied from a DC power source such as a battery into three-phase AC power by turning on and off a plurality of switching elements based on a control signal (PWM signal) output at the processing timing. Convert.

  Based on the timer value input from the timer generation unit 33, the reset determination unit 37a generates a reset trigger (trigger signal) as a signal for instructing the start of a reset operation for resetting the count timing of the count value to generate the timer. To the unit 33.

  The timing storage unit 38a is a nonvolatile memory, and stores a reset determination value as a reset timing for instructing the start of the reset operation in the inspection process before shipment of the motor control device 10. The reset determination value indicates a period from the start of the previous reset operation to the start of the next reset operation, and is set in advance as a timer value indicating this period. The reset determination value will be described in detail later.

  The first control calculation unit 21 and the second control calculation unit 22 are based on the rotation angle θ (rotation position) of the rotor 12 detected through the rotation angle sensor 40 provided in the motor 11. 23 and control signals for the second motor drive unit 24 are generated. As the rotation angle sensor 40, for example, an MR sensor or a Hall sensor is employed.

  As described above, the first control calculation unit 21 and the second control calculation unit 22 are controlled by the first motor driving unit 23 and the second motor driving unit 24, and the first coil group 14A (control system A) and the second coil group. The drive of the motor 11 is controlled by controlling the power supply to 14B (control system B).

  In this embodiment, the calculation of both the calculation units 31 of the first control calculation unit 21 and the second control calculation unit 22, the AD conversion timing of the A / D conversion unit 35, and the switch timing (ON / OFF) of the both motor drive command generation unit 36 (Timing) is performed at the processing timing generated based on the clocks CLKa and CLKb.

  For example, as shown in FIG. 3, in the control system A, the A / D conversion unit at the timing (processing timing cycle) of the peak (vertex) and valley (bottom point) of the triangular wave Wa generated by the triangular wave generation unit 34. 35 performs AD conversion, and the motor drive command generation unit 36 turns on and off the switching element. This also applies to the control system B. In the present embodiment, both the calculation units 31 of the first control calculation unit 21 and the second control calculation unit 22 have the same processing timing period and are configured to perform calculation in synchronization. On the other hand, in the control system A and the control system B, the clocks CLKa and CLKb are generated so that the oscillators 27 and 28 independently have the same processing timing period.

  However, as shown in FIG. 4, when each oscillator (for example, crystal element) varies between the oscillators 27 and 28, the clock generators 32a and 32b to which the respective clocks are input are generated. A shift occurs between the clocks CLKa and CLKb. Such a shift between the clocks CLKa and CLKb is not eliminated, but it spreads to the count value of the timer generation unit 33 and further to the triangular wave of the triangular wave generation unit 34, and finally between the control system A and the control system B. Thus, a time lag of the processing timing is caused.

  That is, as shown in FIG. 3, the time lag of the processing timing between the control system A and the control system B becomes larger with the passage of time, and when the time lag exceeds a predetermined allowable range, Both the calculation units 31 of the first control calculation unit 21 and the second control calculation unit 22 are in an asynchronous state where calculation cannot be performed in synchronization. In this asynchronous state, the processing timing between the control system A and the control system B is shifted in time, so that the switch timing in the control system A and the AD conversion timing in the control system B overlap. As a result, the noise generated in connection with the on / off of the switch in the control system A is superimposed on the AD conversion value (data) in the control system B, and the second motor driving unit 24 controls the data based on the data on which the noise is superimposed. Will come to be. In this case, the drive of the motor 11 cannot be normally controlled even though the abnormality that should be shifted to the fail state does not occur in either the control system A or the control system B. Therefore, in the present embodiment, in order to prevent the asynchronous state from occurring in advance, a period until the time lag of the processing timing is accumulated to some extent is measured in advance, and the processing timing lag is increased every time the period elapses. In order to eliminate the above, each of the control calculation units 21 and 22 has each of the reset determination units 37a and 37b and each of the timing storage units 38a and 38b.

  Here, functions of the reset determination unit 37a and timing storage unit 38a of the first control calculation unit 21 and the reset determination unit 37b and timing storage unit 38b of the second control calculation unit 22 will be described in detail.

  First, a process of setting a reset determination value for each timing storage unit 38a, 38b will be described. In addition, since the 1st control calculating part 21 and the 2nd control calculating part 22 are the same processes, the process with respect to the 1st control calculating part 21 is demonstrated, and the detailed description about the process with respect to the 2nd control calculating part 22 is given. Omitted.

  FIG. 5 shows an inspection process before shipment of the motor control device 10, and a process for setting a reset determination value is included in a part of the inspection process. In the inspection factory (shipping place) 50 of the motor control device 10, the reset determination value is not stored in the timing storage unit 38a of the first control calculation unit 21 before the inspection process. In this case, the reset determination unit 37a is in a state where the reset timing cannot be specified and the timer generation unit 33 cannot be instructed to start the reset operation. The same applies to the second control calculation unit 22.

There are five major steps in setting the reset determination value.
As shown in FIG. 5, in the first step of setting the reset determination value, a measuring instrument 51 such as an oscilloscope is connected from the outside of the motor control device 10 to the clock generation unit 32 a of the first control calculation unit 21. In this state, power supply using an external power source is started for the first control calculation unit 21, and the first control calculation unit 21 is activated. In this case, power supply to the oscillator 27 is also started, and the clock generator 32a starts outputting the clock CLKa based on the clock having the fundamental frequency of the oscillator 27.

Subsequently, in the second step, the measuring device 51 measures the clock CLKa output from the connected clock generator 32a.
Subsequently, in the third step, the measuring device 51 compares the clock CLKa of the connected clock generator 32a with the optimal clock CLKs, and determines the time difference of the clock CLKa with respect to the optimal clock CLKs. Measure the period difference. The optimal clock CLKs has an optimal clock cycle in the design of the motor control device 10 and is stored in the measuring device 51 in advance. In the present embodiment, the optimum clock CLKs is an example of a reference clock.

  Subsequently, in the fourth step, the reset determination value is calculated by the measuring device 51 using the clock cycle difference measured in the third step. This reset determination value is a period in which the time lag of the processing timing between the control system A and the control system B does not exceed the allowable range as a result of the time lag of the processing timing of the clock CLKa with respect to the optimum clock CLKs. Calculated. The reset determination value calculated by the measuring instrument 51 is the reset determination value Rsa for the first control calculation unit 21. Thereafter, the measuring instrument 51 is disconnected from the clock generator 32a and disconnected. Thus, the measuring device 51 is used only in the process of setting the reset determination value (inspection process of the inspection factory 50).

  Subsequently, in the fifth step, the communication device 53 such as the portable information terminal is connected to the timing storage unit 38a of the first control calculation unit 21 from the outside of the motor control device 10, and in the fourth step. The calculated reset determination value Rsa is output via the communication device 53, and is written and stored (set) in the timing storage unit 38a. Thereafter, the communication device 53 is disconnected from the timing storage unit 38a and disconnected. In this way, the communication device 53 is used only in the process of setting the reset determination value Rsa (inspection process of the inspection factory 50).

  In the second control calculation unit 22, similarly to the first control calculation unit 21, the reset determination value Rsb for the second control calculation unit 22 is calculated through the first to fifth steps for setting the reset determination value. Then, it is written and stored (set) in the timing storage unit 38b.

  In this way, the motor control device 10 shipped after the inspection process is in operation after the ignition signal IG is input (in use by the user), the timing storage units of the control calculation units 21 and 22. The respective timer generation units 33 are reset using the reset determination values Rsa and Rsb stored in 38a and 38b.

  Next, a reset process that is a process related to the reset operation executed by each reset determination unit 37a, 37b will be described. In addition, each reset determination part 37a, 37b performs the following reset processes by performing a period process for every predetermined period. Each reset determination unit 37a, 37b performs reset processing separately. Hereinafter, for the sake of convenience, the description will be focused on the process executed by the reset determination unit 37a of the first control calculation unit 21, and the detailed description of the process executed by the reset determination unit 37b of the second control calculation unit 22 will be omitted. .

  As illustrated in FIG. 6, the reset determination unit 37a reads the reset determination value Rsa from the timing storage unit 38a when the ignition signal IG is input, and sets it in a predetermined temporary storage area (S10). In S10, the clock generator 32a starts to input a clock having a fundamental frequency from the oscillator 27. In addition, the timer determination unit 37a starts to input a timer value from the timer generation unit 33. Note that the timer value is reset to zero when the ignition signal IG is input, and counting is started thereafter.

  Subsequently, the reset determination unit 37a compares the timer value input from the timer generation unit 33 with the reset determination value Rsa set in the temporary storage area to determine whether these values match. Determine (S20). In S20, the reset determination unit 37a determines whether or not it is a timing to start a reset operation that comes periodically, based on the timer value input from the timer generation unit 33 after the ignition signal IG is input. ing. Then, when the timer value and the reset determination value Rsa do not match (S20: NO), the reset determination unit 37a repeatedly executes the process of S20.

  On the other hand, when the timer value matches the reset determination value Rsa (S20: YES), the reset determination unit 37a determines that the timer generation unit 33 starts the reset operation, and reset trigger (trigger signal) Is output to the timer generation unit 33 of the first control calculation unit 21 (S30). In this case, the timer generation unit 33 of the first control calculation unit 21 starts the reset operation at the timing when the reset trigger is input, resets the count value to zero, and resets the timer value to zero. After S30, the reset determination unit 37a returns to the process of S20 and repeatedly executes the processes of S20 and S30 while the motor control device 10 is operating.

  Further, in the reset determination unit 37b of the second control calculation unit 22, as in the reset determination unit 37a of the first control calculation unit 21, it is determined through the reset process that the timer generation unit 33 starts a reset operation, A reset trigger (trigger signal) is generated and output to the timer generation unit 33 of the second control calculation unit 22. In this case, the timer generation unit 33 of the second control calculation unit 22 starts the reset operation at the timing when the reset trigger is input, resets the count value to zero, and resets the timer value to zero.

  Thus, each reset determination part 37a, 37b eliminates the shift in the processing timing of the mutual control system by individually resetting the count timing of the count value of the timer generation part 33 of the control system to which it belongs. It is configured as follows. That is, the time lag of the processing timing between the control system A and the control system B shown in FIG. 3 is eliminated, and the initial state (the leftmost time point in FIG. 3) without the time lag of the processing timing is Restored.

According to the present embodiment described above, the following operations and effects are achieved.
(1) During the operation, the motor control device 10 determines the start of the reset operation based on the reset determination value stored therein. In this case, since the reset determination value is stored in advance in the motor control device 10, the time difference in processing timing is communicated between the control calculation units 21 and 22 in order to start the reset operation. It is not necessary to detect via the communication, or to instruct the start of the reset operation via the communication between the control arithmetic units 21 and 22. Thereby, the motor control apparatus 10 which has a timing memory | storage part and a reset determination part inside can start reset operation | movement, without requiring communication between each control calculating parts 21 and 22. FIG. Therefore, the synchronization shift between the control system A and the control system B can be suppressed while maintaining the redundancy of the control system A and the control system B (respective control arithmetic units 21 and 22) in the reset operation.

  Then, by controlling the drive of the motor 11 using the control system A and the control system B as in the present embodiment, even if a failure occurs in any one of the control systems, the remaining control system is connected to the motor 11. The drive control can be continued, and the control system of the motor 11 can be made redundant. As described above, even when redundancy of the control system of the motor 11 is realized, it is possible to suppress a synchronization shift between the control system A and the control system B.

  (2) In the present embodiment, the resets stored in the respective timing storage units 38a and 38b so that each of the control arithmetic units 21 and 22 of the control system A and the control system B suppresses the synchronization shift. The reset operation is started based on the determination values Rsa and Rsb. In this case, in each of the control calculation units 21 and 22, the reset determination values Rsa and Rsb for starting the reset operation are predetermined based on the optimal clock CLKs. The reset operation is performed so that the shift between the clocks CLKa and CLKb of the units 21 and 22 is eliminated (decreased). As a result, it is possible to maintain the time lag between the processing timings of the control calculation units 21 and 22 within the allowable range, and to suppress the synchronization lag with higher accuracy. And even if it is a case where a synchronous shift is suppressed with a higher precision, redundancy of the control system A and the control system B can be suitably maintained about reset operation.

(3) The reset determination value, which is information necessary for the reset operation, is stored in the inspection process before shipment of the motor control device 10.
According to the above configuration, during the operation of the motor control device 10 after shipment, the setting for suppressing the synchronization deviation of the control calculation units 21 and 22, that is, the storage of the reset determination value that is information necessary for the reset operation. However, the inspection process before shipment of the motor control device 10 has already been completed. Thereby, prior to the operation of the motor control device 10, it is possible to suppress a synchronization shift between the control system A and the control system B without requiring any adjustment or setting by the user.

(Second Embodiment)
Next, a second embodiment of the motor control device and the steering control device will be described. In addition, the same structure as embodiment already demonstrated attaches | subjects the same code | symbol, and the duplicate description is abbreviate | omitted.

  As shown in FIG. 7, each of the control calculation units 21 and 22 of the present embodiment has a configuration in which only the second control calculation unit 22 is related to the reset operation, that is, a reset determination unit 37 b and a timing storage unit 38 b. ing. That is, the first control calculation unit 21 of the present embodiment does not include the reset determination unit 37a and the timing storage unit 38a that were included in the first embodiment. In the present embodiment, the control system A including the first control arithmetic unit 21 is an example of a first control system, and the control system B including the second control arithmetic unit 22 is an example of a second control system. It is.

Here, the functions of the reset determination unit 37b and the timing storage unit 38b of the second control calculation unit 22 of the present embodiment will be described in detail.
First, the process of setting the reset determination value for the timing storage unit 38b will be described.

As in the first embodiment, the process for setting the reset determination value according to the present embodiment includes five processes.
As shown in FIG. 7, in the first step of setting the reset determination value, a measuring instrument such as an oscilloscope is externally connected to the clock generators 32a and 32b of the control arithmetic units 21 and 22. In a state where 55 is connected, power supply using an external power source is started for each control calculation unit 21, 22, and each control calculation unit 21, 22 is activated. In this case, power supply to the oscillators 27 and 28 is also started, and the clock generators 32a and 32b start outputting the clocks CLKa and CLKb based on the clocks of the fundamental frequencies of the oscillators 27 and 28.

Subsequently, in the second step, the measuring device 55 measures the clocks CLKa and CLKb output from the connected clock generators 32a and 32b, respectively.
Subsequently, in the third step, the measuring device 55 compares the clock CLKa of the connected clock generation unit 32a with the clock CLKb of the clock generation unit 32b, and as a time lag of the clock CLKb with respect to the clock CLKa. Measure the clock period difference. In the present embodiment, the clock CLKa of the clock generator 32a is an example of a reference clock.

  Subsequently, in the fourth step, the reset determination value is calculated by the measuring device 55 using the clock period difference measured in the third step. The reset determination value is calculated as a period in which the time lag of the processing timing between the control system A and the control system B does not exceed the allowable range as a result of the time lag of the processing timing of the clock CLKb with respect to the clock CLKa. Is done. The reset determination value calculated by the measuring device 55 becomes the reset determination value Rsb for the second control calculation unit 22 in the present embodiment. Thereafter, the measuring device 55 is disconnected from the clock generators 32a and 32b and disconnected.

  Subsequently, in the fifth step, the communication device 56 such as a portable information terminal is connected to the timing storage unit 38b of the second control calculation unit 22 from the outside of the motor control device 10, and in the fourth step. The calculated reset determination value Rsb is output via the communication device 56, and is written and stored (set) in the timing storage unit 38b. Thereafter, the communication device 56 is disconnected from the timing storage unit 38b and disconnected.

  In this way, the motor control device 10 that is shipped after the inspection process is shipped to the timing storage unit 38b of the second control calculation unit 22 during operation after the ignition signal IG is input (in use by the user). Using the stored reset determination value Rsb, the timer generation unit 33 of the second control calculation unit 22 is reset.

  And the reset determination part 37b of this embodiment performs the process similar to the reset process shown in FIG. 6 as a process regarding reset operation. In the present embodiment, the reset process is executed only by the second control calculation unit 22, that is, the reset determination unit 37b.

  The reset determination unit 37b of the present embodiment resets the count timing of the count value of the timer generation unit 33 of the control system B (second control calculation unit 22) to which the control system B belongs, thereby controlling the control system A and the control system B. It is configured to eliminate the difference in processing timing between them. That is, the time lag of the processing timing between the control system A and the control system B shown in FIG. 3 matches the processing timing of the second control arithmetic unit 22 with respect to the processing timing of the first control arithmetic unit 21. In this way, the initial state (the leftmost time point in FIG. 3) that is eliminated by the reset operation and does not have a time lag in processing timing is restored.

According to this embodiment described above, in addition to the actions and effects (1) and (3) of the first embodiment, the following actions and effects can be obtained.
(4) In the present embodiment, the second control calculation unit 22 performs the reset operation based on the reset determination value Rsb stored in the timing storage unit 38b so as to suppress the synchronization shift with respect to the first control calculation unit 21. Will start. In the second control calculation unit 22, the reset determination value Rsb for starting the reset operation is predetermined based on the clock CLKa of the first control calculation unit 21. The reset operation is performed so that the timing matches (approaches) the processing timing of the first control calculation unit 21. As a result, by performing a reset operation only for the second control calculation unit 22 between the control calculation units 21 and 22, the first control calculation unit 21 does not require a reset operation, The 22 processing timings can be maintained within a range in which these time lags are allowed. And even if it is this embodiment, redundancy of the control system A and the control system B can be suitably maintained about reset operation.

In addition, each said embodiment can also be implemented with the following forms.
In the second embodiment, the optimum clock CLKs may be used as the reference clock, as in the first embodiment. Even in this case, operations and effects according to the above (1), (3), and (4) can be achieved.

  In the second embodiment, in the first step of setting the reset determination value, different measuring instruments are used for the clock generation unit 32a of the first control calculation unit 21 and the clock generation unit 32b of the second control calculation unit 22. The clocks CLKa and CLKb may be measured individually by connecting them.

  In the second embodiment, instead of the second control calculation unit 22 having a reset determination unit and a timing storage unit, the first control calculation unit 21 may have a reset determination unit and a timing storage unit. Even in this case, operations and effects according to the above (1), (3), and (4) can be achieved.

  The reset determination values Rsa and Rsb may be stored after the motor control device 10 is shipped, or may be stored by the user. During operation of the motor control device 10, at least necessary reset determination values (reset determination values Rsa and Rsb in the first embodiment, reset determination values Rsb in the second embodiment) are stored. I just need it.

  Each reset determination value Rsa and Rsb can be defined as the number of times the count value of the timer generation unit 33 is increased or decreased. In this case, for example, a reset trigger may be output to the timer generation unit 33 after a predetermined period after the count value corresponding to the reset determination value is increased or decreased. In addition, the reset determination value may be defined as the number of times the clocks of the oscillators 27 and 28 and the clock generation units 32a and 32b are increased and decreased, or may be defined as the number of peaks and valleys of a triangular wave. In this case, a clock and a triangular wave are input as necessary information to the necessary reset determination unit (reset determination units 37a and 37b in the first embodiment, reset determination unit 37b in the second embodiment). What is necessary is just to comprise.

  In the step of setting the reset determination value, the clocks of the oscillators 27 and 28 can be used to calculate the reset determination value, the count value of the timer generation unit 33 can be used, or the triangular wave generation unit Any of 34 triangular waves, AD conversion execution timing signal, and processing timing signal can also be used.

  The processing timing shift can be regarded as a processing timing cycle shift. In this case, by using each of the above-described embodiments, it is possible to suitably suppress a synchronization shift accompanying a shift in the processing timing cycle. Note that a shift in the processing timing cycle may be caused by, for example, a failure in the A / D conversion unit 35 or the calculation unit 31 on the processing side.

-In a failure, you may make it the calculating part 31 control the drive of the motor 11 so that the part for the control system by which control of the motor 11 was stopped may be supplemented with the remaining control system.
In the motor control device 10, it is sufficient that a plurality of control systems are configured, and it is sufficient that three systems or four or more control systems are configured.

The motor 11 may be two independent motors.
-Each above-mentioned embodiment can also be realized as an electronic control device which makes control object what operates by a control signal, such as a generator, instead of motor control device 10 which makes motor 11 control object.

  DESCRIPTION OF SYMBOLS 10 ... Motor control apparatus, 11 ... Motor, 12 ... Rotor, 13 ... Stator, 14 ... Coil, 14A ... 1st coil group, 14B ... 2nd coil group, 21 ... 1st control calculating part, 22 ... 2nd control calculation , 23... Motor drive unit, 24... Motor drive unit, 31... Operation unit, 27 and 28... Oscillator, 32 a and 32 b ... Clock generation unit, 33 ... Timer generation unit, 34 ... Triangular wave generation unit, 35. Conversion unit, 36 ... motor drive command unit, 37a, 37b ... reset determination unit, 38a, 38b ... timing storage unit, 50 ... inspection factory, 51, 52, 55 ... measuring instrument, 53, 54, 56 ... communication device, CLKa , CLKb ... clock, CLKs ... optimum clock, Rsa, Rsb ... reset determination value.

Claims (5)

As a control system having a control unit that outputs a control signal to control the operation of a control target and a timer generation unit that generates a processing timing of the control unit based on a clock input from an oscillator, a plurality of controls In the electronic control device that constitutes the system,
At least one control system of the plurality of control systems is:
Based on the time lag that occurs between your own clock and a predetermined reference clock, a reset that is determined in advance to the extent that time lag in processing timing with other control systems is allowed A timing storage unit for storing timing;
Based on the reset timing stored in the timing storage unit, a reset determination unit that determines to start a reset operation for its own timer generation unit in order to reset its own processing timing;
An electronic control device characterized by comprising: The plurality of control systems each include the timing storage unit and the reset determination unit,
The electronic control device according to claim 1, wherein the reference clock is an optimal clock that is optimized in designing the electronic control device. The plurality of control systems include a first control system that does not include the timing storage unit and the reset determination unit, and a second control system that includes the timing storage unit and the reset determination unit. And
2. The electronic control device according to claim 1, wherein the reset timing using the clock of the oscillator of the first control system as the reference clock is stored in the timing storage unit of the second control system.   The electronic control device according to claim 1, wherein the reset timing stored in the timing storage unit is stored in an inspection process before shipment.   The electronic control device according to any one of claims 1 to 4 is a motor control device that controls a motor.

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