JP2017181252A - CV conversion circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make it possible to set sensitivity to a capacitive change ΔC occurring due to a change in the physical quantity of a detection object, and improve CV conversion sensitivity for a fluctuation attributable to the capacitive change ΔC.SOLUTION: A CV conversion circuit of the present invention comprises: a switched capacitor circuit 14 having a capacitive element 15 and switches SW1, SW2; a first transistor M1 for supplying a current due to a capacitive change ΔC of the capacitive element 15 to the switched capacitor circuit 14; a second transistor M2 connected in parallel to the first transistor M1, for supplying a current of steady state dependent on the capacitance Cs of the capacitive element 15 to the switched capacitor circuit 14; and an operational amplifier OP having an output terminal connected to a control electrode of the first transistor M1 and operating so that a voltage at an equivalent resistance of the switched capacitor circuit 14 that is inputted to a non-inverted input terminal and a reference voltage Vref that is inputted to an inverted input terminal become equal. A capacitance that corresponds to the physical quantity of a detection object is converted to a voltage, and the voltage is outputted as an output voltage Vout.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a CV conversion circuit that converts a capacitance change generated according to a physical quantity to be detected into a voltage.

  The CV conversion circuit is used as a circuit for converting a capacitance change into a voltage in, for example, a capacitance sensor, a condenser microphone, or the like. FIG. 9 is a circuit diagram showing a first conventional example of a CV conversion circuit. The first conventional example shows a configuration of a CV conversion circuit in the capacitance type detection device disclosed in Patent Document 1. The CV conversion circuit of the first conventional example is configured to include an operational amplifier 111, and a capacitive element 112 (Cs + ΔC) is connected between the inverting input terminal of the operational amplifier 111 and the ground (GND). A resistance element 114 (Rf) and a capacitance element 115 (Cf) are connected in parallel between the inverting input terminal of the operational amplifier 111 and the output terminal 113 (Vout). A reference voltage Vref is applied to the non-inverting input terminal of the operational amplifier 111.

  The capacitive element 112 corresponds to a capacitive sensor for detecting physical quantities such as acceleration and angular velocity, and the capacitance changes according to changes in physical quantities. When the amount of change in the capacitance Cs of the capacitive element 112 is ΔC and the resistance Rf of the resistive element 114 is very large and can be ignored, the output voltage Vout output from the output terminal 113 and its change are assumed to be Cf. The amount ΔVout is expressed by the following equation (1).

ΔVout = (ΔC / Cf) × Vref
Vout = {1+ (Cs + ΔC) / Cf} × Vref (1)

  That is, the capacitance change ΔC of the capacitive element 112 (capacitive sensor) with respect to the capacitance Cf of the capacitive element 115 is converted into a voltage. When there is no capacitance change in the capacitive sensor, ΔVout = 0, and the reference voltage Vref is output to the output terminal 113 as it is.

  FIG. 10 is a circuit diagram showing a second conventional example of a CV conversion circuit. The second conventional example shows a configuration of a CV conversion circuit using a switched capacitor circuit disclosed in Patent Document 2. The CV conversion circuit of the second conventional example is configured to include an operational amplifier 121, and a switched capacitor circuit 124 is connected to the inverting input terminal of the operational amplifier 121. The switched capacitor circuit 124 includes a capacitive element 122 (Cs) and two switches 125 and 126. One end of the two switches 125 and 126 is connected to the other end of the capacitive element 122 whose one end is grounded. The other end of the switch 125 is connected to the inverting input terminal of the operational amplifier 121, and the other end of the switch 126 is grounded. The switched capacitor circuit 124 operates as an equivalent resistance 1 / (fclk × Cs) by inputting two-phase signals φ1 and φ2 that are opposite in phase to each other at the frequency fclk to the switches 125 and 126 and turning them on and off. The resistor 1 / (fclk × Cs) is connected between the inverting input terminal of the operational amplifier 121 and the ground (GND). In the operational amplifier 121, a resistance element 127 (Rf) is connected between an inverting input terminal and an output terminal 123 (Vout), and a reference voltage Vref is applied to a non-inverting input terminal.

  The capacitance element 122 changes the capacitance Cs according to the change in the physical quantity. As in the first conventional example, the change amount of the capacitance Cs of the capacitance element 122 is ΔC, and the resistance of the resistance element 127 is Rf. Then, the output voltage Vout is expressed by the following equation (2).

      Vout = {1 + fclk × (Cs + ΔC) × Rf} × Vref (2)

JP 2009-198265 A JP-A-10-170544

  In recent years, capacitive sensors have been downsized, and there is a demand for small CV conversion circuits that can be applied to capacitive sensors, condenser microphones, and the like using MEMS (Micro Electro Mechanical Systems) technology. . With the miniaturization of the device, the capacitance Cs and capacitance change ΔC of the capacitive element of the CV conversion circuit have become very small values.

  From the above formulas (1) and (2), when the capacitance change ΔC is small, the CV conversion sensitivity for the fluctuation caused by the capacitance change ΔC when detecting a physical quantity accompanied by a periodic change such as vibration is reduced. I understand. In the first conventional example of FIG. 9, in order to increase the CV conversion sensitivity for fluctuation, it is necessary to make the capacitance Cf of the capacitive element 115 of the negative feedback loop very small with respect to the capacitance change ΔC. However, it is not practical to form a capacitive element having a capacitance of 1/10 to 1/100 with respect to the capacitance change ΔC in a small circuit, and there is a problem that it is difficult to obtain a desired sensitivity.

  On the other hand, in the CV conversion circuit of the second conventional example of FIG. 10, the CV conversion sensitivity is determined by the ratio of the resistance Rf of the resistance element 127 and the equivalent resistance 1 / (fclk × Cs) of the switched capacitor circuit 124. Therefore, the frequency fclk Alternatively, a relatively large sensitivity can be obtained by increasing the resistance Rf of the resistance element 127. However, when the CV conversion sensitivity is increased in this configuration, the sensitivity of the bias voltage depending on the capacitance Cs of the capacitive element 122 (steady CV conversion sensitivity, CV conversion rate) as well as the CV conversion sensitivity of the variation with respect to the capacitance change ΔC. ) Goes up at the same time. For this reason, it is not possible to improve only the CV conversion sensitivity with respect to the capacitance change ΔC required when detecting a physical quantity accompanied by a periodic change such as vibration.

  As described above, in the first conventional example, only the output voltage due to the capacitance change ΔC can be detected, but there is a problem that it is difficult to improve the sensitivity due to the limit of miniaturization of the capacitive element. Further, in the second conventional example, when the sensitivity of the CV conversion circuit is improved, a change in the bias voltage occurs with the improvement in sensitivity, so that it is difficult to improve only the CV conversion sensitivity with respect to the capacitance change ΔC. Occurs.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a CV conversion circuit that can set the sensitivity to a capacitance change ΔC caused by a change in a physical quantity to be detected and can improve the CV conversion sensitivity of a variation caused by the capacitance change ΔC. And

  The present invention includes a capacitive element whose capacitance changes according to a physical quantity to be detected, and at least two switches, and the switch is turned on and off by a two-phase signal having opposite phases to each other. A switched capacitor circuit that generates an equivalent resistance in accordance with the frequency of the two-phase signal, and a voltage source and the switched capacitor circuit are provided between the switched capacitor circuit, and a current corresponding to a change in capacitance of the capacitive element is supplied to the switched capacitor circuit. A first transistor to be supplied; connected between the first main electrode of the first transistor and the voltage source; or connected between the second main electrode of the first transistor and the switched capacitor circuit; A first load resistor provided with a voltage output terminal for obtaining an output voltage, and a bias current for supplying a bias current to the switched capacitor circuit. A current supply circuit, an output terminal connected to the control electrode of the first transistor, a voltage at the equivalent resistance of the switched capacitor circuit at the first input terminal, and a predetermined reference voltage at the second input terminal, respectively. There is provided a CV conversion circuit including an operational amplifier that is input and operates so that both input voltages are equal.

  In the CV conversion circuit, the bias current supply circuit includes a second transistor provided between the voltage source and the switched capacitor circuit, and a first main electrode of the second transistor. A second load resistor connected between the voltage source or between the second main electrode of the second transistor and the switched capacitor circuit; a control electrode of the first transistor; A low-pass filter connected between the control electrode of the transistor and passing a low-frequency component lower than a predetermined frequency may be used.

  Further, in the above CV conversion circuit, the bias current supply circuit may include a constant current circuit provided between the voltage source and the switched capacitor circuit.

  The present invention also includes a capacitive element whose capacitance changes according to a physical quantity to be detected and at least two switches, and the capacitance of the capacitive element is turned on and off by a two-phase signal having opposite phases. And a switched capacitor circuit that generates an equivalent resistance according to the frequency of the two-phase signal, and a source or an emitter and a drain or a collector are connected between the voltage source and the switched capacitor circuit. A first transistor that supplies a corresponding current to the switched capacitor circuit; a source or emitter of the first transistor and the voltage source; or a drain or collector of the first transistor and the switched capacitor circuit; And a first load resistor having a voltage output terminal for obtaining an output voltage at one end. A source or emitter and a drain or collector connected between the voltage source and the switched capacitor circuit, and supplying a current dependent on the capacitance of the capacitive element to the switched capacitor circuit; A second load resistor connected between the source or emitter of the second transistor and the voltage source or between the drain or collector of the second transistor and the switched capacitor circuit; A low-pass filter connected between the gate or base of the transistor and the gate or base of the second transistor and passing a low frequency component lower than a predetermined frequency, and an output terminal connected to the gate or base of the first transistor And the non-inverting input terminal is connected to the drain or collector of the first transistor. And the drain or collector of the second transistor and the switched capacitor circuit, the inverting input terminal is connected to a reference voltage source, and the voltage at the equivalent resistance of the switched capacitor circuit is equal to a predetermined reference voltage. An operational amplifier that operates as described above is provided.

  According to the present invention, it is possible to set the sensitivity to the capacitance change ΔC caused by the change in the physical quantity to be detected, and it is possible to improve the CV conversion sensitivity for the fluctuation caused by the capacitance change ΔC in the CV conversion circuit.

1 is a circuit diagram showing a configuration of a CV conversion circuit according to a first embodiment of the present invention. A circuit diagram showing composition of a CV conversion circuit concerning a 2nd embodiment of the present invention. A circuit diagram showing composition of a CV conversion circuit concerning a 3rd embodiment of the present invention. A circuit diagram showing composition of a CV conversion circuit concerning a 4th embodiment of the present invention. A circuit diagram showing composition of a CV conversion circuit concerning a 5th embodiment of the present invention. A circuit diagram showing composition of a CV conversion circuit concerning a 6th embodiment of the present invention. A circuit diagram showing composition of a CV conversion circuit concerning a 7th embodiment of the present invention. A circuit diagram showing composition of a CV conversion circuit concerning an 8th embodiment of the present invention. Circuit diagram showing a first conventional example of a CV conversion circuit Circuit diagram showing a second conventional example of a CV conversion circuit

  Hereinafter, an embodiment (hereinafter referred to as “the present embodiment”) that specifically discloses a CV conversion circuit according to the present invention will be described in detail with reference to the drawings.

  In the present embodiment, a configuration example of a CV conversion circuit that is used in, for example, a capacitive sensor, a condenser microphone, and the like and converts a capacitance change generated according to a physical quantity to be detected into a voltage is shown.

(First embodiment)
FIG. 1 is a circuit diagram showing a configuration of a CV conversion circuit according to the first embodiment of the present invention. The CV conversion circuit includes a first transistor M1 and a second transistor M2, an operational amplifier OP, a low-pass filter (LPF) 13, and a switched capacitor circuit 14.

  The switched capacitor circuit 14 includes a capacitive element 15 (Cs) and at least two switches SW1 and SW2, and one end of the two switches SW1 and SW2 is connected to the other end of the capacitive element 15 whose one end is grounded. The other end of the switch SW1 is connected to the non-inverting input terminal of the operational amplifier OP, and the other end of the switch SW2 is grounded. The switched capacitor circuit 14 inputs the two-phase signals φ1 and φ2 that are in opposite phases at the frequency fclk to the switches SW1 and SW2, respectively, and turns them on and off, thereby obtaining an equivalent resistance 1 / (fclk × Cs) corresponding to the frequency fclk. Arise. Here, Cs represents the capacitance of the capacitive element 15. That is, the switched capacitor circuit 14 functions as an equivalent resistance whose resistance value changes according to the capacitance Cs of the capacitive element 15 and the frequencies fclk of the two-phase signals φ1 and φ2. The equivalent resistance 1 / (fclk × Cs) decreases as the capacitance Cs increases and the frequency fclk increases.

  The capacitive element 15 of the switched capacitor circuit 14 corresponds to a detection unit such as a capacitive sensor or a condenser microphone, and detects a physical quantity such as vibration, acceleration, pressure, etc., and has a capacitance according to the physical quantity to be detected. Change. Here, assuming that the capacitance of the capacitive element 15 in a steady state is Cs and the capacitance change according to the physical quantity to be detected is ΔC, the capacitance of the capacitive element 15 is represented by Cs + ΔC.

  The first transistor M1 and the second transistor M2 are configured by P-type MOS transistors or PNP-type bipolar transistors. The control electrode (the gate of the MOS transistor or the base of the bipolar transistor) of the first transistor M1 is connected to the output terminal of the operational amplifier OP. Further, the output terminal of the operational amplifier OP is connected to a low-pass filter 13 that passes a low-frequency component lower than a predetermined frequency, and the control electrode of the second transistor M2 is connected via the low-pass filter 13. That is, the control electrode of the first transistor M1 and the control electrode of the second transistor M2 through the low-pass filter are commonly connected to the output terminal of the operational amplifier OP.

  The first main electrode (source of the MOS transistor or emitter of the bipolar transistor) of the first transistor M1 is connected to a resistance element 11 (R1) serving as a first load resistance, and a voltage source is connected via the resistance element 11. 16 is connected and the power supply voltage VDD is applied. A voltage output terminal 17 is provided at a connection point between the resistance element 11 and the first main electrode of the first transistor M1, and an output voltage Vout serving as a detection output is obtained from the voltage output terminal 17. A resistance element 12 (R2) serving as a second load resistance is connected to the first main electrode of the second transistor M2, and a voltage source 16 is connected via the resistance element 12 to apply the power supply voltage VDD. The

  The second main electrode (the drain of the MOS transistor or the collector of the bipolar transistor) of the first transistor M1 and the second main electrode of the second transistor M2 are connected to each other. The switched capacitor circuit 14 is connected to the second main electrodes of the first transistor M1 and the second transistor M2, and the non-inverting input terminal (first input terminal) of the operational amplifier OP is connected to the second main electrode. . Therefore, the equivalent resistance 1 / (fclk × Cs) of the switched capacitor circuit 14 is equal to the second main electrode of the first transistor M1 and the second transistor M2, the non-inverting input terminal of the operational amplifier OP, and the ground (GND). It becomes the structure connected between.

  A reference voltage source 18 is connected to the inverting input terminal (second input terminal) of the operational amplifier OP, and a predetermined reference voltage Vref is applied. A smoothing capacitive element 19 is connected in parallel with the switched capacitor circuit 14 to the non-inverting input terminal of the operational amplifier OP. The capacitive element 19 smoothes the input voltage at the non-inverting input terminal of the operational amplifier OP, which fluctuates with the frequency fclk of the two-phase signals φ1 and φ2 input to the switched capacitor circuit 14, and stabilizes the operation of the operational amplifier OP. It has a function. The capacitive element 19 can be omitted when the operational amplifier OP stably operates at high speed with respect to the frequency fclk, and is not necessarily provided.

  The CV conversion circuit according to the first embodiment is a source follower or emitter follower circuit of the first transistor M1 and the second transistor M2, and the second main electrode of the first transistor M1 and the second transistor M2. The potential is fed back to the non-inverting input terminal of the operational amplifier OP. In this case, the operational amplifier OP operates so that both input voltages of the non-inverting input terminal and the inverting input terminal are equal. That is, the operational amplifier OP operates such that the equivalent resistance potential of the switched capacitor circuit 14 input to the non-inverting input terminal is equal to the potential Vref of the reference voltage source 18 input to the inverting input terminal. At this time, the equivalent resistance of the switched capacitor circuit 14 includes the drain current or collector current of the first transistor M1 from the voltage source 16 via the resistance element 11 and the second transistor via the resistance element 12 from the voltage source 16. The drain current or collector current of M2 is supplied.

  Next, the CV conversion operation in this embodiment will be described. In the configuration of FIG. 1, the current (drain current or collector current of the first transistor M1) flowing from the resistance element 11 to the first main electrode and the second main electrode of the first transistor M1 is I1, and the current flowing from the resistance element 12 to the second The current flowing through the first main electrode and the second main electrode of the transistor M2 (the drain current or collector current of the second transistor M2) is I2, and the current flowing from the switched capacitor circuit 14 to the ground is I3.

  As described above, the equivalent resistance of the switched capacitor circuit 14 is 1 / (fclk × Cs), and the capacitance C 15 of the capacitive element 15 changes according to the physical quantity to be detected, and the capacitance is expressed by Cs + ΔC including the change. Is done. Since the reference voltage input to the inverting input terminal of the operational amplifier OP is Vref, the current I3 flowing through the switched capacitor circuit 14 is expressed by the following equation (3).

      I3 = fclk × (Cs + ΔC) × Vref (3)

  The values of the current I1 and the current I2 are determined by the size ratio of the first transistor M1 and the second transistor M2 and the resistance ratio of the resistance element 11 (R1) and the resistance element 12 (R2). Here, as the size of the transistor, the W / L of the first transistor M1 (the ratio of the channel width W to the channel length L) is N1, the W / L of the second transistor M2 is N2, and the resistance of the resistance element 11 Is R1, and the resistance of the resistance element 12 is R2. When the cutoff frequency of the low-pass filter 13 is sufficiently lower than the frequency of the capacitance change ΔC of the capacitive element 15, the currents I1 and I2 are expressed by the following equation (4). Note that R1 × N1 = R2 × N2.

I1 = fclk × Cs × Vref × (N1 / (N1 + N2))
+ Fclk × ΔC × Vref
I2 = fclk × Cs × Vref × (N2 / (N1 + N2)) (4)

  In the present embodiment, by inserting the low-pass filter 13 between the gates (or between the bases) of the first transistor M1 and the second transistor M2, the frequency component of the capacitance change ΔC is removed, and only the DC component is the second. To the transistor M2. As a result, the current I2 does not generate a current that changes due to the capacitance change ΔC. Therefore, the output voltage Vout output from the voltage output terminal 17 by the CV conversion is expressed by the following equation (5).

Vout = VDD−fclk × Cs × Vref × (N1 / (N1 + N2)) × R1
+ Fclk × ΔC × Vref × R1 (5)

  In the above expression of the output voltage Vout, it can be seen that it is possible to increase the values of fclk, Vref, and R1 when increasing the CV conversion sensitivity. However, the bias voltage of the CV conversion circuit is determined by the capacitance Cs of the capacitive element 15 and depends on the value of the capacitance Cs. For this reason, when the values of fclk, Vref, and R1 are increased, the circuit may not operate normally due to a voltage drop (R1 × I1) in the resistance element 11, which limits the improvement in sensitivity. . Therefore, by setting the sizes of the first transistor M1 and the second transistor M2 in a relationship of N2> N1, the bias voltage depending on the capacitance Cs of the capacitive element 15 can be reduced, and the bias current (steady state) in the current I1 can be reduced. Current) can be reduced.

  For example, when the ratio of N1 and N2 is changed under the condition of R1 × N1 = R2 × N2, the values of the current I1 and the current I2 are determined in proportion to this. Therefore, when N1 is reduced with respect to the transistor size N2, the resistance R1 of the resistance element 11 can be increased while keeping the voltage drop generated by the resistance elements 11 and 12 constant, and separated from the bias voltage. CV conversion sensitivity can be increased. Accordingly, by increasing the value of R1 while satisfying the relationship of R1 × N1 = R2 × N2, the CV corresponding to the change in capacitance ΔC is not limited to the bias voltage depending on the capacitance Cs of the capacitive element 15. It is possible to increase the conversion sensitivity. Here, for simplicity of explanation, a case where the relationship of R1 × N1 = R2 × N2 is satisfied is shown, but R1 × N1 = R2 × N2 is not necessarily required.

  Here, in the CV conversion circuit, the change amount ΔVout of the output voltage Vout with respect to the capacitance change ΔC of the capacitive element 15 is expressed by the following equation (6).

      ΔVout = fclk × ΔC × Vref × R1 (6)

  As described above, in the present embodiment, the circuit in which the low-pass filter 13, the resistance element 12 (R 2), and the second transistor M 2 supply the steady-state current depending on the capacitance Cs of the capacitive element 15 to the switched capacitor circuit 14. It becomes. That is, the low-pass filter 13, the resistance element 12, and the second transistor M 2 function as a bias current supply circuit that supplies a bias current to the switched capacitor circuit 14. Further, the resistance element 11 (R1) and the first transistor M1 serve as a circuit for supplying the switched capacitor circuit 14 with a current corresponding to the change due to the capacitance change ΔC. From the voltage output terminal 17 provided on the first main electrode of the first transistor M1, a voltage including a steady component and a change component is output as the output voltage Vout, and a voltage value corresponding to the capacitance corresponding to the physical quantity to be detected is detected. Is done.

  At this time, the sensitivity of the bias voltage in a steady state (mainly CV conversion sensitivity) mainly composed of the resistance element 12 and the second transistor M2 and the capacitance change ΔC mainly composed of the resistance element 11 and the first transistor M1. Sensitivity (CV conversion sensitivity for fluctuation) can be set separately from each other, and the CV conversion sensitivity for fluctuation due to capacitance change ΔC can be improved without increasing the sensitivity of the bias voltage.

  When the CV conversion circuit of this embodiment is applied to, for example, a condenser microphone, air pressure vibration due to sound waves is detected as a physical quantity to be detected. In this case, the frequency of the capacitance change ΔC is on the order of kHz. By using a signal of several MHz to several tens of MHz or 100 MHz as the frequency fclk of the two-phase signals φ1 and φ2 input to the switches SW1 and SW2 of the switched capacitor circuit 14, the sensitivity to the capacitance change ΔC can be set high. it can.

  In the first embodiment, since the low-pass filter 13 has frequency characteristics in the CV conversion operation, only a signal for a physical quantity whose capacitance change ΔC changes at a frequency higher than the cutoff frequency of the low-pass filter 13 is the output voltage Vout. It is output, and no lower frequency component is output. For this reason, for example, a physical quantity having a frequency component such as vibration (physical quantity that fluctuates periodically), such as when the capacitive element 15 (Cs + ΔC) of the switched capacitor circuit 14 is applied to a detection unit such as a vibration sensor or a condenser microphone. ) Is particularly useful in dealing with applications in which the value of the capacitance change ΔC changes.

(Second Embodiment)
FIG. 2 is a circuit diagram showing a configuration of a CV conversion circuit according to the second embodiment of the present invention. The second embodiment is a configuration example in which a part of the configuration of the first embodiment described above is changed. The CV conversion circuit according to the second embodiment includes a first transistor M11 and a second transistor M12 having different configurations instead of the first transistor M1 and the second transistor M2. Here, the same components as those in the first embodiment are denoted by the same reference numerals, and description thereof is omitted.

  The first transistor M11 and the second transistor M12 are configured by an N-type MOS transistor or an NPN-type bipolar transistor. The control electrode (the gate of the MOS transistor or the base of the bipolar transistor) of the first transistor M11 is connected to the output terminal of the operational amplifier OP. Further, a low-pass filter 13 that is a low-pass filter is connected to an output terminal of the operational amplifier OP, and a control electrode of the second transistor M12 is connected through the low-pass filter 13.

  A resistance element 11 (R1) is connected to the first main electrode (the drain of the MOS transistor or the collector of the bipolar transistor) of the first transistor M11, and the voltage source 16 (VDD) is connected via the resistance element 11. The A voltage output terminal 17 is provided at a connection point between the resistance element 11 and the first main electrode of the first transistor M11, and an output voltage Vout serving as a detection output is obtained from the voltage output terminal 17. The resistance element 12 (R2) is connected to the first main electrode of the second transistor M12, and the voltage source 16 is connected via the resistance element 12. The second main electrode (source of the MOS transistor or emitter of the bipolar transistor) of the first transistor M11 and the second main electrode of the second transistor M12 are connected to each other. The switched capacitor circuit 14 is connected to the second main electrodes of the first transistor M11 and the second transistor M12, and the inverting input terminal (first input terminal) of the operational amplifier OP is connected to the second main electrode. A reference voltage source 18 (Vref) is connected to the non-inverting input terminal (second input terminal) of the operational amplifier OP. A smoothing capacitive element 19 is connected to the inverting input terminal of the operational amplifier OP in parallel with the switched capacitor circuit 14.

  In the CV conversion circuit of the second embodiment, the first transistor M11 and the second transistor M12 are grounded at the source or the emitter, and the second main electrode of the first transistor M11 and the second transistor M12 is used. The potential is fed back to the inverting input terminal of the operational amplifier OP. In this case, the operational amplifier OP operates so that the potential of the equivalent resistance of the switched capacitor circuit 14 input to the inverting input terminal is equal to the potential Vref of the reference voltage source 18 input to the non-inverting input terminal. At this time, the equivalent resistance of the switched capacitor circuit 14 includes a source current or an emitter current of the first transistor M11 from the voltage source 16 through the resistance element 11, and a second transistor from the voltage source 16 through the resistance element 12. The source current or emitter current of M12 is supplied.

  Also in the configuration of the second embodiment, as in the first embodiment, the resistor element 12 and the second transistor M12 are circuits that supply a steady-state current to the switched capacitor circuit 14. Further, the resistance element 11 and the first transistor M11 serve as a circuit for supplying the switched capacitor circuit 14 with a current corresponding to the capacitance change ΔC. Therefore, the sensitivity of the steady-state bias voltage mainly composed of the resistance element 12 and the second transistor M12 and the sensitivity to the capacitance change ΔC mainly composed of the resistance element 11 and the first transistor M11 are separated from each other. It can be set, and the CV conversion sensitivity for the fluctuation caused by the capacitance change ΔC can be improved without increasing the sensitivity of the bias voltage.

(Third embodiment)
FIG. 3 is a circuit diagram showing a configuration of a CV conversion circuit according to the third embodiment of the present invention. The third embodiment is a configuration example in which a part of the configuration of the first embodiment described above is changed. In the CV conversion circuit of the third embodiment, the connection points of the resistance elements 11 (R1) and 12 (R2), which are load resistances connected to the first transistor M1 and the second transistor M2, respectively, are connected to each transistor. This is a configuration provided between the second main electrode (drain or collector) and the switched capacitor circuit 14. A voltage output terminal 17 (Vout) is provided at a connection point between the resistance element 11 and the second main electrode of the first transistor M1, and an output voltage Vout is obtained from the second main electrode side of the first transistor M1. It has become. Here, the same components as those in the first embodiment are denoted by the same reference numerals, and description thereof is omitted.

  In the CV conversion circuit according to the third embodiment, the position of the resistance element 11 that is a load resistor for extracting the output voltage Vout and the voltage output terminal 17 is the switched capacitor circuit 14 side with respect to the configuration of the first embodiment. Has been changed. Also in this configuration, as in the first embodiment, the sensitivity of the bias voltage in the steady state mainly composed of the resistance element 12 and the second transistor M2, and the capacitance change mainly composed of the resistance element 11 and the first transistor M1. The sensitivity to ΔC can be set separately from each other, and the CV conversion sensitivity corresponding to the variation caused by the capacitance change ΔC can be improved without increasing the sensitivity of the bias voltage.

(Fourth embodiment)
FIG. 4 is a circuit diagram showing a configuration of a CV conversion circuit according to the fourth embodiment of the present invention. The fourth embodiment is a configuration example in which a part of the configuration of the second embodiment described above is changed. In the CV conversion circuit of the fourth embodiment, the connection points of the resistance elements 11 (R1) and 12 (R2), which are load resistances connected to the first transistor M11 and the second transistor M12, respectively, This is a configuration provided between the second main electrode (source or emitter) and the switched capacitor circuit 14. A voltage output terminal 17 (Vout) is provided at a connection point between the resistance element 11 and the second main electrode of the first transistor M11, and an output voltage Vout is obtained from the second main electrode side of the first transistor M11. It has become. Here, the same components as those in the first and second embodiments are denoted by the same reference numerals, and description thereof is omitted.

  In the CV conversion circuit of the fourth embodiment, the position of the resistance element 11 that is a load resistor for extracting the output voltage Vout and the voltage output terminal 17 is on the switched capacitor circuit 14 side with respect to the configuration of the second embodiment. Has been changed. Also in this configuration, as in the first embodiment, the sensitivity of the steady-state bias voltage mainly composed of the resistance element 12 and the second transistor M12 and the capacitance change mainly composed of the resistance element 11 and the first transistor M11. The sensitivity to ΔC can be set separately from each other, and the CV conversion sensitivity corresponding to the variation caused by the capacitance change ΔC can be improved without increasing the sensitivity of the bias voltage.

(Fifth embodiment)
FIG. 5 is a circuit diagram showing a configuration of a CV conversion circuit according to the fifth embodiment of the present invention. The fifth embodiment is a configuration example in which a part of the configuration of the first embodiment described above is changed. The CV conversion circuit of the fifth embodiment is configured to include an operational amplifier OP, a first transistor M1, a constant current circuit 21, and a switched capacitor circuit 14. That is, in the fifth embodiment, the second transistor in the first embodiment is used as a circuit (bias current supply circuit) that supplies a bias current (steady-state current, DC component) to the equivalent resistance of the switched capacitor circuit 14. Instead of M2 and the resistance element 12, a constant current circuit 21 is provided. Here, the same components as those in the first embodiment are denoted by the same reference numerals, and description thereof is omitted.

  The first transistor M1 is configured by a P-type MOS transistor or a PNP-type bipolar transistor. The resistance element 11 (R1) is connected to the first main electrode of the first transistor M1, and the voltage source 16 (VDD) is connected via the resistance element 11. The switched capacitor circuit 14 and the non-inverting input terminal of the operational amplifier OP are connected to the second main electrode of the first transistor M1. The reference voltage source 18 (Vref) is connected to the inverting input terminal of the operational amplifier OP, and the output terminal of the operational amplifier OP is connected to the control electrode of the first transistor M1.

  The constant current circuit 21 is connected in parallel to the first transistor M1 and the resistance element 11 between the voltage source 16 and the switched capacitor circuit 14. The constant current circuit 21 can be configured using, for example, a constant current diode or a transistor, or may be an approximate circuit using a resistance element.

  In the configuration of FIG. 5, a current (drain current or collector current of the first transistor M1) flowing from the resistance element 11 to the first main electrode and the second main electrode of the first transistor M1 flows to the constant current circuit 21. The current (bias current) is Ibias, and the current flowing from the switched capacitor circuit 14 to the ground is Itotal. Since the equivalent resistance of the switched capacitor circuit 14 in the steady state is 1 / (fclk × Cs), Itotal and Id are respectively expressed by the following formula (7).

Itotal = fclk × Cs × Vref
Itotal = Id + Ibias
Id = fclk × Cs × Vref−Ibias (7)

  Therefore, the output voltage Vout output from the voltage output terminal 17 by the CV conversion is expressed by the following equation (8).

Vout = VDD− (fclk × Cs × Vref−Ibias) × R1
... (8)

  In the switched capacitor circuit 14, the equivalent resistance including the capacitance change is 1 / (fclk × (Cs + ΔC) Therefore, in the CV conversion circuit, the output voltage Vout in the case where there is a capacitance change ΔC of the capacitive element 15. The change amount ΔVout (the CV conversion sensitivity corresponding to the fluctuation caused by the capacitance change ΔC) is expressed by the following equation (9).

      ΔVout = fclk × (CS + ΔC) × Vref × R1 (9)

  Also in the configuration of the fifth embodiment, as in the first embodiment, the constant current circuit 21 is a circuit that supplies a steady-state current to the switched capacitor circuit 14. In addition, the resistance element 11 and the first transistor M1 serve as a circuit that supplies a current corresponding to a change caused by the capacitance change ΔC to the switched capacitor circuit 14. For this reason, the sensitivity of the steady state bias voltage mainly composed of the constant current circuit 21 and the sensitivity to the capacitance change ΔC mainly composed of the resistance element 11 and the first transistor M1 can be set separately from each other. Without increasing the sensitivity of the bias voltage, the CV conversion sensitivity corresponding to the fluctuation caused by the capacitance change ΔC can be improved.

  In the fifth embodiment, since the low-pass filter 13 is not provided as in the first to fourth embodiments, a CV conversion operation can be performed from a DC component with respect to a capacitance change ΔC corresponding to a physical quantity. For this reason, for example, when the capacitive element 15 (Cs + ΔC) of the switched capacitor circuit 14 is applied to a detection unit such as an acceleration sensor, the capacitance change ΔC is caused by a physical quantity (steady physical quantity) having a DC component such as acceleration. This is particularly useful in dealing with applications where the value of is determined.

(Sixth embodiment)
FIG. 6 is a circuit diagram showing a configuration of a CV conversion circuit according to the sixth embodiment of the present invention. The sixth embodiment is a configuration example in which a part of the configuration of the fifth embodiment described above is changed. The CV conversion circuit according to the sixth embodiment includes a first transistor M11 having a different configuration instead of the first transistor M1. That is, in the sixth embodiment, the same configuration change as that of the second embodiment is applied to the fifth embodiment. Here, the same components as those in the first, second, and fifth embodiments are denoted by the same reference numerals, and description thereof is omitted.

  The first transistor M11 is configured by an N-type MOS transistor or an NPN-type bipolar transistor. A resistance element 11 (R1) is connected to the first main electrode of the first transistor M11, and a voltage source 16 (VDD) is connected via the resistance element 11. A voltage output terminal 17 is provided at a connection point between the resistance element 11 and the first main electrode of the first transistor M11, and an output voltage Vout serving as a detection output is obtained from the voltage output terminal 17. The switched capacitor circuit 14 and the inverting input terminal of the operational amplifier OP are connected to the second main electrode of the first transistor M11. The reference voltage source 18 (Vref) is connected to the non-inverting input terminal of the operational amplifier OP, and the output terminal of the operational amplifier OP is connected to the control electrode of the first transistor M11. A constant current circuit 21 is connected in parallel with the first transistor M11 and the resistance element 11 between the voltage source 16 and the switched capacitor circuit 14.

  Also in the configuration of the sixth embodiment, as in the fifth embodiment, the constant current circuit 21 is a circuit that supplies a steady-state current to the switched capacitor circuit 14. Further, the resistance element 11 and the first transistor M11 serve as a circuit for supplying the switched capacitor circuit 14 with a current corresponding to the capacitance change ΔC. For this reason, the sensitivity of the steady-state bias voltage mainly composed of the constant current circuit 21 and the sensitivity to the capacitance change ΔC mainly composed of the resistance element 11 and the first transistor M11 can be set separately from each other. Without increasing the sensitivity of the bias voltage, the CV conversion sensitivity corresponding to the fluctuation caused by the capacitance change ΔC can be improved.

(Seventh embodiment)
FIG. 7 is a circuit diagram showing a configuration of a CV conversion circuit according to the seventh embodiment of the present invention. The seventh embodiment is a configuration example in which a part of the configuration of the fifth embodiment described above is changed. In the CV conversion circuit of the seventh embodiment, a connection point of the resistance element 11 (R1), which is a load resistance connected to the first transistor M1, is provided between the second main electrode and the switched capacitor circuit 14. It is a configuration. That is, in the seventh embodiment, the same configuration change as that of the third embodiment is applied to the fifth embodiment, and the output voltage Vout is applied from the second main electrode side of the first transistor M1. It is the structure to obtain. Here, the same components as those in the first, third, and fifth embodiments are denoted by the same reference numerals, and description thereof is omitted.

  In the CV conversion circuit according to the seventh embodiment, the position of the resistance element 11 that is a load resistor for extracting the output voltage Vout and the voltage output terminal 17 is compared with the configuration of the fifth embodiment on the switched capacitor circuit 14 side. Has been changed. Also in this configuration, as in the fifth embodiment, the sensitivity of the steady-state bias voltage mainly composed of the constant current circuit 21 and the sensitivity to the capacitance change ΔC mainly composed of the resistance element 11 and the first transistor M1 are as follows. These can be set separately from each other, and the CV conversion sensitivity corresponding to the fluctuation caused by the capacitance change ΔC can be improved without increasing the sensitivity of the bias voltage.

(Eighth embodiment)
FIG. 8 is a circuit diagram showing a configuration of a CV conversion circuit according to the eighth embodiment of the present invention. The eighth embodiment is a configuration example in which a part of the configuration of the sixth embodiment described above is changed. In the CV conversion circuit of the eighth embodiment, a connection point of the resistance element 11 (R1), which is a load resistance connected to the first transistor M11, is provided between the second main electrode and the switched capacitor circuit 14. It is a configuration. That is, in the eighth embodiment, the same configuration change as that of the fourth embodiment is applied to the sixth embodiment, and the output voltage Vout is applied from the second main electrode side of the first transistor M11. It is the structure to obtain. Here, the same components as those in the first, fourth, fifth, and sixth embodiments are denoted by the same reference numerals, and description thereof is omitted.

  In the CV conversion circuit of the eighth embodiment, the position of the resistance element 11 that is a load resistor for extracting the output voltage Vout and the voltage output terminal 17 is on the switched capacitor circuit 14 side compared to the configuration of the sixth embodiment. Has been changed. Also in this configuration, as in the fifth embodiment, the sensitivity of the steady-state bias voltage mainly composed of the constant current circuit 21 and the sensitivity to the capacitance change ΔC mainly composed of the resistance element 11 and the first transistor M11 are as follows. These can be set separately from each other, and the CV conversion sensitivity corresponding to the fluctuation caused by the capacitance change ΔC can be improved without increasing the sensitivity of the bias voltage.

  As described above, in the CV conversion circuit of this embodiment, the capacitance corresponding to the change due to the capacitance change ΔC of the capacitive element 15 is provided in parallel with the first transistor M1 (or M11) that supplies the switched capacitor circuit 14 with current. A bias current supply circuit is provided that supplies a steady-state current depending on the capacitance Cs of the element 15 to the switched capacitor circuit 14. As a first example of the bias current supply circuit, a second transistor M2 (or M12) and a resistor element 12 are provided in parallel with the first transistor M1 (or M11) and the resistor element 11, and the first transistor M1 (or The low pass filter 13 is provided between the control electrode of M11) and the control electrode of the second transistor M2 (or M12). Further, as a second example of the bias current supply circuit, a constant current circuit 21 is provided in parallel with the first transistor M1 (or M11) and the resistance element 11.

  As a result, the sensitivity of the steady-state bias voltage determined by the capacitance Cs of the capacitive element 15 and the sensitivity to the capacitance change ΔC of the capacitive element 15 can be set separately, and the CV conversion sensitivity corresponding to the fluctuation caused by the capacitance change ΔC can be set. Can be improved.

  While various embodiments have been described above with reference to the drawings, it goes without saying that the present invention is not limited to such examples. It will be apparent to those skilled in the art that various changes and modifications can be made within the scope of the claims, and these are naturally within the technical scope of the present invention. Understood. In addition, the constituent elements in the above embodiment may be arbitrarily combined without departing from the spirit of the present invention.

  The present invention makes it possible to set the sensitivity to the capacitance change ΔC caused by the change in the physical quantity to be detected, and has the effect of improving the CV conversion sensitivity for the variation caused by the capacitance change ΔC in the CV conversion circuit. It is useful in electrostatic capacity type sensors (vibration sensors, acceleration sensors), condenser microphones and the like.

11: Resistance element (R1)
12: Resistance element (R2)
13: Low-pass filter (LPF)
14: Switched capacitor circuit 15: Capacitance element (Cs + ΔC)
16: Voltage source (VDD)
17: Voltage output terminal (Vout)
18: Reference voltage source (Vref)
19: Capacitance element 21: Constant current circuit M1, M11: First transistor M2, M12: Second transistor OP: Operational amplifier SW1, SW2: Switch ΔC: Capacitance change

Claims (4)

It has a capacitive element whose capacitance changes according to the physical quantity to be detected, and at least two switches. When the switch is turned on and off by a two-phase signal having opposite phases, the capacitance of the capacitive element and the two-phase signal A switched capacitor circuit that generates an equivalent resistance in accordance with the frequency;
A first transistor provided between a voltage source and the switched capacitor circuit, and supplying a current corresponding to a change in capacitance of the capacitive element to the switched capacitor circuit;
A voltage output terminal connected between the first main electrode of the first transistor and the voltage source, or between the second main electrode of the first transistor and the switched capacitor circuit, and obtaining an output voltage at one end. A first load resistor provided with:
A bias current supply circuit for supplying a bias current to the switched capacitor circuit;
An output terminal is connected to the control electrode of the first transistor, a voltage at the equivalent resistance of the switched capacitor circuit is input to the first input terminal, and a predetermined reference voltage is input to the second input terminal. Operational amplifiers operating to be equal,
A CV conversion circuit comprising: The CV conversion circuit according to claim 1,
The bias current supply circuit includes:
A second transistor provided between the voltage source and the switched capacitor circuit;
A second load resistor connected between the first main electrode of the second transistor and the voltage source or between the second main electrode of the second transistor and the switched capacitor circuit;
A CV conversion circuit comprising: a low-pass filter connected between the control electrode of the first transistor and the control electrode of the second transistor and passing a low-frequency component lower than a predetermined frequency. The CV conversion circuit according to claim 1,
The bias current supply circuit includes:
A CV conversion circuit comprising a constant current circuit provided between the voltage source and the switched capacitor circuit. It has a capacitive element whose capacitance changes according to the physical quantity to be detected, and at least two switches. When the switch is turned on and off by a two-phase signal having opposite phases, the capacitance of the capacitive element and the two-phase signal A switched capacitor circuit that generates an equivalent resistance in accordance with the frequency;
A first transistor having a source or emitter and a drain or collector connected between a voltage source and the switched capacitor circuit, and supplying a current corresponding to a capacitance change of the capacitive element to the switched capacitor circuit;
A voltage output terminal is provided between the source or emitter of the first transistor and the voltage source, or between the drain or collector of the first transistor and the switched capacitor circuit, and obtains an output voltage at one end. A first load resistance to be
A source or emitter and a drain or collector connected between the voltage source and the switched capacitor circuit, and a second transistor for supplying a current dependent on a capacitance of the capacitive element to the switched capacitor circuit;
A second load resistor connected between the source or emitter of the second transistor and the voltage source, or between the drain or collector of the second transistor and the switched capacitor circuit;
A low-pass filter connected between the gate or base of the first transistor and the gate or base of the second transistor and passing a low-frequency component lower than a predetermined frequency;
An output terminal is connected to the gate or base of the first transistor, and a non-inverting input terminal is connected to the drain or collector of the first transistor and the drain or collector of the second transistor, and the switched capacitor circuit; An inverting input terminal is connected to a reference voltage source, and an operational amplifier that operates so that a voltage at an equivalent resistance of the switched capacitor circuit is equal to a predetermined reference voltage;
A CV conversion circuit comprising:

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