JP2017028075A - Intermediate structure for secondary battery and manufacturing method of secondary battery - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an intermediate structure for a secondary battery capable of appropriately evaluating characteristics of a layer and a method for manufacturing a secondary battery.SOLUTION: In the intermediate structure 100 for a secondary battery according to the present invention, a secondary battery 21 and a test structure 22 are provided on the same substrate 10. The secondary battery 21 and the test structure 22 each include a first electrode layer 1 and a second electrode layer 5. In the secondary battery 21 and the test structure 22, the first electrode layer 1 is formed as an integral pattern, and the second electrode layer 5 is separated between the secondary battery 21 and the test structure 22. In the secondary battery 21, a plurality of layers are laminated between the first electrode layer 1 and the second electrode layer 5. At least a metal oxide semiconductor layer and a charge layer 3 are included in the plurality of layers. In the test structure 22, a part of the plurality of layers is provided between the first electrode layer 1 and the second electrode layer 5.SELECTED DRAWING: Figure 3

Description

  The present invention relates to an intermediate structure for a battery (also referred to as a secondary battery in this specification) that can be repeatedly charged and discharged, and a method for manufacturing the secondary battery.

  Patent Documents 1 and 2 disclose quantum batteries that are all-solid physical secondary batteries. The quantum battery disclosed in Patent Documents 1 and 2 has a configuration in which, for example, a first electrode, a charge layer, a p-type metal oxide semiconductor layer, and a second electrode are stacked on a substrate. The charge layer is a layer in which electrons can be captured by changing the photoexcitation structure of a fine-grained n-type metal oxide semiconductor covered with an insulating material.

  In Patent Documents 1 and 2, the electrical characteristics of the battery are measured. In Patent Document 1, an electrode probe is brought into contact with a measurement location on the outer surface of at least one of a positive electrode and a negative electrode, and an electrical characteristic value is measured. For example, a voltage source and a current source are selectively connected to the electrode probe and a voltmeter is connected. And charging / discharging characteristics etc. are evaluated based on the measured voltage of the voltmeter at the time of charging / discharging or a full charge, charging / discharging time, etc. By doing in this way, the quality determination of a battery and specification of an abnormal location are performed.

  The evaluation device of Patent Document 2 evaluates the characteristics of the charge layer of the battery by bringing a semiconductor probe into contact with the charge layer of the quantum battery being manufactured. Specifically, a semiconductor probe in which a metal oxide semiconductor layer and an electrode layer are stacked is prepared as in the quantum battery. And the semiconductor probe is stuck to the charge layer with respect to the quantum battery being manufactured at the time when the charge layer is laminated. Thereby, the quantum battery in the middle of manufacture can be made into the state which can operate | move as a battery. Therefore, it is possible to evaluate the electrical characteristics of the charge layer of the quantum battery being manufactured.

International Publication No. 2012/035149 International Publication No. 2013/065094 JP 2009-105402 A

  In such a quantum battery, it is desired to perform various evaluations and measurements on various functional layers such as an electrode layer, a metal oxide semiconductor layer, and a charging layer. For example, if the characteristics of each layer can be evaluated, the manufacturing process, the characteristics of each layer, and the like can be improved. That is, when a problem occurs in the manufactured battery, it becomes possible to easily identify the layer that causes the problem and the manufacturing process that caused the problem. Therefore, the characteristics of each layer can be improved or the quality can be stabilized. Thereby, it can contribute to the improvement of the characteristic of a battery, productivity, etc.

  However, the evaluation method described in Patent Document 1 measures the electrical characteristics of a completed battery. For this reason, it may be difficult to accurately identify the functional layer or manufacturing process in question. It may also be necessary to break down and analyze the battery to identify the cause. The evaluation method described in Patent Document 2 can evaluate the charge layer, the electrode layer, etc. during the production of the battery, but it can be used in the case where problems occur in those layers due to the influence of the subsequent manufacturing process. Is difficult.

  By the way, Patent Document 3 discloses a process diagnostic vehicle (PDV) for a solar cell that is not a secondary battery. In Patent Document 3, a TCO film, a silicon absorption layer, and a rear contact layer (conductive layer) are stacked on a glass substrate. Thereafter, a groove (separation groove) from which these layers have been removed is provided to form a diagnostic device on the same substrate as the PV cell.

  And this diagnostic apparatus is comprised so that the electrical resistance of a back side contact layer can be measured by connecting a voltage source and a voltage measuring device between two points on a back side contact layer. In addition, a diagnostic device configured to measure the electric resistance of the TCO film by providing a contact region between the rear contact layer and the TCO film, or an electric resistance of the TCO-Si interface can be measured by providing a TCO-Si interface portion. A diagnostic apparatus configured as described above is also shown.

  However, in the method of Patent Document 3, the resistance is measured by measuring the voltage drop between two points on the surface of the rear contact layer. For this reason, processing (groove formation and subsequent laminating process) for forming a measurement path connecting the two points in the diagnostic device is required. However, the processing is not performed on the solar cell portion, and there is a problem that the measurement result of the diagnostic device does not necessarily reflect the layer characteristics of the solar cell portion.

  For example, the contact area itself between the TCO film formed on the diagnostic apparatus and the rear contact layer may affect the measurement result of the measurement path. In addition, the newly formed TCO-Si interface on the path of the diagnostic device is structurally different from the interface of the battery part, and is also affected by the processing itself. It cannot be said that the characteristic value of the TCO-Si interface of the solar cell is reflected.

  In a quantum battery, as shown in Patent Document 2, a charge layer and one or more metal oxide semiconductor layers are stacked between a first electrode and a second electrode. In addition, the formation method is greatly different between the charge layer and the metal oxide semiconductor layer. Therefore, if it can be determined which layer has a defect, the manufacturing process can be improved appropriately. If the semiconductor layer and the charge layer can be properly diagnosed, it can contribute to the improvement of productivity.

  This invention is made | formed in view of said subject, and it aims at providing the intermediate structure for secondary batteries which can be diagnosed appropriately, and the manufacturing method of a secondary battery.

  An intermediate structure for a secondary battery according to one embodiment of the present invention is an intermediate structure for a secondary battery in which one or more secondary batteries and one or more test structures are provided on the same substrate. The secondary battery and the test structure each include a first electrode layer and a second electrode layer, and the secondary electrode and the test structure include the first electrode layer as an integral pattern. And the second electrode layer is separated between the secondary battery and the test structure, and in the secondary battery, between the first electrode layer and the second electrode layer. A plurality of layers, wherein the plurality of layers include at least a metal oxide semiconductor layer and a charge layer. In the test structure, the first electrode layer and the second electrode A part of the plurality of layers is provided between the layers. Thereby, each layer can be diagnosed more accurately.

  In the intermediate structure for a secondary battery, a plurality of the test structures may be provided, and the second electrode layer may be separated between the plurality of test structures.

  In the intermediate structure for a secondary battery, the plurality of test structures include a test structure in which the charging layer is not provided between the first electrode layer and the second electrode layer. Also good. By doing in this way, the characteristic of a charge layer can be evaluated appropriately.

  In the intermediate structure for a secondary battery, the plurality of test structures include a charge layer between the first electrode layer and the second electrode layer, the first electrode layer and the second electrode layer. A test structure that is in contact with at least one of the two may be included.

  In the intermediate structure for a secondary battery, the second electrode layers of the plurality of test structures may have the same planar view shape.

  In the above intermediate structure for a secondary battery, a plurality of the test structures may be provided adjacent to a single secondary battery.

  In the above intermediate structure for a secondary battery, the plurality of test structures include test structures having different layer configurations disposed between the first electrode layer and the second electrode layer. It may be. Thereby, the characteristic of a some layer can be diagnosed appropriately.

  In the above intermediate structure for a secondary battery, the secondary battery has a layer configuration laminated between the first electrode layer and the second electrode layer, the metal oxide semiconductor layer, and the charging layer. The plurality of test structures include a test structure in which the charging layer is disposed between the first electrode layer and the second electrode layer, and the first electrode layer. A test structure in which the metal oxide semiconductor layer is disposed may be included between the second electrode layer and the second electrode layer.

  In the intermediate structure for a secondary battery, the metal oxide semiconductor layer includes a first metal oxide semiconductor layer and a second metal oxide semiconductor layer that are different from each other. The first metal oxide semiconductor layer, the charging layer, and the second metal oxide semiconductor layer are disposed between the first electrode layer and the second electrode layer, and a plurality of the test structures are provided on the test structure. A test structure in which the first metal oxide semiconductor layer and the charging layer are disposed between the first electrode layer and the second electrode layer, and the first electrode layer and the second electrode layer, A test structure in which the charge layer and the second metal oxide semiconductor layer are disposed between the test layer, and a test structure in which the charge layer is disposed between the first electrode layer and the second electrode layer. Body, and between the first electrode layer and the second electrode layer, the first metal oxide semiconductor layer, and the A test structure in which a two metal oxide semiconductor layer is disposed; a test structure in which the first metal oxide semiconductor layer is disposed between the first electrode layer and the second electrode layer; A test structure in which the second metal oxide semiconductor layer is disposed between the electrode layer and the second electrode layer may be included.

  In the above intermediate structure for a secondary battery, the secondary battery and the test structure may be provided on both surfaces of the base material.

  In the intermediate structure for a secondary battery, the test structure includes the first electrode layer and the second electrode layer of the secondary battery between the first electrode layer and the second electrode layer. A test structure in which the same layer structure as the layer structure stacked between the layers is formed may be further included. Thereby, the performance of a battery can be evaluated more appropriately.

  In the above intermediate structure for a secondary battery, the base material may have conductivity and may also serve as the first electrode layer.

  A method for manufacturing a secondary battery according to an aspect of the present invention includes a step of preparing the intermediate structure for a secondary battery and a step of measuring electrical characteristics of the test structure. . Thereby, the characteristic of a layer can be diagnosed appropriately.

  In the above manufacturing method, the test structure further includes a step of evaluating the performance of the secondary battery provided in the intermediate structure for secondary battery, and the test structure when the performance of the secondary battery does not satisfy a predetermined standard. You may perform the process of measuring the electrical property of a body.

The manufacturing method may further include a step of separating the test structure from the secondary battery when the performance of the secondary battery satisfies a predetermined standard. Thereby, a high-performance battery can be manufactured with high productivity.


A secondary battery in which a first electrode layer, a first conductive semiconductor layer, a charge layer, a second conductive semiconductor layer, and a second electrode layer are stacked; and the first electrode layer and the second electrode layer, And a test structure in which one or two of the three layers of the first conductive type semiconductor layer, the charging layer, and the second conductive type semiconductor layer are provided. . By doing in this way, the characteristic of a layer can be diagnosed appropriately.

  In the above intermediate structure for a secondary battery, the test structure may not be provided with the charging layer. With this configuration, it is possible to appropriately diagnose the measurement of the first conductive type semiconductor layer and the second conductive type semiconductor layer. Alternatively, in the test structure, the charging layer may be in contact with at least one of the first electrode layer and the second electrode layer. By doing in this way, the characteristic of a charge layer can be evaluated appropriately.

  In the intermediate structure for a secondary battery, a plurality of the test structures are provided, and the plurality of test structures are different in a layer configuration disposed between the first electrode layer and the second electrode layer. Also good.

  In the intermediate structure for a secondary battery, the test structure may include a first conductive semiconductor layer and a charging layer disposed between the first electrode layer and the second electrode layer. A test structure, a second test structure in which the charging layer and the second conductive semiconductor layer are disposed between the first electrode layer and the second electrode layer, and the first electrode layer and the second electrode layer. A third test structure in which the charging layer is disposed between the electrode layers; and the first conductive semiconductor layer and the second conductive semiconductor layer between the first electrode layer and the second electrode layer. , A fifth test structure in which the first conductive semiconductor layer is disposed between the first electrode layer and the second electrode layer, and the first electrode layer and the first electrode layer. And a sixth test structure in which the second conductivity type semiconductor layer is disposed between the two electrode layers. .

  In the intermediate structure for a secondary battery, the secondary battery and the test structure may be provided on both surfaces of the base material. Thereby, both sides can be diagnosed with respect to the secondary battery in which the battery is formed on both sides.

  The manufacturing method of the secondary battery which concerns on 1 aspect of this invention comprises the process of preparing said intermediate structure for secondary batteries, and the process of measuring the electrical property of the said test structure.

  In the above manufacturing method, the test structure further includes a step of evaluating the performance of the secondary battery provided in the intermediate structure for secondary battery, and the test structure when the performance of the secondary battery does not satisfy a predetermined standard. You may make it measure the electrical property of a body. Thereby, the presence or absence of a process failure can be determined when an abnormality occurs.

  The manufacturing method may further include a step of separating the test structure from the secondary battery when the performance of the secondary battery satisfies a predetermined standard.

  An object of the present invention is to provide an intermediate structure for a secondary battery that can be appropriately diagnosed, and a method for manufacturing the secondary battery.

It is sectional drawing which shows the structure of a quantum battery. It is a top view which shows the structure of an intermediate structure. 2 is a cross-sectional view illustrating a configuration of an intermediate structure according to Embodiment 1. FIG. It is a flowchart which shows the manufacturing process of a battery. It is a figure which shows the IV curve of a P-type semiconductor layer. 6 is a cross-sectional view illustrating a configuration of an intermediate structure according to Embodiment 2. FIG. 10 is a cross-sectional view illustrating a configuration of an intermediate structure according to Embodiment 3. FIG. FIG. 6 is a plan view illustrating a configuration of an intermediate structure according to a fourth embodiment. FIG. 6 is a cross-sectional view illustrating a configuration of an intermediate structure according to a fourth embodiment.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. The following description shows preferred embodiments of the present invention, and the scope of the present invention is not limited to the following embodiments. In the following description, the same reference numerals indicate substantially the same contents.

Configuration of quantum battery.
The battery of each embodiment described below applies a quantum battery technology. Therefore, prior to the description of each embodiment, the quantum battery will be briefly described. A quantum battery is a battery (secondary battery) that can be repeatedly charged and discharged based on an operating principle that makes it possible to capture electrons by utilizing a photoexcitation structure change of a metal oxide semiconductor covered with an insulating material. .

  A quantum battery is an all-solid-state physical secondary battery, and functions alone as a battery. An example of the configuration of the quantum battery is shown in FIG. FIG. 1 is a diagram showing a cross-sectional structure of a quantum battery to which the present invention is applied. In FIG. 1, terminal members such as a positive electrode terminal and a negative electrode terminal, and mounting members such as an exterior member and a covering member are omitted.

  The battery 21 has a configuration in which a first electrode layer 1, an N-type semiconductor layer 2, a charging layer 3, a P-type semiconductor layer 4, and a second electrode layer 5 are stacked on a base material 10. Therefore, when a charging voltage (or charging power) is applied between the first electrode layer 1 and the second electrode layer 5, a charging operation is performed, and between the first electrode layer 1 and the second electrode layer 5. When a load is connected to, a discharging operation is performed. The charge layer 3 is a layer that accumulates (captures) electrons by a charge operation, releases the electrons accumulated by a discharge operation, and retains (accumulates) electrons in a state where no charge / discharge is performed. The charge layer 3 is formed by applying a photoexcitation structure change technique.

  Here, the photoexcitation structure change is described in, for example, International Publication WO / 2008/053561. When effective excitation energy is applied in a state where the semiconductor has a band gap greater than or equal to a predetermined value and the metal oxide semiconductor is covered with an insulating coating, a number of energy orders without electrons are generated in the band gap. A quantum battery is charged by capturing electrons at these energy levels, and discharged by releasing the captured electrons.

The charging layer 3 is filled with insulating-coated n-type metal oxide semiconductor fine particles, and the n-type metal oxide semiconductor is changed so that it can undergo photoexcitation structural change by ultraviolet irradiation and store electrons. It is. The charging layer 3 contains a large number of fine particles of n-type metal oxide semiconductor that are coated with insulation. As the n-type metal oxide semiconductor material that can be used in the charging layer 3, titanium dioxide, tin oxide (SnO ₂ ), and zinc oxide (ZnO) are suitable, and as a material that combines titanium dioxide, tin oxide, and zinc oxide. Also good. The n-type metal oxide semiconductor in the charging layer 3 is covered with an insulating film such as silicone.

  The base material 10 may be an insulating material or a conductive material. For example, a glass substrate, a polymer film resin sheet, or a metal foil sheet can be used. In the first embodiment, an insulating substrate is used as the base material 10. When a conductive material is used as the base material 10, the base material 10 can be used as the first electrode layer 1. That is, the conductive substrate 10 functions as the first electrode layer 1. The substrate 10 has a flat plate shape or a sheet shape. The shape in plan view is not particularly limited as long as a battery formation region and a test structure region, which will be described later, can be formed. For example, the shape in a plan view can be a rectangular shape or a long belt shape.

  In the present embodiment, the first electrode layer 1 is a negative electrode, and the second electrode layer 5 is a positive electrode. The 1st electrode layer 1 and the 2nd electrode layer 5 should just be formed with the electrically conductive film, for example, can be formed with the silver Ag alloy film etc. which contain aluminum Al as a metal material. Alternatively, the first electrode layer 1 and the second electrode layer 5 may be transparent conductive films such as ITO (Indium Tin Oxide). Examples of the method for forming the conductive film include vapor phase film forming methods such as sputtering, ion plating, electron beam evaporation, vacuum evaporation, and chemical vapor deposition. The first electrode layer 1 and the second electrode layer 5 can be formed by an electrolytic plating method, an electroless plating method, or the like. In general, copper, copper alloy, nickel, aluminum, silver, gold, zinc, tin or the like can be used as a metal used for plating. Note that, as described above, when a conductive material is used as the base material 10, the base material 10 functions as the first electrode layer 1, so that the film formation step of the first electrode layer 1 can be omitted.

The N-type semiconductor layer 2 is, for example, an N-type metal oxide semiconductor layer, and titanium dioxide (TiO ₂ ), tin oxide (SnO ₂ ), or zinc oxide (ZnO) can be used as a material.

  When the insulating coating of the n-type metal oxide semiconductor in the charge layer 3 is insufficient, the N-type semiconductor layer 2 is in direct contact with the first electrode layer 1 and recombines electrons. Is provided to prevent being injected into the n-type metal oxide semiconductor. As shown in FIG. 1, the N-type semiconductor layer 2 is formed between the first electrode layer 1 and the charging layer 3. The N-type semiconductor layer 2 can be omitted.

The P-type semiconductor layer 4 formed on the charging layer 3 is provided to prevent injection of electrons from the upper second electrode layer 5. As a material of the P-type semiconductor layer 4, a P-type metal oxide semiconductor such as nickel oxide (NiO) or copper aluminum oxide (CuAlO ₂ ) can be used. As shown in FIG. 1, the P-type semiconductor layer 4 is formed between the second electrode layer 5 and the charging layer 3.

  In the above description, the N-type semiconductor layer 2 is disposed below the charging layer 3 and the P-type semiconductor layer 4 is disposed thereon. However, the N-type semiconductor layer 2 and the P-type semiconductor layer 4 are disposed. It may be the opposite configuration. That is, the N-type semiconductor layer 2 may be disposed on the charging layer 3 and the P-type semiconductor layer 4 may be disposed below. Further, when the N-type semiconductor layer 2 is omitted, the P-type semiconductor layer 4 may be disposed under the charging layer 3. In such a case, the first electrode layer 1 is a positive electrode and the second electrode layer 5 is a negative electrode. That is, a layer configuration in which the charging layer 3 is sandwiched between the N-type semiconductor layer 2 and the P-type semiconductor layer 4 between the first electrode layer 1 and the second electrode layer 5, or the charging layer 3 and the p-type semiconductor layer. If it has the layer structure of 4, the stacking order will not be ask | required. In other words, the battery 21 is configured such that the first metal oxide semiconductor layer, the charging layer 3, and the second metal oxide semiconductor layer are stacked in this order between the first electrode layer 1 and the second electrode layer 5. Alternatively, any structure may be used as long as the charging layer 3 and the metal oxide semiconductor layer are stacked in this order.

Embodiment 1 FIG.
Hereinafter, the structure of the intermediate structure of the quantum battery according to the first embodiment will be described. The intermediate structure is a structure for manufacturing a quantum battery. That is, the intermediate structure is manufactured in the course of the manufacturing process of the quantum battery. For example, a quantum battery is obtained by processing (for example, cutting) the intermediate structure.

  FIG. 2 is a plan view showing the configuration of the intermediate structure 100. 2 shows an XY orthogonal coordinate system in which the direction along the edge of the rectangular base material 10 is the X direction and the Y direction. The intermediate structure 100 includes a battery formation region 11 and a test structure formation region 12. On the base material 10, the test structure forming region 12 is disposed outside the battery forming region 11. In FIG. 2, four battery formation regions 11 are arranged in a 2 × 2 matrix. The test structure forming region 12 is arranged so as to surround each of the four battery forming regions 11. That is, the test structure forming region 12 is disposed between the battery forming region 11 and the edge of the base material 10 or between the adjacent battery forming regions 11. The position of the test structure forming region 12 is not limited to this. For example, the test structure forming region 12 between the adjacent battery forming regions 11 may be omitted, or the test structure forming region is only between a part of the plurality of edges of the substrate 10 and the battery forming region 11. 12 may be formed.

  In the battery formation region 11, the batteries 21 shown in FIG. 1 are formed. A plurality of test structures 22 are provided in the test structure formation region 12. The plurality of test structures 22 are arranged along the X direction and the Y direction. Here, each test structure 22 has a rectangular pattern. The test structure 22 is a laminated structure formed in order to evaluate the characteristics of each layer constituting the battery 21. The test structure 22 is formed in a size smaller than that of the battery 21 in a plan view, and is arranged so that a plurality of test structures 22 are adjacent to one battery. A plurality of test structures 22 are arranged side by side around the battery 21. Of course, it is sufficient that one or more test structures 22 and one or more batteries 21 are formed on the substrate 10.

  FIG. 3 shows a cross-sectional structure of the intermediate structure 100. As shown in FIG. 3, a battery 21 is formed in the battery formation region 11. The battery 21 has a configuration in which a first electrode layer 1, an N-type semiconductor layer 2, a charging layer 3, a P-type semiconductor layer 4, and a second electrode layer 5 are stacked on a base material 10.

  In the test structure formation region 12, a plurality of test structures 22a to 22h are formed. The test structures 22 a to 22 h include the first electrode layer 1 and the second electrode layer 5 in the same manner as the battery 21. One or more layers are disposed between the first electrode layer 1 and the second electrode layer (hereinafter referred to as electrode layers). The test structures 22a to 22h include the same layer configuration test structures 22g and 22h and the missing layer configuration test structures 22a to 22f. In the same layer configuration test structures 22 g and 22 h, the configuration between the electrode layers is the same as the configuration between the electrode layers of the battery 21. In the missing layer configuration test structures 22 a to 22 f, the configuration between the electrode layers is different from the configuration between the electrode layers of the battery 21. In FIG. 3, for the same layer configuration test structure, two types of test structures having different separation states from the layer configuration of the battery 21 are shown as a test structure 22g and a test structure 22h. As for the missing layer configuration test structure, six types of test structures having different layer configurations are shown as test structure 22a to test structure 22f. In the following description, when the layer configuration is not specified, the test structure 22a to the test structure 22h are described as the test structure 22.

  The test structure 22g and the test structure 22h have the same layer configuration as the battery 21. Therefore, the test structures 22g and 22h function as a quantum battery similarly to the battery 21, but whether each layer is common (continuous pattern) with each layer of the battery 21 or whether they are separated. It is different.

  In the test structure 22g, the first electrode layer 1, the N-type semiconductor layer 2, the charging layer 3, and the P-type semiconductor layer 4 are not separated from those layers of the battery 21, and the second electrode layer 5 is separated. It is a pattern. Therefore, the first electrode layer 1 is formed as an integral pattern by the battery 21 and the test structure 22g. Similarly, in the battery 21 and the test structure 22g, each of the N-type semiconductor layer 2, the charge layer 3, and the P-type semiconductor layer 4 is formed as an integral pattern. In other words, each of the battery 21, the first electrode layer 1, the N-type semiconductor layer 2, the charging layer 3, and the P-type semiconductor layer 4 of the test structure 22g is formed as a continuous pattern. On the other hand, the second electrode layer 5 of the battery 21 and the second electrode layer 5 of the test structure 22g have a separated pattern.

  In the test structure 22 h, the first electrode layer 1 and the charge layer 3 are not separated from those layers of the battery 21. In the test structure 22h and the battery 21, the N-type semiconductor layer 2, the P-type semiconductor layer 4, and the second electrode layer 5 have a separated pattern. Therefore, in the battery 21 and the test structure 22h, the first electrode layer 1 is formed as an integral pattern. Similarly, in the battery 21 and the test structure 22h, the charging layer 3 is formed as an integral pattern. In other words, each of the battery 21 and the first electrode layer 1 and the charge layer 3 of the test structure 22h is formed as a continuous pattern. The second electrode layer 5 of the battery 21 and the second electrode layer 5 of the test structure 22h are separated from each other. Similarly, the P-type semiconductor layer 4 and the N-type semiconductor layer 2 of the battery 21 have patterns separated from the P-type semiconductor layer 4 and the N-type semiconductor layer 2 of the test structure 22h, respectively. Therefore, each of the N-type semiconductor layer 2, the P-type semiconductor layer 4, and the second electrode layer 5 of the test structure 22h has an independent pattern.

  Further, the first electrode layer 1 is formed as a continuous and integral pattern by the battery 21, the test structure 22h, and the test structure 22g. The battery 21, the test structure 22h, and the test structure 22g form the charging layer 3 as a continuous integral pattern.

  The test structures 22 a to 22 f include the first electrode layer 1 and the second electrode layer 5 in the same manner as the battery 21. The test structures 22a to 22f are missing layer structure test structures. Therefore, the layer structure between the electrode layers of the test structures 22 a to 22 f is a layer structure having only a part of the layer structure between the electrode layers of the battery 21. For example, in this embodiment, the battery 21 includes three functional layers (N-type semiconductor layer 2, charging layer 3, and P-type semiconductor layer 4) between electrode layers. Therefore, the test structures 22a to 22f have a layer configuration in which only one or two of the three layers are provided. In other words, the test structures 22a to 22f have a layer configuration in which one or two of the three layers are missing.

  The test structure 22 a has a four-layer structure in which the first electrode layer 1, the N-type semiconductor layer 2, the charging layer 3, and the second electrode layer 5 are stacked on the base material 10. That is, the test structure 22a has a layer configuration in which the P-type semiconductor layer 4 is removed from the battery 21. The lower surface of the N-type semiconductor layer 2 is in contact with the upper surface of the first electrode layer 1, and the upper surface of the N-type semiconductor layer 2 is in contact with the charging layer 3. The upper surface of the charging layer 3 is in contact with the lower surface of the second electrode layer 5. The first electrode layer 1 and the charge layer 3 are in common with those layers of the battery 21.

  That is, the first electrode layer 1 and the charging layer 3 of the test structure 22a are not separated from the first electrode layer 1 and the charging layer 3 of the battery 21, respectively. In the test structure 22 a and the battery 21, the first electrode layer 1 and the charging layer 3 are patterns formed integrally. The pattern of the N-type semiconductor layer 2 of the test structure 22a is a pattern independent of the pattern of the N-type semiconductor layer 2 of other test structures. The pattern of the second electrode layer 5 of the test structure 22 a is a pattern independent of the pattern of the second electrode layer 5 of the other test structure 22.

  The test structure 22 b has a four-layer structure in which the first electrode layer 1, the charge layer 3, the P-type semiconductor layer 4, and the second electrode layer 5 are stacked on the base material 10. That is, the test structure 22b has a layer configuration in which the N-type semiconductor layer 2 is removed from the battery 21. The lower surface of the P-type semiconductor layer 4 is in contact with the upper surface of the charging layer 3, and the upper surface of the P-type semiconductor layer 4 is in contact with the second electrode layer 5. The lower surface of the charging layer 3 is in contact with the upper surface of the first electrode layer 1. The first electrode layer 1 and the charge layer 3 are in common with those layers of the battery 21.

  That is, the first electrode layer 1 and the charging layer 3 of the test structure 22b are not separated from the first electrode layer 1 and the charging layer 3 of the battery 21, respectively. In the test structure 22b and the battery 21, the first electrode layer 1 and the charging layer 3 are patterns formed integrally. The pattern of the P-type semiconductor layer 4 of the test structure 22b is a pattern independent of the pattern of the P-type semiconductor layer 4 of other test structures. The pattern of the second electrode layer 5 of the test structure 22b is a pattern independent of the pattern of the second electrode layer 5 of another test structure 22.

  The test structure 22c has a three-layer structure in which the first electrode layer 1, the charge layer 3, and the second electrode layer 5 are stacked. That is, the test structure 22 c has a layer configuration in which the N-type semiconductor layer 2 and the P-type semiconductor layer 4 are removed from the battery 21. In other words, in the test structure 22 c, a single layer of the charging layer 3 is formed between the first electrode layer 1 and the second electrode layer 5. The lower surface of the charging layer 3 is in contact with the upper surface of the first electrode layer 1, and the upper surface of the charging layer 3 is in contact with the lower surface of the second electrode layer 5. The first electrode layer 1 and the charge layer 3 are in common with those layers of the battery 21.

  That is, the first electrode layer 1 and the charging layer 3 of the test structure 22c are not separated from the first electrode layer 1 and the charging layer 3 of the battery 21, respectively. In the test structure 22c and the battery 21, the first electrode layer 1 and the charging layer 3 are patterns formed integrally. The pattern of the second electrode layer 5 of the test structure 22 c is a pattern independent of the pattern of the second electrode layer 5 of the other test structure 22.

  The test structure 22 d has a four-layer structure in which the first electrode layer 1, the N-type semiconductor layer 2, the P-type semiconductor layer 4, and the second electrode layer 5 are stacked on the base material 10. That is, the test structure 22d has a layer configuration in which the charging layer 3 is removed from the battery 21. The lower surface of the N-type semiconductor layer 2 is in contact with the upper surface of the first electrode layer 1, and the upper surface of the N-type semiconductor layer 2 is in contact with the lower surface of the P-type semiconductor layer 4. The upper surface of the P-type semiconductor layer 4 is in contact with the lower surface of the second electrode layer 5. The first electrode layer 1 is in common with that layer of the battery 21.

  That is, the first electrode layer 1 of the test structure 22 d is not separated from the first electrode layer 1 of the battery 21. In the test structure 22d and the battery 21, the first electrode layer 1 has a pattern formed integrally. The pattern of the second electrode layer 5 of the test structure 22d is a pattern independent of the pattern of the second electrode layer 5 of other test structures 22. The pattern of the N-type semiconductor layer 2 of the test structure 22d is a pattern independent of the pattern of the N-type semiconductor layer 2 of other test structures 22. The pattern of the P-type semiconductor layer 4 of the test structure 22d is a pattern independent of the pattern of the P-type semiconductor layer 4 of the other test structures 22.

  The test structure 22 e has a three-layer structure in which the first electrode layer 1, the N-type semiconductor layer 2, and the second electrode layer 5 are stacked on the base material 10. That is, the test structure 22e has a layer configuration in which the charging layer 3 and the P-type semiconductor layer 4 are removed from the battery 21. The lower surface of the N-type semiconductor layer 2 is in contact with the upper surface of the first electrode layer 1, and the upper surface of the N-type semiconductor layer 2 is in contact with the lower surface of the second electrode layer 5. The first electrode layer 1 is in common with that layer of the battery 21.

  That is, the first electrode layer 1 of the test structure 22 e is not separated from the first electrode layer 1 of the battery 21. In the test structure 22e and the battery 21, the first electrode layer 1 has a pattern formed integrally. The pattern of the second electrode layer 5 of the test structure 22 e is a pattern independent of the pattern of the second electrode layer 5 of the other test structure 22. The pattern of the N-type semiconductor layer 2 of the test structure 22e is a pattern independent of the pattern of the N-type semiconductor layer 2 of other test structures 22.

  The test structure 22f has a three-layer structure in which the first electrode layer 1, the P-type semiconductor layer 4, and the second electrode layer 5 are stacked on the base material 10. That is, the test structure 22f has a layer configuration in which the charging layer 3 and the N-type semiconductor layer 2 are removed from the battery 21. The lower surface of the P-type semiconductor layer 4 is in contact with the upper surface of the first electrode layer 1, and the upper surface of the P-type semiconductor layer 4 is in contact with the lower surface of the second electrode layer 5. The first electrode layer 1 is in common with that layer of the battery 21.

  That is, the first electrode layer 1 of the test structure 22 f is not separated from the first electrode layer 1 of the battery 21. In the test structure 22f and the battery 21, the first electrode layer 1 has a pattern formed integrally. The pattern of the second electrode layer 5 of the test structure 22f is a pattern independent of the pattern of the second electrode layer 5 of other test structures 22. The pattern of the P-type semiconductor layer 4 of the test structure 22f is a pattern independent of the pattern of the P-type semiconductor layer 4 of the other test structures 22.

  Therefore, in the battery 21 and the test structures 22a to 22g, the first electrode layer 1 is not separated but has an integrally formed pattern. Here, the first electrode layer 1 is a solid pattern formed on almost the entire surface of the substrate 10. In the battery 21, the test structure 22a, the test structure 22b, the test structure 22c, the test structure 22g, and the test structure 22h, the charging layer 3 is not separated but has a pattern formed integrally. . The second electrode layer 5 is separated between the battery 21 and the test structure 22. Further, the second electrode layer 5 is separated between the test structures 22. That is, in the test structure 22 and the battery 21, the second electrode layer 5 has an independent island pattern. The second electrode layer 5 is formed separately for each test structure 22.

  Thus, in the present embodiment, a plurality of test structures 22 are provided on the base material 10 on which the battery 21 is provided. Two types of test structures (same-layer configuration test structures) 22g and 22h having the same layer configuration as the battery 21 are formed in the test structure formation region 12. In addition, six types of test structures (missing layer structure test structures) 22 a to 22 f having a layer structure different from that of the battery 21 are formed in the test structure forming region 12. The six types of test structures 22a to 22f have mutually different layer configurations. Therefore, a total of eight types of test structures 22 a to 22 h are provided around the battery 21. Furthermore, the base material 10 may be provided with a plurality of various test structures 22a to 22h. For example, the base material 10 is provided with two or more test structures 22a. Similarly, the substrate 10 is provided with a plurality of test structures 22b to 22h.

  The number and position of the test structures 22 arranged in the test structure formation region 12 are not particularly limited. For example, in the intermediate structure 100 shown in FIG. 2, 50 test structures 22 are arranged in the test structure forming region 12. Specifically, test structures 22 are arranged at the four corners of the substrate 10 respectively. Except for the test structures 22 arranged at the four corners, eight test structures 22 are arranged in a row along each side on the four sides of the substrate 10. Further, in the test structure formation region 12 between the batteries 21, eight test structures are arranged in a line along the Y direction except for the test structures 22 arranged along each side. Six test structures 22 are arranged in a line along the X direction. One type of test structure 22 among the above-described eight types of test structures 22 is formed at the positions where these test structures are arranged. There are no particular limitations on the type, number, or position of the test structures 22a to 22h to be arranged.

  In addition, it is preferable to form so that the same kind of test structure 22 may be scattered on the base material 10. That is, the test structure 22 having the same layer configuration is formed at a plurality of locations on the substrate 10. By doing so, in-plane variation and inclination of each layer can be diagnosed. For example, in FIG. 2, the test structures 22a are formed at different positions in the X direction. By doing so, it is possible to diagnose variation in characteristics and inclination of the test structure 22a in the X direction. Similarly, a plurality of test structures 22a are also scattered in the Y direction, so that variations in the Y direction can be diagnosed. Further, in the same manner, by forming a plurality of test structures 22 having the same layer structure on the base material 10 for the test structures 22b to 22h having other layer configurations, in-plane variations and the like can be diagnosed.

  When there are a plurality of columns in which the test structures 22 are arranged at different positions and orientations, it is preferable that all types of test structures are provided in each column. By doing so, it is possible to evaluate the layer characteristics of each column or compare the measurement results of different columns. For example, as shown in FIG. 2, when there are six columns of an upper side row, a lower side row, a left side row, a right side row, a central X direction row, and a central Y direction row, all of the test structures 22a to 22h are placed in each row. Can be provided.

  The second electrode layers 5 of the test structures 22a to 22h have separate patterns. The second electrode layers 5 of the test structures 22a to 22h serve as TEG (Test Element Group) pads, respectively, and the test structures 22a to 22h can be independently inspected.

  For example, in order to form the battery 21 and the test structures 22a to 22h, the first electrode layer 1, the N-type semiconductor layer 2, the charging layer 3, the P-type semiconductor layer 4, and the second electrode layer are formed on the base material 10. Laminate all 5 layers. After stacking, in order to measure a power supply source (voltage source, current source, etc.) and electrical characteristics necessary for measurement between the first electrode layer 1 and the second electrode layer 5 of the test structures 22a to 22h to be measured. Connect a meter (voltmeter, ammeter, etc.). The electrical characteristics of the test structure 22 to which a meter or the like is connected are evaluated. Each layer of the test structure 22 and each layer of the battery are formed by the same processing process at the same time. Therefore, each layer of the battery 21 can be diagnosed by measuring the electrical characteristics of the test structure 22 or comparing the measurement results with other test structures 22.

  It is preferable that the planar shape of the second electrode layer 5 of each test structure 22 is the same in terms of easy comparison and evaluation of measurement results. For example, the pattern of the second electrode layer 5 formed independently for each test structure 22 has the same shape in the XY plan view. It is more preferable that the separated layers other than the second electrode layer 5 have the same planar view shape for each layer. For example, in the example shown in FIG. 3, the planar shape of the second electrode layer 5 is formed to be the same in the test structures 22 a to 22 h. In the test structures 22h, 22a, 22d, and 22e, the N-type semiconductor layer 2 has the same shape in plan view. Furthermore, it is preferable that the P-type semiconductor layers 2 have the same planar view shape in the test structures 22h, 22b, 22d, and 22f. In other words, in the test structure 22, the pattern formed independently of the other test structures 22 has the same planar shape, so that the measurement conditions for diagnosis can be matched.

  Next, a method for manufacturing the battery according to the present embodiment will be described with reference to FIG. FIG. 4 is a flowchart showing a method for manufacturing the battery 21.

  In order to produce a quantum battery, first, the base material 10 is prepared (step S1). As described above, the base material 10 has an insulating or conductive flat plate shape or sheet shape. For example, a glass substrate, a resin sheet of a polymer film, a metal foil sheet, or the like can be used. The substrate 10 has a planar view shape in which the battery formation region and the test structure region can be arranged.

  Next, the 1st electrode layer 1 is formed into a film on the base material 10 prepared by step S1 (step S2). As described above, the first electrode layer 1 is a silver Ag alloy film or the like containing aluminum Al, and is formed by a vapor deposition method such as sputtering, ion plating, electron beam evaporation, vacuum evaporation, or chemical vapor deposition. Can do. The first electrode layer 1 is formed on almost the entire surface of the substrate 10. Thereby, the first electrode layer is shared between the battery 21 and the test structure 22. In addition, when using the electroconductive substance for the base material 10 and also having the function of a 1st electrode layer, since the 1st electrode layer 1 can be omitted, this step S2 can be abbreviate | omitted.

Next, the N-type semiconductor layer 2 is formed on the first electrode layer 1 (step S3). As described above, the N-type semiconductor layer 2 is an N-type metal oxide semiconductor layer made of titanium dioxide (TiO ₂ ), tin oxide (SnO ₂ ), zinc oxide (ZnO), or the like. For example, the N-type semiconductor layer 2 is formed by sputtering. Here, the N-type semiconductor layer 2 is formed in a predetermined pattern by sputtering using a mask. That is, the N-type semiconductor layer 2 is formed using a mask having an opening at a location that becomes the battery 21, the test structure 22g, the test structure 22h, the test structure 22a, the test structure 22d, or the test structure 22e. Is done.

  At this time, the battery 21 and the test structure 22g form a continuous pattern of the N-type semiconductor layer 2 by using a mask having a common opening. Therefore, the N-type semiconductor layer 2 is integrally formed by the battery 21 and the test structure 22g. In addition, the N-type semiconductor layer 2 is formed using a mask that is individually opened at a location that becomes the test structure 22h, the test structure 22a, the test structure 22d, or the test structure 22e. For this reason, the pattern of the separated N-type semiconductor layer 2 is formed at a location that becomes the test structure 22h, the test structure 22a, the test structure 22d, or the test structure 22e. If the N-type semiconductor layer 2 is omitted, this step S3 can be omitted.

  A charge layer 3 is formed on the first electrode layer 1 and the N-type semiconductor layer 2 (S4). The charge layer 3 can be formed by, for example, a coating pyrolysis method. Specifically, a coating solution in which fatty acid titanium and silicone oil are mixed in a solvent is applied, dried, and then fired. As a result, a fine particle layer of titanium dioxide covered with an insulating film is formed.

  By irradiating the formed layer with ultraviolet rays, the interatomic distance of titanium dioxide is changed to cause a photoexcited structure change phenomenon. As a result, a new energy level is formed in the band gap of titanium dioxide. Charging becomes possible by capturing electrons at this new energy level. Through these steps, the charge layer 3 is formed.

  The charge layer 3 is formed as a continuous pattern in the battery 21, the test structure 22g, the test structure 22h, the test structure 22a, the test structure 22b, or the test structure 22c. In addition, what is necessary is just to apply | coat a coating liquid only to a predetermined pattern in order to form the charge layer 3 in a predetermined pattern. Or it is also possible to remove coating liquids other than a predetermined pattern after apply | coating a coating liquid. In this case, for example, the coating liquid before drying is wiped off. Moreover, you may make it remove charge layers other than a predetermined pattern, after forming the charge layer 3. FIG. Thus, the test structures 22g, 22h, 22a, 22b, and 22c having the charging layer 3 and the test structures 22d, 22e, and 22f that do not have the charging layer 3 can be formed.

  As described above, since the N-type semiconductor layer 2 is formed in the predetermined pattern in Step S3, the charging layer 3 is formed on the portion where the N-type semiconductor layer 2 is formed, and the N-type semiconductor is formed. The charging layer 3 is formed directly on the first electrode layer 1 in a portion where the layer 2 is not formed.

  Note that it is preferable that the test structures 22g, 22h, 22a, 22b, and 22c provided with the charge layer are arranged at adjacent positions because the charge layer forming operation is facilitated. In particular, the operation is facilitated when applying or removing the coating solution for forming the charge layer.

  For example, it is preferable that the test structures 22d, 22e, and 22f are not arranged between the test structures 22g, 22h, 22a, 22b, and 22c. In the XY plan view, the test structures 22d, 22e, and 22f are not arranged between the test structure 22g and the test structure 22h. Further, the test structures 22d, 22e, and 22f are not arranged in the region between the other test structures 22a, 22b, and 22c. In other words, the test structures 22d, 22e, and 22f without the charge layer 3 are continuously arranged.

  In the present embodiment, the case where the charging layer 3 is integrally formed in the battery 21 and the test structures 22g, 22h, 22a, 22b, and 22c is shown. However, the charging layer 3 is separated into a predetermined pattern. Can also be formed. For example, separate charge layers may be formed at locations where the battery 21, the test structure 22g, the test structure 22h, the test structure 22a, the test structure 22b, or the test structure 22c are to be formed. In this case, as described above, the coating liquid may be applied only to a predetermined pattern. Or it is also possible to remove coating liquids other than a predetermined pattern after apply | coating a coating liquid. In this case, for example, the coating liquid before drying is wiped off. Moreover, you may make it remove charge layers other than a predetermined pattern, after forming the charge layer 3. FIG. In this case, the planar shape of the charge layer 3 of each test structure 22 may be the same.

Next, a P-type semiconductor layer 4 is formed on the first electrode layer 1, the N-type semiconductor layer 2, and the charging layer 3 (step S5). As described above, the P-type semiconductor layer 4 is a P-type metal oxide semiconductor such as nickel oxide (NiO) or copper aluminum oxide (CuAlO ₂ ). For example, the P-type semiconductor layer 4 is formed by sputtering. Similar to the N-type semiconductor layer 2, the P-type semiconductor layer 4 is formed in a predetermined pattern by sputtering using a mask. That is, the P-type semiconductor layer 4 is formed using a mask having an opening at the location that becomes the battery 21, the test structure 22g, the test structure 22h, the test structure 22b, the test structure 22d, or the test structure 22f. Is done. At this time, the battery 21 and the test structure 22g are formed as a continuous pattern of the P-type semiconductor layer 4 by using a mask having a common opening. Further, the portions to be the test structure 22h, the test structure 22b, the test structure 22d, or the test structure 22f are formed using individually opened masks. A pattern is formed.

  As described above, the N-type semiconductor layer 2 and the charging layer 3 are in a predetermined pattern by Step S3 and Step S4. Therefore, the P-type semiconductor layer 4 is formed on the portion where the N-type semiconductor layer 2 and the charging layer 3 are formed as the uppermost layer. A P-type semiconductor layer 4 is formed directly on the first electrode layer 1 in a portion where the N-type semiconductor layer 2 and the charging layer 3 are not formed.

  Next, the second electrode layer 5 is formed on the first electrode layer 1, the N-type semiconductor layer 2, the charging layer 3, and the P-type semiconductor layer 4 (step S6). Here, similarly to the first electrode layer 1, as described above, it is a silver Ag alloy film containing aluminum Al, etc., and vapor phase film forming methods such as sputtering, ion plating, electron beam evaporation, vacuum evaporation, and chemical vapor deposition. Can be formed. For example, the second electrode layer 5 having a predetermined pattern is formed by using a mask. Specifically, in the battery 21 and the test structures 22a to 22h, the second electrode layer 5 has a separate pattern.

  As described above, the N-type semiconductor layer 2, the charge layer 3, and the P-type semiconductor layer 4 have a predetermined pattern through Steps S3 to S5. Therefore, the second electrode layer 5 is formed on the portion where the N-type semiconductor layer 2, the charging layer 3, and the P-type semiconductor layer are formed as the uppermost layer.

  In this way, the intermediate structure 100 including the battery 21 and the test structure 22 is completed by steps S1 to S6.

  The performance of the battery 21 prepared through steps S1 to S6 is evaluated (step S7). Here, the characteristics of the battery 21 provided in the intermediate structure 100 are measured. For example, it is determined whether or not the electrical performance of the battery 21 such as charge / discharge characteristics satisfies a predetermined standard.

  For the evaluation method of the battery 21, for example, the evaluation device and the evaluation method described in Patent Document 1 can be used. For example, the evaluation apparatus has a first probe and a second probe. The evaluation apparatus includes a voltage source that supplies a charging current and a current source (load) that extracts a discharging current. In the evaluation apparatus, a voltage source and a current source are selectively connected between both probes. Furthermore, the evaluation apparatus includes a voltmeter that measures a voltage between both probes and an ammeter that measures a current flowing between both probes.

  Then, the first probe is connected to the first electrode layer, and the second probe is connected to the second electrode layer. For example, in the battery formation region 11 or the test structure formation region 12, the first electrode layer 1 is exposed to the surface (including the back surface when the substrate 10 also serves as the first electrode layer 1). One probe is connected. A second probe is connected to an arbitrary location on the surface of the second electrode layer 5 of the battery 21. Thereby, the battery 21 to be evaluated is connected to both probes, and is in a chargeable / dischargeable state.

  And an evaluation apparatus connects a voltage source between both probes, and charges the battery 21 with a predetermined charging method (for example, constant current / constant voltage charging). The evaluation device measures the voltage and the charging time until the fully charged state is reached from the non-charged state. In addition, the evaluation device discharges the battery 21 by connecting a current source between both probes so that a current flows in a direction opposite to that during charging. The evaluation device measures the voltage and discharge time until the evaluation device changes from a fully charged state to a non-charged state. Further, the voltage immediately after full charge may be measured and evaluated. The contact point of the second probe may be one point on the second electrode layer or a plurality of points. The battery 21 is evaluated based on the electrical characteristics of the battery 21 thus measured.

  In addition, as an evaluation of the battery 21, the electrical characteristics of the same layer configuration test structures 22g and 22h may be measured and used for the evaluation. Further, before the evaluation in step S7, the battery 21 may be charged / discharged to perform processing such as conditioning and aging. In that case, you may use for the evaluation in step S7 the electrical property of the battery 21 measured in the case of the process.

  In step S7, when the performance of the battery 21 satisfies a predetermined standard, it is determined that the battery 21 is normal in performance. When the performance of all the batteries 21 provided in one intermediate structure 100 is determined to be normal, the intermediate structure 100 is determined to be normal (“normal” in step S7).

  In the intermediate structure 100 determined to be normal in step S7, the test structure forming region 12 is removed (step S8), and the basic configuration of the quantum battery is completed. The removal of the test structure region 12 in step S8 is performed, for example, by cutting the boundary between the test structure region 12 and the battery formation region 11 in the intermediate structure 100 and separating the test structure 22 from the battery 21. be able to. Thereby, the test structure 22 is separated from the battery 21. The battery 21 provided in the intermediate structure 100 is divided into individual pieces. A battery 21 that satisfies a predetermined standard can be manufactured. A part of the test structures 22 can be left without removing all the test structure formation regions 12. For example, the test structure 22 can be used for a test after manufacturing the battery, or can be used as a terminal member.

  The battery 21 thus formed functions as a single quantum battery, but can be provided with a terminal member such as a positive electrode terminal and a negative electrode terminal, and a mounting member such as an exterior member and a covering member, if necessary. In this case, a plurality of batteries 21 may be combined to form one battery.

  In step S7, when the performance of the battery 21 does not satisfy the predetermined standard, it is determined that an abnormality has occurred in the performance of the battery 21. The intermediate structure 100 having the battery 21 determined to have an abnormality in performance is determined to be abnormal (“abnormality generation” in step S7). The intermediate structure 100 determined to be abnormal is diagnosed based on the electrical characteristics of the test structure 22 (S8). Based on the diagnosis result, the cause of the failure is investigated and fed back to each process.

  As a diagnosis method, it is determined whether or not the measurement result of the test structure 22 is within an allowable range. For example, an allowable range of electrical characteristic values for each type of test structure 22 is determined in advance. It is determined whether each test structure 22 of the intermediate structure 100 determined to be abnormal is within the allowable range. If there is a bias in the type of the test structure 22 that is outside the allowable range, it can be inferred which layer formation process has a problem based on that. Further, if the position of the test structure 22 outside the allowable range is biased, a problem related to the position can be estimated.

  As another diagnostic method, the electrical characteristic values of the same kind of test structures arranged in the same intermediate structure 100 can be compared. In this case, a problem related to the position in forming various layers can be estimated.

  Further, it can be compared with a test structure 22 of the same kind and in the same position in another intermediate structure 100 determined to be normal. In this case, it is possible to guess a problem caused by the difference in the time of production or the device used.

  As electrical characteristics used for diagnosis, for example, electrical characteristics such as current-voltage (IV) characteristics can be measured for each of the test structures 22a to 22h. For the test structures 22g, 22h, and 22b that function as a battery, the same electrical characteristics (for example, charge / discharge characteristics) as the electrical characteristics measured for the battery 21 in step S7 may be measured.

  FIG. 5 shows a configuration in which a single layer of the P-type semiconductor layer 4 is provided between the first electrode layer 1 and the second electrode layer 5, that is, the IV characteristics of the test structure 22f. In FIG. 5, the horizontal axis represents voltage (V) and the vertical axis represents current (A). FIG. 5 shows the IV characteristics of the normal P-type semiconductor layer 4 and the IV characteristics of the abnormal P-type semiconductor layer 4. It is possible to determine whether the test structure is normal or abnormal by using the IV characteristics of the various test structures.

  Specifically, the terminal (probe) of the measuring device is brought into contact with the second electrode layer 5 and the first electrode layer 1 of each test structure 22, and the IV curve is measured. The IV curves of the test structure 22 are measured independently. The measurement of the electrical characteristics of the test structure 22 may be performed simultaneously or sequentially.

  For example, in the test structures 22e and 22f having no charge layer 3 and one kind of semiconductor layer, the IV characteristics of the N-type semiconductor layer 2 or the P-type semiconductor layer 4 can be evaluated. Further, in the test structure 22d having no charge layer 3 and two kinds of semiconductor layers, the IV characteristics of the diode in which the N-type semiconductor layer 2 and the P-type semiconductor layer 4 are joined can be evaluated. In the test structures 22a and 22b having the charge layer 3 and one kind of semiconductor layer, the IV characteristics of the secondary battery in which the N-type semiconductor layer 2 or the P-type semiconductor layer 4 is stacked on the charge layer 3 are evaluated. be able to. In the test structure 22c that has the charge layer 3 and does not have two types of semiconductor layers, the IV characteristics of the secondary battery having a single charge layer 3 can be evaluated. With the test structures 22g and 22h having the same layer configuration as the battery 21, the IV characteristics of the secondary battery can be evaluated. Thus, by diagnosing each test structure 22, it is possible to reliably identify a defective process.

  For example, the defective layer can be identified based on the IV characteristics of the test structures 22a to 22f. Among the six types of missing layer structure test structures 22a to 22f, test structures 22a to 22f whose IV characteristics do not satisfy a predetermined standard are specified. For example, with respect to the intermediate structure 100 having the normal battery 21 in advance, the IV characteristics of the test structures 22a to 22f are measured, and based on the result, an evaluation criterion is set as a criterion for judging the allowable range. Keep it. The evaluation criteria and the characteristic results of the test structures 22a to 22f are compared.

  That is, if the measured characteristics of the test structure satisfy the evaluation criteria, the test structure is determined to be normal, and if not, the test structures 22a to 22f are determined to be abnormal. Based on the difference in layer configuration between the test structures 22a to 22f determined to be abnormal and the test structures determined to be normal, the normal layer and the abnormal layer can be determined. Specifically, the characteristics of the test structures 22b, 22d, 22f, 22h, and 22g with the P-type semiconductor layer 4 do not satisfy the evaluation criteria, and the test structures 22a, 22c, and 22e without the P-type semiconductor layer 4 are provided. When the evaluation criteria are satisfied, it is determined that the P-type semiconductor layer 3 is abnormal.

  In this way, it is possible to specify in which manufacturing process the abnormality has occurred. When a process in which an abnormality has occurred is identified, it is fed back to the manufacturing process. By doing in this way, a manufacturing process can be improved and generation | occurrence | production of the process malfunction in subsequent lots can be prevented. Therefore, yield can be improved and productivity can be improved.

  As described above, in the present embodiment, the test structure 22 for confirming the performance of the process from the measured characteristic value is provided. Furthermore, since a plurality of test structures 22a to 22f are formed on the base material 10, not only a process abnormality but also a relationship with a unit process and a unit device can be grasped. When an abnormality is detected, it is possible to improve the characteristics of the quantum battery and stabilize the quality by feeding back to the process conditions. Of course, each of the test structures 22 may be measured other than the IV characteristic, or other characteristics or a plurality of characteristics may be measured.

  Further, in the present embodiment, test structures 22c, 22e, and 22f in which only a single layer of each layer is formed between the first electrode layer 1 and the second electrode layer 5, or a test structure without the charging layer 3 Body 22d, 22e, 22f is formed. When the battery performance is deteriorated due to the abnormality, it is possible to easily detect which layer has an abnormality and when the abnormality has occurred by confirming the electrical characteristics of each layer constituting layer alone in step S7. For example, when there is an abnormality when the performance of the battery 21 in the intermediate structure 100 is evaluated, the IV characteristics of the test structure 22 in the same intermediate structure 100 are measured. As shown in FIG. 5, the normal IV characteristic and abnormal IV characteristic of each layer can be compared to confirm in which layer an abnormality has occurred. It can also be used to improve the characteristics and stabilize the quality by grasping the relationship from the electrical characteristics of each layer and feeding back to the process conditions. Since the quality of the battery 21 can be managed by the manufacturing method according to the present embodiment, the productivity can be improved.

  As shown in this embodiment, providing the test structure 22 in the intermediate structure 100 enables more appropriate diagnosis. For example, it becomes possible to identify the layer where an abnormality has occurred and to measure the in-plane distribution

  Note that the intermediate structure 100 determined to be abnormal in step S7 may include a battery in which some of the batteries 21 are determined to be normal. In this case, the normal battery 21 is disconnected from the test structure 22 and the battery 21 determined to be abnormal. By doing so, it is possible to take out only the battery 21 determined to be normal. The normal battery 21 can be separated from the test structure 22 and the battery 21 determined to be abnormal by the method described in step S9.

  Moreover, in the intermediate structure 100 determined to be abnormal in step S7, some of the plurality of batteries 21 may be determined to be abnormal. In this case, only the test structure 22 adjacent to the battery 21 determined to be abnormal may be diagnosed in step S8.

  In this embodiment, an insulating substrate is used as the base material 10, but a sheet-like member may be used as the base material 10. Furthermore, although the structure which forms the four batteries 21 in the base material 10 is shown, it does not specifically limit about the number of the batteries 21 formed in the base material 10, a magnitude | size, and a shape.

  In addition, after evaluating the battery performance in step S <b> 7, the test structure 22 is separated from the battery 21 by cutting the base material 10. By doing in this way, since the unnecessary part of the base material 10, ie, the test structure formation area 12, is separated from the final battery 21, the battery 21 can be further downsized.

  In the above description, since all combinations of the N-type semiconductor layer 2, the charging layer 3, and the P-type semiconductor layer 4 disposed between the first electrode layer 1 and the second electrode layer 5 are provided, Six types of test structures 22a to 22f are formed. Thereby, it can diagnose more appropriately. Of course, it is not necessary to form all six types of test structures 22a to 22f. That is, it is sufficient that at least one of the test structures 22a to 22f is formed in the intermediate structure 100. Each layer can be appropriately diagnosed by measuring the electrical characteristics of the test structure 22.

  For example, you may make it form the test structure 22 of the layer structure in which the charge layer 3 is not provided. By doing so, the characteristics of the N-type semiconductor layer 2 and the P-type semiconductor layer 4 can be appropriately diagnosed.

  Alternatively, a test structure 22 having a layer configuration in which any one of the N-type semiconductor layer 2 and the P-type semiconductor layer 4 is not formed may be formed. In other words, the test structure 22 in which the charging layer 3 is in contact with at least one of the first electrode layer 1 and the second electrode layer 5 is formed. By doing so, the characteristics of the charge layer 3 can be properly diagnosed.

  A plurality of test structures 22 may be provided, and the plurality of test structures 22 may have different layer configurations disposed between the first electrode layer 1 and the second electrode layer 5. By doing so, each layer can be properly diagnosed and a defective manufacturing process can be identified.

Embodiment 2. FIG.
A configuration of the intermediate structure 200 of the battery according to the present embodiment will be described with reference to FIG. FIG. 6 is a cross-sectional view schematically showing the configuration of the intermediate structure 200. In the present embodiment, a sheet-like member is used as the base material 10. Batteries 21 are formed on both the upper and lower surfaces of the insulating base material 10.

  In the present embodiment, the batteries 21 are provided on both surfaces of the sheet-like base material 10. Therefore, a battery 21 having a larger capacity can be realized. Furthermore, the test structures 22 a to 22 h are also provided on both surfaces of the base material 10. The electrical characteristics of the test structures 22a to 22h provided on both surfaces of the substrate 10 are measured in the same manner as in the first embodiment. Thereby, the dispersion | variation in the performance of both surfaces of the base material 10, an in-plane tendency, etc. can be diagnosed.

  The manufacturing process of the battery in the present embodiment is the same flow as in FIG. 4 shown in the first embodiment. For example, after forming the first electrode layer 1 on one surface of the substrate 10, the first electrode layer 1 is formed on the other surface. Thus, after film-forming on both surfaces of the base material 10, the next layer is formed. Thus, by alternately performing the process on the upper surface and the lower surface for each process, the characteristics of the batteries 21 on both surfaces can be made substantially the same. By performing the baking process of the charging layers 3 on both sides at once, the thermal history of the charging layers 3 on both sides can be made the same. Of course, after two or more layers are continuously formed on one surface of the substrate 10, a layer may be formed on the other surface. Moreover, you may form a layer on both surfaces simultaneously.

  In FIG. 6, the planar arrangement of the test structures 22a to 22h on both surfaces of the base material 10 is the same. Thus, the upper test structure 22 and the lower test structure 22 can be formed under the same conditions. Furthermore, the same mask can be used during film formation.

  Of course, the planar arrangement of the test structures 22a to 22h on both surfaces of the substrate 10 may be different. For example, in FIG. 6, the test structure 22a on the upper surface and the test structure 22a on the lower surface are at the same planar position, but the test structures 22 having different layer configurations may be at the same planar position. For example, the test structure 22a on the upper surface and the test structure 22b may be at the same planar position. Alternatively, the test structure 22 on the upper surface and the test structure 22 on the lower surface may be shifted from each other. For example, the lower test structure 22a may be arranged at a planar position between the upper test structure 22a and the test structure 22b. This makes it possible to evaluate a more detailed in-plane distribution. In addition, you may make the base material 10 serve as the 1st electrode layer 1 using a conductive material for the base material 10. In this case, the first electrode layers 1 on both surfaces of the substrate 10 can be omitted.

Embodiment 3 FIG.
A configuration of the intermediate structure 300 of the battery according to the present embodiment will be described with reference to FIG. FIG. 7 is a cross-sectional view schematically showing the configuration of the intermediate structure 300. In the third embodiment, the cross-sectional configuration of the battery 31 is different from the battery 21 of the first and second embodiments. The plan view of the intermediate structure 300 is the same as FIG. Also, the description overlapping with the first and second embodiments will be omitted as appropriate.

  The intermediate structure 300 according to the present embodiment has a layer configuration in which the battery 31 is not provided with the N-type semiconductor layer 2. That is, in the battery 31, the first electrode layer 1, the charging layer 3, the P-type semiconductor layer 4, and the second electrode layer 5 are formed on the base material 10 in order from the bottom.

  Since the layer configuration of the battery 31 is different from that of the first embodiment, the type of the test structure 32 is different from that of the first embodiment. Since the battery 31 does not include the N-type semiconductor layer 2, the test structure 32 also does not include the N-type semiconductor layer 2. For this reason, the types of test structures 32 are reduced. Here, the base material 10 is provided with four types of test structures 32g, 32h, 32c, and 32f. Specifically, since the electrode layers of the battery 31 have a two-layer structure, the structure between the electrode layers of the test structure 32 has a one-layer structure or a two-layer structure.

  The test structures 32g and 32h are the same layer configuration test structures having the same layer configuration as the battery 31. That is, the test structures 32g and 32h have a layer configuration in which the first electrode layer 1, the charging layer 3, the P-type semiconductor layer 4, and the second electrode layer 5 are formed on the base material 10 in this order. ing. The layer structure between the electrode layers of the test structures 32g and 32h is a two-layer structure of the P-type semiconductor layer 4 and the charging layer 3.

  The layer structure between the electrode layers of the test structures 32 c and 32 f is a single layer structure including the P-type semiconductor layer 4 or the charging layer 3. The test structures 32 c and 32 f are missing layer configuration test structures having a layer configuration different from that of the battery 31.

  The layer structure of the test structure 32c is the same as that of the test structure 22c of the first embodiment. That is, the test structure 32 c is provided with the first electrode layer 1, the charging layer 3, and the second electrode layer 5 on the base material 10. That is, the test structure 32 c has a layer configuration in which the P-type semiconductor layer 4 is removed from the battery 31.

  The layer structure of the test structure 32f is the same as that of the test structure 22f of the first embodiment. That is, the test structure 32 f is provided with the first electrode layer 1, the P-type semiconductor layer 4, and the second electrode layer 5 on the substrate 10. That is, the test structure 32 f has a layer configuration in which the charging layer 3 is removed from the battery 31.

  In the test structure 32g and the battery 31, the pattern of the P-type semiconductor layer 4 is integrally formed. The pattern of the P-type semiconductor layer 4 of the test structure 32 h is a pattern independent of the pattern of the P-type semiconductor layer 4 of the battery 31 and other test structures 22. The pattern of the P-type semiconductor layer 4 of the test structure 32 f is a pattern independent of the pattern of the P-type semiconductor layer 4 of the battery 31 and the other test structures 22.

  The pattern of the charge layer 3 is integrally formed by the test structure 32g, the test structure 32h, the test structure 32c, and the battery 31. That is, the charge layer 3 is not separated between the test structure 32 g, the test structure 32 h, the test structure 32 c, and the battery 31.

  In the battery 31, the test structure 32g, the test structure 32h, the test structure 32c, and the test structure 32f, the second electrode layer 5 has an independent pattern.

  Thus, even if the battery 31 has a layer structure different from that of the first embodiment, it is possible to appropriately diagnose by forming the test structure 32 on the base material 10. Therefore, the same effect as in the first embodiment can be obtained.

Embodiment 4 FIG.
The configuration of the battery intermediate structure 400 according to the present embodiment will be described with reference to FIGS. FIG. 8 is a plan view schematically showing the configuration of the intermediate structure 400, and FIG. 9 is a cross-sectional view thereof.

  In the fourth embodiment, a long belt-like conductive sheet of the base material 10 is used. Specifically, as shown in FIG. 8, a strip-shaped conductive sheet having the Y direction as the longitudinal direction and the X direction as the short direction (width direction) is used as the substrate 10. The conductive substrate 10 also serves as the first electrode layer 1. That is, the base material 10 itself functions as the first electrode layer 1. Therefore, the base material 10 is connected to the probe and the terminal at the time of diagnosis or charge / discharge.

  As shown in FIG. 8, the battery formation region 11 is a band-like region with the Y direction as the longitudinal direction. Test structure forming regions 12 are provided on both sides of the belt-shaped battery forming region 11. That is, the test structure forming regions 12 are provided on the + X side and the −X side of the battery forming region 11 respectively. In FIG. 8, the test structure forming region 12 on the + X side is a test structure forming region 12a, and the test structure forming region 12 on the -X side is a test structure forming region 12b.

  A plurality of test structures 22 are arranged along the Y direction in each of the test structure forming regions 12a and 12b. For example, in the test structure forming region 12a on the + X side, a plurality of test structures 22a to 22h are formed in one row along the Y direction. Similarly, in the −X side test structure forming region 12b, a plurality of test structures 22a to 22h are formed in one row along the Y direction.

  In each of the test structure formation regions 12a and 12b, the test structure 22a, the test structure 22b, the test structure 22c, the test structure 22d, the test structure 22e, the test structure 22f, the test structure 22g, and the test structure The bodies 22h are arranged in order. That is, different types of test structures 22a to 22h are sequentially arranged in the Y direction.

  Further, in the test structure forming regions 12a and 12b on both sides, the same direction of the test structure 22 in the Y direction is the same. For example, the test structure 22a in the test structure formation region 12a is located at the Y-direction position with the test structure 22a in the test structure formation region 12b. Similarly, in the test structures 22b to 22h, the same kind of Y-direction position is the same in the test structure forming region 12a and the test structure forming region 12b.

  As shown in FIG. 8, the battery formation region 11 continues long in the Y direction. And the test structure 22 arrange | positioned on both sides of the part which evaluated the battery 21 is diagnosed. For example, the test structure 22 around the position in the Y direction where an abnormality has occurred in the performance evaluation of the battery 21 is diagnosed. By doing in this way, it can diagnose appropriately. Therefore, the same effect as in the first embodiment can be obtained. Further, the normal battery 21 is separated from the test structure forming regions 12a and 12b on both sides thereof.

  In FIG. 8, the test structure forming regions 12 a and 12 b are formed on both sides of the battery forming region 11. However, the test structure forming region 12 may be formed only on one side of the battery forming region 11. . That is, in FIG. 8, only the + X side test structure forming region 12a may be provided. In this case, the removal and separation of the test structure forming region 12 can be easily performed.

  In the fourth embodiment, an example in which all the layers of the battery 21 are continuously formed in the Y direction is shown. However, the second electrode layer 5 is separated in the Y direction and intermittently. It may be formed automatically. Furthermore, the second electrode layer 5 and the P-type semiconductor layer 4 may be separated intermittently in the Y direction. In this case, it is easy to identify an abnormal part of the battery 21, and it is easy to select the test structure 22 used for the evaluation. Moreover, when an abnormality is recognized in a part of the battery 21, the intermediate structure 400 may be cut in the X direction so as to remove the abnormal part.

  In the first to fourth embodiments described above, the configuration having both the same layer configuration test structure and the missing layer configuration test structure has been described. However, only the missing layer configuration test structure may be provided.

  In the above description, the configuration in which the N-type semiconductor layer 2, the charging layer 3, and the P-type semiconductor layer 4 are provided between the electrode layers of the battery 21 has been described. A layer other than the P-type semiconductor layer 4 may be provided. Even in this case, it is preferable to form a part of the layer between the electrodes of the battery 21 on the test structure 22. By doing so, the added functional layer can be diagnosed.

  As mentioned above, although embodiment of this invention was described, this invention includes the appropriate deformation | transformation which does not impair the objective and advantage, Furthermore, the limitation by said embodiment is not received.

DESCRIPTION OF SYMBOLS 1 1st electrode layer 2 N type semiconductor layer 3 Charging layer 4 P type semiconductor layer 5 2nd electrode layer 10 Base material 11 Battery formation area 12 Test structure formation area 21 Battery 22 Test structure 31 Battery 32 Test structure

Claims (15)

An intermediate structure for a secondary battery in which one or more secondary batteries and one or more test structures are provided on the same substrate,
The secondary battery and the test structure each include a first electrode layer and a second electrode layer,
In the secondary battery and the test structure, the first electrode layer is formed as an integral pattern,
The second electrode layer is separated between the secondary battery and the test structure,
In the secondary battery, a plurality of layers are laminated between the first electrode layer and the second electrode layer,
The plurality of layers include at least a metal oxide semiconductor layer and a charge layer,
In the test structure, a part of the plurality of layers is provided between the first electrode layer and the second electrode layer.
Intermediate structure for secondary battery. A plurality of the test structures are provided,
The intermediate structure for a secondary battery according to claim 1, wherein the second electrode layer is separated between the plurality of test structures.   3. The test structure according to claim 2, wherein the plurality of test structures include a test structure in which the charging layer is not provided between the first electrode layer and the second electrode layer. Intermediate structure for secondary battery.   The plurality of test structures include a test structure in which the charging layer between the first electrode layer and the second electrode layer is in contact with at least one of the first electrode layer and the second electrode layer. The intermediate structure for secondary batteries according to claim 2, wherein the intermediate structure for secondary batteries is included.   5. The intermediate structure for a secondary battery according to claim 2, wherein the second electrode layers of the plurality of test structures have the same shape in plan view.   6. The intermediate structure for a secondary battery according to claim 2, wherein a plurality of the test structures are provided adjacent to one secondary battery.   3. The test structures according to claim 2, wherein the plurality of test structures include test structures having different layer configurations disposed between the first electrode layer and the second electrode layer. The intermediate structure for secondary batteries of any one of -6. In the secondary battery, the layer configuration laminated between the first electrode layer and the second electrode layer is a two-layer configuration of the metal oxide semiconductor layer and the charging layer,
The plurality of test structures include
A test structure in which the charging layer is disposed between the first electrode layer and the second electrode layer;
A test structure in which the metal oxide semiconductor layer is disposed between the first electrode layer and the second electrode layer;
The secondary battery intermediate structure according to claim 7, wherein: The metal oxide semiconductor layer includes different first metal oxide semiconductor layers and second metal oxide semiconductor layers,
In the secondary battery, the first metal oxide semiconductor layer, the charging layer, and the second metal oxide semiconductor layer are disposed between the first electrode layer and the second electrode layer,
The plurality of test structures include
A test structure in which the first metal oxide semiconductor layer and the charging layer are disposed between the first electrode layer and the second electrode layer;
A test structure in which the charging layer and the second metal oxide semiconductor layer are disposed between the first electrode layer and the second electrode layer;
A test structure in which the charging layer is disposed between the first electrode layer and the second electrode layer;
A test structure in which the first metal oxide semiconductor layer and the second metal oxide semiconductor layer are disposed between the first electrode layer and the second electrode layer;
A test structure in which the first metal oxide semiconductor layer is disposed between the first electrode layer and the second electrode layer;
The intermediate structure for a secondary battery according to claim 7, further comprising: a test structure in which the second metal oxide semiconductor layer is disposed between the first electrode layer and the second electrode layer.   The intermediate structure for a secondary battery according to any one of claims 2 to 9, wherein the secondary battery and the test structure are provided on both surfaces of the base material. The test structure includes
Test in which the same layer configuration as the layer configuration laminated between the first electrode layer and the second electrode layer of the secondary battery is formed between the first electrode layer and the second electrode layer The intermediate structure for a secondary battery according to any one of claims 2 to 10, further comprising a structure. The intermediate structure for a secondary battery according to claim 1, wherein the base material has conductivity and serves also as the first electrode layer. Preparing an intermediate structure for a secondary battery according to any one of claims 1 to 12,
Measuring the electrical characteristics of the test structure. Further comprising a step of evaluating the performance of the secondary battery provided in the intermediate structure for the secondary battery,
The method of manufacturing a secondary battery according to claim 13, wherein a step of measuring electrical characteristics of the test structure is performed when performance of the secondary battery does not satisfy a predetermined standard.   The method of manufacturing a secondary battery according to claim 14, further comprising a step of separating the test structure from the secondary battery when the performance of the secondary battery satisfies a predetermined standard.

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