JP2016213253A - Through electrode substrate and interposer using through electrode substrate and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a highly reliable through electrode substrate and a manufacturing method therefor.SOLUTION: A through electrode substrate has a substrate having an upper surface, a lower surface, and a convex sidewall located in a through hole penetrating the upper and lower surfaces, and including a head, and a through electrode arranged in the through hole, and connecting the wiring arranged on the upper surface and the wiring arranged on the lower surface electrically. The heads facing each other may be provided at a position where the bore of the through hole is smaller than others. The interval of sidewalls facing each other may be narrower gradually from the upper and lower surfaces toward the head.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a through electrode substrate, an interposer using the through electrode substrate, and a semiconductor device. One disclosed embodiment relates to a shape of a side wall of a through hole formed in a through electrode substrate.

  In recent years, integrated circuits have become more miniaturized and complicated with higher performance of integrated circuits. In such an integrated circuit, a connection terminal for inputting a power supply and a logic signal necessary for circuit operation from an external device (chip) is arranged. However, the connection terminals on the integrated circuit are arranged at a very narrow pitch due to the miniaturization and complexity of the integrated circuit, which is several to several tens of times smaller than the pitch of the connection terminals of the chip.

  As described above, an interposer serving as an intermediary substrate for converting the pitch size of connection terminals is used when an integrated circuit and a chip having different connection terminal pitches are connected. In the interposer, an integrated circuit is mounted on the wiring arranged on one surface of the substrate, a chip is mounted on the wiring arranged on the other surface, and the wiring arranged on both sides of the substrate is connected to the substrate. They are connected by penetrating through electrodes.

  As interposers, TSV (Through-Silicon Via), which is a through electrode substrate using a silicon substrate, and TGV (Through-Glass Via), which is a through electrode substrate using a glass substrate, have been developed (for example, patents). Reference 1). In particular, in the case of TGV, for example, it can be manufactured using a large glass substrate having a vertical and horizontal size of 730 mm × 920 mm called the 4.5th generation, which is advantageous in that the manufacturing cost can be reduced. is there. Moreover, in the case of TGV, it is advantageous at the point which can expand | deploy to the components using the transparency which is the characteristic of a glass substrate.

JP 2013-110347 A

  However, when the aspect ratio of the through hole (hole depth with respect to the hole diameter) in TSV or TGV increases with the miniaturization and complexity of the integrated circuit, it is used for the embedding property of the through electrode filled in the through hole or the through electrode. As a result, the throwing power of the thin film is deteriorated. If the penetrating property of the through electrode or the throwing power of the through electrode is deteriorated, it becomes impossible to ensure electrical connection between the wirings arranged on both surfaces of the substrate. Or even if it is a case where the electrical connection of the said wiring is barely ensured, a penetration electrode will be able to be formed only in the one part area | region of a through-hole. In such a case, current concentrates on the through electrode formed in a partial region of the through hole, which causes problems such as destruction of the through electrode due to excessive self-heating. In other words, as described above, when the penetrating electrode is poorly embedded or attached, the reliability of the penetrating electrode substrate deteriorates.

  The present invention has been made in view of such a problem, and an object thereof is to provide a highly reliable through electrode substrate.

  A through electrode substrate according to an embodiment of the present invention is located in a through hole penetrating an upper surface, a lower surface, and an upper surface and a lower surface, and is disposed in the through hole. And a through electrode that electrically connects the wiring arranged on the upper surface side and the wiring arranged on the lower surface side.

  According to the above-described through electrode substrate, it is possible to obtain good coverage of the through electrode with respect to the through hole.

  Moreover, in another aspect, the top parts which mutually oppose may be provided in the position where the hole diameter of a through-hole is smaller than another.

  According to the above-described through electrode substrate, it is possible to obtain good coverage of the through electrode with respect to the through hole.

  Moreover, in another aspect, the space | interval of the mutually opposing side wall may become narrow gradually toward the crown from the upper surface and the lower surface.

  According to the above-described through-electrode substrate, it is possible to obtain good coverage of the through-electrode with respect to the through-hole, and it is possible to reliably connect the wiring arranged on the upper surface and the wiring arranged on the lower surface.

  In another aspect, the side wall may have a linear shape.

  According to the above-described through-electrode substrate, it is possible to obtain good coverage of the through-electrode with respect to the through-hole, and it is possible to suppress unevenness in the thickness of the through-electrode due to the position of the side wall of the through-hole.

  In another aspect, the side wall may have a concave shape from the open end of the through hole toward the crown.

  According to the above-described through electrode substrate, the through electrode material can be easily formed on the side wall near the top where the through electrode material is difficult to reach.

  In another aspect, the side wall may have a convex shape from the open end of the through hole toward the top of the head.

  According to the above through electrode substrate, the through electrode material flying from one side of the substrate can be more easily deposited on the other side of the substrate than the top part beyond the top part.

Further, in another aspect, the opening of the through hole on the side facing the reference point from the reference point positioned at the corner of the square symmetrical in the vertical direction with reference to the line segment of the length L1 connecting the tops facing each other. A first tangent line that extends through a first contact point that is positioned at the end and has a vertical distance L2 from the reference point, and extends in a direction opposite to the first tangent line from the reference point in plan view, and has a side wall or an open end Assuming that the second tangent line passing through the second contact point located in the section, the angle θ ₁ with respect to the vertical direction of the first tangent line and the angle θ ₂ with respect to the vertical direction of the second tangent line are θ ₁ + θ ₂ ≧ 26.5 °
Each angle may be set so as to satisfy the following relationship.

  According to said through-electrode board | substrate, the expansion of the opening edge part of a through-hole can be suppressed, obtaining the favorable covering property of the through-electrode with respect to a through-hole.

Moreover, in another aspect, it is located in the opening edge part of the through-hole on the side which opposes a parietal part from the parietal part which mutually opposes apart by the distance L1, and the distance of the perpendicular direction from a parietal part is L2. Assuming a first tangent extending through one contact and a second tangent extending in a direction opposite to the first tangent from the top in a plan view and passing through a second contact located at a side wall or an open end, The angle θ ₁ with respect to the vertical direction of the first tangent and the angle θ ₂ with respect to the vertical direction of the second tangent are θ ₁ + θ ₂ ≧ 26.5 °
Each angle may be set so as to satisfy the following relationship.

  According to said through-electrode board | substrate, the expansion of the opening edge part of a through-hole can be suppressed, obtaining the favorable covering property of the through-electrode with respect to a through-hole.

A through electrode substrate according to an embodiment of the present invention is disposed in a through hole penetrating the upper surface, the lower surface, and the upper surface and the lower surface, and is disposed in the through hole and a substrate having a convex side wall. A through electrode substrate having a through electrode electrically connecting the wiring arranged on the lower surface side and the wiring arranged on the lower surface side, and a line segment indicating a portion where the hole diameter of the through hole is the smallest in a plan view A first tangent line that is in contact with the inside of the through hole on the side facing the reference point, and a reference point that extends in the opposite direction from the reference point in plan view Assuming that the second tangent is in contact with the inside of the through hole, the angle θ ₁ with respect to the vertical direction of the first tangent and the angle θ ₂ with respect to the vertical direction of the second tangent are θ ₁ + θ ₂ ≧ 26.5 °
Meet.

  According to the above-described through electrode substrate, it is possible to obtain good coverage of the through electrode with respect to the through hole.

A through electrode substrate according to an embodiment of the present invention is disposed in a through hole penetrating the upper surface, the lower surface, and the upper surface and the lower surface, and is disposed in the through hole and a substrate having a convex side wall. A through electrode substrate having a through electrode electrically connecting the wiring arranged on the lower surface side and the wiring arranged on the lower surface side, and one end of a line segment indicating a position where the hole diameter of the through hole is the smallest in plan view A first tangent that is in contact with the inside of the through hole on the side facing the reference point from the reference point, a second tangent that extends in a direction opposite to the first tangent from the reference point in plan view and is in contact with the inside of the through hole, Assuming that the angle θ ₁ with respect to the vertical direction of the first tangent and the angle θ ₂ with respect to the vertical direction of the second tangent are θ ₁ + θ ₂ ≧ 26.5 °
Meet.

  According to the above-described through electrode substrate, it is possible to obtain good coverage of the through electrode with respect to the through hole.

  An interposer according to an embodiment of the present invention is arranged on the lower electrode side of the through electrode substrate, the first wiring structure connected to the wiring arranged on the upper surface side of the through electrode substrate, and the through electrode substrate. A second wiring structure connected to the wiring.

  According to the above interposer, good throwing power of the through electrode with respect to the through hole can be obtained.

  A semiconductor device according to an embodiment of the present invention includes the above-described through electrode substrate and another substrate or a chip arranged side by side with the through electrode substrate.

  According to the above semiconductor device, it is possible to obtain a good throwing power of the through electrode with respect to the through hole.

  In the method for manufacturing a through electrode substrate according to an embodiment of the present invention, an altered layer having a diameter that decreases from the upper surface and the lower surface toward the inside of the substrate is formed on a substrate having an upper surface and a lower surface, and the altered layer is etched. A through hole surrounded by a first sidewall on the upper surface side and a second sidewall on the lower surface side is formed, a first seed layer is formed on the first sidewall from the upper surface side, and a second seed layer is formed on the second sidewall from the lower surface side. A plating layer is formed on the first seed layer and the second seed layer.

  According to the above method for manufacturing a through electrode substrate, the throwing power of the seed layer with respect to the side wall inside the through hole can be improved.

  In another embodiment, the first seed layer and the second seed layer may be formed by a sputtering method.

  According to the above method for manufacturing the through electrode substrate, the seed layer can be formed using a conventional film forming apparatus and film forming process.

  In another aspect, a through hole is formed between the first side wall and the second side wall so that a top portion protruding from the other region is provided, and the first seed layer is located on the upper surface side of the top portion. The first seed portion is formed, the second seed layer is formed to the second end portion on the lower surface side than the top portion, and the plating layer is formed from each of the first end portion and the second end portion toward the top portion. May be.

  According to the above method for manufacturing a through electrode substrate, it is possible to obtain a through electrode that stably connects the upper and lower electrodes to a through hole having a high aspect ratio.

  According to the present invention, a highly reliable through electrode substrate can be provided.

It is a top view showing an outline of a penetration electrode substrate concerning one embodiment of the present invention. It is A-A 'sectional drawing of the penetration electrode substrate concerning one embodiment of the present invention. In the penetration electrode substrate concerning one embodiment of the present invention, it is a sectional view for explaining the shape of a side wall. In the penetration electrode substrate concerning one embodiment of the present invention, it is a sectional view showing the process of forming a seed layer from one side of a penetration electrode substrate. FIG. 5 is a cross-sectional view showing a step of forming a seed layer from the other surface side of the through electrode substrate in the through electrode substrate according to one embodiment of the present invention. In the penetration electrode substrate concerning one embodiment of the present invention, it is a sectional view showing the process of forming a plating layer on a seed layer. In the penetration electrode substrate concerning one embodiment of the present invention, it is a sectional view showing the state where the penetration electrode was completed. In the penetration electrode substrate concerning one embodiment of the present invention, it is a sectional view for explaining the shape of a side wall. It is sectional drawing of the penetration electrode substrate which concerns on the modification of one Embodiment of this invention. It is sectional drawing of the penetration electrode substrate which concerns on the other modification of one Embodiment of this invention. FIG. 11 is a cross-sectional view for explaining the shape of the side wall in the through electrode substrate shown in FIG. 10. It is a top view which shows the outline | summary of the interposer which concerns on one Embodiment of this invention. It is a B-B 'sectional view of an interposer concerning one embodiment of the present invention. It is sectional drawing which shows the process of irradiating a laser beam inside a board | substrate in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is sectional drawing which shows the process of forming a quality-change area | region in a board | substrate in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is sectional drawing which shows the process of etching the denatured area | region of a board | substrate using a chemical | medical solution in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is sectional drawing which shows the process of forming a through-hole in a board | substrate in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is sectional drawing which shows the process of forming a seed layer in the inside of a through-hole from the one surface side of a board | substrate in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is sectional drawing which shows the process of forming a seed layer in the inside of a through-hole from the other surface side of a board | substrate in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is sectional drawing which shows the process of forming a plating layer on a seed layer in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is sectional drawing which shows the process of removing a resist mask in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is sectional drawing which shows the process of etching the seed layer exposed from the plating layer in the manufacturing method of the interposer which concerns on one Embodiment of this invention. In the manufacturing method of the interposer concerning one embodiment of the present invention, it is a sectional view showing the process of forming the insulating layer provided with the opening which exposes the wiring formed in the upper surface of the penetration electrode substrate. It is sectional drawing which shows the process of forming a seed layer on the wiring exposed to the insulating layer and opening part in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is sectional drawing which shows the process of forming a plating layer on a seed layer in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is sectional drawing which shows the process of removing the resist mask on a seed layer in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is sectional drawing which shows the process of etching the seed layer exposed from the plating layer in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is sectional drawing which shows the process of forming the insulating layer provided with the opening part which exposes the wiring formed in the lower surface of the penetration electrode board | substrate in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is sectional drawing which shows the process of forming a seed layer and a plating layer in the lower surface side of a penetration electrode board | substrate in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is a sectional view showing a semiconductor device using a penetration electrode substrate concerning one embodiment of the present invention. It is sectional drawing which shows another example of the semiconductor device using the penetration electrode substrate which concerns on one Embodiment of this invention. It is sectional drawing which shows another example of the semiconductor device using the penetration electrode substrate concerning one embodiment of the present invention. It is a figure explaining the shape of the through-hole of the penetration electrode substrate used for Example 1 thru / or Example 3, and the definition of each parameter. It is a figure explaining the shape of the through-hole of the penetration electrode substrate used for Example 4 thru / or Example 6, and the definition of each parameter. It is sectional drawing which shows the throwing power of the thin film of the seed layer formed by sputtering method in the conventional penetration electrode substrate.

  Hereinafter, a through electrode substrate, a manufacturing method of a through electrode substrate, an interposer using the through electrode substrate, and a semiconductor device according to the present invention will be described with reference to the drawings. However, the through electrode substrate, the manufacturing method of the through electrode substrate, the interposer and the semiconductor device using the through electrode substrate of the present invention can be implemented in many different modes, and the description of the embodiments described below It is not construed as limited to. Note that in the drawings referred to in this embodiment, the same portions or portions having similar functions are denoted by the same reference numerals, and repetitive description thereof is omitted. In addition, for convenience of explanation, the description will be made using the terms “upper” or “lower”, but the vertical direction may be reversed.

<Embodiment 1>
1 to 8, the configuration of the through electrode substrate 10 according to the first embodiment of the present invention, the shape of the side wall 120 of the through electrode substrate 10, the reference point 320, and the method for deriving the angles θ ₁ and θ ₂ explain.

[Configuration of Through Electrode Substrate 10]
The configuration of the through electrode substrate 10 will be described with reference to FIGS. 1 and 2. FIG. 1 is a plan view showing an outline of a through electrode substrate according to an embodiment of the present invention. FIG. 2 is a cross-sectional view taken along the line AA ′ of the through electrode substrate according to the embodiment of the present invention. As shown in FIG. 1, in the through electrode substrate 10 according to Embodiment 1 of the present invention, a through hole 110 is provided in the substrate 100. As shown in FIG. 2, the through electrode substrate 10 includes a substrate 100 and a through electrode 200.

  The substrate 100 has an upper surface 102 and a lower surface 104. Further, the substrate 100 is provided with a through hole 110 penetrating the upper surface 102 and the lower surface 104, and the substrate 100 has a side wall 120 connecting the upper surface 102 and the lower surface 104 inside the through hole 110.

  The side wall 120 protrudes from the opening end 126 of the through-hole 110 in a direction parallel to the upper surface 102 of the substrate 100 (the planar direction of the substrate 100), and has a convex shape 122 having a top portion 124. In other words, the hole diameter of the through hole 110 has a linear shape that gradually decreases from the upper surface 102 or the lower surface 104 toward the crown portion 124. In other words, the interval between the side walls 120 facing each other gradually decreases from the upper surface 102 and the lower surface 104 toward the top portion 124.

  The hole diameter of the through-hole 110 in the top part 124 of the convex shape 122 is smaller than other places. That is, the head top portions 124 facing each other are provided at positions where the hole diameter of the through hole 110 is smaller than other portions. In the through hole 110 shown in FIG. 1, the top portion 124 corresponds to the smallest hole diameter (inner diameter) in the through hole 110 in plan view. Here, in FIG. 2, the structure showing one point where the crown portion 124 exists is illustrated, but the structure is not limited to this structure. For example, as will be described later, a region where the side walls 120 facing each other are parallel can also be referred to as a top portion 124.

  The through electrode 200 is disposed in the through hole 110 and electrically connects the wiring 210 disposed on the upper surface 102 and the wiring 220 disposed on the lower surface 104. In the through electrode substrate 10, the through electrode 200 has a seed layer 202 and a plating layer 204. Similar to the through electrode 200, the wiring 210 includes a seed layer 212 and a plating layer 214. The wiring 220 has a seed layer 222 and a plating layer 224.

  In FIG. 2, the thickness of the seed layer 202 and the plating layer 204 is gradually reduced from the opening end 126 toward the top portion 124. The seed layer 202 formed on each of the side wall 120 on the upper surface 102 side and the side wall 120 on the lower surface 104 side may be connected at the top portion 124, or conversely, may be interrupted near the top portion 124. On the other hand, the plating layer 204 formed on each of the side wall 120 on the upper surface 102 side and the side wall 120 on the lower surface 104 side is connected to each other at the top portion 124. That is, the plating layer 204 is formed with a certain thickness at the top portion 124.

[Shape of the side wall 120 of the through electrode substrate 10]
The shape of the side wall 120 (the shape of the through hole 110) for obtaining the through electrode 200 that stably connects the wiring 210 and the wiring 220 will be described with reference to FIG. That is, the conditions of the side wall 120 for obtaining good throwing power of the through electrode 200 will be described.

  First, in the through-hole 110, a square 300 that is symmetrical in the vertical direction is assumed with reference to a line segment 310 having a length L1 that connects the top portions 124 facing each other. The length of one side of the square 300 is L1. Next, one corner of the square 300 is defined as the reference point 320. Of the straight lines extending from the reference point 320 to the outside of the through hole 110, that is, from the reference point 320 toward the opposite direction of the crown portion 124, the opening end 126 on the side wall 120 facing the reference point 320 of the through hole 110. A first tangent line 340 is defined that extends through the first contact 330 located at. In other words, the first tangent 340 may be in contact with the inside of the through hole 110 on the side wall 120 facing the reference point 320 from the reference point 320. Here, the vertical distance between the first contact 330 and the reference point 320 is L2.

  In addition, as shown in FIG. 1, a second tangent line 370 is defined that extends from the reference point 320 in a direction opposite to the first tangent line 340 and passes through the second contact 360 located at the opening end portion 126 in plan view. In other words, it can be said that the second tangent line 370 extends in the opposite direction to the first tangent line 340 in a plan view and contacts the inside of the through hole 110. In the above description, the opening end 126 of the through hole 110 is indicated as the inside of the through hole 110, but the present invention is not limited to this. For example, as will be described later, the inside of the through hole 110 may be the side wall 120.

As described above, the angle of the first tangent 340 with respect to the vertical direction 350 is defined as θ _1, and the angle of the second tangent 370 with respect to the vertical direction 350 is defined as θ ₂ . These angles θ ₁ and θ ₂ are such that when the seed layer 202 is formed by a film forming method such as a sputtering method, the sputtering atoms incident from the oblique direction with respect to the through hole 110 reach the reference point 320. It corresponds to the angle to obtain.

When the angle θ ₁ and the angle θ ₂ are small and the aspect ratio (ratio of the depth of the through hole 110 to the hole diameter of the through hole 110) is excessively large, the throwing power of the seed layer 202 is deteriorated. That is, it is difficult to obtain a stable electrical connection between the wiring 210 and the wiring 220 (hereinafter referred to as “stable electrical connection between the upper and lower wirings”), and in the worst case, the wiring 210 and the wiring 220 are in an insulated state. End up. Therefore, in order to ensure stable electrical connection between the upper and lower wirings, the sum of the angle θ ₁ and the angle θ ₂ needs to be a certain angle or more. On the other hand, when the angle θ ₁ and the angle θ ₂ are large, the hole diameters of the through holes 110 in the upper surface 102 and the lower surface 104 are increased. That is, the aspect ratio becomes small and it becomes difficult to form a fine pattern. Therefore, in order to realize miniaturization in addition to stable electrical connection of the upper and lower wirings, it is preferable to set the angle θ ₁ and the angle θ ₂ within a certain range.

Therefore, as a result of the intensive study of the stable electrical connection and miniaturization of the upper and lower wirings by the inventors, the angle θ ₁ and the angle θ ₂ are set to the ranges shown below, so that the stable electrical connection of the upper and lower wirings can be achieved. It has been found that both connection and miniaturization can be realized. That is, it has been found that a through hole having a high aspect ratio in which the through electrode material has a good throwing power can be obtained. More specifically, the angle theta ₁ and the angle theta ₂ to be able to achieve a stable electrical connection of the upper and lower wiring by the range shown in Equation 1], the angle theta ₁ and the angle theta ₂ Number By making the range shown in 2], further miniaturization can be realized. Here, for the purpose of realizing stable electrical connection between the upper and lower wirings, at least the angle θ ₁ and the angle θ ₂ may be in the range shown in [Equation 1].

[Equation 1]
θ ₁ + θ ₂ ≧ 26.5 °
[Equation 2]
θα ≦ θ ₁ <26.5 °

Here, θα is expressed by the following equation using a distance L1 between the tops 124 facing each other and a vertical distance L2 between the reference point 320 and the first contact 330.
[Equation 3]
θα = tan ⁻¹ (L1 / L2)

  Note that the line segment 310 is a distance between the side walls 120 facing each other (on the substrate 100) in any cross section including the center of the through hole 110 in plan view (or the center of the annular shape drawn by the top portion 124 in plan view). The distance in the plane direction) may correspond to a line segment at a position shorter than the others. Alternatively, the line segment 310 corresponds to a line segment that passes through the center of the parietal portion 124 drawn in an annular shape in plan view and connects the parietal portions 124 that are opposed to each other with the center as a reference, and is shorter than the other line segments. Also good. Alternatively, the line segment 310 may correspond to a line segment indicating a distance of a portion having the narrowest hole diameter in an arbitrary cross section including the center of the through hole 110 in plan view.

  Further, a square 300 that is symmetrical in the vertical direction with respect to the line segment 310 is said to penetrate the square 300 in the left-right direction (the surface direction of the substrate 100) so that the line segment 310 bisects the area of the square 300. You can also. Alternatively, it can be said that the square 300 is divided by the line segment 310 into a rectangle having a long side length L1 and a short side length (L1) / 2.

  Here, in the plan view shown in FIG. 1, the first tangent line 340 overlaps the line segment 310 described above. However, the first tangent line 340 and the line segment 310 are not necessarily overlapped in plan view, and the first tangent line 340 may be defined so as to be shifted from the line segment 310. 3 illustrates a structure in which the first contact 330 is located near the boundary between the lower surface 104 and the side wall 120, the present invention is not limited to this structure. The first contact 330 may be defined on the side wall 120 facing the side wall 120 on the side where the reference point 320 is defined. In FIG. 3, the first tangent line 340 extending from the reference point 320 positioned on the lower surface 104 side to the top 124 to the first contact 330 positioned on the opening end 126 on the lower surface 104 side is illustrated, but the upper surface 102 side is illustrated. The reference point, the contact point, and the tangent line can be defined in the same manner as described above.

[Regarding the reference point 320]
The reference point 320 of the through electrode substrate 10 will be described with reference to FIGS. Here, for convenience of description of the reference point 320, a case where a through electrode is formed in a through hole 110A having a shape different from the through hole 110 shown in FIG. However, the distance between the tops 124 </ b> A of the through-holes 110 </ b> A facing each other is L <b> 1 like the through-holes 110. 4 and 5 are cross-sectional views illustrating a process of forming a seed layer from one side and the other side of the through electrode substrate in the through electrode substrate according to the embodiment of the present invention. FIG. 6 is a cross-sectional view showing a step of forming a plating layer on the seed layer in the through electrode substrate according to one embodiment of the present invention. FIG. 7 is a cross-sectional view showing a state where the through electrode is completed in the through electrode substrate according to the embodiment of the present invention.

  As shown in FIG. 4, seed layers 202 </ b> A and 222 are formed on the substrate 100 with the through holes 110 </ b> A by sputtering from the lower surface 104 side. The seed layers 202A and 222 are formed on the side wall 120A and the lower surface 104 on the lower surface 104 side of the through hole 110A. In the cross-sectional view shown in FIG. 4, the seed layer 202 </ b> A is formed up to the seed layer end 229.

  Next, as shown in FIG. 5, seed layers 202 </ b> B and 212 are formed on the substrate 100 with the through holes 110 </ b> A by sputtering from the upper surface 102 side. The seed layers 202B and 212 are formed on the side wall 120B and the upper surface 102 on the upper surface 102 side of the through hole 110A. In the cross-sectional view shown in FIG. 5, the seed layer 202 </ b> B is formed up to the seed layer end 228.

  Next, plating layers 204 (204A and 204B), 214, and 224 are formed on the seed layers 202 (202A and 202B), 212, and 222 as shown in FIG. The plating layers 204, 214, and 224 are formed by an electrolytic plating method in which the seed layers 202, 212, and 222 are energized. The plating layers 204, 214, 224 are isotropically formed from the seed layers 202, 212, 222. That is, the plating layer 204A is isotropically formed in the D1 direction and the D2 direction from the seed layer end portion 229, and the plating layer 204B is formed isotropically in the D3 direction and the D4 direction from the seed layer end portion 228. In addition, since the seed layer end portions 228 and 229 have a thin seed layer thickness, the resistance value in the surface direction of the side walls 120A and 120B is high, and the formation speed is particularly slow at the initial stage of plating formation. Therefore, the formation speed of the plating layers 204A and 204B starting from the seed layer end portions 228 and 229 is the formation speed of the plating layers 214 and 224 starting from the seed layers 212 and 222 formed on the upper surface 102 and the lower surface 104, respectively. Slower than

  Here, the plating layer 204A advances in the D1 direction and reaches the plating layer 204A growing from the side wall 120A facing the seed layer end 229, and the plating layer 204B advances in the D3 direction and faces the seed layer end 228. When reaching the plating layer 204B grown from 120B, the through hole 110A is blocked by the plating layers 204A and 204B. If the through hole 110 </ b> A is blocked by the plating layer 204, no new plating solution is supplied to the inside of the portion blocked by the plating layer 204, and the growth of the plating layer 204 does not proceed.

  Here, in order to obtain the through electrode 200 that realizes stable electrical connection between the upper and lower wirings, before the through hole 110A is blocked by the plating layer 204 as described above, the seed layer end portion 229 is connected to D2. The plating layer 204A that grows in the direction needs to be connected to the plating layer 204B that grows in the direction D4 from the seed layer end 228. That is, the distance between the seed layer end portions 228 and 229 needs to be L1 or less. In other words, when the positions of the seed layer end portions 228 and 229 coincide with the position of the reference point 320 shown in FIG. 3, or the positions of the seed layer end portions 228 and 229 are located on the top portion 124 side of the reference point 320. In addition, the plating layer 204A and the plating layer 204B can be connected before the through hole 110A is blocked by the plating layer 204.

  By forming at least the seed layer 202 up to the reference point 320 as described above, it is possible to obtain the through electrode 200 that realizes stable electrical connection between the upper and lower wirings as shown in FIG. Here, as shown in FIGS. 4 to 7, when the tops 124 </ b> A of the side walls 120 </ b> A and 120 </ b> B facing each other are parallel, the line segment 310 is assumed to be located at the midpoint of the parallel tops 124. Also good.

[Derivation method of angle θ ₁ and angle θ ₂ ]
A method for deriving the angle θ ₁ and the angle θ _{2 in} the above [Equation 1] and [Equation 2] will be described. Here, FIG. 35 shows a cross-sectional view showing the throwing power of the thin film of the seed layer formed by the sputtering method in the conventional through electrode substrate. As shown in FIG. 35, when seed layers 912 and 922 are formed using a general sputtering method for a conventional through-hole 910 orthogonal to the upper surface 902 and the lower surface 904 of the substrate 900, depending on the film formation conditions. It is known that the depth L4 of the seed layer end portion 929 where the seed layers 912 and 922 are formed is approximately twice as large as the hole diameter L3 of the through hole 910, although there is some variation. In other words, it has been found that according to a general sputtering method, a throwing power with an aspect ratio of 2 is obtained. In FIG. 35, the angle θ ₂ α with respect to the vertical direction of the line corresponding to the tangent of the present invention can be obtained from the following equation.

[Equation 4]
θ ₂ α = tan ⁻¹ (1/2) ≈26.5 °

That is, in a general sputtering method, sputtering atoms (film formation material) having various angles with respect to the substrate fly, but the film formation end (film formation limit) in the through hole is limited by the above conditions. . That is, in order to allow sputtering atoms to reach a reference point inside the through hole, an angle formed by two tangents extending from the reference point to two opening ends facing each other (for example, θ ₁ + θ ₂ shown in FIG. 3) May be 26.5 ° or more. Here, in order to obtain an aspect ratio higher than that of the conventional structure, it is preferable that at least θ ₁ be less than 26.5 °. Similarly, in order to obtain a high aspect ratio, it is preferable that θ ₁ be greater than or equal to θα.

  As described above, according to the through electrode substrate 10 according to the first embodiment of the present invention, since the through electrode 200 that realizes stable electrical connection between the upper and lower wirings can be obtained, a highly reliable through electrode substrate is provided. can do.

FIG. 8 is a cross-sectional view for explaining the shape of the side wall in the through electrode substrate according to the embodiment of the present invention. In FIG. 3, the angle θ ₁ and the angle θ ₂ are derived based on the reference point 320 of the corner of the square 300. On the other hand, in FIG. 8, the first tangent line 340 extends from the top portion 124 through the first contact 330, and the second tangent line 370 extends from the top portion 124 through the second contact 360. In FIG. 8, the second tangent line 370 extends along the side wall 120 from the top 124 to the opening end 126, but the second contact 360 is defined at the opening end 126.

As shown in FIG. 8, the angle θ ₁ and the angle θ ₂ are derived based on the top portion 124, so that the seed layer 202 can be formed up to the top portion 124. A connection can be obtained. Here, in FIG. 8, the structure showing one point with the top portion 124 is illustrated, but the structure is not limited to this. For example, as shown in FIGS. 4 to 7, a region where the side walls 120 facing each other are parallel can also be referred to as a top portion 124. As shown in FIGS. 4 to 7, when the tops 124A of the side walls 120A and 120B facing each other are parallel, the first tangent 340 and the second tangent 370 are respectively the midpoints (reference points) of the parallel tops 124. ) And the first contact 330 and the second contact 360.

<Modification of Embodiment 1>
A modification of the first embodiment will be described with reference to FIGS. 9 to 11. In the modification of the first embodiment, a method for deriving the shape of the side wall 120 and the angles θ ₁ and θ ₂ different from the first embodiment will be described.

  FIG. 9 is a cross-sectional view of a through electrode substrate according to a modification of one embodiment of the present invention. As shown in FIG. 9, the side wall 120 </ b> C of the through electrode substrate 11 has a concave shape in the direction of the through hole 110 </ b> C from the opening end portion 126 </ b> C toward the top portion 124 </ b> C. That is, the inclination angle with respect to the vertical direction of the side wall 120C increases from the opening end portion 126C toward the crown portion 124C. Since the through-electrode substrate 11 has the side wall 120C as shown in FIG. 9, sputtering atoms are easily formed on the side wall 120C in the vicinity of the top portion 124C where sputtering atoms are difficult to reach. Some of the sputtering atoms that have a very high degree of straightness with respect to the through-hole 110C pass through the through-hole 110C, but according to the through-electrode substrate 11, the side wall 120C near the top portion 124C is inclined with respect to the vertical direction. Since the angle is large, the above-described sputtering atoms having high straightness can be deposited on the side wall 120C near the top portion 124C. Accordingly, since the seed layer 202C on the upper surface 102C side and the seed layer 202D on the lower surface 104 side can be brought close to each other, more stable electrical connection between the upper and lower wirings can be obtained.

  FIG. 10 is a cross-sectional view of a through electrode substrate according to another modification of the embodiment of the present invention. As shown in FIG. 10, the side wall 120E of the through electrode substrate 12 has a convex shape in the direction of the inside of the through hole 110E from the open end 126E toward the top 124E. That is, the inclination angle with respect to the vertical direction of the side wall 120E becomes smaller from the opening end portion 126E toward the crown portion 124E. In the through electrode substrate 12, seed layers 202E and 202F are also formed in the vicinity of the top portion 124E. Since the through electrode substrate 12 has the side wall 120E as shown in FIG. 10, for example, sputtering atoms flying from the upper surface 102 side are more easily deposited on the lower surface 104E side than the top portion 124E beyond the top portion 124E. Therefore, the seed layer 202E and the seed layer 202F are prevented from being interrupted at the top portion 124E, and the seed layers 202E and 202F can be formed in the vicinity of the top portion 124E.

  FIG. 11 is a cross-sectional view for explaining the shape of the sidewall in the through electrode substrate shown in FIG. In FIG. 3, the second contact 360 is located at the open end 126. On the other hand, in FIG. 11, the second contact 360G is located on the side wall 120G. Even in the case shown in FIG. 11, first, in the through hole 110G, a square 300G that is symmetrical in the vertical direction is assumed with reference to a line segment 310G having a length L5 that connects the tops 124G facing each other. The length of one side of the square 300G is L5. Next, one corner of the square 300G is defined as the reference point 320G.

Of the straight lines extending from the reference point 320G to the outside of the through hole 110G, that is, from the reference point 320G in the opposite direction of the top portion 124G, the opening end 126G on the side wall 120G facing the reference point 320G of the through hole 110G. A first tangent line 340G extending through the first contact 330G located at is defined. Here, the vertical distance between the first contact 330G and the reference point 320G is L6. Similarly to the first embodiment shown in FIG. 3, a second tangent line 370G extending from the reference point 320G in the opposite direction to the first tangent line 340G in plan view and passing through the second contact 360G positioned on the side wall 120G is defined. The angle of the first tangent 340G with respect to the vertical direction 350G is defined as θ _1, and the angle of the second tangent 370G with respect to the vertical direction 350G is defined as θ ₂ .

  As described above, the second contact 360G may be located not only on the opening end 126G but also on the side wall 120G. Similarly to the second contact 360G, the first contact 330G is not limited to the opening end 126G, and may be located on the side wall 120G.

  A configuration and a manufacturing method of the interposer 20 according to the second embodiment of the present invention will be described with reference to FIGS. In the second embodiment, an example in which the through electrode substrate 10 described in the first embodiment is used as the through electrode substrate of the interposer 20 will be described.

  FIG. 12 is a plan view showing an outline of an interposer according to an embodiment of the present invention. FIG. 13 is a B-B ′ sectional view of an interposer according to an embodiment of the present invention. As shown in FIGS. 12 and 13, the interposer 20 according to the second embodiment of the present invention has an upper surface 501 and a lower surface 502, and a substrate 500 provided with a through hole 520 that penetrates the upper surface 501 and the lower surface 502. The through-hole electrode 520 is disposed inside the through-hole 520 and connects the upper surface 501 and the lower surface 502.

  In FIG. 13, the through electrode 510 includes a seed layer 511 and a plating layer 512, the seed layer 511 is disposed on the side wall 504 of the through hole 520, and the plating layer 512 is disposed on the seed layer 511. When the plating layer 512 is formed by an electrolytic plating method, the plating layer 512 is formed by energizing the seed layer 511. The seed layer 511 is formed using a material that suppresses the diffusion of the plating layer 512 into the substrate 100. Similar to the through hole 110 shown in FIG. 2, the through hole 520 has a shape in which the hole diameter gradually decreases from the open end 506 of the through hole 520 toward the top 508 provided on the side wall 504. As the shape of the through hole 520, the shape of the through hole 110A shown in FIG. 7, the through hole 110C shown in FIG. 9, or the through hole 110E shown in FIG. 10 can be applied.

  A first insulating layer 540 and a first wiring 550 are disposed on the upper surface 501 side of the substrate 500. The first insulating layer 540 is provided with an opening 541 that is disposed on the upper surface 501 of the substrate 500 and a part of the through electrode 510 and exposes a part of the through electrode 510. That is, the first insulating layer 540 is arranged so that at least a part thereof is in contact with the through electrode 510 and the other part is exposed to the outside. The first wiring 550 is disposed on the first insulating layer 540 and inside the opening 541 and is electrically connected to the through electrode 510. The first wiring 550 includes a seed layer 551 disposed on the first insulating layer 540 and the through electrode 510, and a plating layer 552 disposed on the seed layer 551. Here, the first insulating layer 540 and the first wiring 550 can also be referred to as a first wiring structure.

  Further, the second insulating layer 560 and the second wiring 570 are also arranged on the lower surface 502 side of the substrate 500 as in the upper surface 501 side. The second insulating layer 560 is provided with an opening 561 that is disposed on the lower surface 502 of the substrate 500 and a part of the through electrode 510 and exposes a part of the through electrode 510. That is, the second insulating layer 560 is disposed so that at least a part thereof is in contact with the through electrode 510 and the other part is exposed to the outside. The second wiring 570 is disposed on the second insulating layer 560 and inside the opening 561 and is electrically connected to the through electrode 510. The second wiring 570 includes a seed layer 571 disposed on the second insulating layer 560 and the through electrode 510, and a plating layer 572 disposed on the seed layer 571. Here, the second insulating layer 560 and the second wiring 570 can also be referred to as a second wiring structure.

As the substrate 500, a glass substrate can be used. In addition to a glass substrate, an insulating substrate such as a quartz substrate, a sapphire substrate, or a resin substrate, a semiconductor substrate such as a silicon substrate, a silicon carbide substrate, or a compound semiconductor substrate, or a conductive substrate such as a stainless steel substrate can be used. . As a material used for the substrate, a material having a thermal expansion coefficient in the range of 2 × 10 ⁻⁶ [/ K] or more and 17 × 10 ⁻⁶ [/ K] or less can be used. Moreover, these may be laminated. Although there is no restriction | limiting in particular in the thickness of the board | substrate 500, For example, the board | substrate with a thickness of 100 micrometers or more and 800 micrometers or less can be used. The thickness of the substrate 100 is more preferably 200 μm or more and 400 μm or less. When the substrate becomes thinner than the lower limit of the thickness of the substrate, the deflection of the substrate increases. As a result, handling in the manufacturing process becomes difficult, and the substrate is warped by an internal stress such as a thin film formed on the substrate. Further, when the substrate becomes thicker than the upper limit of the thickness of the substrate, the process of forming the through hole becomes longer. As a result, the manufacturing process becomes longer and the manufacturing cost also increases.

  The seed layer 511 can be formed using a conductive material having good adhesion with the base substrate 500. For example, it is possible to use titanium (Ti), molybdenum (Mo), tungsten (W), tantalum (Ta), nickel (Ni), chromium (Cr), aluminum (Al), these compounds, or alloys thereof. it can. In particular, when the plating layer 512 contains copper (Cu), the seed layer 511 can be made of a material that suppresses diffusion of Cu, for example, titanium nitride (TiN), molybdenum nitride (MoN), tantalum nitride (TaN). ) Etc. may be used. Here, the thickness of the seed layer 511 is not particularly limited, but can be appropriately selected within a range of 50 nm to 400 nm, for example.

  For the plating layer 512, a conductive material having good adhesion to the seed layer 511 and high electrical conductivity can be used. For example, a metal such as copper (Cu), gold (Au), silver (Ag), platinum (Pt), rhodium (Rh), tin (Sn), aluminum (Al), nickel (Ni), chromium (Cr) or the like It can select from the alloy etc. which used these. The plating layer 512 is disposed along the side wall 504 inside the through hole 520. That is, a cavity is provided inside the through hole 520. However, the structure is not limited to the above, and the inside of the through hole 520 may be filled with the plating layer 512. Alternatively, a filling material such as a resin material may be disposed in a region inside the plating layer 512 disposed along the side wall 504.

As the first insulating layer 540 and the second insulating layer 560, a resin layer having a property of transmitting gas and moisture can be used. As the resin layer, in addition to the above polyimide, epoxy resin, polyimide resin, benzocyclobutene resin, polyamide, phenol resin, silicone resin, fluororesin, liquid crystal polymer, polyamideimide, polybenzoxazole, cyanate resin, aramid, polyolefin , Polyester, BT resin, FR-4, FR-5, polyacetal, polybutylene terephthalate, syndiotactic polystyrene, polyphenylene sulfide, polyether ether ketone, polyether nitrile, polycarbonate, polyphenylene ether polysulfone, polyether sulfone, polyarylate , Polyetherimide and the like can be used. The above resins may be used alone or in combination of two or more kinds of resins. Further, an inorganic filler such as glass, talc, mica, silica, alumina or the like may be used in combination with the above resin. Here, the resin used for the first insulating layer 540 and the second insulating layer 560 is a resin having a Young's modulus of 1 × 10 ⁹ [dyne / cm ² ] or less at room temperature for the purpose of stress relaxation. Also good.

In addition, the first insulating layer 540 and the second insulating layer 560 are not limited to resin layers, and inorganic insulating layers can also be used. As the inorganic insulating layer, silicon oxide (SiO ₂ ), silicon nitride (SiN), aluminum oxide (Al ₂ O ₃ ), aluminum nitride (AlN), silicon carbide (SiC), silicon nitride carbide (SiCN), carbon Additive silicon oxide (SiOC) or the like can be used. Here, as the first insulating layer 540 and the second insulating layer 560, the above-described inorganic insulating layer may be used as a single layer or may be used as a stacked layer. Further, as the first insulating layer 540 and the second insulating layer 560, a resin layer and an inorganic insulating layer may be stacked.

  Further, as the first insulating layer 540 and the second insulating layer 560, a film-like resin can be used. The film-like resin is a film having a thickness of 1 μm or more and 100 μm or less, and is a resin that is in a film form before being formed on a substrate. The film-like resin can also be called a sheet-like resin or a laminate-like resin.

  The seed layers 551 and 571 can be formed using a conductive material having good adhesion to the first insulating layer 540 and the second insulating layer 560 which are base layers. For example, similarly to the seed layer 511, titanium (Ti), molybdenum (Mo), tungsten (W), tantalum (Ta), nickel (Ni), chromium (Cr), aluminum (Al), these compounds, or these An alloy or the like can be used. In particular, when the plating layers 552 and 572 include copper (Cu), the seed layers 551 and 571 can be made of a material that suppresses diffusion of Cu. For example, titanium nitride (TiN), molybdenum nitride (MoN), Tantalum nitride (TaN) or the like may be used. Here, the thickness of the seed layers 551 and 571 is not particularly limited, but can be appropriately selected within a range of 20 nm to 1 μm, for example. The thickness of the seed layers 551 and 571 is more preferably 100 nm or more and 300 nm or less.

  For the plating layers 552 and 572, a conductive material having good adhesion to the seed layers 551 and 571 and high electrical conductivity can be used. For example, as with the plating layer 512, copper (Cu), gold (Au), silver (Ag), platinum (Pt), rhodium (Rh), tin (Sn), aluminum (Al), nickel (Ni), chromium It can be selected from metals such as (Cr) or alloys using these.

  As described above, according to the interposer 20 according to the second embodiment, since the through electrode 510 that realizes stable electrical connection between the upper and lower wirings can be obtained, a highly reliable interposer can be provided. In addition, since the first insulating layer 540 and the second insulating layer 560 transmit gas and moisture, the gas and moisture contained in the cavity inside the through hole 520 are easily released to the outside. Therefore, the oxidation of the through electrode 510 can be suppressed, and the problems such as rupture caused by the gas released from the material constituting the interposer 20 being filled and the internal pressure inside the through hole 520 rising can be suppressed. Can do.

[Method of manufacturing through electrode substrate]
A method for manufacturing the interposer 20 according to the second embodiment of the present invention will be described with reference to FIGS. 14 to 29, the same elements as those shown in FIG. 13 are denoted by the same reference numerals. Here, the manufacturing method of the glass interposer which uses a glass substrate as a penetration electrode substrate is demonstrated.

  FIG. 14 is a cross-sectional view showing a step of irradiating a substrate with laser light in the method of manufacturing an interposer according to an embodiment of the present invention. FIG. 14 illustrates a method of etching by changing the material of the substrate in a region where a through hole is to be formed by irradiating the substrate 500 with a femtosecond laser. Here, the laser beam 601 emitted from the light source 600 is incident from the upper surface 501 side of the substrate 500 and is focused on a region where a through hole inside the substrate 500 is to be formed. At the position where the laser beam 601 is focused, high energy is supplied to the substrate 500, and the material of the substrate is altered. For example, as shown in FIG. 13, when it is desired to form a through-hole 520 having a shape in which the hole diameter gradually decreases from the opening end 506 toward the top 508 provided on the side wall 504, the focal spot size of the laser beam 601 is changed. The light source 600 may be scanned in the thickness direction of the substrate while making it happen.

  In the above, the manufacturing method using the femtosecond laser is exemplified as the method for forming the deteriorated layer, but the deteriorated layer can be formed by a method other than the femtosecond laser. For example, the altered layer may be formed by condensing a pulse laser having a wavelength λ with a lens.

  The pulse width, wavelength, energy, and the like of the laser are appropriately set according to the composition of the material used for the substrate, the absorption coefficient, and the like. For example, when an altered layer is formed on a glass substrate, the pulse width of the pulse laser is preferably in the range of 1 nanosecond (nsec) to 200 nsec. When the pulse width is shorter than the lower limit, an expensive laser oscillator is required, and when the pulse width is longer than the upper limit, the peak value of the laser pulse is lowered and the workability is lowered. The wavelength λ of the pulse laser is preferably 535 nm or less. When the wavelength λ is longer than the upper limit, the irradiation spot becomes large, so that it becomes difficult to form a microhole, and the surroundings of the irradiation spot are likely to be broken due to heat.

  FIG. 15 is a cross-sectional view showing a process for forming a denatured region inside a substrate in the method of manufacturing an interposer according to an embodiment of the present invention. As shown in FIG. 15, an altered region 503 whose diameter decreases from the upper surface 501 and the lower surface 502 toward the inside of the substrate 500 is formed in the substrate 500 by the laser irradiation described above. The shape of the altered region 503 can be changed as appropriate in accordance with the desired shape of the through hole. Here, since the region of the altered region 503 becomes the subsequent through hole 520, the altered region may be adjusted in accordance with the desired size of the through hole 520.

  Here, the altered region will be described in detail. As described above, a photochemical reaction occurs in the region of the glass substrate irradiated with the laser light. As a result, in the region irradiated with the laser beam, defects such as E ′ center and non-bridging oxygen, and / or a sparse glass structure in a high temperature range generated by rapid heating / cooling due to laser irradiation are generated. . The defect and the sparse glass structure are more easily etched with a predetermined etching solution than a glass substrate in a region where laser light irradiation is not performed.

  FIG. 16 is a cross-sectional view showing a process of etching a denatured region of a substrate using a chemical solution in the method of manufacturing an interposer according to an embodiment of the present invention. When the substrate 500 is immersed in the chemical solution 611, minute holes and minute grooves are formed in the altered region 503, so that the altered region 503 has a higher etching rate due to the chemical solution than an unmodified region. That is, by immersing the entire substrate 500 in the chemical solution 611, the altered region 503 is etched at a faster rate than a selectively or unaltered region. FIG. 16 shows a method of performing etching from both the upper surface 501 side and the lower surface 502 side by immersing the substrate 500 in a chemical solution 611 placed in a container 610.

  Here, as the chemical solution 611 used for the etching, a chemical solution that can selectively etch the altered region 503 with respect to the region other than the altered region 503 or at a high etching rate is used. For example, when the substrate 500 is a glass substrate, hydrofluoric acid (HF), buffered hydrofluoric acid (BHF), surfactant-added buffered hydrofluoric acid (LAL), or the like can be used. The chemical solution used for etching can be appropriately selected depending on the material of the substrate. Further, the etching method may be a spin coat etching method in addition to the immersion method. When performing spin coat etching, the treatment is performed on each side. Here, the etching solution, the etching time, and the etching processing temperature may be appropriately selected according to the shape of the formed altered region 503 and the processing shape of the target through hole.

  FIG. 17 is a cross-sectional view showing a process of forming a through hole in a substrate in the method of manufacturing an interposer according to an embodiment of the present invention. By removing the altered region 503 by etching using the chemical solution 611, a through hole 520 surrounded by the first side wall 504A on the upper surface 501 side and the second side wall 504B on the lower surface 502 side is formed. As shown in FIG. 17, a top 508 that protrudes from the other region is provided between the first side wall 504 </ b> A and the second side wall 504 </ b> B. Here, there is no restriction | limiting in particular in the shape in planar view of the through-hole 520, For example, circular may be sufficient and a rectangle and a polygon may be sufficient besides that. Of course, it may be a rectangle or a polygon with rounded corners.

Here, in FIG. 14 to FIG. 17, the method of forming a through hole by irradiating a laser beam to a region where a through hole is to be formed in the substrate 500 to form an altered region and performing wet etching with a chemical solution has been described. It is not limited to this method. For example, the through hole may be formed by irradiating the substrate 500 with a high-power laser and melting the substrate. For example, a CO ₂ laser or the like can be used as a laser for processing a glass substrate.

  FIG. 18 is a cross-sectional view showing a step of forming a seed layer in the through hole from one surface side of the substrate in the method of manufacturing an interposer according to an embodiment of the present invention. As shown in FIG. 18, a first seed layer 511 </ b> A is formed on the upper surface 501 and the first side wall 504 </ b> A with respect to the through hole 520 provided with the substrate 500. Here, among the seed layer 511 shown in FIG. 13, the seed layer 511 formed on the upper surface 501 and the first sidewall 504A is referred to as a first seed layer 511A.

  The first seed layer 511A can use, for example, a single layer or a laminate of a metal such as Cu, Ti, Ta, or W or an alloy using these, and is formed by a PVD method such as a vacuum evaporation method or a sputtering method. be able to. As the material used for the first seed layer 511A, the same material as that of the plating layer 512 to be formed on the first seed layer 511A later can be selected. Here, the first seed layer 511A is preferably formed with a thickness of 20 nm to 1 μm. The first seed layer 511A is more preferably formed with a thickness of 100 nm to 300 nm.

  FIG. 19 is a cross-sectional view showing a step of forming a seed layer in the through hole from the other surface side of the substrate in the method of manufacturing an interposer according to an embodiment of the present invention. As shown in FIG. 19, the second seed layer 511 </ b> B is formed on the lower surface 502 and the second side wall 504 </ b> B with respect to the through hole 520 provided with the substrate 500. Here, in the seed layer 511 shown in FIG. 13, the seed layer 511 formed on the lower surface 502 and the second side wall 504B is referred to as a second seed layer 511B.

  Similarly to the first seed layer 511A, the second seed layer 511B can be a single layer or a laminate of a metal such as Cu, Ti, Ta, or W, or an alloy using these metals, and can be vacuum deposited or sputtered. It can form by PVD methods, such as. As the material used for the second seed layer 511B, the same material as that of the plating layer 512 to be formed later on the second seed layer 511B can be selected. That is, the same material as the first seed layer 511A can be selected. Here, the second seed layer 511B is preferably formed to a thickness of 20 nm to 1 μm. The second seed layer 511B is more preferably formed with a thickness of 100 nm to 300 nm.

  Here, the first seed layer 511 </ b> A and the second seed layer 511 </ b> B may not be formed on the top portion 508. That is, the first seed layer 511A may be formed from the top 508 to the first end on the upper surface 501 side, and the second seed layer 511B may be formed from the top 508 to the second end on the lower surface 502 side. . At this time, the length along the side wall of the top 508 exposed from the first seed layer 511A and the second seed layer 511B, that is, the length along the side wall from the first end to the second end, The first seed layer 511A and the second seed layer 511B are formed so as to be shorter than the distance between the head top portions 508 facing each other. In this case, the first seed layer 511 </ b> A and the second seed layer 511 </ b> B are electrically formed by forming a plating layer 512 described below from the first end and the second end toward the top 508. Connected.

  FIG. 20 is a cross-sectional view showing a step of forming a plating layer on the seed layer in the method of manufacturing an interposer according to one embodiment of the present invention. As shown in FIG. 20, first, a photoresist is applied on the first seed layer 511A and the second seed layer 511B (hereinafter, both are collectively referred to as the seed layer 511), and then a resist pattern is formed by performing exposure and development. 630 is formed. The resist pattern 630 is formed so as to expose at least the through hole 520. Next, electroplating is performed by energizing the seed layer 511 to form a plating layer 512 on the seed layer 511 exposed from the resist pattern 630.

  FIG. 21 is a cross-sectional view showing a step of removing the resist mask in the method of manufacturing an interposer according to one embodiment of the present invention. As shown in FIG. 21, after forming the plating layer 512, the photoresist constituting the resist pattern 630 is removed with an organic solvent. Note that ashing by oxygen plasma can be used for removing the photoresist instead of using an organic solvent.

  FIG. 22 is a cross-sectional view showing a step of etching the seed layer exposed from the plating layer in the method of manufacturing an interposer according to one embodiment of the present invention. As shown in FIG. 22, the seed layer 511 in the region covered with the resist pattern 630 where the plating layer 512 is not formed is removed.

  Here, in the process of FIGS. 20 to 22, the through electrode 510 formed in the through hole 520 and the upper surface 501 connected to the through electrode 510 and the wiring electrically independent from the lower surface 502 are formed on the upper surface. It can also be formed on 501 and the lower surface 502. Specifically, a resist pattern 630 in which a region where a wiring electrically independent from the through electrode 510 is to be formed is formed, a seed layer 511 in the region is exposed, a plating layer 512 is formed, and a plating layer 512 is formed. The seed layer 511 in the region where no is formed is removed. Thereby, the wiring can be formed in the same process as the through electrode 510 formed in the process of FIGS.

  FIG. 23 is a cross-sectional view showing a process of forming an insulating layer provided with an opening exposing a wiring formed on the upper surface of the through electrode substrate in the method of manufacturing an interposer according to the embodiment of the present invention. Here, a method using photosensitive polyimide as the first insulating layer 540 will be described. As shown in FIG. 23, a photosensitive polyimide is applied as the first insulating layer 540 on the upper surface 501 of the substrate 500 by using a coating method such as a spin coating method, exposed by using a photomask, and developed. Then, an opening 541 exposing at least a part of the through electrode 510 is formed.

  After the opening 541 is formed, a heat curing process is performed to cure the applied first insulating layer 540. The thermosetting treatment is preferably set to be equal to or lower than the glass transition temperature of the first insulating layer 540 to be used. This is because if the curing is performed at a temperature exceeding the glass transition temperature, the shape of the opening 541 is deformed, and problems such as an opening diameter larger than the design dimension occur. For example, when a photosensitive polyimide is used as the first insulating layer 540, if the glass transition temperature of the photosensitive polyimide is 280 ° C., heat treatment is preferably performed at 250 ° C., for example, 250 ° C. for 1 hour in a nitrogen atmosphere. Heat treatment should be performed below. In addition, it is preferable to perform not only the process of thermosetting but the heat processing after this process so that the glass transition temperature of photosensitive polyimide may not be exceeded.

  Here, an insulating layer obtained by attaching a film-like resin may be used as the first insulating layer 540 instead of the insulating layer that forms the resin material by a coating method. Since the film-like resin has a film-like shape before being formed on the substrate, the resin hardly covers the inside of the through-hole 520 and covers the end of the through-hole 520 even if formed on the through-hole 520. A hollow structure can be formed. In the case where a film-like resin is used as the first insulating layer 540, the opening 541 can be formed by a photolithography process and an etching process. Or you may form the opening part 541 by sublimating resin using energy rays, such as a laser.

  FIG. 24 is a cross-sectional view showing a step of forming a seed layer on the insulating layer and the wiring exposed in the opening in the method for manufacturing the interposer according to the embodiment of the present invention. As shown in FIG. 24, a seed layer 551 is formed on the first insulating layer 540 and on the through electrode 510 exposed inside the opening 541. For the seed layer 551, for example, a single layer or a laminate of a metal such as Cu, Ti, Ta, or W or an alloy using these can be used, such as a PVD method (such as a vacuum deposition method and a sputtering method) or a CVD method. Can be formed. As the material used for the seed layer 551, the same material as that of the plating layer 552 to be formed on the seed layer 551 later can be selected. Here, the seed layer 551 is preferably formed to a thickness of 20 nm to 1 μm. The seed layer 551 is more preferably formed with a thickness of 100 nm to 300 nm.

  FIG. 25 is a cross-sectional view showing a step of forming a plating layer on the seed layer in the method of manufacturing an interposer according to one embodiment of the present invention. As shown in FIG. 25, after applying a photoresist on the seed layer 551, exposure and development are performed to form a resist pattern 680 in which a region where a wiring pattern is to be formed is opened. Next, electroplating is performed by energizing the seed layer 551 to form a plating layer 552 on the seed layer 551 exposed from the resist pattern 680.

  FIG. 26 is a cross-sectional view showing a step of removing the resist mask on the seed layer in the method of manufacturing the interposer according to the embodiment of the present invention. As shown in FIG. 26, after forming the plating layer 552, the photoresist constituting the resist pattern 680 is removed with an organic solvent. Note that ashing by oxygen plasma can be used for removing the photoresist instead of using an organic solvent.

  FIG. 27 is a cross-sectional view showing a step of etching the seed layer exposed from the plating layer in the method of manufacturing an interposer according to one embodiment of the present invention. As shown in FIG. 27, by removing (etching) the seed layer 551 in a region covered with the resist pattern 680 and where the plating layer 552 is not formed, each wiring is electrically separated. Since the surface of the plating layer 552 is also etched and thinned by the etching of the seed layer 551, it is preferable to set the film thickness of the plating layer 552 in consideration of the influence of this thinning. As etching in this step, wet etching or dry etching can be used. In addition, by this step, the first wiring 550 including the seed layer 551 and the plating layer 552 is formed on the through electrode 510 and the first insulating layer 540.

  FIG. 28 is a cross-sectional view showing a process of forming an insulating layer provided with an opening exposing a wiring formed on the lower surface of the through electrode substrate in the method of manufacturing an interposer according to an embodiment of the present invention. The second insulating layer 560 illustrated in FIG. 28 can be formed using the same material and method as the first insulating layer 540. Similarly to the opening 541, an opening 561 that exposes at least a part of the through electrode 510 is formed in the second insulating layer 560.

  FIG. 29 is a cross-sectional view showing a step of forming a seed layer and a plating layer on the lower surface side of the through electrode substrate in the method of manufacturing an interposer according to one embodiment of the present invention. Here, the second wiring 570 is formed on the lower surface 502 side of the substrate 500 by performing the same processing as the steps shown in FIGS.

  As described above, according to the manufacturing method of the interposer 20 according to the second embodiment, the throwing power of the seed layer 511 with respect to the side wall 504 inside the through hole 520 can be improved. Therefore, it is not necessary to devise a method for forming the seed layer in order to improve the throwing power with respect to the side wall of the through hole, and the seed layer can be formed using a conventional film forming apparatus and film forming process.

<Embodiment 3>
In the third embodiment, a semiconductor device manufactured using the through electrode substrate 10 shown in the first embodiment or the interposer 20 shown in the second embodiment will be described. In the following description, a semiconductor device using the through electrode substrate 10 shown in Embodiment 1 will be described. However, the through electrode substrate 10 may be replaced with an interposer 20.

  FIG. 30 is a cross-sectional view showing a semiconductor device using a through electrode substrate according to an embodiment of the present invention. In the semiconductor device 1000, three through electrode substrates 1310, 1320, and 1330 are stacked and connected to an LSI substrate 1400 on which a semiconductor element such as a DRAM is formed, for example. The through electrode substrate 1310 has connection terminals 1511 and 1512 formed by the first wiring 550, the second wiring 570, and the like. These through electrode substrates 1310, 1320, and 1330 may be through electrode substrates formed from substrates of different materials. The connection terminal 1512 is connected to the connection terminal 1500 of the LSI substrate 1400 by the bump 1610. The connection terminal 1511 is connected to the connection terminal 1522 of the through electrode substrate 1320 by the bump 1620. The connection terminals 1521 of the through electrode substrate 1320 and the connection terminals 1532 of the through electrode substrate 1330 are also connected by the bumps 1630. For the bumps 1610, 1620, and 1630, for example, a metal such as indium, copper, or gold is used.

  In addition, when laminating | stacking a through-electrode board | substrate, not only three layers but two layers may be sufficient, and also four or more layers may be sufficient. Further, the connection between the through-electrode substrate and another substrate is not limited to using bumps, and other bonding techniques such as eutectic bonding may be used. Alternatively, polyimide, epoxy resin, or the like may be applied and baked to bond the through electrode substrate and another substrate.

  FIG. 31 is a cross-sectional view showing another example of a semiconductor device using a through electrode substrate according to an embodiment of the present invention. A semiconductor device 1000 shown in FIG. 31 includes semiconductor chips (LSI chips) 1410 and 1420 such as a MEMS device, a CPU, a memory, and the like, and a through electrode substrate 1300 that are stacked and connected to the LSI substrate 1400.

  A through electrode substrate 1300 is disposed between the semiconductor chip 1410 and the semiconductor chip 1420 and connected by bumps 1640 and 1650. A semiconductor chip 1410 is placed on the LSI substrate 1400, and the LSI substrate 1400 and the semiconductor chip 1420 are connected by a wire 1700. In this example, the through electrode substrate 1300 can manufacture a multi-functional semiconductor device by stacking a plurality of semiconductor chips having different functions. For example, by using the semiconductor chip 1410 as a three-axis acceleration sensor and the semiconductor chip 1420 as a two-axis magnetic sensor, a semiconductor device in which a five-axis motion sensor is realized by one module can be manufactured.

  When the semiconductor chip is a sensor formed by a MEMS device, the sensing result may be output as an analog signal. In this case, a low-pass filter, an amplifier, and the like may also be formed on the semiconductor chip or the through electrode substrate 1300.

  FIG. 32 is a cross-sectional view showing still another example of a semiconductor device using a through electrode substrate according to an embodiment of the present invention. The above two examples (FIGS. 30 and 31) are three-dimensional implementations, but in this example, they are examples applied to the combined implementation of two dimensions and three dimensions (sometimes referred to as 2.5 dimensions). . In the example shown in FIG. 32, six through electrode substrates 1310, 1320, 1330, 1340, 1350, and 1360 are stacked and connected to the LSI substrate 1400. However, all the through electrode substrates are not only laminated and arranged, but are also arranged side by side in the in-plane direction of the substrate. These through electrode substrates may be through electrode substrates formed from substrates of different materials.

  In the example of FIG. 32, the through electrode substrates 1310 and 1350 are connected to the LSI substrate 1400, the through electrode substrates 1320 and 1340 are connected to the through electrode substrate 1310, and the through electrode substrate 1330 is connected to the through electrode substrate 1320. The through electrode substrate 1360 is connected to the through electrode substrate 1350. In addition, even when the through electrode substrate 1300 is used as an interposer for connecting a plurality of semiconductor chips as in the example shown in FIG. 32, such two-dimensional and three-dimensional mounting can be performed. For example, the through electrode substrates 1330, 1340, 1360 and the like may be replaced with semiconductor chips.

  The semiconductor device 1000 manufactured as described above includes various devices such as portable terminals (mobile phones, smartphones, notebook personal computers, etc.), information processing devices (desktop personal computers, servers, car navigations, etc.), home appliances, and the like. Installed in electrical equipment.

  Hereinafter, the through electrode substrate according to Embodiment 1 of the present invention and the through electrode substrate of the comparative example thereof are manufactured, and the results of evaluating the throwing power of the through electrode will be specifically described. Here, the examples shown in Table 1 to Table 6 are the evaluation results of the penetration characteristics of the through electrodes in the examples of various shapes of the through electrode substrate according to the first embodiment, and the comparative example is similar to the first embodiment. And it is an evaluation result of the throwing power of the penetration electrode in the penetration electrode substrate of the shape corresponding to each example. In the examples, a glass substrate having a thickness of 400 μm was used as the through electrode substrate.

In Examples 1 to 3 shown below, Tables 1 to 3 show the results of evaluating the throwing power of the plating layer formed on the through hole 110 similar to the through electrode substrate according to Embodiment 1. Here, each parameter shown in Tables 1 to 3 will be described with reference to FIG. The point P corresponds to the top portion 124 in FIG. The point C corresponds to the first contact 330 in FIG. Point A corresponds to the second contact 360 in FIG. Point O corresponds to the intersection of a straight line extending from point P in the vertical direction and line segment AC (a line segment connecting points A and C). Point B corresponds to the intersection of a straight line extending in the vertical direction from the top 124 facing the point P and the line segment AC. Further, the angle APO is θ ₁ and the angle CPO is θ ₂ .

  Here, when the point A does not exist in the vicinity of the opening end 126, that is, when the second contact 360 is positioned on the side wall 120 inside the through hole 110, a straight line extending from the top portion 124 through the second contact 360 ( An intersection point between the second tangent line 370) and the upper surface 102 (or lower surface 104) of the substrate 100 is defined as a point A. Similarly to the point A, when the point C does not exist in the vicinity of the opening end portion 126, that is, when the first contact 330 is located on the side wall 120 inside the through hole 110, the first contact 330 passes through the top portion 124. The intersection point between the straight line (first tangent line 340) and the upper surface 102 (or lower surface 104) of the substrate 100 is defined as a point C.

  Tables 1 to 3 show the results of forming seed layers and plating layers by the method shown in Embodiment 1 and evaluating the throwing power of the plating layers with respect to Examples and Comparative Examples. Each parameter in Tables 1 to 3 will be described with reference to FIG.

The depth PO indicates the length of the line segment PO, and indicates the distance in the vertical direction from the open end 126 of the through hole 110 to the top of the head 124. When the through hole 110 has a vertically symmetrical shape, the depth PO corresponds to half of the depth of the through hole 110. The opening end diameter AC indicates the length of the line segment AC and corresponds to the hole diameter at the opening end portion 126 of the through hole 110. The expanded diameter AO indicates the length of the line segment AO, and corresponds to the length of the open end 126 expanded by inclining the side wall 120 of the through hole 110 by the angle θ ₁ . The center width OB indicates the length of the line segment OB and corresponds to the distance between the top portions 124 of the through holes 110 facing each other. Here, when the top portion 124 exists at a position shifted in the plate thickness direction of the substrate 100, the portion having the smallest diameter of the through hole 110 is defined as the center width OB. The angle θ represents the angle APC, and is the sum of θ ₁ and θ ₂ defined above.

  The evaluation of the roundness with a plating layer was performed on a sample in which a seed layer was formed with a thickness of about 1.1 μm by a sputtering method, and a plating layer was formed on the seed layer with a thickness of about 8 μm by an electrolytic plating method. Evaluation of the roundness with a plating layer was performed by observing an X-ray transmission image obtained by an X-ray transmission inspection. In the evaluation of the roundness with the plating layer, “◯” means that the plating layer is formed on the entire side wall 120 of the through hole 110. Further, “Δ” means that there is a region where no plating layer is formed on a part of the side wall 120 of the through hole 110, but a level of throwing power with no problem in practical use is obtained. In addition, “×” indicates that the plating layer is interrupted in the vertical direction inside the through-hole 110, or barely connected in the vertical direction, but has a level of tangency that may cause a problem in reliability in actual use. It means that there is.

  The determination of “○”, “Δ”, or “×” of the circulatory property with the plating layer is performed by performing X-ray transmission inspection on 100 through holes 110 formed on the same substrate having the same shape of the through holes 110. This is a determination result for the through hole 110 that the observer performed and determined that the throwing power was the worst.

In Examples 1 to 3, the formation conditions of the seed layer and the plating layer are as follows.
[Sputtering conditions for seed layer formation]
The seed layer has a laminated structure of a Ti layer and a Cu layer. The Ti layer has a role of improving adhesion with the substrate 100. The conditions for forming the Ti layer and the Cu layer are as follows.
Ti layer formation conditions:
Sputtering gas: Ar
Sputtering pressure: 0.5 Pa
Sputtering gas flow rate: 30 sccm
Sputtering power: 3.0 W / cm ²
Target-substrate distance: 60mm
Film thickness: 100nm
Conditions for forming the Cu layer:
Sputtering gas: Ar
Sputtering pressure: 0.3 Pa
Sputtering gas flow rate: 30 sccm
Sputtering power: 5.0 W / cm ²
Target-substrate distance: 60mm
Film thickness: 1μm
[Electrolytic plating conditions for plating layer formation]
The plating layer has a single layer structure of a Cu layer. The plating layer was formed by energizing the seed layer under the following conditions.
Current density 1A / dm ² Power supply time 2900sec
Film thickness: 8μm

[Example 1]
Table 1 shows the results of evaluating the turnability with a plating layer for the samples of Example 1 and Comparative Example 1. In Example 1, the design value of the center width OB is fixed to 61.5 μm, and the design value of the opening end diameter AC is set to 90.0 μm, 95.0 μm, 98.0 μm, and 100.0 μm. Thus, the turnability with the plating layer was evaluated. Here, θ (θ ₁ + θ ₂ ) increases as the opening end diameter AC increases.

  As shown in Table 1, in Examples 1-1, 1-2, and 1-3 in which the angle θ is 26.2 ° or more, good throwing power of the plating layer was confirmed. In particular, when the angle θ satisfies the condition of [Equation 1], specifically, in Examples 1-1 and 1-2, the plating layer is formed over the entire region of the side wall 120 and the top portion 124, which is very good. As a result, it was confirmed that the plating layer had a good throwing power. On the other hand, in the comparative example 1-1 in which the angle θ is 24.8 ° and the angle θ is small by 1 ° or more from the condition of [Equation 1], the plating layer is interrupted in the vertical direction inside the through hole 110. It was.

  Here, regarding the throwing power of the plating layer, the film thickness of the seed layer and the plating layer on the substrate of Example 1-2, which is a boundary condition between “Δ” and “◯”, is as follows. The seed layer formed on the upper surface 102 and the lower surface 104 of the substrate 100 was about 1.1 μm. In addition, the thickness of the seed layer in the portion where the thickness of the seed layer is the thinnest inside the through hole 110 (near the top portion 124 in FIG. 33) was about 100 nm. The plating layer formed on the upper surface 102 and the lower surface 104 of the substrate 100 was about 8 μm. In addition, the thickness of the plating layer in the top portion 124 inside the through hole 110 was slightly thinner than the plating layers formed on the upper surface 102 and the lower surface 104.

[Example 2]
Table 2 shows the results of evaluating the turnability with the plating layer for the samples of Example 2 and Comparative Example 2. In Example 2, the design value of the center width OB is fixed to 24.2 μm, and the design value of the opening end diameter AC is set to 90.0 μm, 93.0 μm, 95.0 μm, and 98.0 μm. Thus, the turnability with the plating layer was evaluated.

  As shown in Table 2, in Examples 2-1, 2-2, and 2-3 in which the angle θ was 26.1 ° or more, good throwing power of the plating layer was confirmed. In particular, when the angle θ satisfies the condition of [Equation 1], specifically, in Examples 2-1 and 2-2, the plating layer is formed over the entire side wall 120 and the top of the head portion 124, which is very good. As a result, it was confirmed that the plating layer had a good throwing power. On the other hand, in the comparative example 2-1, in which the angle θ is 25.3 ° and the angle θ is small by 1 ° or more from the condition of [Equation 1], the plating layer is barely connected in the vertical direction inside the through hole 110. However, it was a level that could cause a problem in reliability in actual use.

[Example 3]
Table 3 shows the results of evaluating the turnability with a plating layer for the samples of Example 3 and Comparative Example 3. In Example 3, the design value of the center width OB is fixed to 2.1 μm, and the plated hole is attached to the through-hole 110 formed with the design values of the opening end diameter AC being 90.0 μm, 93.0 μm, and 95.0 μm. Circulation was evaluated.

  As shown in Table 3, in Examples 3-1 and 3-2 in which the angle θ is 26.2 ° or more, good throwing power of the plating layer was confirmed. In particular, when the angle θ satisfies the condition of [Equation 1], specifically, in Example 3-1, the plating layer is formed over the entire region of the side wall 120 and the top of the head portion 124. The throwing power was confirmed. On the other hand, in the comparative example 3-1, in which the angle θ is 25.4 ° and the angle θ is small by 1 ° or more from the condition of [Equation 1], the plating layer is barely connected in the vertical direction inside the through hole 110. However, it was a level that could cause a problem in reliability in actual use.

  In Examples 4 to 6 shown below, Tables 4 to 6 show the results of evaluating the throwing power of the plating layer formed on the through hole 110A having a shape different from that of Examples 1 to 3. . Here, each parameter shown in Tables 4 to 6 will be described with reference to FIG. FIG. 34 is similar to FIG. 33, but the tops 124 A facing each other have a parallel shape from the seed layer end 228 to the seed layer end 229, and the point P is defined as the seed layer end 228. This is different from FIG. That is, FIG. 34 has the same shape as the through hole 110A shown in FIGS. Here, in FIG. 34, the distance from the seed layer end 228 to the seed layer end 229 is set to be the same as the length of the line segment OB. FIG. 34 is the same as FIG. 33 except that the point P is defined at the seed layer end 228, and thus detailed description thereof is omitted.

[Example 4]
Table 4 shows the results of evaluating the turnability with the plating layer for the samples of Example 4 and Comparative Example 4. In Example 4, the design value of the center width OB is fixed to 61.5 μm, and the design value of the opening end diameter AC is set to 90.0 μm, 95.0 μm, 98.0 μm, and 100.0 μm. Thus, the turnability with the plating layer was evaluated.

  As shown in Table 4, in Examples 4-1, 4-2, and 4-3 in which the angle θ is 26.2 ° or more, good throwing power of the plating layer was confirmed. In particular, when the angle θ satisfies the condition of [Equation 1], specifically, in Examples 4-1 and 4-2, a plating layer is formed over the entire side walls 120A and 120B and the top portion 124A. A very good plating layer coverage was confirmed. On the other hand, in the comparative example 4-1, in which the angle θ is 24.8 ° and the angle θ is small by 1 ° or more from the condition of [Equation 1], the plating layer is interrupted in the vertical direction inside the through hole 110A. It was.

[Example 5]
Table 5 shows the results of evaluating the turnability with the plating layer for the samples of Example 5 and Comparative Example 5. In Example 5, the design value of the center width OB is fixed to 24.2 μm, and the design value of the opening end diameter AC is set to 90.0 μm, 93.0 μm, 95.0 μm, and 98.0 μm. Thus, the turnability with the plating layer was evaluated.

  As shown in Table 5, in Examples 5-1, 5-2, and 5-3 in which the angle θ is 26.1 ° or more, good throwing power of the plating layer was confirmed. In particular, when the angle θ satisfies the condition of [Equation 1], specifically, in Examples 5-1 and 5-2, a plating layer is formed on the entire side walls 120A and 120B and the top portion 124A. A very good plating layer coverage was confirmed. On the other hand, in the comparative example 5-1, in which the angle θ is 25.3 ° and the angle θ is small by 1 ° or more from the condition of [Equation 1], the plating layer is barely connected in the vertical direction inside the through hole 110A. However, it was a level that could cause a problem in reliability in actual use.

[Example 6]
Table 6 shows the results of evaluating the turnability with the plating layer for the samples of Example 6 and Comparative Example 6. In Example 6, the design value of the center width OB is fixed to 2.1 μm, and the plated hole is attached to the through-hole 110A formed with the design values of the opening end diameter AC being 90.0 μm, 93.0 μm, and 95.0 μm. Circulation was evaluated.

  As shown in Table 6, in Examples 6-1 and 6-2 in which the angle θ is 26.2 ° or more, good throwing power of the plating layer was confirmed. In particular, when the angle θ satisfies the condition of [Equation 1], specifically, in Example 6-1, the plating layers are formed over the entire side walls 120A and 120B and the top portion 124A, which is very good. The throwing power of the plating layer was confirmed. On the other hand, in the comparative example 6-1 where the angle θ is 25.4 ° and the angle θ is small by 1 ° or more from the condition of [Equation 1], the plating layer is barely connected in the vertical direction inside the through hole 110A. However, it was a level that could cause a problem in reliability in actual use.

  As described above, also from the evaluation result of the plating layer attached property shown in Example 1 to Example 6, in the through electrode substrate according to Embodiment 1 of the present invention, the good adhesion of the plated layer serving as the through electrode is obtained. It was confirmed that the property was obtained. Therefore, according to the through electrode substrate shown in the first to sixth embodiments, a through electrode that realizes stable electrical connection between the upper and lower wirings can be obtained. Therefore, a highly reliable through electrode substrate can be provided. it can.

  Note that the present invention is not limited to the above-described embodiment, and can be modified as appropriate without departing from the spirit of the present invention.

10, 11, 12, 1300, 1310, 1320, 1330, 1340, 1350, 1360: through electrode substrate, 20: interposer, 100, 500, 900: substrate, 102, 501, 902: upper surface, 104, 502, 904: Bottom surface, 110, 520, 910: through-hole, 120, 504: side wall, 122: convex shape, 124, 508: top of head, 126, 506: open end, 200, 510: through electrode, 202, 212, 222, 511, 551, 571, 912, 922: Seed layer, 204, 214, 224, 512, 552, 572: Plating layer, 210, 220: Wiring, 228, 229, 929: Seed layer edge, 300: Square, 310 : Line segment, 320: reference point, 330: first contact point, 340: first tangent, 350: vertical direction, 360: second contact, 370: second tangent, 503: altered region, 504A: first side wall, 504B: second side wall, 511A: first seed layer, 511B: first 2 seed layer, 540: first insulating layer, 541, 561: opening, 550: first wiring, 560: second insulating layer, 570: second wiring, 600: light source, 601: laser light, 610: container, 611: Chemical solution, 630, 680: Resist pattern, 1000: Semiconductor device, 1400: LSI substrate, 1410, 1420: Semiconductor chip, 1500, 1511, 1512, 1521, 1522, 1532: Connection terminal, 1610, 1620, 1630, 1640 1650: Bump, 1700: Wire

Claims (15)

An upper surface, a lower surface, and a substrate having a convex-shaped side wall that is located in a through-hole penetrating the upper surface and the lower surface, and includes a top portion;
A through electrode that is disposed in the through hole and electrically connects the wiring disposed on the upper surface side and the wiring disposed on the lower surface side;
A through electrode substrate.   2. The through electrode substrate according to claim 1, wherein the top portions facing each other are provided at positions where the diameters of the through holes are smaller than others.   2. The through electrode substrate according to claim 1, wherein an interval between the side walls facing each other gradually decreases from the upper surface and the lower surface toward the top of the head.   The through electrode substrate according to claim 3, wherein the side wall has a linear shape.   The through electrode substrate according to claim 3, wherein the side wall has a concave shape from the open end of the through hole toward the top of the head.   The through electrode substrate according to claim 3, wherein the side wall has a convex shape from the opening end of the through hole toward the top. Positioned at the opening end of the through hole on the side facing the reference point from a reference point positioned at the corner of a square symmetrical in the vertical direction with reference to a line segment of length L1 connecting the tops facing each other A first tangent extending through the first contact having a vertical distance L2 from the reference point, and extending in a direction opposite to the first tangent from the reference point in plan view, the side wall or the opening Assuming a second tangent passing through the second contact located at the end,
The angle θ ₁ with respect to the vertical direction of the first tangent and the angle θ ₂ with respect to the vertical direction of the second tangent are θ ₁ + θ ₂ ≧ 26.5 °
The through electrode substrate according to claim 3, wherein: A first contact that is located at the opening end of the through hole on the side facing the parietal portion from the parietal portion facing and spaced apart from each other by a distance L1, and the vertical distance from the parietal portion is L2. Assuming a first tangent extending through and a second tangent extending in a direction opposite to the first tangent from the top in plan view and passing through a second contact located at the side wall or the opening end,
The angle θ ₁ with respect to the vertical direction of the first tangent and the angle θ ₂ with respect to the vertical direction of the second tangent are θ ₁ + θ ₂ ≧ 26.5 °
The through electrode substrate according to claim 3, wherein: An upper surface, a lower surface, and a substrate having a convex side wall located in a through-hole penetrating the upper surface and the lower surface;
In a through electrode substrate having a through electrode disposed in the through hole and electrically connecting the wiring disposed on the upper surface side and the wiring disposed on the lower surface side,
With reference to a line segment indicating the smallest hole diameter of the through hole in plan view, a reference point located at a corner of a square symmetrical in the vertical direction contacts the inside of the through hole on the side facing the reference point. Assuming a first tangent and a second tangent that extends in a direction opposite to the first tangent from the reference point in plan view and touches the inside of the through hole,
The angle θ ₁ with respect to the vertical direction of the first tangent and the angle θ ₂ with respect to the vertical direction of the second tangent are θ ₁ + θ ₂ ≧ 26.5 °
A through electrode substrate characterized by satisfying: An upper surface, a lower surface, and a substrate having a convex side wall located in a through-hole penetrating the upper surface and the lower surface;
In a through electrode substrate having a through electrode disposed in the through hole and electrically connecting the wiring disposed on the upper surface side and the wiring disposed on the lower surface side,
From a reference point at one end of a line segment indicating the smallest hole diameter of the through hole in plan view, a first tangent line that contacts the inside of the through hole on the side facing the reference point, and from the reference point in plan view Assuming a second tangent line extending in a direction opposite to the first tangent line and in contact with the inside of the through hole,
The angle θ ₁ with respect to the vertical direction of the first tangent and the angle θ ₂ with respect to the vertical direction of the second tangent are θ ₁ + θ ₂ ≧ 26.5 °
A through electrode substrate characterized by satisfying: The through electrode substrate according to any one of claims 1 to 10,
A first wiring structure connected to the wiring disposed on the upper surface side of the through electrode substrate;
A second wiring structure connected to the wiring disposed on the lower surface side of the through electrode substrate;
An interposer characterized by comprising: The through electrode substrate according to any one of claims 1 to 10,
A semiconductor device comprising another substrate or a chip arranged side by side with the through electrode substrate. Forming a deteriorated layer having a diameter that decreases from the upper surface and the lower surface toward the inside of the substrate on a substrate having an upper surface and a lower surface;
Etching the altered layer to form a through hole surrounded by the first side wall on the upper surface side and the second side wall on the lower surface side,
Forming a first seed layer on the first sidewall from the upper surface side;
Forming a second seed layer on the second side wall from the lower surface side;
A method of manufacturing a through electrode substrate, comprising forming a plating layer on the first seed layer and the second seed layer.   The method of manufacturing a through electrode substrate according to claim 13, wherein the first seed layer and the second seed layer are formed by a sputtering method. Forming the through hole so that a top portion protruding from the other region is provided between the first side wall and the second side wall;
Forming the first seed layer from the top to the first end on the upper surface side;
Forming the second seed layer from the top to the second end on the lower surface side;
The method of manufacturing a through electrode substrate according to claim 13, wherein the plating layer is formed from each of the first end and the second end toward the top.

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