JP2015099970A - Injection-locked oscillator - Google Patents

Abstract

PROBLEM TO BE SOLVED: To achieve both injection locking and PLL of a pulse signal in a short time even if oscillatory frequency of a voltage control oscillator is high.SOLUTION: An injection-locked oscillator includes: a voltage control oscillator 3a which oscillates a signal of frequency corresponding to a frequency control signal Vt in synchronization with the signal oscillated by a voltage control oscillator 2; a voltage control oscillator 3b which oscillates the signal of the frequency corresponding to the frequency control signal Vt in synchronization with the signal oscillated by the voltage control oscillator 3a; and phase difference detection means for dividing the frequency of the signal oscillated by the voltage control oscillator 3b to detect phase difference Δφ between the signal after division of the frequency and a reference signal REF. The frequency control signal Vt corresponding to the phase difference Δφ is outputted to voltage control oscillators 2, 3a, 3b.

Description

  The present invention relates to an injection-locked oscillator used for a signal source circuit with low phase noise, for example.

For example, a low phase noise characteristic may be required for a signal source circuit mounted in a radio communication system or radar system in a microwave or millimeter wave band, or in a transmission / reception device of an optical communication system.
FIG. 3 is a block diagram showing an injection locked oscillator disclosed in Patent Document 1 below.
In this injection-locked oscillator, when the pulse generation circuit 101 receives a reference signal REF (for example, a sine wave signal), the reference signal REF is converted into a narrow pulse signal.

The voltage controlled oscillator 102 oscillates a signal having a frequency corresponding to a frequency control signal Vt that is a control voltage output from the loop filter 106 described later in synchronization with the pulse signal generated by the pulse generation circuit 101.
The frequency divider 103, the phase frequency comparator 104, the charge pump 105, and the loop filter 106 constitute a PLL (Phase Locked Loop). The frequency divider 103 outputs the signal oscillated by the voltage controlled oscillator 102 to N The signal is frequency-divided and the signal after frequency division by N is output to the phase frequency comparator 104.

The phase frequency comparator 104 detects the phase difference between the reference signal REF and the frequency-divided signal output from the phase frequency comparator 104.
When the phase frequency comparator 104 detects a phase difference, the charge pump 105 outputs a current corresponding to the phase difference.
The loop filter 106 converts the current output from the charge pump 105 into a voltage, smoothes the voltage, and outputs the smoothed voltage to the voltage controlled oscillator 102 as a frequency control signal Vt (control voltage).

In this injection locked oscillator, the injection locking of the pulse signal to the voltage controlled oscillator 102 and the PLL are in parallel, and compared with the case where only the PLL is used, it is possible to expect low phase noise in the high detuning frequency region. .
However, since the phase of the voltage controlled oscillator 102 is phase-locked by two mechanisms of pulse signal injection locking and PLL, when the phases to be matched by the two mechanisms are different, a conflict occurs and the operation is May become unstable.

Specifically, it is as follows.
When the phase of the pulse signal generated by the pulse generation circuit 101 (phase converted to the frequency of the voltage controlled oscillator 102) is φ _i and the phase of the signal oscillated by the voltage controlled oscillator 102 is φ _o , The phase φ _i is determined by the reference signal REF and the delay time of the pulse generation circuit 101.
Further, the phase φ _{o of} the signal oscillated by the voltage controlled oscillator 102 is determined by a loop formed by the reference signal REF and the PLL.

When the phase φ _{i of the} pulse signal and the phase φ _{o of} the signal oscillated by the voltage controlled oscillator 102 are greatly different, the voltage controlled oscillator 102 has a phase greatly different from the phase of the pulse signal generated by the pulse generating circuit 101. Since it must oscillate, stable oscillation does not hold.
Therefore, in order for the voltage controlled oscillator 102 to perform stable oscillation, it is necessary to configure the circuit so that the phase φ _{i of the} pulse signal and the phase φ _{o of the} oscillation signal are close to each other.

In Non-Patent Document 1 below, in order to make the phase φ _{i of the} pulse signal and the phase φ _{o of the} oscillation signal close to each other, the voltage-controlled oscillator 102 includes the phase φ _{i of the} pulse signal and the phase of the oscillation signal. a built-in sample and hold circuit for detecting a phase difference between phi _o, the sample and hold circuits a phase difference detected by the feedback to PLL, the technique of the PLL to adjust the synchronous phase based on the phase difference disclosed Has been.
As a result, the injection locking of the pulse signal to the voltage controlled oscillator 102 and the phase of the PLL are adjusted, and the two mechanisms can be compatible.

JP2011-239226A (FIG. 1)

“An Injection-Locked Ring PLL with Self-Aligned Injection Window” by Che-Fu Liang and Keng-Jan Hsiao, ISSCC2011 digest 5.2

Since the conventional injection-locked oscillator is configured as described above, it is possible to achieve both injection locking of the pulse signal and PLL by adjusting the synchronization phase based on the phase difference detected by the sample hold circuit. . However, since another loop exists in the PLL loop, there is a problem that the convergence time may be increased.
Further, when the oscillation frequency of the voltage controlled oscillator 102 is increased, there is a problem that the operation speed of the sample-and-hold circuit cannot catch up and the pulse signal injection locking and the PLL cannot be realized at the same time.

  The present invention has been made in order to solve the above-described problems. Even when the oscillation frequency of the voltage-controlled oscillator is high, the injection-locked oscillator can realize both injection locking of the pulse signal and PLL in a short time. The purpose is to obtain.

  An injection locking oscillator according to the present invention includes a pulse generation circuit that converts a reference signal into a pulse signal, and a first signal that oscillates a signal having a frequency corresponding to the frequency control signal in synchronization with the pulse signal converted by the pulse generation circuit. A voltage-controlled oscillator, a second voltage-controlled oscillator that oscillates a signal having a frequency corresponding to the frequency control signal in synchronization with a signal oscillated by the first voltage-controlled oscillator, and a second voltage-controlled oscillator. A phase difference detection unit that divides the oscillated signal and detects the phase difference between the divided signal and the reference signal is provided, and the frequency control signal output unit corresponds to the phase difference detected by the phase difference detection unit. The frequency control signal is output to the first and second voltage controlled oscillators.

  According to the present invention, a pulse generation circuit that converts a reference signal into a pulse signal, and a first voltage control that oscillates a signal having a frequency corresponding to the frequency control signal in synchronization with the pulse signal converted by the pulse generation circuit. An oscillator, a second voltage controlled oscillator that oscillates a signal having a frequency corresponding to the frequency control signal in synchronization with a signal oscillated by the first voltage controlled oscillator, and oscillated by a second voltage controlled oscillator A frequency difference detection unit that divides the signal and detects a phase difference between the divided signal and the reference signal is provided, and the frequency control signal output unit controls the frequency corresponding to the phase difference detected by the phase difference detection unit. Since the signal is output to the first and second voltage-controlled oscillators, both pulse signal injection locking and PLL can be realized in a short time even if the oscillation frequency of the first voltage-controlled oscillator is high. There is an effect that can Rukoto.

It is a block diagram which shows the injection locking oscillator by Embodiment 1 of this invention. It is a block diagram which shows the injection locking oscillator by Embodiment 2 of this invention. 10 is a configuration diagram showing an injection-locked oscillator disclosed in Patent Document 1. FIG.

Embodiment 1 FIG.
1 is a block diagram showing an injection-locked oscillator according to Embodiment 1 of the present invention.
In FIG. 1, when a reference signal REF (for example, a sine wave signal oscillated from a crystal oscillator or the like) is input, a pulse generation circuit 1 performs a process of converting the reference signal REF into a pulse signal having a small width.
A voltage controlled oscillator 2, which is a VCO (Voltage Controlled Oscillator), synchronizes with the pulse signal converted by the pulse generation circuit 1 and outputs a signal having a frequency corresponding to the frequency control signal Vt, which is a control voltage output from the loop filter 7. Perform the process of oscillation. The voltage controlled oscillator 2 constitutes a first voltage controlled oscillator.

The voltage controlled oscillator 3a which is a VCO performs a process of oscillating a signal having a frequency corresponding to the frequency control signal Vt which is a control voltage output from the loop filter 7 in synchronization with the signal oscillated by the voltage controlled oscillator 2. .
The voltage controlled oscillator 3b, which is a VCO, performs processing for oscillating a signal having a frequency corresponding to the frequency control signal Vt, which is a control voltage output from the loop filter 7, in synchronization with the signal oscillated by the voltage controlled oscillator 3a. .
FIG. 1 shows an example in which the voltage controlled oscillator 3a and the voltage controlled oscillator 3b are connected in series, and the second voltage controlled oscillator is configured by the two voltage controlled oscillators 3a and 3b. Two or more voltage controlled oscillators 3 may be connected in series. Further, only one voltage controlled oscillator 3 may be provided.

The frequency dividing circuit 4 performs a process of dividing the signal oscillated from the voltage controlled oscillator 3b, which is a voltage controlled oscillator in the final stage, by N, and outputting a signal after the N division.
A phase frequency comparison circuit 5, which is a PFD (Phase Frequency Detector), performs a process of detecting a phase difference between the reference signal REF and the N-divided signal output from the frequency dividing circuit 4.
The frequency dividing circuit 4 and the phase frequency comparison circuit 5 constitute a phase difference detecting means.

The charge pump 6, which is a CP, performs a process of outputting a current corresponding to the phase difference detected by the phase frequency comparison circuit 5.
The loop filter 7 converts the current output from the charge pump 6 into a voltage, smoothes the voltage, and uses the smoothed voltage as a frequency control signal Vt at the frequency control terminals of the voltage controlled oscillators 2, 3a, 3b. Perform the output process.
The charge pump 6 and the loop filter 7 constitute frequency control signal output means.

Next, the operation will be described.
When the reference signal REF is input, the pulse generation circuit 1 converts the reference signal REF into a pulse signal having a small width, and outputs the pulse signal to the voltage controlled oscillator 2.
When the pulse generation circuit generates a pulse signal, the voltage controlled oscillator 2 oscillates a signal having a frequency corresponding to the frequency control signal Vt that is a control voltage output from the loop filter 7 in synchronization with the pulse signal.
Here, the phase of the pulse signal generated by the pulse generation circuit 1 (the phase converted to the frequency of the voltage controlled oscillator 2) is φ _i , and the phase of the signal oscillated by the voltage controlled oscillator 2 is φ ₁ .

Voltage controlled oscillator 3a is synchronized with the oscillation signal (phase phi ₁ signal) by the voltage controlled oscillator 2, the oscillation signal of the frequency corresponding to the frequency control signal Vt is a control voltage output from the loop filter 7 To do. Here, the phase of the oscillation signal by the voltage controlled oscillator 3a and phi _2.
The voltage controlled oscillator 3b oscillates a signal having a frequency corresponding to the frequency control signal Vt, which is a control voltage output from the loop filter 7, in synchronization with the signal oscillated by the voltage controlled oscillator 3a (signal of phase φ ₂ ). To do. Here, the phase of the oscillation signal by the voltage-controlled oscillator 3b and phi _o.
Note that the phase φ _o of the oscillation signal of the voltage controlled oscillator 3b is determined by the phase synchronization function of the PLL (the PLL is composed of the frequency dividing circuit 4, the phase frequency comparison circuit 5, the charge pump 6 and the loop filter 7). It is determined.

The frequency dividing circuit 4 divides the signal oscillated from the voltage controlled oscillator 3 b, which is the last-stage voltage controlled oscillator, by N, and outputs the signal after N division to the phase frequency comparison circuit 5.
The phase frequency comparison circuit 5 detects the phase difference Δφ between the input reference signal REF and the N-divided signal output from the frequency divider circuit 4, and information indicating the phase difference Δφ is stored in the charge pump 6. Output to.

When the charge pump 6 receives the information indicating the phase difference Δφ from the phase frequency comparison circuit 5, the charge pump 6 outputs a current I corresponding to the phase difference Δφ to the loop filter 7 as shown in the following equation (1), for example. .
I = Δφ × a (1)
In the formula (1), a is a preset proportionality constant.
When the loop filter 7 receives the current I from the charge pump 6, the loop filter 7 converts the current I into the voltage V, smoothes the voltage V, and uses the smoothed voltage as the frequency control signal Vt, and the voltage controlled oscillator 2. Output to the frequency control terminals 3a and 3b.
Thus, the voltage controlled oscillators 2, 3a, 3b oscillate signals according to the same frequency control signal Vt.

Here, when the phases φ _i , φ ₁ , φ ₂ , and φ _o of each signal are compared, the values of the phase φ ₁ and the phase φ ₂ are values between the phase φ _i and the phase φ _o .
Therefore, the phase difference between the input wave and the output wave in the voltage controlled oscillator 2 is compared with the phase difference φ _o −φ _i between the input wave and the output wave in the voltage controlled oscillator 102 in the conventional injection locked oscillator shown in FIG. φ ₁ −φ _i becomes a small value.
Similarly, with respect to the phase difference φ ₂ −φ ₁ between the input wave and the output wave in the voltage controlled oscillator 3a and the phase difference φ _o −φ ₂ between the input wave and the output wave in the voltage controlled oscillator 3b, The value is smaller than the phase difference φ _o −φ _i in the voltage controlled oscillator 102 in the oscillator.

Therefore, compared with the voltage controlled oscillator 102 in the conventional injection locked oscillator shown in FIG. 3, the voltage controlled oscillators 2, 3a, 3b can reduce the phase difference between the input wave and the output wave.
If the phase difference between the input wave and the output wave is smaller than a certain value, the injection-locked oscillation can be stably maintained. Therefore, the configuration of FIG. 1 can realize both the pulse injection lock and the PLL. It becomes possible.
In the example of FIG. 1, three voltage controlled oscillators 2, 3a, 3b are connected in series. However, the number of voltage controlled oscillators connected in series may be two or more. However, if the number of voltage-controlled oscillators connected in series increases, the phase difference between the input wave and the output wave of each voltage-controlled oscillator becomes smaller, so that more stable operation is possible.

  As apparent from the above, according to the first embodiment, the pulse generation circuit 1 that converts the reference signal REF into a pulse signal, and the frequency control signal Vt in synchronization with the pulse signal converted by the pulse generation circuit 1. A voltage controlled oscillator 2 that oscillates a signal having a frequency corresponding to the voltage, a voltage controlled oscillator 3a that oscillates a signal having a frequency corresponding to the frequency control signal Vt in synchronization with the signal oscillated by the voltage controlled oscillator 2, and a voltage In synchronism with the signal oscillated by the controlled oscillator 3a, the voltage controlled oscillator 3b that oscillates a signal having a frequency corresponding to the frequency control signal Vt, and the signal oscillated by the voltage controlled oscillator 3b are frequency-divided. And a phase difference detection means for detecting a phase difference Δφ between the reference signal REF and the frequency control signal output means detects the phase difference Δφ detected by the phase difference detection means. Since the corresponding frequency control signal Vt is output to the voltage controlled oscillators 2, 3a, 3b, both injection locking of the pulse signal and PLL can be realized in a short time even if the oscillation frequency of the voltage controlled oscillator 2 is high. The effect which can be done is produced.

According to the first embodiment, it is possible to achieve both the injection locking of the pulse signal and the PLL, but it is also possible to reduce the spurious of the output signal.
That is, the oscillation signal of the voltage controlled oscillator 2 that performs pulse injection has a high level of spurious at a frequency separated from the oscillation wave by the frequency of the reference signal REF, but is injected into the voltage controlled oscillators 3a and 3b in the subsequent stage. Accordingly, spurious is reduced by the filtering effect of injection locking.
For this reason, compared with the conventional injection locking oscillator, a characteristic with lower spurious can be obtained.

Embodiment 2. FIG.
2 is a block diagram showing an injection locked oscillator according to Embodiment 2 of the present invention. In the figure, the same reference numerals as those in FIG.
Charge pump 6a is a CP carries out a process of outputting the current I ₁ corresponding to the phase difference Δφ detected by the phase frequency comparator circuit 5.
The charge pump 6b, which is a CP, performs a process of outputting a current I ₂ (I ₁ > I ₂ ) corresponding to the phase difference Δφ detected by the phase frequency comparison circuit 5.
The charge pump 6c, which is a CP, performs a process of outputting a current I ₃ (I ₂ > I ₃ ) corresponding to the phase difference Δφ detected by the phase frequency comparison circuit 5.

Loop filter 7a converts the current I ₁ output from the charge pump 6a to voltages V _1, the voltages V ₁ and smoothing, as the frequency control signal Vt ₁ voltage after smoothing, the frequency of the voltage controlled oscillator 2 Perform processing to output to the control terminal.
The charge pump 6a and the loop filter 7a constitute first frequency control signal output means.

Loop filter 7b converts the current I ₂ which is output from the charge pump 6b to voltage V _2, the voltage V ₂ to smooth, as the frequency control signal Vt ₂ the voltage after the smoothing, the frequency of the voltage controlled oscillator 3a Perform processing to output to the control terminal.
Loop filter 7c converts the current I ₃ which is output from the charge pump 6c to the voltage V _3, the voltage V ₃ smoothes the voltage after smoothing as the frequency control signal Vt _3, the frequency of the voltage controlled oscillator 3b Perform processing to output to the control terminal.
The charge pumps 6b and 6c and the loop filters 7b and 7c constitute second frequency control signal output means.

Next, the operation will be described.
In the first embodiment, even though the voltage controlled oscillator has a three-stage configuration, an example in which the charge pump 6 and the loop filter 7 constituting the frequency control signal output unit are one set has been described. A set of the charge pump 6 and the loop filter 7 may be provided every time.
However, when the voltage controlled oscillator has a three-stage configuration, for example, the current setting value of the charge pump 6a is the largest, the current setting value of the charge pump 6b is the next largest, and the current setting value of the charge pump 6c is the smallest. .
That is, the proportional constants a ₁ , a ₂ , a ₃ used when the charge pumps 6a, 6b, 6c calculate the current I corresponding to the phase difference Δφ detected by the phase frequency comparison circuit 5 are expressed by the following formula (2 ) Is set.
a ₁ > a ₂ > a ₃ (2)

When the phase frequency comparison circuit 5 outputs information indicating the phase difference Δφ in the same manner as in the first embodiment, for example, the charge pump 6a corresponds to the phase difference Δφ as shown in the following equation (3). the current _{I 1} to be output to the loop filter 7a.
I ₁ = Δφ × a ₁ (3)
Loop filter 7a receives the current _{I 1} from the charge pump 6a, converts the current _{I 1} to the voltages _{V 1,} the voltages _{V 1} and smoothing, as the frequency control signal Vt ₁ voltage after smoothing, Output to the frequency control terminal of the voltage controlled oscillator 2.
As a result, the voltage controlled oscillator 2 oscillates a signal according to the frequency control signal Vt ₁ .

The charge pump 6b, when the phase frequency comparator circuit 5 outputs information indicating the phase difference [Delta] [phi, for example, as shown in the following formula (4), outputs a current I ₂ corresponding to the phase difference [Delta] [phi to the loop filter 7b To do.
I ₂ = Δφ × a ₂ (4)
Loop filter 7b receives the current _{I 2} from the charge pump 6b, and converts the current _{I 2} to a voltage _{V 2,} the voltage _{V 2} to smooth, as the frequency control signal Vt ₂ the voltage after smoothing, Output to the frequency control terminal of the voltage controlled oscillator 3a.
Accordingly, the voltage controlled oscillator 3a oscillates a signal according to the frequency control signal Vt _2.

The charge pump 6c, when the phase frequency comparator circuit 5 outputs information indicating the phase difference [Delta] [phi, for example, as shown in the following formula (5), the output current I ₃ corresponding to the phase difference [Delta] [phi to the loop filter 7c To do.
I ₃ = Δφ × a ₃ (5)
Loop filter 7c receives the current _{I 3} from the charge pump 6c, and converts the current _{I 3} to the voltage _{V 3,} the voltage _{V 3} smoothes the voltage after smoothing as the frequency control signal Vt _3, Output to the frequency control terminal of the voltage controlled oscillator 3b.
Accordingly, the voltage controlled oscillator 3b oscillates a signal according to the frequency control signal Vt _3.

In the case of the second embodiment, since the current setting values of the charge pumps 6a, 6b, 6c are set as described above, a more stable operation than that of the first embodiment is expected for the following reason. be able to.
If the phase φ _{i of} the injection pulse (pulse signal generated by the pulse generation circuit 1) instantaneously varies, the phase variation of the output wave in the voltage controlled oscillator 2 is the largest, and then the output in the voltage controlled oscillator 3a. The phase variation of the wave is large, and the phase variation of the output wave in the voltage controlled oscillator 3b is the smallest.
For this reason, if the sensitivity of the voltage controlled oscillator 2 is set to the highest level and the sensitivity of the voltage controlled oscillator 3b is set to the lowest level as the control of the voltage controlled oscillator by the PLL, the instantaneous fluctuation of the phase φ _i of the injection pulse is promptly changed. Can be dealt with.
In the second embodiment, in order to maximize the sensitivity of the voltage controlled oscillator 2 and minimize the sensitivity of the voltage controlled oscillator 3b, the current setting value of the charge pump 6a is maximized to set the current setting of the charge pump 6c. The value is the smallest.

In the second embodiment, the current setting value of the charge pump 6a is maximized and the current setting value of the charge pump 6c is minimized. However, the bands of the loop filters 7a, 7b, and 7c are changed. By doing so, further stable operation can be expected.
That is, the band of the loop filter 7a is widened, the band of the loop filter 7b is widened next, and the band of the loop filter 7c is narrowest.
Also in this case, the sensitivity of the voltage controlled oscillator 2 is the highest and the sensitivity of the voltage controlled oscillator 3b is the lowest with respect to the instantaneous fluctuation of the phase φ _i of the injection pulse. Expect to work.

  In the present invention, within the scope of the invention, any combination of the embodiments, or any modification of any component in each embodiment, or omission of any component in each embodiment is possible. .

  DESCRIPTION OF SYMBOLS 1 Pulse generation circuit, 2 Voltage controlled oscillator (1st voltage controlled oscillator), 3a, 3b Voltage controlled oscillator (2nd voltage controlled oscillator), 4 Frequency dividing circuit (phase difference detection means), 5 Phase frequency comparison circuit (Phase difference detection means), 6 charge pump (frequency control signal output means), 6a charge pump (first frequency control signal output means), 6b, 6c charge pump (second frequency control signal output means), 7 loops Filter (frequency control signal output means), 7a loop filter (first frequency control signal output means), 7b, 7c loop filter (second frequency control signal output means), 101 pulse generation circuit, 102 voltage controlled oscillator, 103 Frequency divider circuit, 104 phase frequency comparator, 105 charge pump, 106 loop filter.

Claims (6)

A pulse generation circuit for converting a reference signal into a pulse signal;
A first voltage controlled oscillator that oscillates a signal having a frequency corresponding to a frequency control signal in synchronization with the pulse signal converted by the pulse generation circuit;
A second voltage controlled oscillator that oscillates a signal having a frequency corresponding to the frequency control signal in synchronization with a signal oscillated by the first voltage controlled oscillator;
Phase difference detection means for frequency-dividing the signal oscillated by the second voltage controlled oscillator and detecting a phase difference between the frequency-divided signal and the reference signal;
An injection locked oscillator comprising: frequency control signal output means for outputting a frequency control signal corresponding to the phase difference detected by the phase difference detection means to the first and second voltage controlled oscillators.   2. The plurality of second voltage controlled oscillators are connected in series, and a signal oscillated by a second voltage controlled oscillator at the final stage is divided by the phase difference detecting means. The injection-locked oscillator described. A pulse generation circuit for converting a reference signal into a pulse signal;
A first voltage controlled oscillator that oscillates a signal having a frequency corresponding to the first frequency control signal in synchronization with the pulse signal converted by the pulse generation circuit;
A second voltage controlled oscillator that oscillates a signal having a frequency corresponding to a second frequency control signal in synchronization with a signal oscillated by the first voltage controlled oscillator;
Phase difference detection means for frequency-dividing the signal oscillated by the second voltage controlled oscillator and detecting a phase difference between the frequency-divided signal and the reference signal;
A first frequency control signal output means for outputting a first frequency control signal corresponding to the phase difference detected by the phase difference detection means to the first voltage controlled oscillator; and a level detected by the phase difference detection means. A second frequency control signal output means for outputting a second frequency control signal corresponding to the phase difference to the second voltage controlled oscillator;
An injection locking oscillator characterized in that the first frequency control signal output from the first frequency control signal output means is larger than the second frequency control signal output from the second frequency control signal output means. . A plurality of second voltage controlled oscillators are connected in series, and second frequency control signal output means corresponding to each second voltage controlled oscillator is prepared,
The signal oscillated by the second voltage controlled oscillator at the final stage is divided by the phase difference detecting means,
4. The injection-locked oscillator according to claim 3, wherein the second frequency control signal output from each second frequency control signal output means is supplied to the corresponding second voltage controlled oscillator. The first frequency control signal output unit outputs a current corresponding to the phase difference detected by the phase difference detection unit, converts the current output from the charge pump into a voltage, and converts the voltage And a loop filter that outputs the smoothed voltage as a frequency control signal to the first voltage controlled oscillator,
The second frequency control signal output unit outputs a current corresponding to the phase difference detected by the phase difference detection unit, converts the current output from the charge pump into a voltage, and converts the voltage And a loop filter that outputs the smoothed voltage as a frequency control signal to the second voltage controlled oscillator,
Each charge pump is set so that the current output from the charge pump of the first frequency control signal output means is larger than the current output from the charge pump of the second frequency control signal output means. The injection-locked oscillator according to claim 3, wherein the injection-locked oscillator is provided. The first frequency control signal output unit outputs a current corresponding to the phase difference detected by the phase difference detection unit, converts the current output from the charge pump into a voltage, and converts the voltage And a loop filter that outputs the smoothed voltage as a frequency control signal to the first voltage controlled oscillator,
The second frequency control signal output unit outputs a current corresponding to the phase difference detected by the phase difference detection unit, converts the current output from the charge pump into a voltage, and converts the voltage And a loop filter that outputs the smoothed voltage as a frequency control signal to the second voltage controlled oscillator,
5. The loop filter band in the first frequency control signal output means is set wider than the loop filter band in the second frequency control signal output means. Injection-locked oscillator.

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