JP2014032892A - Thin battery integrated semiconductor device and method of manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable a thin battery integrated semiconductor device to be made thin without impairing both functions of a thin-film battery and a semiconductor circuit element.SOLUTION: The thin battery integrated semiconductor device includes a substrate 10, a thin film transistor 20 that is a semiconductor circuit element, and a thin-film battery 30. The thin film transistor 20 includes a gate electrode layer 21, a source electrode layer 24, and a drain electrode layer that are formed in a TFT region of the substrate 10. The thin-film battery 30 includes a positive electrode collector layer 31, a cathode electrode layer 33, a solid electrolyte layer 34, an anode electrode layer 35, and a negative electrode collector layer that are formed in a TFB region different from the TFT region of the substrate 10. A wiring layer 53 electrically connects the source electrode layer 24 and the negative electrode collector layer together.

Description

  The present invention relates to a thin battery integrated semiconductor device and a manufacturing method thereof.

  In recent years, a thin film battery (TFB) including a solid electrolyte has been developed. Such a thin-film battery has a great advantage in that it can be reduced in size and weight and increased in capacity because all the layers thereof are all solid type formed by a semiconductor process.

  Patent Document 1 discloses a thin film battery integrated element in which a thin film battery is disposed above an element such as a transistor, a resistor, or a capacitor and both are electrically connected via a wiring layer. According to the thin film battery integrated element of Patent Document 1, since it is not necessary to connect the element and the thin film battery with lead wires, it is possible to achieve high integration of the element.

JP 2000-106366 A

  However, in the thin film battery integrated element of Patent Document 1, since the thin film battery is disposed above the element, for example, when the element is a thin film transistor (TFT), the element is connected to the display device. It cannot be used as a switching element. Furthermore, the thin film battery integrated element of Patent Document 1 has a disadvantage that it is not suitable for thinning the device.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a thin battery integrated semiconductor device and a method for manufacturing the same, which can be made thin without impairing the functions of both the thin film battery and the semiconductor circuit element.

  A thin battery integrated semiconductor device according to the present invention includes a substrate, a semiconductor circuit element including at least one conductive layer formed on the first region of the substrate, and a first region different from the first region of the substrate. Formed on two regions, an all-solid-state thin film battery including a positive electrode current collector layer, a cathode electrode layer, a solid electrolyte layer, an anode electrode layer, and a negative electrode current collector layer; and the substrate formed on the substrate, A wiring layer for electrically connecting the thin film battery and the semiconductor circuit element;

  According to this, since the semiconductor circuit element and the thin film battery are not in a positional relationship such that they overlap each other, they are arranged in different regions of the substrate. The function of both can be used, and the apparatus can be made thin.

  The conductive layer of the semiconductor circuit element is preferably made of the same material as at least one of the positive electrode current collector layer and the negative electrode current collector layer of the thin film battery. According to this, since two layers made of the same material can be formed at the same time, the manufacturing process can be simplified.

  The conductive layer of the semiconductor circuit element is preferably made of the same material as at least one of the positive electrode current collector layer and the negative electrode current collector layer of the thin film battery and the wiring layer. According to this, since three layers made of the same material can be formed at the same time, the manufacturing process can be simplified.

  The semiconductor circuit element has two conductive layers, and one of the two conductive layers is made of the same material as one of the positive electrode current collector layer and the negative electrode current collector layer of the thin film battery, It is preferable that the other of the two conductive layers is made of the same material as the other of the positive electrode current collector layer and the negative electrode current collector layer of the thin film battery. According to this, since two sets of two layers made of the same material can be formed simultaneously, the manufacturing process can be further simplified.

  The semiconductor circuit element may be a thin film transistor.

  A plurality of the thin film transistors may be provided, and the plurality of thin film transistors may be switching elements arranged for each pixel of the display device. Thus, a display device in which a power source made of a thin film battery is integrally formed can be obtained.

  A plurality of the semiconductor circuit elements may be provided, and the plurality of semiconductor circuit elements may constitute a charge / discharge circuit of the thin film battery. Accordingly, it is possible to provide a module in which a thin film battery, a charge / discharge circuit thereof, and wiring between the two are integrally formed on one substrate.

  The thin film battery may be a power source for the semiconductor circuit element. As a result, it is possible to provide a module in which a semiconductor circuit element, a thin film battery as a power source thereof, and wiring between the two are integrally formed on one substrate.

  The manufacturing method of a thin battery integrated semiconductor device according to the present invention includes a step of forming a semiconductor circuit element including at least one conductive layer on a first region of a substrate, and a step different from the first region of the substrate. Forming an all-solid-state thin film battery including a positive electrode current collector layer, a cathode electrode layer, a solid electrolyte layer, an anode electrode layer, and a negative electrode current collector layer on two regions; and the thin film battery on the substrate. And forming a wiring layer for electrically connecting the semiconductor circuit element to the semiconductor circuit element, and forming the conductive layer of the semiconductor circuit element by forming the positive current collector layer and the negative current collector of the thin film battery. This is performed simultaneously with the formation of one of the electric conductor layers.

  This simplifies the manufacture of the device described above. Therefore, the time required for manufacturing can be greatly shortened.

  The conductive layer of the semiconductor circuit element is preferably formed simultaneously with the formation of one of the positive electrode current collector layer and the negative electrode current collector layer of the thin film battery and the wiring layer. Thereby, the manufacture of the device can be simplified.

  The semiconductor circuit element has the two conductive layers, and one of the two conductive layers of the semiconductor circuit element is formed on the positive current collector layer and the negative current collector layer of the thin film battery. It is preferable that the formation of the other of the two conductive layers of the semiconductor circuit element is performed simultaneously with the formation of the one of the positive electrode current collector layer and the negative electrode current collector layer of the thin film battery. . Thereby, the manufacture of the device can be simplified.

  In the step of forming the thin film battery, the anode electrode layer may be formed after the positive electrode current collector layer, the cathode electrode layer, the solid electrolyte layer, and the negative electrode current collector layer are formed. Thereby, since the anode electrode layer is formed last, the period until the anode electrode layer is protected by the protective film can be shortened.

  According to the present invention, since the semiconductor circuit element and the thin film battery are not in a positional relationship such that they overlap each other, they are arranged in different regions of the substrate. The device can be made thin without impairing the functions of both, such as being usable as an element.

1 is a schematic plan view of a drive module for an active matrix liquid crystal display device which is a thin battery integrated semiconductor device according to a first embodiment of the present invention. FIG. 2 is a partial cross-sectional view of the thin battery integrated semiconductor device depicted in FIG. 1. FIG. 3 is a partial cross-sectional view of a thin battery integrated semiconductor device at a position different from FIG. 2. FIG. 2 is a circuit diagram around a thin film battery in the thin battery integrated semiconductor device depicted in FIG. 1. FIG. 2 is a cross-sectional view illustrating a method of manufacturing the thin battery integrated semiconductor device depicted in FIG. It is a typical top view of the monolithic TFB module which is a thin battery integrated semiconductor device which concerns on the modification of 1st Embodiment. It is sectional drawing showing the manufacturing method of the thin battery integrated semiconductor device which concerns on 2nd Embodiment of this invention to process order. FIG. 8 is a cross-sectional view showing a modification of the manufacturing method depicted in FIG. 7 in the order of steps. It is sectional drawing showing the manufacturing method of the thin battery integrated semiconductor device which concerns on 3rd Embodiment of this invention to process order. It is sectional drawing showing the manufacturing method of the thin battery integrated semiconductor device which concerns on 4th Embodiment of this invention to process order. It is a circuit diagram around a thin film battery in a thin battery integrated semiconductor device according to a modification.

[First Embodiment]
FIG. 1 shows an active-matrix liquid-crystal display drive module 1 (hereinafter simply referred to as “drive module”), which is a thin battery-integrated semiconductor device according to the first embodiment of the present invention. ). A liquid crystal display device is manufactured by laminating the drive module 1 with a liquid crystal layer, a polarizing plate, a color filter, a counter substrate, and the like (not shown).

  The drive module 1 is obtained by providing three regions of a TFT region 2, a TFB region 3, and a control circuit region 4 on an insulating substrate 10 made of, for example, glass or silicon. In the TFT region 2, a plurality of thin film transistors (TFTs) as liquid crystal switching elements are two-dimensionally arranged for each pixel. In the TFB region 3, a thin film battery (TFB) is formed. The control circuit area 4 includes a memory, a circuit for controlling a plurality of thin film transistors formed in the TFT area 2, and a charge / discharge circuit for a thin film battery formed in the TFB area 3 (DC-DC converter, AC-DC converter, DC-AC converter etc. are formed. In the control circuit region 4, a plurality of semiconductor circuit elements such as thin film transistors, resistors, capacitors, and diodes are formed.

  Between the TFT region 2 and the TFB region 3, there is formed a wiring region 5a provided with a wiring layer for electrically connecting the semiconductor circuit elements formed in these regions and the thin film battery. Between the TFB region 3 and the control circuit region 4, there is formed a wiring region 5b provided with a wiring layer for electrically connecting the semiconductor circuit elements formed in these regions and the thin film battery. Between the control circuit region 4 and the TFT region 2, there is formed a wiring region 5c provided with a wiring layer for electrically connecting the semiconductor circuit elements formed in both the regions. The wiring layers in the wiring regions 5a, 5b, and 5c are not only in the wiring region, but also in the TFT region 2, the TFB region 3, and the control circuit region in which semiconductor circuit elements and / or thin film batteries connected by the wiring layer exist. It extends to 4. Details of the wiring region 5a will be described later.

  The thin film transistor 20 formed in the TFT region 2 and the thin film battery 30 formed in the TFB region 3 will be described with reference to FIGS. 2 and 3 are cross-sectional views of the thin film transistor 20 and the thin film battery 30 at different positions. In addition, since the width of the thin film transistor 20 is about several tens μm while the width of the thin film battery 30 is about several inches, the scales of the two in the drawings are different from each other in view of ease of viewing.

  The thin film transistor 20 has an inverted staggered (bottom gate) structure. That is, the thin film transistor 20 is formed on the gate electrode layer 21 having a thickness of 150 nm to 1000 nm formed on the substrate 10, the gate insulating film 22 having a thickness of 30 nm to 500 nm covering the gate electrode layer 21, and the gate insulating film 22. The semiconductor layer 23 having a thickness of 30 nm to 300 nm and the source electrode layer 24 and the drain electrode layer 25 having a thickness of 150 nm to 1000 nm formed on the semiconductor layer 23 are provided. Further, the end portions of the source electrode layer 24 and the drain electrode layer 25 that are close to each other are located on an etch stopper layer 26 of 50 nm to 500 nm that is an insulating layer formed on the semiconductor layer 23. The entire drive module 1 including the thin film transistor 20 is covered with a passivation film 27 as a sealing protective film. When a positive voltage is applied to the gate electrode layer 21, a channel is formed in the vicinity of the semiconductor layer 23, and the source electrode layer 24 and the drain electrode layer 25 are conducted through the channel and current flows.

  As the material of the gate electrode layer 21, for example, a material selected from Ti, Al, Ta, W, Pt, Mo, Cu and Ni, nitrides thereof, oxides and silicides, and compounds of these materials is used. be able to. The gate electrode layer 21 may have either a single layer structure or a stacked structure of a plurality of layers. As an example, the gate electrode layer 21 having a three-layer stacked structure of Ti (film thickness 30 nm) / Al (film thickness 200 nm) / Ti (film thickness 300 nm) may be formed sequentially from the bottom.

  The gate insulating film 22 may have either a single layer structure or a multi-layered structure, and as its material, for example, Si oxide or Si nitride can be used. As an example, the gate insulating film 22 having a two-layer stacked structure of Si nitride (film thickness 300 nm) / Si oxide (film thickness 50 nm) may be formed sequentially from the bottom. As the material of the semiconductor layer 23, a material selected from amorphous Si, microcrystalline Si, polycrystalline Si, IGZO, SiC, carbon thin film, ZnO, GaN, IZO, and an organic semiconductor single thin film can be used. As an example, the semiconductor layer 23 having a single layer structure made of amorphous Si having a thickness of 100 nm may be formed.

  The etch stopper layer 26 may have either a single layer structure or a multilayer structure of multiple layers, and as the material thereof, for example, Si oxide or Si nitride can be used. As an example, the etch stopper layer 26 having a two-layer structure of Si oxide (film thickness 60 nm) / Si nitride (film thickness 200 nm) may be formed sequentially from the bottom.

  The source electrode layer 24 and the drain electrode layer 25 may have either a single-layer structure or a multi-layered structure, and examples of the material include Ti, Al, Ta, W, Pt, Mo, and Cu. And Ni, their nitrides, oxides and silicides, and compounds selected from these can be used. As an example, the source electrode layer 24 and the drain electrode layer 25 having a single layer structure made of Cu with a thickness of 200 nm may be formed. The passivation film 27 may have either a single layer structure or a multi-layer stacked structure, and as the material thereof, for example, Si oxide or Si nitride can be used. As an example, the passivation film 27 having a two-layer stacked structure of Si nitride (film thickness 250 nm) / Si oxide (film thickness 700 nm) may be formed sequentially from the bottom.

  The thin film battery 30 includes a positive electrode current collector layer 31 having a film thickness of 150 nm to 1000 nm formed on the substrate 10, a gate having a film thickness of 30 nm to 500 nm that covers the peripheral part of the positive electrode current collector layer 31 and exposes other portions. The insulating film 22 includes a cathode electrode layer 33, a solid electrolyte layer 34, an anode electrode layer 35, and a negative electrode current collector layer 36 which are sequentially formed on the positive electrode current collector layer 31. In the thin film battery 30, the positive electrode current collector layer 31, the cathode electrode layer 33, the solid electrolyte layer 34, the anode electrode layer 35, and the negative electrode current collector layer 36 are laminated so as to be energized in this order.

  The peripheral edge of the cathode electrode layer 33 is located on the peripheral edge of the gate insulating film 22, the solid electrolyte layer 34 has a slightly smaller size in plan view than the cathode electrode layer 33, and the anode electrode layer 35 is smaller than the solid electrolyte layer 34. Further, the size in plan view is slightly smaller, and the negative electrode current collector layer 36 is slightly smaller in size in plan view than the anode electrode layer 35. Therefore, the side surface of the thin film battery 30 is tapered from the cathode electrode layer 33 to the negative electrode current collector layer 36. Thereby, conduction between layers can be suppressed. The thin film battery 30 is covered with a passivation film 27 in the same manner as the thin film transistor 20.

  The positive electrode current collector layer 31 has the same thickness and the same structure as the gate electrode layer 21 and is made of the same material as the gate electrode layer 21. The negative electrode current collector layer 36 has the same thickness and the same structure as the source electrode layer 24 and the drain electrode layer 25 and is made of the same material as the source electrode layer 24 and the drain electrode layer 25. As will be described later, the positive electrode current collector layer 31 is formed simultaneously with the gate electrode layer 21. The negative electrode current collector layer 36 is formed at the same time as the source electrode layer 24, the drain electrode layer 25, and a wiring layer 53 described later.

  As a material for the cathode electrode layer 33, for example, LiMnO or LiCoO can be used. As a material of the solid electrolyte layer 34, for example, LiPON, LiPO, or LiBON can be used. As a material of the anode electrode layer 35, for example, Li, C, or VO can be used. The cathode electrode layer 33, the solid electrolyte layer 34, and the anode electrode layer 35 all have a film thickness of 500 nm to 2000 nm. The film thickness of the negative electrode current collector layer 36 is 150 nm to 1000 nm.

  In the wiring region 5a, a wiring layer 53 and a gate insulating film 22 formed under the wiring layer 53 are formed. The wiring layer 53 is formed as the same layer as the source electrode layer 24 formed in the TFT region 2 and the negative electrode current collector layer 36 formed in the TFB region 3.

  That is, the wiring layer 53 is obtained by extending the source electrode layer 24 and the negative electrode current collector layer 36 as they are to the wiring region 5a. Therefore, as described above, the negative electrode current collector layer 36 is made of the same material as the source electrode layer 24, the drain electrode layer 25, and the wiring layer 53. Thus, the wiring layer 53 electrically connects the thin film transistor 20 and the thin film battery 30.

  In addition, each conductive layer (the positive electrode current collector layer 31, the gate electrode layer 21, the negative electrode current collector layer 36, the source electrode layer 24 and the drain electrode layer 25, the cathode electrode layer 33, the solid, which constitutes the thin film transistor 20 and the thin film battery 30 As the material of the electrolyte layer 34 and the anode electrode layer 35), basically any material can be used as long as the conductivity is good. However, it is preferable that the conductive layer in the thin film transistor 20 to be subjected to microfabrication has a property that chipping does not easily occur. preferable. That is, while the properties required for the conductive layer are different between the thin film transistor 20 and the thin film battery 30, it is possible to select an optimal material in consideration that the conductive layers of the thin film transistor 20 and the thin film battery 30 are formed simultaneously. desired.

  FIG. 4 schematically shows the connection relationship between the thin film transistor 20 and the thin film battery 30. As shown in FIG. 4, the source electrode layer 24 of the thin film transistor 20 is connected to the negative electrode current collector layer 36 of the thin film battery 30 through the wiring layer 53. The drain electrode layer 25 of the drive module 1 is connected to a counter electrode (not shown) via a liquid crystal element 61 as a capacitor. By controlling the potential of the gate electrode layer 21, the current between the source and the drain can be turned on and off, whereby the liquid crystal element 61 can be driven.

  2 and 3, the thin film transistor 20 in the TFT region 2 and the thin film battery 30 in the TFB region 3 have been described as examples. However, the relationship described with reference to FIGS. 2 and 3 also holds between a plurality of semiconductor circuit elements such as thin film transistors, resistors, capacitors, and diodes formed in the control circuit region 4 and the thin film battery 30 in the TFB region. That is, one or two wiring layers (not shown) and a gate insulating film are formed in the wiring region 5b. In this case, the lower wiring layer is formed as the same layer as the gate electrode layer (or other conductive layer) formed in the control circuit region 4 and the positive electrode current collector layer 31 formed in the TFB region 3. . The upper wiring layer is formed as the same layer as the source electrode layer (or other conductive layer) formed in the control circuit region 4 and the negative electrode current collector layer 36 formed in the TFB region 3.

  Next, a method for manufacturing the drive module 1 will be described focusing on the thin film transistor 20 in the TFT region 2 and the thin film battery 30 in the TFB region 3 depicted in FIG. Although not described, the semiconductor circuit elements in the control circuit region 4 are formed simultaneously with the thin film transistor 20 and the thin film battery 30.

  First, as shown in FIG. 5A, a conductive layer is formed on the entire surface of the substrate 10 by PVD (Physical Vapor Deposition), and then the conductive layer is removed from the conductive layer by photolithography including an etching process using a resist. 21 and the positive electrode current collector layer 31 are formed simultaneously.

  Next, as shown in FIG. 5B, the entire surface of the substrate 10 is covered with a gate insulating film 22 by CVD (Chemical Vapor Deposition). Thereafter, as shown in FIG. 5C, a semiconductor layer 23 that overlaps with the gate electrode layer 21 in a plan view is formed by photolithography including an etching process from a semiconductor layer formed by CVD, PVD, or inkjet printing. It is formed on the gate insulating film 22.

  Then, as shown in FIG. 5D, an etch stopper layer 26 is formed on the semiconductor layer 23 by photolithography from the insulating layer formed by CVD. Thereafter, as shown in FIG. 5E, a partial region of the gate insulating film 22 outside the illustrated range on the gate electrode layer 21 and a partial region of the gate insulating film 22 on the positive electrode current collector layer 31 Are removed by photolithography including an etching step. As a result, a contact hole that exposes the gate electrode layer 21 is formed outside the illustrated range, and a contact hole 32a is formed in the gate insulating film 22 so that the upper surface of the positive electrode current collector layer 31 is exposed.

  Subsequently, as shown in FIG. 5 (f), the cathode electrode layer 33, the solid electrolyte layer 34, and the anode electrode layer are formed on the positive electrode current collector layer 31 by photolithography including film formation and etching processes by sputtering or PVD. 35 are formed sequentially. At this time, the thin film transistor 20 in the TFT region 2 is preferably protected by an insulating film (not shown).

  Next, as shown in FIG. 5G, a source electrode layer 24 and a drain electrode layer 25 are formed on the semiconductor layer 23 by photolithography including a film formation and etching process by PVD, and at the same time, an anode electrode A negative electrode current collector layer 36 is formed on the layer 35, and a wiring layer 53 that electrically connects the source electrode layer 24 and the negative electrode current collector layer 36 is formed. Thereafter, as shown in FIG. 5H, a passivation film 27 covering the entire surface of the substrate 10 is formed.

  The entire area of the drive module 1 manufactured in this way is then sealed with a color filter and a counter substrate. Therefore, not only the thin film transistor 20 in the TFT region 2 but also the thin film battery 30 in the TFB region 3 and the semiconductor circuit element in the control circuit region 4 are not exposed to the atmosphere or moisture, and are further protected from physical impact.

  In the drive module 1 manufactured by the above process, the thin film transistor 20 and the thin film battery 30 are not in a positional relationship such that they overlap each other, but are formed on different regions of the substrate 10. The thin film transistor 20 can be used as a switching element of a liquid crystal display device, and the function of the thin film transistor 20 is not impaired. Moreover, the drive module 1 can be made thinner than the case where the thin film transistor 20 and the thin film battery 30 are in a positional relationship such that they overlap each other.

  Further, since the gate electrode layer 21 and the positive electrode current collector layer 31 are made of the same material, the manufacturing process is simplified. In the present embodiment, since the source electrode layer 24, the negative electrode current collector layer 36, and the wiring layer 53 are also made of the same material, the manufacturing process is further simplified.

  In the drive module 1 according to the present embodiment, since the thin film transistor 20 is arranged for each pixel of the liquid crystal display device, a liquid crystal display device in which a power source including the thin film battery 30 is integrally formed can be obtained. In addition, since the charging / discharging circuit of the thin film battery 30 is configured in the control circuit region 4, the driving module 1 in which the thin film battery 30, the charging / discharging circuit thereof, and the wiring between them are integrally formed on one substrate is provided. Can be provided. Furthermore, according to the present embodiment, it is possible to provide the drive module 1 in which the thin film transistor 20 that is a switching element, the thin film battery 30 that is a power source thereof, and the wiring between them are integrally formed on one substrate. Thus, according to the drive module 1 according to the present embodiment, it is not necessary to further connect an external device (such as a power supply or a charge / discharge circuit) to the drive module 1. Therefore, it is possible to realize an ultra-thin electronic paper terminal and an IC card having a liquid crystal display area in which a thin film secondary battery as a power source is built.

  In addition, according to the method for manufacturing the drive module 1 according to the present embodiment, the positive electrode current collector layer 31 and the gate electrode layer 21 are simultaneously formed, and the negative electrode current collector layer 36, the source electrode layer 24, and the drain electrode layer 25 are formed. Since the thin film transistor 20 and the thin film battery 30 are separately manufactured, the manufacturing of the drive module 1 can be simplified. For example, when the thin film transistor 20 and the thin film battery 30 are manufactured at the same time as shown in FIG. 5, the number of steps increased from the case of manufacturing only the thin film transistor 20 is the same as the cathode electrode layer 33 and the solid shown in FIG. Only the step of sequentially forming the electrolyte layer 34 and the anode electrode layer 35 is performed. Therefore, the time required for manufacturing the drive module 1 can be greatly shortened, and the manufacturing cost can be reduced.

  In the above-described embodiment, the positive electrode current collector layer 31, the cathode electrode layer 33, the solid electrolyte layer 34, the anode electrode layer 35, and the negative electrode current collector layer 36 are formed in this order, but the formation order is reversed. It may be. Moreover, as long as it supplies with electricity in order of the positive electrode collector layer 31, the cathode electrode layer 33, the solid electrolyte layer 34, the anode electrode layer 35, and the negative electrode collector layer 36, the formation order may be switched.

[Modification of First Embodiment]
Next, a modification of the first embodiment of the present invention will be described with reference to FIG. FIG. 6 shows a monolithic TFB module 1 ′ which is a thin battery integrated semiconductor device. The TFB module 1 ′ is obtained by providing a TFB region 3 ′ and a charge / discharge circuit region 4 ′ on an insulating substrate 10 ′ made of, for example, glass or silicon.

  In the TFB region 3 ′, one thin film battery having the same structure as the TFB region 3 described in the first embodiment is formed. In the charge / discharge circuit region 4 ′, a charge / discharge circuit (including a DC-DC converter, an AC-DC converter, a DC-AC converter, etc.) of the thin film battery formed in the TFB region 3 ′ is formed. A plurality of semiconductor circuit elements such as thin film transistors, resistors, capacitors, and diodes are formed in the charge / discharge circuit region 4 ′. The thin film transistor formed in the charge / discharge circuit region 4 ′ has the same structure as the thin film transistor 20 formed in the TFT region 2 of the first embodiment.

  Between the TFB region 3 ′ and the charge / discharge circuit region 4 ′, there is formed a wiring region 5b ′ provided with a wiring layer for electrically connecting the semiconductor circuit elements formed in these regions and the thin film battery. ing.

  Also in the TFB module 1 ′ of this modification, as in the first embodiment, the positive electrode current collector layer in the TFB region 3 ′ and the gate electrode layer of the thin film transistor formed in the charge / discharge circuit region 4 ′ are connected to each other. The wiring layer is formed of the same material at the same time. In addition, the negative electrode current collector layer in the TFB region 3 ′ and the source electrode layer and drain electrode layer 25 of the thin film transistor formed in the charge / discharge circuit region 4 ′ and the wiring layer connecting the two are formed of the same material at the same time. Yes. Therefore, the TFB module 1 'according to this modification can be made thin, and the manufacturing process is simplified. Furthermore, the time required for manufacturing the TFB module 1 'can be greatly shortened, and the manufacturing cost can be reduced. In addition, since the charging / discharging circuit of the thin film battery is configured in the charging / discharging circuit region 4 ′, the TFB module 1 ′ in which the thin film battery, the charging / discharging circuit thereof, and the wiring between them are integrally formed on one substrate. Can be provided.

[Second Embodiment]
Next, a drive module for an active matrix liquid crystal display device (hereinafter simply referred to as “drive module”), which is a thin battery integrated semiconductor device according to a second embodiment of the present invention, will be described. Similar to the drive module 1 described in the first embodiment, this drive module is an insulating substrate provided with three regions, a TFT region, a TFB region, and a control circuit region. However, in this embodiment, the structure of the thin film transistor in the TFT region and the thin film battery in the TFB region is different from that of the first embodiment. As will be described below, in this embodiment, the thin film transistor in the TFT region has a staggered (top gate) structure.

  First, the manufacturing method of the drive module according to the present embodiment will be described focusing on the thin film transistor 120 in the TFT region and the thin film battery 130 in the TFB region depicted in FIG. It is assumed that the semiconductor circuit elements in the control circuit region are formed simultaneously with the thin film transistor 120 and the thin film battery 130.

  First, as shown in FIG. 7A, a base coat 111 that is an insulating film made of a silicon oxide film, a silicon nitride film, or a carbon compound is formed on the entire surface of a substrate 110 made of glass, plastic, PET, a resin film, or a semiconductor. Form. Thereafter, a semiconductor layer 121 is formed in a formation region of the thin film transistor 120 from a semiconductor layer formed over the entire surface by CVD, PVD, or inkjet printing by photolithography including an etching process. The semiconductor layer 121 may be, for example, an organic semiconductor single crystal thin film.

  Then, as shown in FIG. 7B, the entire surface is covered with a gate insulating film 122 by CVD. Then, the semiconductor layer 121 is doped with impurities (phosphorus or boron) through the gate insulating film 122.

  Next, as shown in FIG. 7C, after a conductive layer is formed by PVD, a gate electrode layer 123 and a positive electrode current collector layer 133 are simultaneously formed from this conductive layer by photolithography including an etching process. Thereafter, as shown in FIG. 7D, the entire surface is covered with an interlayer insulating film 124 by CVD.

  7E, a partial region of the interlayer insulating film 124 over the gate electrode layer 123, a partial region of the gate insulating film 122 and the interlayer insulating film 124 over the semiconductor layer 121 (two locations). And a partial region of the interlayer insulating film 124 on the positive electrode current collector layer 133 is removed by photolithography including an etching process. As a result, a contact hole 124a exposing the gate electrode layer 123 is formed in the interlayer insulating film 124, and contact holes 124b and 124c for source / drain contacts exposing the semiconductor layer 121 to the gate insulating film 122 and the interlayer insulating film 124 are formed. Each is formed, and 124 d is formed in the interlayer insulating film 124 to expose the upper surface of the positive electrode current collector layer 133.

  Subsequently, as shown in FIG. 7 (f), the cathode electrode layer 134, the solid electrolyte layer 135, and the anode electrode layer are formed on the positive electrode current collector layer 133 by photolithography including film formation by sputtering or PVD and an etching process. 136 are formed sequentially.

  Next, as shown in FIG. 7G, the contact hole 124a is filled and connected to the gate electrode layer 123 by photolithography including a PVD film formation and etching process, and the contact hole 124b, The source electrode layer 127 and the drain electrode layer 128 that are respectively connected to the semiconductor layer 123 are formed by filling the semiconductor layer 123. At the same time, the negative electrode current collector layer 137 is formed on the anode electrode layer 136 and the source electrode layer A wiring layer (not shown) that electrically connects 127 and the negative electrode current collector layer 137 is formed. Thereafter, a passivation film (not shown) that covers the entire surface of the substrate 10 is formed.

[Modification of Second Embodiment]
Next, as a modification of the second embodiment of the present invention, a manufacturing process of a thin film battery in the TFB region is changed from that of the second embodiment and will be described with reference to FIG. Since the drive module and the manufacturing method thereof according to this modification are the same as those of the second embodiment described above except for the following description, the detailed description thereof is omitted.

  The manufacturing method of the drive module according to this modification is common to the second embodiment up to the step described with reference to FIG. FIG. 8A is the same cross-sectional view as FIG. Thereafter, as shown in FIG. 8B, a cathode electrode layer 134 ′ and a solid electrolyte layer 135 ′ are sequentially formed on the positive electrode current collector layer 133 by photolithography including film formation by sputtering or PVD and an etching process. Form.

  Next, as shown in FIG. 8C, the cathode electrode layer 134 ′ and the solid electrolyte layer 135 ′ are insulated from each other on the interlayer insulating film 124 by photolithography including film formation by sputtering or PVD and an etching process. The negative electrode current collector layer 137 ′ is formed so as to be formed (for example, formed separately or an insulating film is formed on a side surface). At the same time, the gate wiring layer 126 of the thin film transistor, the source electrode layer 127 and the drain electrode layer 128 are formed, and the wiring layer (which electrically connects the source electrode layer 127 and the negative electrode current collector layer 137 ′). (Not shown).

  Thereafter, as shown in FIG. 8D, an anode electrode layer 136 ′ is formed on the solid electrolyte layer 135 ′ and the negative electrode current collector layer 137 ′ by photolithography including film formation by sputtering or PVD and an etching process. Form. Then, a passivation film (not shown) that covers the entire surface of the substrate 10 is formed.

  In the thin film battery manufactured according to this modification, the anode electrode layer 136 ′ is formed last, but the positive electrode current collector layer 133, the cathode electrode layer 134 ′, the solid electrolyte layer 135 ′, the anode electrode layer 136 ′, and The anode current collector layer 137 ′ is configured to be energized in the order. According to this modification, the anode electrode layer 136 ′ is formed last among the plurality of layers constituting the thin film battery, and therefore the period until the anode electrode layer 136 ′ is protected by the passivation film is shortened. be able to. This modification can be applied not only to the second embodiment but also to the first embodiment and third and fourth embodiments described later.

[Third Embodiment]
Next, a drive module for an active matrix liquid crystal display device (hereinafter simply referred to as “drive module”), which is a thin battery integrated semiconductor device according to a third embodiment of the present invention, will be described. Similar to the drive module 1 described in the first embodiment, this drive module is an insulating substrate provided with three regions, a TFT region, a TFB region, and a control circuit region. In this embodiment, the structure of the thin film transistor in the TFT region is different from that of the first and second embodiments, and the structure of the thin film battery in the TFB region is the same as that of the second embodiment. As will be described below, in this embodiment, the thin film transistor in the TFT region has a staggered (top gate) structure.

  First, the manufacturing method of the drive module according to the present embodiment will be described focusing on the thin film transistor 220 in the TFT region and the thin film battery 230 in the TFB region depicted in FIG. It is assumed that the semiconductor circuit elements in the control circuit region are formed simultaneously with the thin film transistor 220 and the thin film battery 230.

  First, as shown in FIG. 9A, a semiconductor layer is formed on the entire surface of a substrate 210 made of glass, plastic, PET, a resin film, or a semiconductor by CVD, PVD, or inkjet printing, and from the semiconductor layer, A semiconductor layer 221 is formed in a formation region of the thin film transistor 220 by photolithography including an etching step. The semiconductor layer 221 may be, for example, an organic semiconductor single crystal thin film.

  Then, as shown in FIG. 9B, a source electrode layer 222 and a drain electrode layer 223 are formed on the semiconductor layer 221 by photolithography including film formation and etching processes by PVD, and at the same time, on the substrate 210. A positive electrode current collector layer 231 is formed on the substrate. Thereafter, as shown in FIG. 9C, the entire surface is covered with a gate insulating film 224 by CVD. Then, the semiconductor layer 221 is doped with impurities (phosphorus or boron) through the gate insulating film 224.

  Next, as shown in FIG. 9D, partial regions (two places) of the gate insulating film 224 over the source electrode layer 222 and the drain electrode layer 223 and the gate over the positive electrode current collector layer 231. A partial region of the insulating film 224 is removed by photolithography including an etching process. As a result, contact holes 224a and 224b that expose the source electrode layer 222 and the drain electrode layer 223 are formed in the gate insulating film 224, respectively, and a contact hole 224c is formed in the gate insulating film 224 so that the positive electrode current collector layer 231 is formed. The upper surface of is exposed.

  Subsequently, as shown in FIG. 9E, the cathode electrode layer 233, the solid electrolyte layer 234, and the anode electrode layer are formed on the positive electrode current collector layer 231 by photolithography including a film formation and etching process by sputtering or PVD. 235 are sequentially formed.

  Next, as illustrated in FIG. 9F, the semiconductor layer 221 is formed between the source electrode layer 222 and the drain electrode layer 223 through the gate insulating film 224 by photolithography including a film formation and etching process by PVD. An opposing gate electrode layer 225 and a source wiring layer 226 and a drain electrode layer 227 that fill the contact holes 224a and 224b and are connected to the source electrode layer 222 and the drain electrode layer 223, respectively, are formed at the same time. A negative electrode current collector layer 236 is formed over the layer 235, and a wiring layer (not shown) that electrically connects the source wiring layer 226 and the negative electrode current collector layer 236 is formed. Thereafter, a passivation film 228 covering the entire surface of the substrate 210 is formed.

[Fourth Embodiment]
Next, a drive module for an active matrix liquid crystal display device (hereinafter simply referred to as “drive module”), which is a thin battery integrated semiconductor device according to a fourth embodiment of the present invention, will be described. Similar to the drive module 1 described in the first embodiment, this drive module is an insulating substrate provided with three regions, a TFT region, a TFB region, and a control circuit region. In the present embodiment, the structures of the thin film transistor in the TFT region and the thin film battery in the TFB region are different from those in the first to third embodiments. As will be described below, in this embodiment, the thin film transistor in the TFT region has a staggered (top gate) structure.

  First, the manufacturing method of the drive module according to the present embodiment will be described focusing on the thin film transistor 320 in the TFT region and the thin film battery 330 in the TFB region depicted in FIG. It is assumed that the semiconductor circuit elements in the control circuit region are formed simultaneously with the thin film transistor 320 and the thin film battery 330.

  First, as shown in FIG. 10A, a source electrode layer 321 and a drain electrode layer are formed on a substrate 310 made of glass, plastic, PET, a resin film or a semiconductor by photolithography including a PVD film forming and etching process. At the same time, the positive electrode current collector layer 331 is formed.

  Subsequently, as shown in FIG. 10B, the cathode electrode layer 332, the solid electrolyte layer 333, and the anode electrode layer are formed on the positive electrode current collector layer 331 by photolithography including a film formation and etching process by sputtering or PVD. 334 are formed sequentially.

  Next, as illustrated in FIG. 10C, a semiconductor layer is formed by CVD, PVD, or inkjet printing, and the source electrode layer 321 and the drain electrode layer 322 are formed from the semiconductor layer by photolithography including an etching step. A semiconductor layer 323 having both ends positioned on the source electrode layer 321 and the drain electrode layer 322 is formed over the substrate 310 therebetween. Thereafter, as shown in FIG. 10D, the entire surface is covered with a gate insulating film 324 by CVD. Then, the semiconductor layer 323 is doped with impurities (phosphorus or boron) through the gate insulating film 324.

  Thereafter, as shown in FIG. 10E, partial regions (two locations) of the gate insulating film 324 over the source electrode layer 321 and the drain electrode layer 322, and the gate insulating film over the anode electrode layer 334 A partial region of 324 is removed by photolithography including an etching process. As a result, contact holes 324a and 324b for exposing the source electrode layer 321 and the drain electrode layer 322 are formed in the gate insulating film 324, and a contact hole 324c is formed in the gate insulating film 324 so that the upper surface of the anode electrode layer 334 is formed. Is exposed.

  Subsequently, as illustrated in FIG. 10F, the semiconductor layer 323 is interposed between the source electrode layer 321 and the drain electrode layer 322 through the gate insulating film 324 by photolithography including a PVD film formation and etching process. An opposing gate electrode layer 325 and a source wiring layer 326 and a drain electrode layer 327 that fill the contact holes 324a and 324b and are connected to the source electrode layer 321 and the drain electrode layer 322, respectively, are formed at the same time. A negative electrode current collector layer 335 is formed over the layer 334, and a wiring layer (not shown) that electrically connects the source wiring layer 326 and the negative electrode current collector layer 335 is formed. Thereafter, a passivation film 328 covering the entire surface of the substrate 310 is formed.

  Even with the drive modules according to the second to fourth embodiments, the same effects as those of the first embodiment described above can be obtained.

  The preferred embodiments of the present invention have been described above, but the present invention is not limited to the above-described embodiments, and various design changes can be made to the above-described embodiments as long as they are described in the claims. Is possible. For example, in the first to fourth embodiments described above, a wiring layer formed simultaneously with the same material is provided between the source electrode of the thin film transistor and the negative electrode current collector layer of the thin film battery, and both are electrically connected. Although they were connected, a wiring layer formed of the same material as that at the same time was provided between the gate electrode of the thin film transistor and the positive electrode current collector layer of the thin film battery, and the two were not electrically connected. However, when forming a semiconductor circuit element other than the thin film transistor, one of the two conductive layers included in the semiconductor circuit element and one of the positive electrode current collector layer and the negative electrode current collector layer of the thin film battery are the same as these. Electrical connection is made through a first wiring layer formed simultaneously with the material, and the other of the two conductive layers included in the semiconductor circuit element and the other of the positive current collector layer and the negative current collector layer of the TFB are connected to these. They may be electrically connected via a second wiring layer formed simultaneously with the same material.

  As a specific example, FIG. 11 shows a circuit in which a thin film battery 430 and a resistor 440 which is a semiconductor circuit element and a capacitor 450 are connected in parallel. In this case, the positive electrode current collector layer 431 of the thin film battery 430, the conductive layer 441 constituting one terminal of the resistor 440, and the conductive layer 451 constituting one terminal of the capacitor 450 are simultaneously formed of the same material. Are connected via the wiring layer 405 formed. Further, the negative electrode current collector layer 432 of the thin film battery 430, the conductive layer 442 constituting the other terminal of the resistor 440, and the conductive layer 452 constituting the other terminal of the capacitor 450 were formed of the same material at the same time. They are connected via the wiring layer 406.

  As a manufacturing method of the thin battery integrated semiconductor device shown in FIG. 11, a simplified case where the thin film battery 430 and the resistor 440 are connected in parallel and the capacitor 450 is not formed will be described as an example. In order to manufacture such a thin-battery integrated semiconductor device, for example, in the manufacturing method described with reference to FIG. 5, between the gate electrode layer 21 serving as one terminal of the resistor 440 and the positive electrode current collector layer 31, A wiring layer for electrically connecting the two is simultaneously provided in the step shown in FIG. Then, an opening is provided in the gate insulating film 22 so that the semiconductor layer 23 and the gate electrode layer 21 are brought into contact with each other. The formation of the etch stopper layer 26 and the drain electrode layer 25 is canceled. Thereafter, a wiring layer electrically connected between the source electrode layer 24, which is the other terminal of the resistor 440, and the negative electrode current collector layer 36 formed on the semiconductor layer 23 functioning as a resistor. 53 is provided simultaneously in the step shown in FIG. In the case of forming a capacitor, a dielectric film may be formed instead of the semiconductor layer 23.

  In the thin battery integrated semiconductor device according to the present invention, the conductive layer of the semiconductor circuit element may be made of a material different from both the positive electrode current collector layer and the negative electrode current collector layer of the thin film battery. When the semiconductor circuit element has two conductive layers, these two conductor layers may be made of a material different from both the positive electrode current collector layer and the negative electrode current collector layer of the thin film battery.

  Furthermore, in the thin battery integrated semiconductor device according to the present invention, the thin film transistor may not constitute the charge / discharge circuit of the thin film battery as long as the thin film battery and the semiconductor circuit element are connected via the wiring layer. The thin film battery may not be a power source of the thin film transistor. In the above-described embodiments, two active matrix type liquid crystal display devices and monolithic TFB modules are exemplified as thin battery integrated semiconductor devices. However, the present invention can be applied to other devices.

1. Drive module (thin battery integrated semiconductor device)
2 TFT area (first area)
3 TFB area (second area)
4 Control circuit area (first area)
5a, 5b, 5c Wiring region 10 Substrate 20 Thin film transistor (semiconductor circuit element)
DESCRIPTION OF SYMBOLS 21 Gate electrode layer 22 Gate insulating film 23 Semiconductor layer 24 Source electrode layer 25 Drain electrode layer 26 Etch stopper layer 27 Passivation film 30 Thin film battery 31 Positive electrode collector layer 33 Cathode electrode layer 34 Solid electrolyte layer 35 Anode electrode layer 36 Negative electrode collection Electrical layer 53 Wiring layer 61 Liquid crystal element

Claims (12)

A substrate,
A semiconductor circuit element including at least one conductive layer formed on the first region of the substrate;
An all-solid-state thin film battery including a positive electrode current collector layer, a cathode electrode layer, a solid electrolyte layer, an anode electrode layer, and a negative electrode current collector layer formed on a second region different from the first region of the substrate When,
A thin-film battery-integrated semiconductor device comprising a wiring layer formed on the substrate for electrically connecting the thin-film battery and the semiconductor circuit element.   2. The thin battery according to claim 1, wherein the conductive layer of the semiconductor circuit element is made of the same material as at least one of the positive electrode current collector layer and the negative electrode current collector layer of the thin film battery. Integrated semiconductor device.   The conductive layer of the semiconductor circuit element is made of the same material as at least one of the positive electrode current collector layer and the negative electrode current collector layer of the thin film battery and the wiring layer. 2. A thin battery-integrated semiconductor device according to 2. The semiconductor circuit element has two of the conductive layers;
One of the two conductive layers is made of the same material as one of the positive electrode current collector layer and the negative electrode current collector layer of the thin film battery, and the other of the two conductive layers is the positive electrode current collector of the thin film battery. The thin battery-integrated semiconductor device according to any one of claims 1 to 3, wherein the thin-film battery integrated semiconductor device is made of the same material as the other of the first layer and the negative electrode current collector layer.   The thin-film battery integrated semiconductor device according to claim 1, wherein the semiconductor circuit element is a thin film transistor. A plurality of the thin film transistors,
6. The thin battery integrated semiconductor device according to claim 5, wherein the plurality of thin film transistors are switching elements arranged for each pixel of the display device. A plurality of the semiconductor circuit elements,
The thin-film battery integrated semiconductor device according to claim 1, wherein the plurality of semiconductor circuit elements constitute a charge / discharge circuit of the thin film battery.   The thin-film battery integrated semiconductor device according to claim 1, wherein the thin film battery is a power source for the semiconductor circuit element. A manufacturing method of a thin battery integrated semiconductor device,
Forming a semiconductor circuit element including at least one conductive layer on a first region of the substrate;
An all-solid-state thin film battery including a positive electrode current collector layer, a cathode electrode layer, a solid electrolyte layer, an anode electrode layer, and a negative electrode current collector layer is formed on a second region different from the first region of the substrate. Process,
Forming a wiring layer on the substrate for electrically connecting the thin film battery and the semiconductor circuit element;
The method for producing a thin-battery integrated semiconductor device, wherein the formation of the conductive layer of the semiconductor circuit element is performed simultaneously with the formation of one of the positive electrode current collector layer and the negative electrode current collector layer of the thin film battery. .   10. The conductive layer of the semiconductor circuit element is formed simultaneously with the formation of one of the positive electrode current collector layer and the negative electrode current collector layer of the thin film battery and the wiring layer. A manufacturing method of the thin-battery integrated semiconductor device described in 1. The semiconductor circuit element has two of the conductive layers;
Forming one of the two conductive layers of the semiconductor circuit element simultaneously with forming one of the positive electrode current collector layer and the negative electrode current collector layer of the thin film battery;
The other of the two conductive layers of the semiconductor circuit element is formed simultaneously with the formation of the other of the positive electrode current collector layer and the negative electrode current collector layer of the thin film battery. A manufacturing method of the thin-battery integrated semiconductor device described in 1.   In the step of forming the thin film battery, the anode electrode layer is formed after the positive electrode current collector layer, the cathode electrode layer, the solid electrolyte layer, and the negative electrode current collector layer are formed. Item 12. A method for manufacturing a thin-battery integrated semiconductor device according to any one of Items 9 to 11.