JP2014022395A - Transparent substrate for semiconductor package and method for manufacturing semiconductor package - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve such a problem that when a device wafer is stuck to a glass wafer having the same shape as the device wafer through liquid adhesive in a wafer level process for creating a chip size package of an OCD/CMOS image sensor, the adhesive may be squeezed out from an end surface of the device wafer and a device or a product may be stained.SOLUTION: An outer shape of glass to be stuck is formed in hexagonal, octagonal, dodecagonal, circular, or elliptical and uses a glass substrate larger than a device wafer, so that adhesive squeezed out is stayed on the glass substrate and stain around a device is reduced as compared with a conventional method. Further since an alignment pattern, an identification label or a small piece for process monitor necessary for a process can be arranged on a glass portion outer from the device wafer, a chip on the device wafer can be prevented from being crushed and process management can be easily performed.

Description

  The present invention relates to a transparent substrate used for manufacturing a chip size package of a CMOS or CCD image sensor used in a small camera module mounted on a mobile phone or the like, and a manufacturing method using the same.

In recent years, as the demand for camera modules increases, the demand for improving the productivity of camera modules has increased. The camera module is composed of an image sensor module and a lens module. The image sensor is formed by arranging a plurality of CMOS (Complementary Metal Oxide Semiconductor) or CCD (Charge Coupled Device) type optical sensors on a silicon wafer. .

Since an image sensor made on a silicon wafer cannot be mounted on a camera module just by cutting it out from the wafer, it is processed into a package (image sensor module). In the conventional package manufacturing procedure, a semiconductor chip (hereinafter referred to as an individual piece) is cut out from a silicon wafer (device wafer) on which an image sensor is formed, the individual piece is attached to a relay board, and electrodes and pieces provided on the relay board are provided. After wiring was formed between the pieces of connection electrodes by wire bonding, a cover glass was attached to the image sensor surface.

This manufacturing procedure did not increase production speed and could not keep up with the increasing demand for cameras. For this reason, a “wafer level process” has been developed that performs batch processing in the wafer state.

The wafer level process is characterized by proceeding with package manufacturing without separating the chip from the silicon wafer, and dividing it into individual pieces at the final stage. Since the package thus obtained has almost the same outer size as a semiconductor chip formed on a silicon wafer, it is called a “chip size package (abbreviated as CSP)”. Hereinafter, the image sensor module created at the wafer level is referred to as an image sensor CSP.

This image sensor CSP needs a conduction structure that connects the connection electrode on the image sensor surface to the “solder ball” provided on the back surface thereof. There are the following methods for this.
・ Method using side wiring (Patent Document 1)
・ Method using silicon through electrode (TSV) (Patent Document 2)

In any of the methods, a support substrate that protects the image sensor surface (semiconductor forming surface) is required in order to use a chemical solution, to be placed in a high temperature environment, or to reverse and process the surface. Further, a glass transparent substrate is often used as the support substrate because it is desired to leave it as a product even after the processing is completed. This transparent substrate is often made of the same glass as the device wafer. (Patent Document 2 FIGS. 2 and 4) Further, recently, glass for wafer level processing has also been developed. (Patent Document 3)

  In many cases, an adhesive is used for bonding the glass and the device wafer, and the adhesive is applied and formed in a lattice shape so that the optical sensor does not attach the adhesive to the image sensor portion.

As a method of applying and forming the adhesive in a grid pattern, the photosensitive adhesive is made into a dry film, attached to either glass or a device wafer, and then processed into a grid pattern by photolithography (pattern exposure, development). Then there is a method of pasting. In addition, there is a method in which plate-like spacers formed only with an adhesive are made on the lattice pattern, and are aligned and pressure-bonded. These are expensive methods that require complex material design to take into account adhesion while having photosensitivity for making photolithography in a lattice shape, and that pre-processing to make the material into a dry film is necessary. there were.

On the other hand, the method of directly applying the liquid adhesive to the glass or device wafer by the screen printing method may be applicable to the technology used in other fields. It is.

Next, a method for applying and bonding an adhesive to glass by a screen printing method will be described.

FIG. 1 shows an example of a procedure in which the adhesive 10 is applied to the glass wafer 100 having the same shape as the device wafer 200 by a screen printing method and bonded to the device wafer 200. The screen printing plate is designed so that an adhesive can be applied on the boundary line between the individual pieces of the device wafer 200. In the screen printing, a positioning pattern for printing at a predetermined position on the glass wafer 100 is also included. (Not shown)

FIG. 2 is a partially enlarged view of the surface of the device wafer 200 on which the image sensor 201 is formed. The left side of the figure shows a state before the transparent substrate 100 coated with the adhesive 10 is applied to the lattice pattern, and the right side of the figure shows the state after the alignment.

  1 and 2 show an example in which the adhesive 10 is formed in a pattern on the transparent substrate 100. However, the adhesive 10 can be formed in a pattern on the device wafer 200 side.

If there is an open gap between the device wafer and the glass on the outer periphery of the glass / silicon bonded product obtained in this way, chipping is likely to occur during the grinding / polishing process. Cracks may advance to the inside. As a matter of course, the cracked portion of the semiconductor chip becomes a defective product, and depending on the degree, there is a problem that the entire wafer cannot be put into subsequent processes.

FIG. 3 schematically shows the state of the adhesive 10 a protruding from the end face of the glass / device wafer bonded product 300. When the adhesive 10 is surely formed on the outer peripheral portion of the device wafer 200, the adhesive 10a protruding from the glass / device wafer bonded product 300 becomes a problem.

The protruding adhesive 10a may adhere to the inside of the machined apparatus or the device wafer 200 or the glass 100 of the bonded product 300.

In addition, in the state before the adhesive 10 is cured, the bonded position and thickness change, so that it cannot be gripped, and it is particularly difficult to wipe off the adhesive 10a attached to glass or a device wafer. .

In addition to this, device wafers are impositioned so that semiconductor chips can be taken to the maximum extent, so patterns such as characters and symbols for identifying bonded products, alignment patterns and processes used in wafer level processes There was also a problem that there was almost no space for placing a monitor chip or the like.

Japanese Patent Application Laid-Open No. 2004-2000274 JP 2010-056292 A JP2012-020892A

The present invention has been made in order to solve the above problems, and even when the adhesive protrudes during bonding, it stays on the glass and does not contaminate the surrounding devices, and when the bonded product is conveyed. An object of the present invention is to provide a method for manufacturing a transparent substrate and a semiconductor package that can be performed without touching the device wafer, and have a high degree of freedom in arrangement of alignment marks, identification patterns, and process monitoring chips.

  In order to achieve the above object, the present invention is a method for manufacturing a semiconductor package in which a transparent substrate is bonded to a semiconductor device wafer via a resin layer, and then cut into individual pieces. 5 mm to 25 mm larger than the outer periphery of the semiconductor device wafer, and its outer shape is hexagonal, octagonal, dodecagonal, or circular or elliptical having at least one or more straight portions. .

The outer peripheral portion of the transparent substrate is 5 to 25 mm larger than the outer periphery of the semiconductor device wafer, the thickness is 0.1 to 1.0 mm, and the outer shape of the transparent substrate is hexagonal, octagonal, dodecagonal. Or a circular or elliptical shape having a notch or at least one straight portion.

Further, in the method for manufacturing a semiconductor package, on the surface of the transparent substrate and located outside the semiconductor device wafer to be bonded, a figure for alignment, a figure for wafer identification consisting of a bar code or a character string, It is characterized in that small pieces used for temperature monitoring and film thickness monitoring during film formation can be appropriately attached.

By using the transparent substrate of the present invention, even if the adhesive protrudes when bonded to the device wafer, there is an effect that it stays on the transparent substrate and does not adhere to the surroundings.

In addition, identification and alignment patterns and process monitor chips can be placed in different locations that do not overlap with device wafers, so the parts that did not become products as a result of these placements become products and yields are reduced. There is an advantage of improvement.

Polygonal glass is advantageous in that the glass can be cut out in a straight line and an inexpensive mechanism can be used for alignment.

It is explanatory drawing which shows an example of the bonding procedure of a device wafer and a glass wafer. It is the top view and sectional drawing which looked at a part of device wafer before and behind bonding from the semiconductor formation surface. It is the top view which showed an example of the state where the adhesive protruded after bonding. It is explanatory drawing which shows the cutting-out and pattern formation procedure of the glass plate used as the transparent substrate of this invention. FIG. 2 is a plan view and a cross-sectional view showing an octagonal transparent substrate of Example 1. FIG. It is the top view and sectional drawing which show the state which apply | coated the adhesive agent to the octagonal transparent substrate of Example 1 in the grid | lattice form. It is the top view and sectional drawing which looked at a part of what bonded together the device wafer of Example 1, and the octagonal transparent substrate with an adhesive agent from the semiconductor formation surface. It is the top view and sectional drawing of the octagonal glass device wafer bonding product of Example 1. It is a top view which shows the dimension measurement position of the bonded product shown in FIG. It is a top view which shows the state which attached the identification label to the octagonal glass device wafer bonding product of Example 1. FIG. It is a top view which shows the state which affixed the identification label, the coupon chip, and the temperature monitor on the octagonal glass device wafer bonded product of Example 1. It is a top view which shows the outline | summary of the operation | work which separates the image sensor CSP produced in Example 1 into pieces by a dicing process. 6 is a plan view of a glass wafer / device wafer bonded product of Example 2. FIG. It is a top view of the elliptical glass device wafer bonded product of Example 3.

  Hereinafter, the reason why the transparent substrate for the image sensor CSP of the present invention is limited as described above will be described.

Since the transparent substrate is required to have strength to withstand chemicals, heat, and conveyance during the process after bonding, glass is suitable for the material.

The glass has a polygonal shape having a linear portion parallel to at least one XY axis, so that there are more options for the alignment mechanism than the circular shape. If the shape is triangular or quadrangular, if it rotates horizontally, the diameter of the rotation will be larger than that of a circle, and it will be necessary to increase the substrate size of a process apparatus that uses horizontal rotation. For this reason, hexagons, octagons, and dodecagons that cut off the corners of the hexagon, which can be cut off from the corners of the square, are suitable. Although other polygons can be applied, the effect is not changed even if the number of processes for cutting glass is increased, so the shape described above is preferable.

Next, the size of the transparent substrate in the XY direction will be described. First, when the amount of the “extruding” adhesive was examined, the average was about 1 mm from the end face of the device wafer, and the maximum was 3 mm. Since this and a place to attach a mark or a chip sample are also required, the minimum dimension of the glass that is outside from the outer periphery of the device wafer is 5 mm.

On the other hand, looking at the equipment used, the 200 mm wafer aligner exposure equipment used for exposure of wiring patterns etc. uses a 9-inch square size for photomasks, and related equipment can be used. The maximum dimension of the outer glass from the outer periphery of the device wafer when the four corners of the glass were dropped into a regular octagon was 25 mm.

The measurement part having the dimensions described above will be described also from the relationship between the device wafer and the polygonal glass. Since the circular device wafer and the polygonal glass are bonded and rotated horizontally and processed, the device wafer and the polygonal glass have the same center of gravity. In addition, since the polygonal glass may be partially cut in dimensions, in this case, the center of gravity of the glass 102 before processing and the center of gravity of the wafer are matched. The glass portion outside the device wafer measured when defining the dimensions is a value measured on a straight line connecting the center of gravity and the end surface of the glass plate.

Next, the preferable glass thickness is 0.1 to 1.0 mm. The reason is that the above-mentioned resistance and strength can be obtained if the thickness of the glass is 0.1 mm or more. On the other hand, the required value of the thickness of the CSP product is required to be less than 1.5 mm. When the total of the device wafer, the adhesive layer, and the solder ball height, which is a component other than glass, is examined, it is 0.5 mm. Since it is above, the difference of two values was made into the maximum value of the thickness of glass.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 4 shows a procedure for forming various patterns 30 such as a quadrangular shape, a circular shape, and the like from the large size glass 101 to be used for alignment in the wafer level process with the hexagonal glass 103, the octagonal glass 104, and the dodecagonal glass 105. FIG. If the pattern forming device can be processed in the size of large format glass, after forming the pattern together, cut the outer shape, if it can only support the cut size, form a pattern that is cut into a square, and then polygon It is explanatory drawing which showed having cut | disconnected an external shape.

When the alkali component elutes in glass, the performance of the semiconductor element deteriorates, and warping occurs when materials having different coefficients of thermal expansion are bonded. For this reason, a low alkali-eluting borosilicate glass is preferable as the material of the glass, and a glass having a thermal expansion coefficient close to 39 × 10 ⁻⁷ K ⁻¹ is selected.

  Hereinafter, an example will be described in which an octagonal glass 104 for a CMOS image sensor wafer having a diameter of 200 mm is formed and bonded, and a CSP is formed by a wafer level process.

FIG. 5 is a plan view showing a state in which an adhesive printing alignment mark 31, a bonding alignment mark 32, and a dicing line reference line 33 are formed on the octagonal glass 104 with chromium. The created procedure will be described below.

The glass used is borosilicate glass having a thermal expansion coefficient of 38 × 10 ⁻⁷ K ⁻¹ , a light transmittance of 92% at a wavelength of 500 nm, and a thickness of 0.5 mm. This glass was cut into a square of 228.6 mm (glass 102) with a glass scriber device.

Next, chromium is formed to a thickness of 50 nm on the surface of the glass 102 by a sputtering method, and a photoresist layer capable of producing a line width of 2 micrometers is formed thereon by a spin coater. Using a photomask formed with alignment marks 31, bonding position alignment marks 32, and dicing reference lines 33, exposure was performed with a mask aligner exposure apparatus. After the exposure, the resist was left in the above-mentioned pattern shape with a resist developing machine, and a pattern was formed through chemical etching of chromium and processing of a stripped film of photoresist.

The pattern forming method is not limited to the above procedure, and a photoresist is used to form a photoresist pattern from which the pattern-shaped resist has been removed, and then a chrome thin film is formed thereon, and then lifted off to obtain the pattern. It is also possible to perform the exposure or exposure with an electron beam drawing apparatus. As for the chromium used as the metal material, it is also possible to use titanium having high adhesion strength with glass.

Next, with respect to all corners of the glass 102 on which the chromium pattern was formed, a point was placed at a position of 67 mm along the side from the corner, and the glass was cut out with a glass scriber device along a line segment connecting adjacent points. . As a result, octagonal glass having a side of 94.7 mm was obtained. With this dimension, the glass-only part becomes approximately 23 mm when bonded to the device wafer.

Hereinafter, an example in which the glass 104 of FIG. 5 is used for manufacturing a CSP in a wafer level process will be described.

FIG. 6 is a plan view seen from the surface where the adhesive is applied, in a state where the adhesive 11 is applied to the surface of the octagonally formed glass 104 by the screen printing method. The applied adhesive 11 had a viscosity of 50,000 MPa · sec, the color was black, and the material / curing type was an epoxy one-component UV curable adhesive.

In addition, the plate used for screen printing is a stainless mesh plate, a stainless mesh with a diameter of 25 micrometers, an opening ratio of 60% is used, the adhesive thickness after bonding is 75 micrometers, and the amount of crushing is considered. The post-coating adhesive thickness target was set to 90 micrometers, and the non-opening portion (emulsion thickness) of the plate was determined from the characteristics of the printing press. (Not shown)

  The layout of the screen printing plate is composed of two patterns, a lattice pattern matched to the dicing line 203 of the device wafer and a circular pattern that goes around the outer periphery of the device wafer. The line width of the lattice and the circular pattern was 0.7 mm and was arranged according to the design of the device wafer. The mark 31 for aligning the printing position with the printing plate also needs to be made as a printing pattern, and is arranged outside the area of the device wafer. This arrangement of the print alignment marks 31 was not possible when conventional glass of the same size was used.

Next, the application work sequence of the adhesive 11 was set by abutting the outer shape of the glass against three pins mounted in advance on the stage of the screen printing machine as primary alignment. The three pins are arranged in advance so that the alignment mark 31 on the octagonal glass 104 enters the field of view of the camera of the automatic alignment device when the substrate is set by abutting. Next, in the secondary alignment, the stage is moved so that the print alignment mark 31 on the octagonal glass 104 and the mark pattern (not shown) provided on the screen printing plate overlap, and after the alignment, the squeegee is moved. The adhesive 11 was applied on the octagonal glass 104. At this time, since the adhesive 11 is also applied onto the print alignment mark 31, the portion of the print alignment mark 31 in the plan view of FIG. 5 is changed to a pattern where the adhesive 11 is applied.

Note that this time alignment uses a combination of the butting method and the image recognition method on the pin, but the method can be appropriately selected depending on the required position accuracy and the shape of the glass plate, and is limited to this method. It is not something.

Thereafter, the octagonal glass 104 coated with the adhesive 11 was stored in a rack in order to be transported to the laminating apparatus. When glass wafers of the same shape were used, a special specification rack was required so that the end with the adhesive was not touched. However, the transparent substrate of the present invention has no adhesive at the end, so it is convenient. A rack with a structure can now be used. (Not shown)

Further, before the rack was stored, the adhesive 11 placed on the printing position alignment mark 31 was removed. In the case of glass having the same shape as that of a conventional device wafer, there was a printing mark in an area where the device wafer was bonded, so that wiping could not be performed. In this embodiment, since the printing alignment mark 31 is located outside the device wafer, the adhesive 11 can be removed by wiping if it is after curing by screen printing and before curing.

Next, the device wafer 201 on which the CMOS image sensor was formed was bonded. The external dimensions of the device wafer 201 were 200 mm in diameter and 0.725 mm in thickness.

First, the alignment of the octagonal glass plate 104 coated with the adhesive 11 shown in FIG. 6 and the device wafer 201 (the whole image is not shown) will be described. First, the octagonal glass plate 104 is set on the lower side with the surface of the adhesive 11 facing up, and the CMOS sensor array 202a surface of the device wafer 201 is set on the upper side on the upper side.

FIG. 7 is an explanatory view showing a state where the octagonal glass plate 104 coated with the adhesive 11 and the CMOS image sensor wafer 201 are aligned. The alignment is performed by moving the octagonal glass plate 104 in the horizontal direction so that a predetermined CMOS sensor array 202a on the CMOS image sensor wafer 201 is surrounded by a bonding alignment mark 32 formed on the octagonal glass 104. .

The pasting after the positioning will be described. In this embodiment, the bonding was performed by adjusting the height on the device wafer side so that the distance between the octagonal glass 104 and the CMOS image sensor wafer 201 was 75 micrometers. (Not shown.) This time, a method of adjusting the distance between the two stages was used, but the method is not limited to this. For example, a bonding apparatus having a thickness control function using a pressure difference is used. There are also such things.

FIG. 8 is a cross-sectional view taken along a line connecting C and D of the plan view of the octagonal glass / device wafer bonded product 301 viewed from the CMOS image sensor wafer 201 side.

After bonding, an adhesive 11a portion that protruded from the end face of the device wafer was formed, but did not come out of the octagonal glass 104.

Next, in order to move to the UV conveyor furnace for curing the adhesive, the octagonal glass device wafer bonded product 301 was stored in the substrate cassette. Although the adhesive 11a was in an uncured state, the inside of the substrate cassette was not soiled. The bonded product (not shown) was then irradiated with UV in a UV conveyor furnace with a xenon lamp light source to cure the adhesives 11 and 11a. (Not shown)

  FIG. 9 is an explanatory view showing a portion of the bonded product whose dimensions have been confirmed. As a result of measuring the dimensions of the actual product, the glass outer length La was 228.6 mm, and the length Lb of the straight portion of the octagonal glass was 94.7 mm. Regarding the length of the glass-only portion outside the device wafer, it was confirmed that the maximum portion L1 was 23.7 mm and the minimum portion L2 was 14.2 mm, which was within the specified size.

FIG. 10 shows an embossed character figure on an aluminum foil base containing a character string and a two-dimensional code separately created for individually identifying the composite on the glass part protruding from the device wafer of the composite that has been bonded. It is a top view which shows what attached the identification label 41 by which the adhesive was apply | coated to one side.
In this embodiment, the octagonal glass 104 and the CMOS image sensor wafer 201 are bonded to each other and cured after the adhesives 11 and 11a are cured. However, the process may be performed after the next thinning step. In addition, an aluminum foil-based label was used this time, but it is also possible to use a heat-resistant resin film printed with ink or laser-cut.

Next, the silicon of the device wafer was thinned. Thin plate processing of the silicon part is performed using a grinder / polisher composite device for silicon wafers, and 0.72 mm thick silicon is ground in the order of whetstone # 800 and # 1200, followed by a slurry of abrasive. After the mirror finish, the device wafer 201 was processed to a thickness of 100 micrometers. At this time, since the adhesive 11 was filled between the outer peripheral portion of the device silicon and the glass plate, a device without chipping (chip) was obtained in the peripheral portion of the device wafer 201 even after the thin plate processing. In the present embodiment, a polisher device is used for mirror finishing, but the same flatness can be obtained by machining using a dry process.

Next, an electrode is formed on the processed surface of the thin plate, and the electrode on the surface of the device wafer 201 is connected by wiring. This time, a hole was formed in the device wafer 201, and a wiring path in the chip size package was formed with a through silicon via (Through Silicon Via) structure in which a conductor was formed.

FIG. 11 is a plan view showing an example in which the device wafer 201, the monitor chip 42, and the temperature monitoring label 43 are attached to the outer side of the device wafer 201 on the side where the device wafer 201 is attached with the octagonal glass 104. FIG. 11 shows an example in which two monitor chips 42 and one temperature monitor label 43 are attached. However, if there is room for attachment, the number of attachments may be increased in consideration of use in later steps.

  Further, in order to check the processing state of the dry etching, the monitor chip 42 is formed by processing a bare silicon wafer to the same thickness as a thin device wafer, applying a dry etching resist, baking a pattern, and then dicing saw. Cut out and created. In addition, when the structure of the device wafer is necessary for process confirmation, it may be created using a dummy wafer in which only a wiring layer is formed by a semiconductor process, a broken device wafer, or the like.

Also, the temperature monitoring label 43 has several temperature sensing elements determined for each temperature on a single sheet, and when the temperature sensing element reaches a predetermined temperature, the color changes and the temperature drops. Unusual colors are not restored. Although there is a method using a thermocouple as another method, wiring is necessary and installing on all the wafers is laborious work, so it can be easily installed and removed, and it has reached a predetermined temperature The temperature monitor label was used because it was sufficient to understand.

The device wafer 201 is drilled using SF6 (sulfur hexafluoride), so a novolac-type photoresist is applied to a thin silicon surface with a thickness of 15 micrometers, and a hole diameter of 70 micrometers is drilled. After exposure and development with a dawn pattern, an etching mask pattern was formed. This time, a mask which is an organic material is used for the mask pattern, but a silicon oxide thin film can also be used.

Next, silicon was etched in the state shown in FIG. For this purpose, a hole of 100 μm depth was formed on a device wafer by using a Bosch process which is one of anisotropic etching methods using SF6 gas and having a high aspect and elongated holes. After the processing was completed, the monitor chip 42 was first removed and the hole depth was measured to confirm that there was no problem before proceeding to the next step. Here, it is not necessary to remove all monitor chips for measurement.

In addition, it is necessary for the hole to expose the electrode originally on the device wafer 201 to the bottom of the hole. Since there is a silicon oxide layer in front of the hole, the silicon oxide layer is continuously formed by the RIE method using CF4 gas. Was removed.

After the etching of silicon was completed, the photoresist formed on the drilled surface was peeled off. Stripping was performed using a resist stripping solution and an ashing process which is a dry process. (Not shown)

Next, a CVD (Chemical Vapor Deposition) method was used to form the insulating layer and the barrier layer on the side surface of the hole opened in the silicon. Formation of the insulating layer of silicon oxide was performed using TEOS (Tetraethyl orthosilicate).
In this CVD process, it is important to control the surface temperature of the substrate, and the temperature at the time of film formation is high. However, since the device wafer 201 has a conflicting demand for a low temperature, monitoring of the temperature is important. For this reason, processing was performed after a commercially available temperature monitor label 43 on which the maximum temperature reached was recorded was applied. In addition, using the monitor chip 42 that is left without being removed during the drilling process, the film thickness is measured by removing the film after processing and confirming that the film thickness is within the specified range. Proceed to. (Not shown)

Since the wafer and the monitor chip 42 can be simultaneously introduced into the apparatus by the transparent substrate of the present invention, the operation is simplified, and monitoring for each wafer is also possible.

Next, after the oxide film was formed, the silicon oxide was etched again by the RIE method using CF 4 gas in order to expose the electrode of the device wafer at the bottom of the hole.

Next, the conductor and the electrode were formed by sputtering with titanium and copper in order at a thickness of 50 nanometers, respectively, and then by an electrolytic copper plating method so that the thickness of copper was 10 micrometers. This time, the conductor was created by the electrolytic copper plating method, but the copper film was formed by using a metal film formation method using a thick sputtering method, or by first creating a wiring or electrode pattern in a mask shape with a resist. It is also possible to use a semi-additive method of plating.

In this example, copper plating was performed on the entire silicon surface by electrolytic copper plating, so that the wiring and electrodes were formed by etching. First, after pattern formation with a photosensitive resist, copper is chemically etched with a copper chloride aqueous solution. In this way, copper is etched, but the underlying titanium remains, so that a wiring layer and electrodes can be formed using a commercially available titanium etchant that does not affect copper. (Not shown)

Thereafter, in order to mount solder balls on the electrode pattern, a dry film type solder resist is formed, the electrode pattern and the dicing line portion are removed by photolithography, and then nickel or gold is used as a UBM (Under Bump Metalize) process. The electroless plating process was performed in order. (Not shown)

Next, solder balls were formed. This time, solder paste was applied by a screen printing method using a metal mask and melted in a reflow furnace to form a ball. (Not shown)

FIG. 12 is a schematic diagram showing a state in which a cut for cutting out from an octagonal glass / device wafer bonded product 301 into individual pieces by a dicing apparatus is made. First, the composite is set on the pressure-sensitive adhesive sheet so that the chips do not scatter during dicing, and then set in a dicing apparatus and cut out along dicing lines 203 between the chips. However, in this embodiment, since the dicing line 203 of the device wafer 201 is covered with the adhesive 11 and cannot be seen, the cutting process is performed along the dicing reference line 33 formed on the octagonal glass 104. It was. The actually cut portion is the dicing line 44 of the octagonal glass device wafer bonded product 301. Thereafter, the chip was taken out from the dicing apparatus, and the chips were individually picked up to obtain a CMOS image sensor CSP204.

When the appearance of the CMOS image sensor CSP 204 thus obtained was inspected, defective products due to contamination were reduced in the outer peripheral area of the device wafer. In addition, the number of chips obtained is increased as compared with the conventional method in which the print alignment mark 31 is arranged in the device wafer.

  FIG. 13 shows a state in which an identification label 41, a monitor chip 42, and a temperature monitor label 43 are pasted after adjusting the silicon thickness of a glass wafer 100 </ b> A having a diameter of 220 mm bonded to the CMOS image sensor wafer 200 a. FIG.

The glass wafer 100A used the same kind of glass as in Example 1. In the outer shape processing, first, a glass circle cutter is used to cut out into a circle, and then the notch 50 is a notch that allows position detection at the same position as the notch of the CMOS image sensor wafer 201 (notch showing crystal orientation). Formed. Further, the printing position alignment mark 31, the bonding position alignment mark 32, the dicing reference line 33, and the edge confirmation pattern 3 made of chrome are formed with chrome in an area 3 mm inside from the outer periphery. Since this glass wafer 100A does not have a straight line portion, when alignment is performed by the apparatus, a unit of a system that detects and positions the notch and the outer periphery of the glass wafer 100A is used.

Thereafter, a CMOS image sensor CSP 204 was produced in the same procedure as in Example 1 using the bonded product shown in FIG.

When the appearance of the CMOS image sensor CSP 204 thus obtained was inspected, defective products due to contamination were reduced in the outer peripheral area of the device wafer. In addition, the number of chips obtained is increased as compared with the conventional method in which the print alignment mark 31 is arranged in the device wafer.

  FIG. 14 shows an elliptic glass 100b that is bonded to the CMOS image sensor wafer 201 in the same manner as in the first embodiment, and after silicon thickness adjustment, an identification label 41, a monitor chip 42, and a temperature monitor label 43 are pasted. It is a top view which shows the state attached.

  This is because the printing plate alignment mark 31, the bonding alignment mark 32, and the dicing reference line 33 are formed of chrome on the glass plate 102 used in Example 1, and then the long axis is 240 mm and the short axis is formed by an elliptical cutter. It was cut into an ellipse with a dimension of 216 mm, and a straight part parallel to the Y axis was created with a scriber at 10 mm from the right end of the glass toward the center. Thereafter, a CMOS image sensor CSP 204 was manufactured in the same procedure as in Example 1 using the bonded product shown in FIG.

When the appearance of the CMOS image sensor CSP 204 thus obtained was inspected, defective products due to contamination were reduced in the outer peripheral area of the device wafer. In addition, the number of chips obtained is increased as compared with the conventional method in which the print alignment mark 31 is arranged in the device wafer.

Comparative example

  As a comparative example, a CMOS image sensor CSP204 was manufactured using glass having the same shape as a conventional device wafer. First, a screen printing plate to which an adhesive was applied was prepared and used with a design in which alignment marks were arranged by editing a part of the lattice pattern portion. In addition, a unit using a notch was used to align the glass / device wafer bonded product. After that, the CMOS image sensor CSP 204 was manufactured using the same method as in Example 1.

When the appearance of the thus obtained CMOS image sensor CSP 204 was inspected, defective products due to contamination were frequently generated in the outer peripheral area of the device wafer. Further, since the print alignment mark 31 is in the device wafer, the CMOS image sensor CSP 204 cannot be obtained from this portion.

By laminating the transparent substrate of the present invention and the device wafer, the contamination of the surroundings of the apparatus and the bonded product due to the “extruding” of the adhesive is reduced. In addition, the alignment pattern, identification label, and monitor chip for process monitoring required for the process can be placed on the glass part outside the device wafer, and it is not necessary to place them on the device wafer. As a result, the product can be taken and the quality control of the process becomes easier.
Glass which is larger than a device wafer and has an outer shape of hexagon, octagon, twelve, circle, or ellipse is extremely useful as a member used in a wafer level process.

10, 11... Adhesives 10a, 11a (extruded) Adhesive 20 ... Glass scribe line 30 ... Pattern 31 ... Print alignment mark
32 ... Mark for alignment
33 ... Dicing reference line
34 ... Edge confirmation pattern 41 ... Identification label
42 ... Monitor chip
43 ... Temperature monitor label
44 ... Glass / silicon bonded product dicing line 50 ... notch

DESCRIPTION OF SYMBOLS 100 ... Glass wafer 100a ... Glass wafer 100b ... Elliptical glass

101 ... Large glass
102 ... Rectangular glass
103 ... Hexagonal glass
104 ... octagonal glass
105 ... Dodecagonal glass

200: Device wafer (image sensor wafer)
201 ... CMOS image sensor wafer (200mm diameter)
202, 202a: CMOS sensor array
203 ... Dicing line 204 ... CMOS image sensor CSP

300 ... Glass / device wafer bonded product
301 ... Octagonal glass / device wafer bonded product

La ... Outer glass length Lb ... Length of one side of octagonal glass L1 ... Longest part of glass only on the outside of the device wafer in octagonal glass L2 ... Long part of glass only on the outside of the device wafer in octagonal glass Shortest part C: Center of gravity of glass and device wafer

Claims (5)

In a manufacturing method in which a semiconductor chip is bonded to each other with an adhesive to seal the semiconductor forming surface of a semiconductor device wafer with a transparent substrate, and then a structure is formed between the semiconductor chip and the outside as it is, and finally cut into a semiconductor package. The transparent substrate has a polygonal shape having at least one linear portion, or a notch or a shape having a transparent substrate alone that is larger than the outer peripheral portion of the bonded semiconductor device wafer by 5 mm to 25 mm. A method of manufacturing a semiconductor package, wherein the semiconductor package has a circular or elliptical shape having at least one linear portion.
Identification label, temperature formed on the part outside the semiconductor device wafer and only on the transparent substrate, with a mark for printing alignment, a mark for bonding alignment, a dicing reference line, machine-readable or visually readable characters and figures 2. The method of manufacturing a semiconductor package according to claim 1, wherein a monitor label and a monitor chip used for film thickness monitoring during film formation are disposed.
The transparent substrate is bonded with an adhesive to seal the semiconductor forming surface on the semiconductor device wafer with the transparent substrate, and then the outer portion of the semiconductor device wafer and only the transparent substrate is 5 mm to 25 mm larger, The thickness of the transparent substrate is 0.1 to 1.0 mm, and the outer shape of the transparent substrate is a polygon having at least one linear portion, or a circular or elliptical shape having a notch or at least one linear portion. A transparent substrate for a semiconductor package, characterized in that
4. The transparent substrate for a semiconductor package according to claim 3, wherein the polygon is a hexagon, an octagon, or a dodecagon.
After sealing the semiconductor forming surface on the semiconductor device wafer with a transparent substrate, it is pasted with an adhesive, and then on the outer part of the semiconductor device wafer and only the transparent substrate, the mark for printing alignment, the bonding position An alignment mark, a dicing reference line, an identification label formed with characters and figures that can be read by machine reading or visual reading, a temperature monitoring label, and a monitor chip used for film thickness monitoring during film formation are arranged. The transparent substrate for semiconductor packages according to claim 3 or 4.

Images