JP2014017434A - Method for processing wafer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for processing a wafer in which a chip formed by division has an enough transverse intensity.SOLUTION: A method for processing a wafer 11 in which a device 15 is formed and a plurality of conductor posts 25 are embedded into a depth from a surface to a prescribed thickness comprises the steps of: disposing a support plate 23 on a surface side of the wafer 11; holding a support plate 23 side to which the wafer 11 is stuck by a chuck table and forming a modified layer 27 inside the wafer 11 by irradiating the wafer 11 with a laser beam along a division schedule line from a rear surface side of the wafer 11; thinning the wafer 11 by grinding a surface thereof; protruding an upper surface of the conductor post 15 from a rear surface of the wafer 11 disposed on the support plate 23 by etching the rear surface side of the wafer 11 (etching step); and removing the support plate 23 and sticking a tape to the rear surface of the wafer 11 (tape sticking step).

Description

  The present invention relates to a method for processing a wafer in which a conductor post is embedded.

  In recent years, in order to achieve high integration, high density, miniaturization, and thinning of semiconductor devices, a stack of multiple semiconductor chips such as MCP (multi-chip package) and SIP (system in package) Type semiconductor packages have been proposed. Such a stacked semiconductor package is formed by stacking a plurality of semiconductor chips on a package substrate called an interposer.

  Generally, after interposer and semiconductor chip electrodes, or multiple stacked semiconductor chip electrodes are electrically connected with a gold wire, the semiconductor chip is molded and sealed with resin to the interposer. A stacked semiconductor package is manufactured.

  However, in this method, since the gold wire bonded to the electrode of the semiconductor chip protrudes to the outer peripheral surplus region of the semiconductor chip, there is a problem that the package size becomes larger than the semiconductor chip.

  In addition, there is a problem that when the mold is sealed with the resin, the wire wire is deformed to cause a disconnection or a short circuit, or the air remaining in the mold resin expands when overheated to cause damage to the semiconductor package. .

  Therefore, a technique has been proposed in which a through electrode is provided in the semiconductor chip to penetrate the semiconductor chip in the thickness direction and connected to the electrode of the semiconductor chip, and the semiconductor chips are stacked and the through electrodes are joined to each other for electrical connection. (For example, refer to Japanese Unexamined Patent Application Publication Nos. 2004-241479 and 2008-130704).

  As a method of forming a semiconductor chip having a through electrode, there are a method called “via first” and a method called “biamide”, which are widely adopted. In these methods, vias (holes) are formed from the wafer surface to the finished thickness of the semiconductor chip, and conductors such as copper are filled in the holes to form conductor posts.

  A plurality of devices are formed by photolithography on the wafer surface before or after forming the conductor posts, and the conductor posts are embedded by providing wiring on the surface side after forming the conductor posts. A wafer is manufactured.

  Next, the back surface of the wafer is ground to thin the wafer to a predetermined thickness, and further etched so that a conductor post slightly protrudes on the back surface side of the wafer, and then an appropriate insulating film or the like is coated on the back surface side. Then, the chip | tip which has a penetration electrode is formed by dividing | segmenting a wafer into each chip | tip.

  Conventionally, in order to divide a wafer in which a conductor post is embedded into individual chips, a cutting apparatus having a cutting blade disclosed in, for example, Japanese Patent Application Laid-Open No. 2000-271834 has been widely used.

JP 2004-241479 A JP 2008-130704 A JP 2000-271834 A

  However, since fine cracks generated by cutting remain on the chip cut by the cutting blade, there is a problem that the bending strength of the chip does not increase, leading to insufficient chip strength or defective chip pickup.

  Therefore, in order to improve the bending strength of the chip, a modified layer is formed inside the wafer using a laser beam having a wavelength that is transmissive to the wafer, and the wafer is separated into individual chips using the modified layer as a division starting point. A method of dividing into two is conceivable.

  However, a wafer thinned by grinding has a problem that it is difficult to stably form a modified layer at a predetermined position inside the wafer. If a uniform modified layer is not formed at a predetermined position inside the wafer, there is a possibility that a region that is not divided is generated during division.

  The present invention has been made in view of these points, and the object of the present invention is that the chip formed by the division has a sufficient bending strength and is divided into individual chips in the entire area of the wafer. It is to provide a possible wafer processing method.

  According to the first aspect of the present invention, a device is formed in each region of the surface partitioned by a plurality of intersecting scheduled lines, and a plurality of conductor posts are embedded at a depth from the surface to a predetermined thickness. A wafer processing method, comprising: a support plate disposing step for disposing a support plate on the front surface side of the wafer; and the support plate side to which the wafer is adhered after the support plate disposing step is performed on the chuck table. A modified layer forming step of forming a modified layer inside the wafer by irradiating a laser beam having a wavelength having transparency with respect to the wafer from the rear surface side of the wafer along the division line. After performing the modified layer forming step, a grinding step for grinding and thinning the surface of the wafer, and after performing the grinding step, the support Etching is performed on the back side of the wafer disposed on the plate so that the upper surface of the conductor post exposed on the back surface protrudes from the back surface of the wafer. After performing the etching step, the surface is disposed on the surface of the wafer. There is provided a method of processing a wafer, comprising: a tape attaching step of removing the support plate and attaching a tape to the back surface of the wafer.

  According to a second aspect of the present invention, in the first aspect of the invention, in the modified layer forming step, the condensing point of the laser beam is formed on the wafer rear surface side region that does not reach the finished thickness of the wafer from the rear surface side of the wafer. A wafer processing method is provided in which the modified layer is formed along the planned division line within the wafer and the crack extending from the modified layer to the surface of the wafer is extended.

  According to a third aspect of the present invention, in the first aspect of the present invention, in the modified layer forming step, the condensing point of the laser beam is positioned in a wafer surface side region from the wafer surface to the finished thickness of the wafer. After forming the modified layer along the planned dividing line inside the wafer and performing the tape adhering step, the tape is expanded and external force is applied to apply the wafer to the modified layer as a starting point. There is provided a wafer processing method further comprising a dividing step of dividing along the planned dividing line.

  According to the invention described in claim 1, since the modified layer is formed inside the wafer before the wafer is thinned by grinding, the modified layer can be stably formed at a predetermined position inside the wafer. No undivided area is generated. Further, since the cutting with the cutting blade is not performed, the formed chip has a sufficient bending strength.

  According to the second aspect of the present invention, when the modified layer is formed, the crack extending from the modified layer to the surface of the wafer is extended and substantially divided into chips. Therefore, the wafer in which the conductor post is embedded is divided into chips. After that, the conductor post protrudes from the back surface. Therefore, since the undivided region is not generated and the cutting with the cutting blade is not performed, the formed chip has a sufficient bending strength.

  According to the third aspect of the present invention, the wafer having the modified layer formed therein has the tape attached to the back side and is divided into individual chips by tape expansion. Since a modified layer is formed on the wafer before grinding, a uniform modified layer can be formed at a predetermined position inside the wafer, and an undivided region is not generated at the time of division, and cutting with a cutting blade is not performed. The formed chip has a sufficient bending strength.

It is a surface side perspective view of a semiconductor wafer in which a conductor post is embedded. It is sectional drawing of a semiconductor wafer. It is a back surface side perspective view of a semiconductor wafer by which a support wafer was stuck on the surface. It is sectional drawing of the semiconductor wafer by which the support plate was stuck on the surface. It is a perspective view which shows a modified layer formation step. It is a block diagram of the irradiation unit of a laser beam. It is sectional drawing of the semiconductor wafer after completion | finish of a modified layer formation step. It is a perspective view which shows a grinding step. It is sectional drawing of the semiconductor wafer after completion | finish of a grinding step. It is sectional drawing of the semiconductor wafer after completion | finish of an etching step. It is sectional drawing of the semiconductor wafer after completion | finish of an insulating film formation step. It is sectional drawing of the semiconductor wafer supported by the cyclic | annular flame | frame via the adhesive tape after transfer step implementation. It is sectional drawing which shows a pick-up step. It is sectional drawing of the semiconductor wafer after implementation of the modified layer formation step in the processing method of 2nd Embodiment. It is sectional drawing of the semiconductor wafer after implementation of a grinding step. It is sectional drawing of the semiconductor wafer after implementation of an etching step. It is sectional drawing of the semiconductor wafer after insulating film coating step implementation. It is sectional drawing of the semiconductor wafer supported by the cyclic | annular flame | frame via the adhesive tape after transfer step implementation. It is sectional drawing which shows the division | segmentation step which expands an adhesive tape. It is sectional drawing which shows a pick-up step.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Referring to FIG. 1, a perspective view of a semiconductor wafer 11 (hereinafter sometimes simply referred to as a wafer) 11 before being processed to a predetermined thickness is shown.

  A semiconductor wafer 11 shown in FIG. 1 is made of, for example, a silicon wafer having a thickness of 700 μm. A plurality of division lines (streets) 13 are formed in a lattice shape on the surface 11a, and the plurality of division lines are arranged. A device 15 such as an IC or an LSI is formed in each region partitioned by 13.

  The semiconductor wafer 11 configured as described above includes a device region 17 in which the device 15 is formed, and an outer peripheral surplus region 19 surrounding the device region 17 on the surface 11a. A notch 21 is formed on the outer periphery of the semiconductor wafer 11 as a mark indicating the crystal orientation of the silicon wafer.

  Referring to FIG. 2, a schematic cross-sectional view of the semiconductor wafer 11 is shown. From each device 15 formed on the semiconductor wafer 11, a plurality of embedded electrodes (conductor posts) 25 embedded at a depth equal to or larger than the finished thickness t1 of the device extend to the back surface 11b side.

  In the wafer processing method according to the first embodiment of the present invention, as shown in FIGS. 3 and 4, a support plate disposing step of disposing a support plate 23 on the surface 11 a side of the wafer 11 is performed. Preferably, the support plate 23 is adhered to the surface 11a of the wafer 11 with an adhesive.

  Here, the support plate 23 is appropriately selected from chemicals applied in the subsequent etching step and members that can withstand the heating when the insulating film is applied following the etching step. Preferably, the support plate 23 is made of glass, silicon wafer or the like. In the description of this embodiment, the support plate 23 is illustrated as being made of glass.

  After performing the support plate arrangement step, as shown in FIG. 5, the support plate 23 side to which the wafer 11 is adhered is held by the chuck table 30 of the laser processing apparatus 10 and is permeable to the wafer 11. A modified layer forming step for forming a modified layer 27 inside the wafer 11 is performed by irradiating a laser beam having a wavelength from the back surface side 11 b of the wafer 11 along the division line 13.

  FIG. 5 is a perspective view of a main part of the laser processing apparatus 10. A laser beam irradiation unit 12 includes a laser beam generation unit 12 shown in FIG. 6 housed in a housing 8 and a condenser (laser irradiation head) 16 attached to the tip of the housing 8.

  As shown in FIG. 6, the laser beam generation unit 14 includes a laser oscillator 18 that oscillates a YAG laser or a YVO4 laser, a repetition frequency setting unit 20, a pulse width adjustment unit 22, and a power adjustment unit 24. .

  The pulse laser beam adjusted to a predetermined power by the power adjusting means 24 of the laser beam generating unit 14 is reflected by the mirror 26 of the condenser 16 and further condensed by the condenser objective lens 28 to be used in the laser processing apparatus 10. The semiconductor wafer 11 held on the chuck table 30 is irradiated. In the modified layer forming step of the present embodiment, a pulse laser beam is irradiated from the back surface 11b side of the wafer 11, as shown in FIG.

  Before performing this modified layer forming step, an alignment step for aligning the light collector 16 and the planned dividing line 13 of the wafer 11 is performed. In this specification, the alignment step is a well-known step. The description is omitted.

  In the modified layer forming step, the chuck table 30 is processed and fed by irradiating the inside of the wafer 11 with a pulsed laser beam having a wavelength that is transmissive to the wafer 11 from the condenser 16. As a result, the modified layer 27 along the division line 13 is formed inside the wafer 11.

  In the present embodiment, the modified layer 27 is formed on the back surface 11b side of the wafer 11 from the ground finish thickness t1. When the modified layer forming step is performed, as shown in FIG. 7, the crack 29 extends from the modified layer 27 toward the surface 11 a side of the wafer 11.

  That is, the crack 29 reaches the surface 11a of the wafer 11, and the grinding finish thickness is set to 50 μm, for example. The cassette 7 is formed on the back surface 11b side of the 5 to 20 μm wafer 11 from the ground finish thickness.

  While the chuck table 30 is indexed and fed, the modified layers 27 are formed one after another along the planned dividing line 13 extending in the first direction. Next, after the chuck table 30 is rotated by 90 degrees, the same modified layer 27 is formed along the planned dividing line 13 extending in the second direction orthogonal to the first direction. The modified layer 27 is formed as a melt rehardened layer. The modified layer 27 refers to a region where the density, refractive index, mechanical strength, and other physical characteristics are different from the surroundings.

  The processing conditions in this modified layer forming step are set as follows, for example.

Light source: LD excitation Q switch Nd: YVO 4 pulse laser Wavelength: 1064 nm
Repetition frequency: 100 kHz
Pulse energy: 10μJ
Processing feed rate: 100 mm / sec

  After performing the modified layer forming step, a grinding step for grinding the back surface 11b of the wafer 11 is performed. In this grinding step, as shown in FIG. 8, the support plate 23 side attached to the front surface 11 a of the wafer 11 is sucked and held by the chuck table 34 of the grinding device, and the back surface 11 b of the wafer 11 is exposed.

  In FIG. 8, the grinding unit 36 includes a spindle 38 that is rotationally driven, a wheel mount 40 that is fixed to the tip of the spindle 38, and a grinding wheel 42 that is detachably attached to the wheel mount 40 by a plurality of screws 44. Contains. The grinding wheel 42 is configured by a plurality of grinding wheels 48 fixed to a free end portion of an annular base 46.

  In this grinding step, while rotating the chuck table 34 in the direction of arrow a at 300 rpm, for example, the grinding wheel 42 is rotated in the same direction as the chuck table 34, that is, in the direction of arrow b at 6000 rpm, for example. Is operated to press the grinding wheel 48 against the back surface 11 b of the wafer 11.

  Then, the cutting wheel 42 is ground and fed by a predetermined amount at a predetermined grinding feed speed, and the back surface 11b of the wafer 11 is ground. Preferably, the conductor post 25 is slightly exposed to the back surface 11b of the wafer 11. The wafer 11 is finished to a finish thickness t1. The conductor post 25 may be ground to such a thickness that it is not exposed from the back surface.

  Since the surface of the wafer 11 is already divided along the division line 17 by the crack 29 extending from the modified layer 27 to the surface 11a, when the wafer 11 is ground to the finished thickness t1, as shown in FIG. The wafer 11 is divided into individual device chips 31.

  The crack 29 may be prevented from reaching the surface 11a of the wafer 11 by adjusting the laser output in the modified layer forming step to control the crack 29 extending from the modified layer 27 to the surface 11a. In this case, when the wafer 11 is ground, the wafer 11 is divided into individual device chips 31 using the reforming layer 27 as a division starting point with a predetermined pressing force applied to the wafer 11 by grinding feed.

  After performing the grinding step, etching is performed on the back surface 11b side of the wafer 11 disposed on the support plate 23, and the upper surface of the conductor post 25 exposed on the back surface 11b is removed from the wafer back surface 11b as shown in FIG. A protruding etching step is performed. This etching step may be performed by any etching method such as wet etching or dry etching.

  After performing the etching step, as shown in FIG. 11, an insulating film coating step for coating the insulating film 33 on the back surface 11 b of the wafer 11 is performed. After performing the insulating film coating step, the insulating film 33 on the conductor post 25 may be removed to form bumps on the conductor post 25.

  Next, as shown in FIG. 12, an adhesive tape T having expandability is attached to the back surface 11b side of the wafer 11, the support plate 23 is removed from the surface 11a of the wafer 11, and the outer peripheral portion of the adhesive tape T is attached to the annular frame. A transfer step for attaching to F is performed. By performing this transfer step, the wafer 11 is supported by the annular frame F via the adhesive tape T.

  Next, as shown in FIG. 14, a pickup step of picking up the chips 31 from the adhesive tape T by the pickup collet 50 is performed, and the picked-up chips 31 are accommodated in a container such as a tray.

  According to the wafer processing method of the first embodiment described above, since the modified layer 27 is formed on the wafer 11 before grinding and thinning, the uniform modified layer 27 can be formed at a predetermined position inside the wafer. Since a crack 29 extending from the modified layer 27 to the front surface 11a side of the wafer 11 is formed simultaneously with the formation of the modified layer 27, when the grinding step for grinding the back surface 11b of the wafer 11 is performed, the wafer 11 is separated into individual chips. It can be surely divided into 31.

  Therefore, an undivided region is not generated when the wafer 11 is divided, and the cutting 31 is not performed, so that the chip 31 having sufficient bending strength can be formed.

  Next, a wafer processing method according to the second embodiment of the present invention will be described with reference to FIGS. In this embodiment, the substrate placement step is the same as the substrate placement step of the first embodiment described with reference to FIGS. 3 and 4.

  In the processing method of the present embodiment, the modified layer forming step is different from the modified layer forming step of the first embodiment. In the modified layer forming step of the present embodiment, as shown in FIG. 14, the laser beam condensing point is positioned and divided in the surface side region of the wafer 11 from the surface 11a of the wafer 11 to the ground finish thickness t2 of the wafer 11. A modified layer 27 is formed along the planned line 13.

  The processing conditions of this modified layer forming step are the same as those of the modified layer forming step of the first embodiment except for the pulse energy. In the present embodiment, the pulse energy is suppressed to 5 μJ or less, for example, and cracks extending from the modified layer 27 toward the surface 11a are prevented. The ground finish thickness t2 of this embodiment is set to 80 μm, for example, and the modified layer 27 is formed at a position 60 μm from the surface 11a of the wafer 11.

  After performing the modified layer forming step, a grinding step for grinding the back surface 11b of the wafer 11 is performed to reduce the wafer 11 to a finished thickness t2 as shown in FIG. In this embodiment, since the pulse output at the time of forming the modified layer is weak, the wafer 11 is not divided into individual chips even if the grinding step is performed.

  After performing the grinding step, as in the first embodiment, etching is performed on the back surface 11b side of the wafer 11 disposed on the support plate 23, and the upper surface of the conductor post 25 exposed on the back surface 11b is exposed to the wafer back surface 11b. An etching step for projecting from the substrate is performed. The state after performing the etching step is shown in FIG.

  Next, as shown in FIG. 17, after performing an insulating film coating step for coating the insulating film 33 on the back surface 11b of the wafer 11, as shown in FIG. 18, an adhesive tape having expandability on the back surface 11b of the wafer 11. T is attached, the support plate 23 is removed from the surface 11a of the wafer 11, and the transfer step of attaching the outer peripheral portion of the adhesive tape T to the annular frame F is performed.

  Next, for example, using an expanding device as disclosed in Japanese Patent Application Laid-Open No. 2007-214417, the adhesive tape T is expanded in the direction of arrow A to apply an external force to the wafer 11 as shown in FIG. A dividing step of dividing the wafer 11 into individual chips 31 using the modified layer 27 as a dividing starting point is performed.

  After performing the dividing step, as shown in FIG. 20, a pick-up step of picking up the chip 31 from the adhesive tape T by the pick-up collet 50 and storing the picked-up chip 31 in a container such as a tray is performed.

  In this embodiment as well, as in the first embodiment described above, the modified layer 27 is formed on the wafer 11 before the wafer 11 is thinned by grinding the back surface 11b of the wafer 11, so that the modified film is uniformly modified at a predetermined position inside the wafer. Layer 27 can be formed. Therefore, an undivided region is not generated at the time of division, and a chip having sufficient bending strength can be formed because cutting with a cutting blade is not performed.

DESCRIPTION OF SYMBOLS 11 Semiconductor wafer 11a Front surface 11b Back surface 12 Laser beam irradiation unit 13 Scheduled division line 14 Laser beam generating unit 15 Device 16 Condenser 23 Support plate 25 Conductor post 27 Modified layer 29 Crack 31 Chip 36 Grinding unit 42 Grinding wheel 48 Grinding wheel 50 Pickup collet

That is, the crack 29 reaches the surface 11a of the wafer 11, and the grinding finish thickness is set to 50 μm, for example. The modified layer 27 is formed on the back surface 11b side of the 5 to 20 μm wafer 11 from the ground finish thickness.

Claims (3)

A method of processing a wafer in which a device is formed in each region of a surface partitioned by a plurality of intersecting scheduled lines and a plurality of conductor posts are embedded in a depth from the surface to a predetermined thickness,
A support plate disposing step for disposing a support plate on the surface side of the wafer;
After carrying out the support plate arranging step, the support plate side to which the wafer is adhered is held by a chuck table, and a laser beam having a wavelength that is transmissive to the wafer is supplied from the back side of the wafer to the planned dividing line. A modified layer forming step of forming a modified layer inside the wafer by irradiating along
After performing the modified layer forming step, a grinding step of grinding and thinning the back surface of the wafer;
After performing the grinding step, etching is performed on the back surface side of the wafer disposed on the support plate, and an etching step for projecting the upper surface of the conductor post exposed on the back surface from the back surface of the wafer;
After performing the etching step, a tape adhering step of removing the support plate disposed on the front surface of the wafer and adhering a tape to the back surface of the wafer;
A wafer processing method characterized by comprising:   In the modified layer forming step, the condensing point of the laser beam is positioned in a wafer back surface side region that does not reach the finished thickness of the wafer from the back surface side of the wafer, and the modified layer along the planned division line is formed inside the wafer. The wafer processing method according to claim 1, wherein cracks extending from the modified layer to the surface of the wafer are elongated while being formed. In the modified layer forming step, the condensing point of the laser beam is positioned in a wafer surface side region extending from the wafer surface to the finished thickness of the wafer, and the modified layer is formed along the planned dividing line inside the wafer. ,
2. The method of claim 1, further comprising a dividing step of dividing the wafer along the scheduled dividing line by expanding the tape and applying an external force after the tape sticking step to apply the modified layer to the dividing starting point. The processing method of the wafer as described.

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