JP2013014469A - Sic epitaxial substrate and method for manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a SiC epitaxial substrate which controls triangle defect and step bunching to be generated on an epitaxial layer surface even on a SiC substrate with a low off-angle, and to provide a SiC epitaxial substrate obtained by the method.SOLUTION: An epitaxial growth sequence includes steps of: growing a first epitaxial layer 22 at a first temperature on a SiC substrate 21; and growing a second epitaxial layer 23 at a second temperature of a low temperature than the first temperature.

Description

  The present invention relates to a SiC epitaxial substrate and a manufacturing method thereof.

  SiC (silicon carbide) has material properties superior to those of Si (silicon), and is excellent in, for example, a dielectric breakdown electric field, saturated electron mobility, and thermal conductivity. If SiC is used, it is possible to manufacture a semiconductor device (for example, a transistor or a diode) capable of operating at high voltage, low loss, and high temperature. For this reason, the use as a power semiconductor device for mounting on an inverter for an in-vehicle or industrial equipment such as EV (electric vehicle) or HEV (hybrid car) has been attracting attention. SiC has various crystal structures such as 3C—SiC, 4H—SiC, and 6H—SiC, but 4H—SiC having excellent material properties is mainly used for device fabrication.

  For the epitaxial growth of SiC, a thermal CVD method is generally used. In the thermal CVD method, a SiC substrate is set in a reaction vessel of a CVD apparatus, and the substrate is heated by heating the inside of the reaction vessel to, for example, about 1600 ° C. and supplying a source gas along with a carrier gas and a doping gas onto the substrate. This is a method of growing a SiC epitaxial layer on the top. As the source gas, Si-based gas (for example, monosilane) and C-based gas (for example, propane) are used. Further, nitrogen gas or trimethylaluminum gas is often used as the doping gas, and hydrogen gas is often used as the carrier gas.

  As the SiC substrate for growing the SiC epitaxial layer, an off-angle substrate having a surface sliced at an angle of several degrees from the (0001) plane of the SiC single crystal is used. By providing the off-angle, a large number of atomic steps (steps on the atomic plane) are formed on the substrate surface in the epitaxial growth process, so that step flow growth is facilitated. Thereby, since two-dimensional nucleus growth can be suppressed, an epitaxial layer having a stable crystal structure and few crystal defects can be obtained.

  Regarding the off-angle, the off-angle of 8 ° has been the mainstream in the past, but the off-angle of 4 ° has become mainstream in recent years. This is because the ingot loss in the slicing process is reduced as the diameter of the substrate increases.

  However, when a SiC epitaxial layer is grown on a low off-angle SiC substrate having an off angle of 8 ° or less (particularly 4 ° or less), the terrace width is wide in step flow growth, so that two-dimensional nuclear growth is performed. Prone to occur. When two-dimensional nucleus growth occurs, triangular epitaxial defects (hereinafter abbreviated as triangular defects) are likely to occur on the outermost surface of the epitaxial layer.

  FIG. 13 shows a metallographic microscope image of triangular defects generated on the surface of the SiC epitaxial substrate. In a device such as a metal-insulator-semiconductor field effect transistor (hereinafter abbreviated as MISFET) or a diode, a triangular defect increases a leakage current of the device, or a pattern in a photolithography process. Cause collapse. For this reason, the yield of devices decreases due to triangular defects.

  The generation of triangular defects can be suppressed by performing epitaxial growth at a high temperature. When the temperature at the time of growth is high, two-dimensional nucleus growth is suppressed by promoting surface migration of adsorbed molecules that have reached the substrate. However, if epitaxial growth is performed at a high temperature, triangular defects can be reduced, but the phenomenon that atomic steps overlap due to excessive energy occurs, and surface roughness called step bunching is likely to occur, resulting in surface roughness of the epitaxial layer. It detracts from it.

  FIG. 14 shows an AFM (atomic force microscope) image of step bunching generated on the surface of the SiC epitaxial substrate. Step bunching is a factor that causes a breakdown voltage failure of a gate insulating film such as a thermal oxide film when a MISFET is manufactured using a SiC substrate.

  As described above, the triangular defect and step bunching have a trade-off relationship. That is, when epitaxial growth is performed at a high temperature, step bunching tends to occur instead of suppressing triangular defects. On the other hand, when epitaxial growth is performed at a low temperature, generation of step bunching can be prevented, but triangular defects are likely to occur. Therefore, it has been difficult to suppress both triangular defects and step bunching at once.

  On the other hand, Patent Document 1 describes an epitaxial growth method that suppresses both triangular defects and step bunching. According to Patent Document 1, the growth temperature is set to a temperature between 1600 ° C. and 1650 ° C., and the atomic ratio (C / Si ratio) between carbon and silicon contained in the material gas is 0.5 or more and 1 By performing initial epitaxial growth under conditions set to less than 0.0, a SiC epitaxial layer with improved quality can be obtained.

JP 2009-256138 A

However, the example of Patent Document 1 describes that a triangular defect density and a surface roughness Ra (arithmetic mean roughness) are generated about 2 pieces / cm ² and about 2 nm, respectively. In this case, it is difficult to say that both triangular defects and step bunching can be reduced to a level at which device mass production is possible.

For example, the chip size of a power device of several tens of amperes is about 5 mm square, and in order to secure the device yield of about 90%, the triangular defect density is preferably 0.5 pieces / cm ² or less, and In order to prevent step bunching from occurring, the surface roughness Ra is preferably 0.2 nm or less.

  Furthermore, in the manufacturing method described in Patent Document 1, since epitaxial growth is performed at a relatively high temperature, unavoidable gases from parts constituting the reaction vessel of the CVD apparatus (nitrogen molecules and oxygen molecules adsorbed on the parts). Or a gas containing a metal constituting the part, which is also called degas or outgas). As a result, there is a concern that more impurities are unintentionally taken into the epitaxial layer and the reliability of the device is impaired.

  The present invention has been made in view of the above problems, and suppresses the occurrence of triangular defects and step bunching on the surface of the epitaxial layer on a SiC substrate having a low off-angle of 8 ° or less (particularly 4 ° or less). It is providing the manufacturing method of an epitaxial substrate, and the SiC epitaxial substrate obtained by the method.

  The method for producing an SiC epitaxial substrate of the present invention includes a step of preparing a SiC substrate having a main surface having an off angle of 8 ° or less from the (0001) plane, and Si and C on the main surface of the SiC substrate. A step of growing a first epitaxial layer at a first temperature while supplying a source gas containing the first gas, and a source gas containing Si and C on the first epitaxial layer while supplying the first epitaxial layer. Growing a second epitaxial layer at a second temperature lower than the temperature.

  In one embodiment, the first temperature is 1600 ° C. or higher and 1650 ° C. or lower.

  In one embodiment, the second temperature is 1500 ° C. or higher and lower than the first temperature.

  In one embodiment, the main surface of the SiC substrate has an off angle of 4 ° or less from a (0001) plane.

  In one embodiment, the step of growing at the first temperature includes maintaining the first temperature for a first time, and the step of growing at the second temperature comprises increasing the second temperature. Holding the second time only, the second time being longer than the first time.

  In one embodiment, the above-described SiC epitaxial substrate manufacturing method includes the step of growing at the first temperature and the step of growing at the second temperature from the first temperature to the second temperature. The method further includes the step of reducing the temperature to a temperature, and in the step of reducing the temperature, the source gas is not supplied onto the SiC substrate.

  In one embodiment, the step of growing at the first temperature includes supplying a first doping gas, and the step of growing at the second temperature includes supplying a second doping gas. The flow rate of the first doping gas is greater than the flow rate of the second doping gas.

  The SiC epitaxial substrate of the present invention is formed by epitaxial growth at a first temperature provided on the main surface of the SiC substrate having a main surface having an off angle of 8 ° or less from the (0001) plane, and the SiC substrate. And a second epitaxial layer provided on the first epitaxial layer and formed by epitaxial growth at a second temperature lower than the first temperature.

  In one embodiment, the main surface of the SiC substrate has an off angle of 4 ° or less from a (0001) plane.

In one embodiment, on the surface of the second epitaxial layer, the triangular defect density is 0.5 / cm ² or less, and the surface roughness Ra of the second epitaxial layer is 0.2 nm or less. .

  In one embodiment, the first epitaxial layer and the second epitaxial layer include unintentionally doped impurities of the same element, and the second epitaxial layer is unintentionally doped. The concentration of impurities is lower than the concentration of impurities that are unintentionally doped in the first epitaxial layer.

  In one embodiment, the thickness of the first epitaxial layer is not less than 0.01 μm and not more than 2 μm.

In one embodiment, the carrier concentration of the first epitaxial layer is 1 × 10 ¹⁷ / cm ³ or more and 1 × 10 ²⁰ / cm ³ or less.

In one embodiment, the carrier concentration of the second epitaxial layer is 5 × 10 ¹⁵ / cm ³ or more and 2 × 10 ¹⁶ / cm ³ or less.

  According to the method for manufacturing a SiC epitaxial substrate of the present invention, the epitaxial growth sequence includes a first step of growing the first epitaxial layer at a high temperature and a second step of growing the epitaxial layer at a lower temperature than the first step. Including. Thereby, an SiC epitaxial substrate in which both triangular defects and step bunching are reduced is obtained.

  Furthermore, since it is possible to grow the epitaxial layer at a relatively low temperature, it is possible to suppress the incorporation of impurities into the epitaxial layer by the impurity gas inevitably generated in the CVD apparatus, and the high purity epitaxial layer Can be obtained.

It is a section TEM image of a triangular defect in an embodiment of the invention, (a) shows a SiC substrate and an epitaxial layer as a whole, (b) is a partial enlarged view of a region surrounded by a dotted line in (a). (C) is the elements on larger scale of the area | region enclosed with the dotted line of (b). It is sectional drawing which shows the structure of the SiC epitaxial substrate in embodiment of this invention. It is sectional drawing which shows the CVD apparatus used in order to grow a SiC epitaxial layer on the SiC epitaxial substrate in embodiment of this invention. It is a figure showing the epitaxial growth sequence in embodiment of this invention. It is a figure showing the relationship between the growth temperature in the embodiment of this invention, and the triangular defect density expressed on the surface of the grown SiC epitaxial layer. It is a figure showing the epitaxial growth sequence in the modification of embodiment of this invention. It is a figure showing the relationship between the growth temperature and the surface roughness Ra of a SiC epitaxial substrate in embodiment of this invention. It is a figure showing the epitaxial growth sequence in another modification of embodiment of this invention. It is sectional drawing which shows the structure of the SiC epitaxial substrate of a comparative example. It is a figure showing the epitaxial growth sequence of a comparative example. It is an AFM image of the SiC epitaxial substrate of Example 2 in the embodiment of the present invention. It is sectional drawing which shows MISFET produced using the SiC epitaxial substrate of embodiment of this invention. It is a metallographic microscope image which shows the triangular defect which generate | occur | produces on the SiC epitaxial substrate surface. It is an AFM image which shows the step bunching which generate | occur | produces on the SiC epitaxial substrate surface.

  First, the outline of the present invention will be described. Conventionally, it has been known that the growth of an epitaxial layer at a high temperature can suppress the occurrence of triangular defects, but in the conventional method, the epitaxial growth is performed while the substrate is kept at a high temperature (see FIG. 10). This is because, in order to suppress the occurrence of triangular defects, it has been considered that it is preferable to grow while maintaining a temperature condition capable of suppressing two-dimensional nucleus growth.

  However, the present inventors conducted experiments and found the following. That is, if epitaxial growth is performed at a relatively high temperature (for example, 1600 ° C. or higher) in the initial stage of epitaxial growth, a surface with few crystal structure defects is formed on the surface of the epitaxial layer grown in the initial stage (initial growth layer). Can be formed. In this case, triangular defects are less likely to occur when an epitaxial layer is grown on the initial growth layer at a lower temperature (for example, less than 1600 ° C.).

  Hereinafter, the analysis result of the triangular defect generated during the epitaxial growth of the SiC substrate will be described with reference to FIGS. The present inventors have observed the SiC epitaxial substrate in which the triangular defect has occurred using a cross-sectional TEM (transmission electron microscope). 1A to 1C show this cross-sectional TEM image. 1A shows the SiC substrate 11 and the epitaxial layer 12 as a whole, FIG. 1B is a partially enlarged view of a region surrounded by a dotted line in FIG. 1A, and FIG. It is the elements on larger scale of the area | region enclosed with the dotted line of 1 (b).

  As a result of observation, it was found that 3C—SiC stacking faults occurred near the interface between the SiC substrate 11 and the SiC epitaxial layer 12 so as to be located almost immediately below the generated triangular defects. It was also found that a 4H—SiC layer was laminated on the 3C—SiC stacking fault. From this, it was found that 3C—SiC stacking faults are likely to occur at the initial stage of epitaxial growth, and that this 3C—SiC stacking fault contributes greatly to the generation of triangular defects on the surface of the epitaxial layer.

  The reason why 3C-SiC stacking faults are likely to occur in the early stage of growth is that the surface of the SiC substrate before the growth of the epitaxial layer is often attached with irregularities due to polishing scratches or pits, foreign matter, impurities, and the like. Can be mentioned. If unevenness or foreign matter exists on the substrate surface, surface migration of molecules adsorbed from the source gas to the substrate surface is inhibited, and adsorbed atoms are trapped, so that two-dimensional nucleus growth is likely to occur. As a result, for example, when grown at a relatively low temperature of less than 1600 °, 3C-SiC stacking faults, which are different polytypes stable at low temperatures, occur, and triangular defects occur on the surface of the grown epitaxial layer it is conceivable that.

  Further, according to the experiments of the present inventors, once a 3C-SiC stacking fault occurs in the initial growth layer, the triangular defect can be eliminated from the surface of the epitaxial layer even if epitaxial growth at a higher temperature is performed thereafter. It turned out to be difficult. This is presumably because the epitaxial layer grows while being affected by the surface shape (surface morphology) of the initial growth layer. Therefore, in order to prevent the occurrence of triangular defects, it is desirable to perform epitaxial growth at a high temperature at an early stage of epitaxial growth.

  Based on the above analysis and inference, the inventors do not grow all the epitaxial layers at a high temperature, but epitaxially grow only at the initial stage of growth at a high temperature, and perform epitaxial growth at a lower temperature after the initial stage of growth. And came to complete the invention.

  In this way, even in a SiC substrate having an off angle of 8 ° or less (particularly 4 ° or less), in which two-dimensional nucleus growth is relatively likely to occur, the generation of triangular defects is suppressed and the temperature is lowered (for example, 1600). It is possible to appropriately perform epitaxial growth at a temperature of less than ° C. In addition, by performing epitaxial growth other than the initial stage of growth at a low temperature, generation of step bunching can be suppressed, so that deterioration of the surface roughness of the epi layer can be prevented. In addition, since epitaxial growth is performed at a low temperature except for the initial stage of growth, it is possible to prevent the impurity gas generated unintentionally in the reaction vessel from being taken into the epitaxial layer as an impurity. Therefore, even when a low off-angle substrate is used, the quality of the epitaxial layer can be improved, and a high-quality device (such as a MISFET) can be manufactured.

  FIG. 2 shows a structure of a SiC epitaxial substrate manufactured by the manufacturing method according to the embodiment of the present invention. On the main surface of SiC substrate 21, a first epitaxial layer (high temperature growth layer or initial growth layer) 22 grown at a high temperature and a second epitaxial layer (low temperature growth layer) 23 grown at a lower temperature are stacked. Has been.

  Hereinafter, an embodiment of a method for producing a SiC epitaxial substrate of the present invention will be described in detail.

First, the CVD apparatus 10 used for SiC epitaxial growth will be described with reference to FIG. The CVD apparatus 10 includes a reaction vessel 1 in which a susceptor 4 that holds a substrate 6 is accommodated. The CVD apparatus 10 also includes a gas supply line 2 that supplies a source gas, a doping gas, and a carrier gas into the reaction vessel 1, and a gas exhaust line 3 that exhausts the gas from the reaction vessel 1. A gas containing Si-based gas and C-based gas is used as the source gas. Examples of the Si-based gas include monosilane gas (SiH ₄ ) and silicon tetrachloride gas (SiCl ₄ ). Examples of the C-based gas include propane gas (C ₃ H ₈ ) and acetylene gas (C ₂ H ₂ ). Nitrogen, ammonia gas, phosphine (PH ₃ ), or the like is used as the n-type doping gas, and trimethylaluminum, diborane (B ₂ H ₆ ), or the like is used as the p-type doping gas. Hydrogen gas, argon gas, or the like is used as the carrier gas.

  The CVD apparatus 10 further includes a heater 8 that can heat the raw material gas to a temperature at which it can be sufficiently pyrolyzed, and a temperature control device (not shown) that controls the heater 8 to adjust the temperature in the reaction vessel 1. And. Further, temperature measuring devices 41 and 51 used for measuring the temperature of the substrate 6 held by the susceptor 4 are provided. The susceptor 4 can be rotated by a rotation mechanism 9 attached to the susceptor 4. As the heater 8, for example, a high-frequency induction coil disposed so as to heat the susceptor 4 and the top plate 5 disposed to face the susceptor 4 is preferably used. In this case, the temperature of the substrate 6 can be adjusted by controlling the magnitude of the current flowing through the high frequency induction coil. Note that the CVD apparatus used in the present embodiment is not limited to the form described above. Various CVD apparatuses suitable for forming the SiC epitaxial layer can be used.

(Embodiment)
Next, the SiC epitaxial growth method according to the present embodiment will be described. In this embodiment, monosilane gas (SiH ₄ ) and propane gas (C ₃ H ₈ ) are used as source gases, nitrogen is used as an n-type dopant gas, and hydrogen is used as a carrier gas. Further, as the SiC substrate, a 4H—SiC substrate whose main surface has an off angle of 4 ° from the (0001) plane is used, and a SiC epitaxial layer is grown on the (0001) Si surface.

  FIG. 4 is a graph showing an epitaxial growth sequence according to the embodiment of the present invention, and an SiC epitaxial substrate having the configuration shown in FIG. 2 is produced by this growth sequence. In the graph, the horizontal axis represents the elapsed time, and the vertical axis represents the temperature of the SiC substrate 6 accommodated in the CVD apparatus 10 (see FIG. 3). The gas introduction timing is also shown below the graph.

  As can be seen from FIG. 4, in the epitaxial growth sequence in the present embodiment, the SiC epitaxial layer is grown at a temperature raising step 31 for heating the reaction vessel 1 and the SiC substrate 6 and at a relatively high temperature (first temperature) T1. Step 32 of first epitaxial growth (high temperature growth), step 33 of temperature switching for switching the temperature from high temperature to low temperature, and second epitaxial growth (low temperature) for growing the SiC epitaxial layer at a relatively low temperature (second temperature) T2. A step 34 of growth) and a step 35 of lowering the temperature of the SiC substrate 6.

  First, the temperature raising step 31 will be described. This step 31 is a step of raising the temperature of the susceptor 4 and the SiC substrate 6 to a growth temperature suitable for epitaxial growth after the SiC substrate 6 is installed in the reaction vessel 1. During the temperature increase, the temperature is increased by reducing the pressure to a constant pressure while flowing hydrogen as a carrier gas. In this way, the surface of the substrate can be slightly hydrogen etched when the temperature is raised. In addition, by flowing hydrogen from the time of temperature increase, the gas flow can be prevented from being disturbed in the next epitaxial growth step 32. Although not shown in the figure, after reaching a predetermined temperature (for example, 1400 ° C. to 1500 ° C.), it is constant for a few seconds to a few minutes in order to stabilize the temperature and hydrogen etch the SiC substrate surface. You may hold | maintain at temperature.

Next, step 32 of the first epitaxial growth (high temperature growth) will be described. This step 32 is a step of performing epitaxial growth at a high temperature T1 in order to suppress triangular defects. By controlling the temperature of the heater 8 and flowing a monosilane gas (SiH ₄ ) and a propane gas (C ₃ H ₈ ) over the SiC substrate 6 in a relatively high temperature state, a first epitaxial layer (high temperature) is formed on the SiC substrate 6. Growth layer).

  Here, the range in which the growth temperature is set in the high temperature growth step 32 will be described. FIG. 5 is a graph showing the relationship between the growth temperature (temperature of the SiC substrate 6) and the density of triangular defects appearing on the surface of the grown SiC epitaxial layer. FIG. 5 shows data when the epitaxial layer is grown to a thickness of about 10 μm under the condition that the substrate temperature during the epitaxial growth is kept constant. Further, the evaluation of the triangular defect density is performed using a metal microscope. The growth temperatures of the five data shown in FIG. 5 are 1550 ° C., 1575 ° C., 1600 ° C., 1625 ° C., and 1650 ° C., respectively.

As can be seen from the graph, the occurrence of triangular defects is greatly reduced by setting the growth temperature to 1600 ° C. or higher. Therefore, in order to suppress triangular defects, the growth temperature T1 during high temperature growth is preferably set to 1600 ° C. or higher, and more preferably set to 1625 ° C. or higher. Moreover, it is preferable to select the high temperature growth temperature T1 so that the occurrence of triangular defects is 0.5 pieces / cm ² or less.

  The upper limit temperature of the growth temperature is preferably 1650 ° C. or lower. This is because if the growth temperature exceeds 1650 ° C., the possibility of generating large step bunching on the surface of the epitaxial layer increases even for a short time. The film thickness of the first epitaxial layer (high temperature growth layer) is preferably 0.01 μm or more and 2 μm or less. This is because if the first epitaxial layer is grown too thick, step bunching occurs due to a long growth time at a high temperature. However, it may be heated to a higher temperature (for example, 1700 ° C. or higher) for a very short time.

In the high temperature growth step 32, the first epitaxial layer (high temperature growth layer) may be doped with impurities of the same conductivity type as the SiC substrate. In that case, it is preferable to adjust the flow rate of the doping gas (for example, nitrogen) so that the carrier concentration of the epitaxial layer is 1 × 10 ¹⁷ / cm ² to 1 × 10 ²⁰ / cm ² . Thereby, an epitaxial layer containing a high concentration of impurities can be formed as the initial growth layer. The high impurity concentration epitaxial layer thus formed is preferably used as, for example, the buffer layer 102a (see FIG. 12) when a MISFET is manufactured.

Next, step 33 of temperature switching will be described. This step 33 is a step of lowering the substrate temperature from the growth temperature T1 of the first epitaxial layer (high temperature growth layer) to the growth temperature T2 of the low temperature growth layer. As shown in the figure, in step 33 of temperature switching, epitaxial growth may be continued by continuously flowing monosilane gas (SiH ₄ ) and propane gas (C ₃ H ₈ ).

  Further, as in the growth sequence shown in FIG. 6, the supply of monosilane gas and propane gas may be temporarily stopped to temporarily stop the epitaxial growth. By stopping the supply of monosilane gas and propane gas in the temperature switching step 53, the unavoidable impurity gas (parts of the reaction vessel 1) generated in the high temperature growth step 32 is started before the low temperature growth step 34 performed thereafter is started. Gas) can be exhausted. Thereby, it is possible to suppress unintended impurities from being mixed into the low temperature growth layer.

  The growth sequence shown in FIG. 6 is composed of the same steps as those shown in FIG. 4 except that the supply of the source gas is stopped in the temperature switching step 53. Is omitted.

  Next, referring to FIG. 4 again, step 34 of the second epitaxial growth (low temperature growth) will be described. In the low temperature growth step 34, the first epitaxial layer is formed by flowing monosilane gas and propane gas over the SiC substrate 6 with the temperature of the SiC substrate 6 set to the growth temperature T2 lower than the growth temperature T1 in the high temperature growth step 32. A second epitaxial layer (low temperature growth layer) is grown on the layer. In the low temperature growth step 34, since epitaxial growth is performed at a lower temperature T2, occurrence of step bunching can be suppressed. In the low temperature growth step 34, the epitaxial growth is performed for a longer time than the high temperature growth step 32 in order to form an epitaxial layer thicker than the high temperature growth layer formed in the high temperature growth step 32.

  Here, the range in which the growth temperature T2 is set in the low temperature growth step 34 will be described. FIG. 7 is a graph showing the relationship between the growth temperature (SiC substrate temperature) and the surface roughness Ra of the SiC epitaxial substrate. FIG. 7 shows data when the epitaxial layer is grown to a thickness of about 10 μm under the condition that the temperature during epitaxial growth is kept constant. The evaluation of the surface roughness Ra is performed using AFM. The growth temperatures of the five data shown in FIG. 7 are 1550 ° C., 1575 ° C., 1600 ° C., 1625 ° C., and 1650 ° C., respectively.

  As can be seen from the graph, the surface roughness Ra greatly decreases when the growth temperature is set to 1600 ° C. or lower. Therefore, in order to suppress step bunching, it is preferable to set the growth temperature T2 during low temperature growth to 1600 ° C. or lower, and more preferably to 1575 ° C. or lower. Further, it is preferable to select the low temperature growth temperature T2 so that the surface roughness Ra is 0.2 nm or less.

  However, if the temperature is too low, the growth rate of the epitaxial layer is too low, which is not preferable. Further, even when grown at a low temperature of less than 1500 ° C., it is difficult to further improve the surface roughness Ra of the formed epitaxial layer. For this reason, it is preferable to set the growth temperature T2 during low-temperature growth to 1500 ° C. or higher.

  Finally, the temperature lowering step 35 will be described. This step 35 is a step of terminating the epitaxial growth and cooling the reactor (reaction vessel) and the SiC substrate. When the temperature is lowered, supply of monosilane gas and propane gas is stopped, and the temperature is lowered while flowing hydrogen gas as a carrier gas. With the above steps, the epitaxial growth sequence of the present embodiment is completed.

  However, the epitaxial growth sequence according to the present invention is not limited to the above-described form. For example, as shown in FIG. 8, after the epitaxial layer is grown at the high temperature T1 in the high temperature growth step 52, the growth step 54 at a lower temperature may be performed so that the temperature gradually decreases from the high temperature T1. In the present specification, even when the growth step 54 is such that the temperature continuously decreases in this way, the growth is performed at a temperature lower than the growth temperature in the high-temperature growth step 52 that is initially performed. Is referred to as a low temperature growth step. Note that the temperature raising step 31 and the temperature lowering step 35 shown in FIG. 8 are the same steps as the steps shown in FIG.

  As for growth conditions other than the growth temperature for epitaxial growth, it is preferable to set the growth pressure to 50 to 250 mbar from the viewpoint of surface roughness. Moreover, it is preferable to set C / Si ratio to 0.8-1.2, and it is more preferable to set to 0.9-1.1.

  In the embodiment of the present invention, epitaxial growth is performed without changing the C / Si ratio. Thus, by maintaining the C / Si ratio constant during the growth of the epitaxial layer, it becomes easier to adjust the carrier concentration in the growing epitaxial layer, and it is easy to manufacture a device as designed. However, the C / Si ratio may be changed between high temperature growth and low temperature growth as necessary.

  Examples of the present invention and comparative examples will be described below. In Comparative Example 1 and Comparative Example 2, as shown below, a SiC epitaxial substrate was fabricated by performing epitaxial growth while keeping the growth temperature constant by a conventional method. Moreover, in Example 1 and Example 2, the SiC epitaxial substrate was produced by performing epitaxial growth by changing the growth temperature by the method of the embodiment of the present invention.

  For each of Comparative Examples 1 and 2 and Examples 1 and 2, the generation density of triangular defects generated on the surface of the epitaxial layer, the surface roughness Ra of the epitaxial layer surface, and the background carrier concentration (residual carrier concentration) were measured. did. The growth temperature here means the temperature of the SiC substrate. The triangular defect density is evaluated using a metal microscope, and the surface roughness Ra is evaluated using AFM.

  Here, the background carrier concentration refers to the carrier concentration of the SiC epitaxial film when no doping gas (for example, nitrogen or trimethylaluminum) is supplied. The background carrier concentration is measured by the mercury probe CV method, and the carrier concentration at a depth of 1 μm from the outermost surface of the epitaxial layer is used as the background carrier concentration.

  In Comparative Examples 1 and 2, a single epitaxial layer 82 is grown on a SiC substrate 81 as shown in FIG. Here, the single layer means that the growth temperature is constant in the epitaxial layer. FIG. 10 shows the epitaxial growth sequence, which includes a temperature raising step 91, an epitaxial growth step 92, and a temperature lowering step 93, and the temperature is kept constant in the epitaxial growth step 92.

(Comparative Example 1)
A 4H—SiC substrate having an off angle of 8 ° or less (here, 4 °) from the (0001) plane was prepared. Using a CVD apparatus, an epitaxial layer having a thickness of 10 μm was grown on the (0001) Si surface of this SiC substrate at a growth temperature of 1625 ° C. As other growth conditions, the growth pressure was 200 mbar, and the supply amounts of monosilane gas, propane gas, and hydrogen gas were 30 sccm, 10 sccm, and 90 slm, respectively. The growth rate at this time is about 5 μm / h.

(Comparative Example 2)
A 4H—SiC substrate having an off angle of 8 ° or less (here, 4 °) from the (0001) plane was prepared. Using a CVD apparatus, an epitaxial layer having a thickness of 10 μm was grown on the (0001) Si surface of the SiC substrate at a growth temperature of 1550 ° C. As other growth conditions, the growth pressure was 200 mbar, and the supply amounts of monosilane gas, propane gas, and hydrogen gas were 30 sccm, 10 sccm, and 90 slm, respectively. The growth rate at this time is about 5 μm / h.

Example 1
A 4H—SiC substrate having an off angle of 8 ° or less (here, 4 °) from the (0001) plane was prepared. A first epitaxial layer (high temperature growth layer) having a thickness of 0.5 μm is grown at a growth temperature of 1625 ° C. on the (0001) Si surface of this SiC substrate by using a CVD apparatus, and the growth temperature is further grown thereon. A second epitaxial layer (low temperature growth layer) having a thickness of 10 μm was grown at 1550 ° C. As other growth conditions, the growth pressure was 200 mbar, and the supply amounts of monosilane gas, propane gas, and hydrogen gas were 30 sccm, 10 sccm, and 90 slm, respectively. At this time, the growth rate of the low temperature growth layer is about 5 μm / h.

(Example 2)
A 4H—SiC substrate having an off angle of 8 ° or less (here, 4 °) from the (0001) plane was prepared. A first epitaxial layer (high temperature growth layer) having a thickness of 0.5 μm is grown at a growth temperature of 1625 ° C. on the (0001) Si surface of this SiC substrate by using a CVD apparatus, and the growth temperature is further grown thereon. A second epitaxial layer (low temperature growth layer) having a thickness of 10 μm was grown at 1500 ° C. As other growth conditions, the growth pressure was 200 mbar, and the supply amounts of monosilane gas, propane gas, and hydrogen gas were 30 sccm, 10 sccm, and 90 slm, respectively. The growth rate at this time was about 5 μm / h.

  Table 1 below shows the measurement results of Comparative Examples 1 and 2 and Examples 1 and 2.

  As can be seen from Table 1, in Comparative Example 1 (growth temperature: constant 1625 ° C.), the density of the generated triangular defects is good, but the surface roughness Ra is large. In Comparative Example 2 (growth temperature: constant 1550 ° C.), the surface roughness Ra is good, but the triangular defect density is high. That is, it can be seen that there is a trade-off relationship with respect to the growth temperature between the triangular defect density and the surface roughness Ra.

On the other hand, in Example 1 (growth temperature: 1625 ° C. → 1550 ° C.) and Example 2 (growth temperature: 1625 ° C. → 1500 ° C.), it can be seen that both the triangular defect density and the surface roughness Ra are good. Thus, according to the Example of this invention, it turns out that a triangular defect density can be 0.5 piece / cm < ² > or less, and surface roughness Ra can be 0.2 nm or less.

  FIG. 11 shows an AFM image of the outermost surface of the epitaxial layer grown under the conditions of Example 2. As can be seen from the figure, triangular defects were suppressed and step bunching did not occur, and a good epitaxial layer was obtained.

  Further, as can be seen from Table 1, the result was obtained that the background carrier concentration decreased as the growth temperature was set lower. This is considered to be because the inevitable gas (such as nitrogen) that reaches the substrate from the reactor part of the CVD apparatus is suppressed by the growth at a low temperature. In addition, the incorporation of metal impurities other than nitrogen into the epitaxial layer can be reduced, and the impurity concentration can be kept low. Unintentionally doped impurities in this way include nitrogen and oxygen, and unintentionally doped metal impurities include Al, Ti, Fe, Ni, Cr, V and the like. It is done.

  In the SiC epitaxial substrate according to the embodiment of the present invention, the impurity concentration of the first SiC epitaxial layer grown at a high temperature tends to be high, and the impurity concentration of the second SiC epitaxial layer grown at a low temperature tends to be low. . For example, when a semiconductor device such as a MISFET is manufactured, the gate insulating film is formed on the outermost surface of the SiC epitaxial substrate. Therefore, it is desirable that the impurity concentration of the second SiC epitaxial layer is low. Further, regarding the withstand voltage between the source and drain of the MISFET and the reverse withstand voltage of the diode, it is preferable that the impurity concentration is low in the second epitaxial layer in which the depletion layer is formed first. Therefore, if the impurity concentration of the second epitaxial layer is suppressed by low temperature growth as in this embodiment, it is effective for increasing the withstand voltage of the device.

  Hereinafter, a MISFET manufactured using the epitaxial substrate manufacturing method according to the embodiment of the present invention will be described.

  FIG. 12 is a cross-sectional view showing the configuration of the vertical MISFET 100 according to the embodiment of the present invention. The MISFET 100 includes a plurality of unit cells (semiconductor elements) 100U, and the figure shows a state in which two unit cells 100U are arranged in parallel.

The MISFET 100 includes a low-resistance n-type 4H—SiC substrate 101, and a SiC epitaxial layer 102 is provided on the main surface of the SiC substrate 101. SiC epitaxial layer 102 includes a buffer layer 102a formed on substrate 101 and a drift layer 102b provided on buffer layer 102a. The buffer layer 102a is an n ⁺ region doped with a high concentration impurity, and the drift layer 102b is an n ⁻ region doped with a low concentration impurity.

The MISFET 100 includes a channel layer 106 formed on the SiC epitaxial layer 102, a gate electrode 108 provided on the channel layer 106 via a gate insulating film 107, and a source electrode 109 in contact with the surface of the SiC epitaxial layer 102. And a drain electrode 110 provided on the back surface of the SiC substrate 101. An upper wiring electrode 112 and a back wiring electrode 113 are connected to the source electrode 109 and the drain electrode 110, respectively. The gate electrode 108 is covered with an interlayer insulating film 111 and insulated from the upper wiring electrode 112. The gate insulating film 107 may be a thermal oxide film (SiO ₂ film) formed by thermally oxidizing the surface of the channel layer 106.

A p-type body region 103 having a conductivity type opposite to that of the SiC epitaxial layer 102 is provided in the surface region of the SiC epitaxial layer 102. Further, an n ⁺ type source region 104 containing a high concentration n type impurity and a p ⁺ type contact region 105 containing a p type impurity having a higher concentration than the body region 103 are formed inside the p type body region 103. Has been. Body region 103, source region 104, and contact region 105 are formed by a step of implanting impurities into a predetermined region of SiC epitaxial layer 102 and a step of performing a high-temperature heat treatment for activating the impurities implanted in SiC epitaxial layer 102. Is done.

In the present embodiment, the SiC substrate 101 is doped with, for example, nitrogen having an impurity concentration of 1 × 10 ²⁰ cm ⁻³ . The SiC epitaxial layer 102 is grown on the SiC substrate 101 according to the method of the above-described embodiment (for example, the growth sequence shown in FIG. 4). First, the buffer layer 102a is formed by high-temperature growth at 1625 ° C., for example. At this time, the carrier concentration of the buffer layer 102a is set to, for example, 1 × 10 ¹⁷ / cm ³ or more and 1 × 10 ²⁰ / cm ³ or less by appropriately adjusting the flow rate of N ₂ that is the n-type dopant gas. The The thickness of the buffer layer 102a is, for example, 0.1 μm to 1.0 μm.

After forming the buffer layer 102a, the drift layer 102b is grown at a low temperature (for example, less than 1600 ° C.). The impurity concentration of the drift layer 102b is also controlled by adjusting the flow rate of N ₂ as in the buffer layer 102a. The carrier concentration of the drift layer 102b is set to, for example, 5 × 10 ¹⁵ / cm ³ or more and 2 × 10 ¹⁶ / cm ³ or less. The thickness of the drift layer 102b is, for example, 0.5 μm to 10.0 μm.

  In the above description, the buffer layer 102a is formed by high temperature growth and the drift layer 102b is formed by low temperature growth. However, the present invention is not limited to this. The buffer layer 102a may include an initial growth layer grown at a high temperature and a part of an epitaxial layer grown thereafter at a lower temperature. By switching the flow rate of the impurity gas, a buffer layer having a high impurity concentration and a drift layer having a low impurity concentration can be provided at any thickness regardless of the growth temperature.

  The MISFET 100 manufactured in this way has improved device characteristics because triangular defects generated on the surface of the epitaxial layer are reduced and surface roughness due to step bunching is also suppressed.

  The present invention is suitably used in semiconductor device applications such as transistors and diodes. In particular, it is suitably used in power semiconductor device applications for mounting on in-vehicle inverters such as EVs and HEVs or inverters for industrial equipment.

21 SiC substrate 22 First epitaxial layer (high temperature growth layer)
23 Second epitaxial layer (low temperature growth layer)
31 Step of raising temperature 32, 52 Step of first epitaxial growth (high temperature growth) 33, 53 Step of temperature switching 34, 54 Step of second epitaxial growth (low temperature growth) 35 Step of temperature reduction 81 SiC substrate 82 Epitaxial layer 91 Ascent Step of temperature 92 Step of epitaxial growth 93 Step of temperature drop

Claims (14)

Providing a SiC substrate having a main surface with an off angle of 8 ° or less from the (0001) plane;
Growing a first epitaxial layer at a first temperature while supplying a source gas containing Si and C on the main surface of the SiC substrate;
Growing a second epitaxial layer at a second temperature lower than the first temperature while supplying a source gas containing Si and C on the first epitaxial layer. Manufacturing method.   2. The method of manufacturing an SiC epitaxial substrate according to claim 1, wherein the first temperature is 1600 ° C. or higher and 1650 ° C. or lower.   3. The method of manufacturing an SiC epitaxial substrate according to claim 1, wherein the second temperature is 1500 ° C. or higher and lower than the first temperature.   4. The method of manufacturing an SiC epitaxial substrate according to claim 1, wherein the main surface of the SiC substrate has an off angle of 4 ° or less from a (0001) plane. 5. Growing at the first temperature comprises maintaining the first temperature for a first time;
Growing at the second temperature comprises maintaining the second temperature for a second time;
The manufacturing method according to claim 1, wherein the second time is longer than the first time. Further comprising lowering the temperature from the first temperature to the second temperature between the step of growing at the first temperature and the step of growing at the second temperature;
6. The method of manufacturing an SiC epitaxial substrate according to claim 1, wherein, in the step of reducing the temperature, the source gas is not supplied onto the SiC substrate. 7. Growing at the first temperature includes supplying a first doping gas;
Growing at the second temperature includes supplying a second doping gas;
The method for manufacturing an SiC epitaxial substrate according to claim 1, wherein a flow rate of the first doping gas is larger than a flow rate of the second doping gas. A SiC substrate having a main surface having an off angle of 8 ° or less from the (0001) plane;
A first epitaxial layer provided on the main surface of the SiC substrate and formed by epitaxial growth at a first temperature;
A SiC epitaxial substrate comprising: a second epitaxial layer provided on the first epitaxial layer and formed by epitaxial growth at a second temperature lower than the first temperature.   The SiC epitaxial substrate according to claim 8, wherein the main surface of the SiC substrate has an off angle of 4 ° or less from a (0001) plane. 10. The triangular defect density is 0.5 or less per cm ^{2 on} the surface of the second epitaxial layer, and the surface roughness Ra of the second epitaxial layer is 0.2 nm or less. The SiC epitaxial substrate as described in 2. The first epitaxial layer and the second epitaxial layer contain impurities of the same element that are unintentionally doped,
11. The concentration of impurities unintentionally doped in the second epitaxial layer is lower than the concentration of impurities unintentionally doped in the first epitaxial layer. SiC epitaxial substrate.   The SiC epitaxial substrate according to any one of claims 8 to 11, wherein a thickness of the first epitaxial layer is not less than 0.01 µm and not more than 2 µm. The first carrier concentration of the epitaxial layer, SiC epitaxial substrate according to any one of 1 × 10 ¹⁷ / cm ³ to 1 × 10 ²⁰ / cm ³ or less is 8. 12. 14. The SiC epitaxial substrate according to claim 13, wherein the carrier concentration of the second epitaxial layer is 5 × 10 ¹⁵ / cm ³ or more and 2 × 10 ¹⁶ / cm ³ or less.

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