JP2013008821A - Electronic module - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an electronic module arranged so as to sufficiently efficiently use wiring layers except innerlayer wiring layers when forming a circuit on the assumption that there are the innerlayer wiring layers restricted to form a free pattern in a direction of plate extension since components exist in a substrate thickness.SOLUTION: The number of wiring layers existing between internal layer wiring layers including innerlayer wiring layers 22, 23, 24, 25 and 26 with mounted components except incomplete innerlayer wiring layers and outer layer wiring layers including outer layer wiring layers 21 and 27 on sides with surface mounted components is more than that of wiring layers existing between innerlayer wiring layers without including the innerlayer wiring layers with mounted components and the outerlayer wiring layers including an outerlayer wiring layer on a side with external connection terminals except the incomplete innerlayer wiring layers.

Description

  The present invention relates to an electronic module in which electronic components are mounted via a substrate having a wiring pattern, and more particularly to an electronic module in which components are mounted and embedded in the thickness of the substrate.

  In general, an electronic module on which an electronic component is mounted via a substrate having a wiring pattern is typically represented as follows. That is, one surface is a mounting surface for a ball grid array (BGA) or a land grid array (LGA) for mounting on another large substrate (such as a motherboard), and a semiconductor component or the like on the other surface. The electronic parts are mounted and mounted. In many cases, a multilayer wiring technique is used for the substrate of the electronic module, so that even an electrically complicated electronic module requiring a large number of electrical nodes can be configured with a small area.

  In recent years, by mounting and embedding parts inside the thickness of the board of the electronic module, it is possible to further reduce the area and produce an electronic module that can handle even more electrically complicated circuits. It is becoming. However, in an electronic module in which components are mounted even inside the thickness of the board in this way, when the necessary wiring is formed and allocated to each wiring layer of the multilayer wiring, the components mounted inside are consumed. This space is a factor that hinders free allocation.

  Therefore, in an electronic module that uses multilayer wiring boards and has components mounted and embedded inside the board thickness, it is affected by the space consumed by the components mounted inside when forming the necessary wiring. How to prepare and prepare an undisposed wiring layer is much more important than that of the affected wiring layer. Therefore, a structure in which the highly important wiring layer is configured to be fully utilized for circuit formation is preferable.

JP 2003-197849 A

  In the electronic module in which components are mounted and embedded in the thickness of the substrate, the inner layer wiring in which free pattern formation in the plate spreading direction is restricted because the components exist in the thickness of the substrate. It is an object of the present invention to provide an electronic module having a structure in which each wiring layer excluding the inner wiring layer is configured to be fully utilized for circuit formation on the assumption that there is a layer.

  In order to solve the above problems, an electronic module according to one embodiment of the present invention is provided on a plate-like insulating layer having an upper surface and a lower surface facing the upper surface, and on the lower surface of the plate-like insulating layer. A first outer wiring layer having an external connection terminal portion; a second outer wiring layer provided on the upper surface of the plate-like insulating layer; and a plurality of inner layers provided within the thickness of the plate-like insulating layer. A wiring layer; a first component electrically mounted on one inner wiring layer of the plurality of inner wiring layers and embedded in the plate insulating layer; and the second outer wiring layer A second component electrically mounted on the plate-like insulating layer, and having the plate-like shape in the plurality of inner-layer wiring layers excluding the one inner-layer wiring layer. Since the first component is present in the insulating layer, free pattern formation in the direction of plate spreading is restricted. The inner layer wiring layer including the inner layer wiring layer on which the first component is mounted, and the second outer layer wiring including the second outer layer wiring layer. The number of wiring layers excluding the incomplete inner layer wiring layer existing between the layers does not include the inner layer wiring layer on which the first component is mounted. More than the number of wiring layers excluding the incomplete inner layer wiring layer existing between the outer layer wiring layer and the first outer layer wiring layer.

  This electronic module is based on the premise that there is an inner wiring layer (non-perfect inner wiring layer) in which free pattern formation in the direction of plate expansion is restricted due to the components embedded inside. The wiring layer is arranged in the layer direction excluding the incomplete inner layer wiring layer and the number thereof. That is, an incomplete inner layer wiring layer existing between this inner layer wiring layer including the inner layer wiring layer on which the embedded component is mounted and this outer layer wiring layer including the outer layer wiring layer having the outer mounting component. The number of wiring layers excluding the internal wiring layer does not include the inner wiring layer on which the embedded component is mounted, and exists from this inner wiring layer to the outer wiring layer including the outer wiring layer having the external connection terminal portion. The number of wiring layers is larger than the number of incomplete inner wiring layers.

  Here, the incomplete inner layer wiring existing from the inner layer wiring layer including the inner layer wiring layer on which the embedded component is mounted to the outer layer wiring layer including the outer layer wiring layer having the outer mounting component. The wiring layer excluding the layer is a wiring layer between the embedded component and the outer mounted component that can form a sufficient wiring without receiving interference from the embedded component. Since this wiring layer is a wiring layer between the wiring layer on which the embedded component is mounted and the wiring layer on which the outer mounting component is mounted, it is considered that many wiring patterns are required electrically.

  On the other hand, an incomplete inner layer wiring layer existing from this inner layer wiring layer to the outer layer wiring layer including the outer layer wiring layer having the external connection terminal portion without including the inner layer wiring layer on which the embedded component is mounted. The wiring layer except for is a wiring layer between the embedded component and the external connection terminal portion, which can form a wiring without receiving interference of the embedded component. Since this wiring layer is a wiring layer between the wiring layer on which the embedded component is mounted and the wiring layer including the external connection terminal portion, an electrically simple wiring pattern for connecting to the external connection terminal It would be good if we could prepare

  Therefore, the configuration in which the number of the former wiring layers is larger than the number of the latter wiring layers is a reasonable configuration in the sense that a necessary wiring pattern can be appropriately prepared. Therefore, the wiring layer that is not affected by the space consumed by the components mounted inside is configured to be fully utilized for circuit formation.

  According to the present invention, in an electronic module in which components are mounted and embedded in the thickness of the substrate, since the components are present in the thickness of the substrate, the formation of a free pattern in the plate spreading direction is limited. Provided that there is an inner wiring layer, it is possible to provide an electronic module having a structure in which each wiring layer excluding the inner wiring layer can be fully utilized for circuit formation.

1 is a cross-sectional view schematically showing a configuration of an electronic module that is an embodiment of the present invention. Sectional drawing which shows the structure of the electronic module which is another embodiment typically. Furthermore, sectional drawing which shows typically the structure of the electronic module which is another embodiment. Sectional drawing which shows typically the structure of the electronic module which is another (4th) embodiment.

  As an embodiment of the present invention, at least one of the first component and the second component may be an IC component. When any part is an IC part, the number of terminals is considerably larger than that of the passive element part, and the number of wiring patterns to be prepared by the board is greatly increased. Therefore, in such a case, it is more meaningful to set the arrangement and the number of each wiring layer except the inner wiring layer in which free pattern formation in the plate spreading direction is restricted as described above. Become.

  Also, as an embodiment, the first component may be embedded in the plate-like insulating layer so as to be positioned closer to the first outer wiring layer than the one inner wiring layer. . In such a case, the inner wiring layer in which free pattern formation in the plate spreading direction is restricted is located closer to the first outer wiring layer than the one inner wiring layer. In other words, there is no inner layer wiring layer in which free pattern formation in the direction of plate spread is restricted between the wiring layer on which the embedded component is mounted and the wiring layer on which the outer mounting component is mounted, They can be physically close by that much. Therefore, an electronic module with improved electrical characteristics can be obtained with a short wiring.

  Based on the above, embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a cross-sectional view schematically showing a configuration of an electronic module according to an embodiment of the present invention. As shown in FIG. 1, this electronic module includes insulating layers (plate-like insulating layers) 11 to 16, wiring layers (wiring patterns) 21 to 27, interlayer connectors 31 to 36, surface-mounted passive element components 41, ICs The component 42 includes an underfill resin 42U, surface-mounted passive element components 43 to 45, connection members (solder) 51 and 53 to 55, stud bumps 52, and solder resists 61 and 62.

  As an outline, this electronic module uses a multilayer wiring board in which components can be embedded (embedded), and an external connection terminal portion is provided on one surface (the lower surface in the drawing) and the other surface (the upper surface in the drawing). Apart from the built-in parts, the parts are further surface-mounted and mounted. The surface with the external connection terminal is a surface for mounting on other large substrates (motherboards, etc.). In addition to providing the LGA terminal as shown, it should be a BGA terminal with solder balls on the land. You can also.

  Each of the wiring layers 21 and 27 is a wiring layer on the main surface. As described above, the wiring layer 21 is a wiring layer for providing an external connection terminal, and the wiring layer 27 is a component 43 thereon. It is a wiring layer for mounting -45. In this mounting, except for the land portion of the wiring layer 27 on which the solder 53 to 55 is placed, the main surface thereof is a solder resist 62 that holds the melted solder 53 to 55 at the land portion, and thereafter functions as a protective layer. It is covered. Also on the surface on which the wiring layer 21 is provided, a solder resist 61 is formed except for a region for an external connection terminal that does not require a non-conductive coating. A highly corrosive-resistant Ni / Au plating layer (not shown) may be formed on the surface layers of the wiring layers 27 and 21 that are not covered with the solder resists 62 and 61.

  Each of the wiring layers 21 to 27 is obtained by processing a metal (copper) foil into a predetermined pattern, and is formed as a layer that coincides with the plate spreading direction of the insulating layers 11 to 16. The insulating layers 11 to 16 are rigid material layers made of, for example, an epoxy resin provided so as to electrically separate the wiring layers 21 to 27. Among them, the insulating layers 12 to 14 have openings corresponding to the embedded components 41 and 42, and provide a space for accommodating these components 41 and 42. The insulating layers 11 and 15 are deformed and entered so as to fill the space of the opening of the insulating layers 12 to 14 for the embedded components 41 and 42 so as not to generate a space as a gap inside.

  For each wiring layer, first, the wiring layer 21 and the wiring layer 22 can be conducted by an interlayer connector 31 that is sandwiched between the surfaces of the patterns and penetrates the insulating layer 11. Similarly, the wiring layer 22 and the wiring layer 23 can be conducted by an interlayer connector 32 that is interposed between the surfaces of the patterns and provided through the insulating layer 12. The wiring layer 23 and the wiring layer 24 can be conducted by an interlayer connector 33 that is sandwiched between the surfaces of the patterns and penetrates the insulating layer 13.

  Further, similarly, the wiring layer 24 and the wiring layer 25 can be conducted by an interlayer connector 34 that is sandwiched between the surfaces of these patterns and penetrates the insulating layer 14. The wiring layer 25 and the wiring layer 26 can be conducted by an interlayer connector 35 that is sandwiched between the surfaces of these patterns and penetrates the insulating layer 15. The wiring layer 26 and the wiring layer 27 can be conducted by an interlayer connector 36 that is sandwiched between the surfaces of the patterns and penetrates the insulating layer 16.

  Since the insulating layers 12 to 14 are provided with the openings for accommodating the components 41 and 42 as described above, some of the wiring layers also have a free pattern in the plate spreading direction. Formation is limited. That is, as shown in the drawing, the four layers of the wiring layers 22 to 25 become incomplete inner layer wiring layers influenced by the space occupied by the components 41 and 42. On the other hand, the remaining wiring layers 21, 26, and 27 are not limited in this way, and a free pattern can be formed in the direction of plate spreading. The restrictions on the pattern formation that the wiring layers 22 to 25 receive become more conspicuous in design as the embedded parts 41 and 42 are arranged at a higher density.

  Each of the interlayer connectors 31 to 36 has a columnar structure derived from conductive bumps formed by screen printing of a conductive composition, and depends on the manufacturing process in the axial direction (up and down in the illustration of FIG. 1). There is a change in diameter in the laminating direction and the penetrating direction). These interlayer connectors 31 to 36 can be provided at a high density in a small region, which can contribute to finer substrate design.

  The built-in surface mount type passive element component 41 is, for example, a chip capacitor, and its planar size is, for example, 0.6 mm × 0.3 mm (0603 type component). Terminals (electrodes) are provided at both ends, and the upper surface thereof is incorporated in a posture facing the built-in component mounting land (wiring pattern) included in the inner wiring layer 26. The terminals of the component 41 and the wiring pattern 26 are electrically and mechanically connected by solder 51.

  The built-in IC component 42 is a bare semiconductor chip with a gold (Au) stud bump 52, for example, and is positioned opposite to the connection pad (wiring pattern) included in the inner wiring layer 26 and stud bumps. The wiring layer 26 is flip-mounted via 52. In order to improve the reliability of the flip mounting, an underfill resin 42U is filled between the IC component 42 and the insulating layer 16.

  The externally mounted surface mount type passive element components 43 to 45 are, for example, a chip type capacitor, a chip type resistor, a chip type inductor, and the like. Wiring pattern) is mounted with solder 53-55.

  This electronic module includes the outer layer wiring layer 27 including the inner layer wiring layer 26 on which the embedded components 41 and 42 are mounted and the outer layer wiring layer 27 having the mounted components 43 to 45 on the outside. 27, two layers of wiring layers 26 and 27 are provided. These wiring layers 26 and 27 are both wiring layers that can be formed without being affected by the space region of the embedded components 41 and 42.

  On the other hand, between the inner layer wiring layer 26 not including the inner layer wiring layer 26 on which the embedded components 41 and 42 are mounted and including the outer layer wiring layer 21 having the external connection terminal portion, Although there are five wiring layers 21 to 25, the wiring layer 21 is the only wiring layer that can be formed without being affected by the space area of the embedded components 41 and 42. The four layers of the wiring layers 22 to 25 are incomplete inner layer wiring layers influenced by the space region occupied by the components 41 and 42.

  As described above, according to the configuration in which the number of the former wiring layers (two layers of the wiring layers 26 and 27) is larger than the number of the latter wiring layers (one layer of only the wiring layer 21), necessary wiring patterns are appropriately prepared. In the sense that it can be done, it makes a reasonable configuration as an electronic module. That is, the former wiring layer is a wiring layer required between the wiring layer 26 on which the embedded components 41 and 42 are mounted and the wiring layer 27 on which the outer components 43 to 45 are mounted. This wiring pattern is considered necessary. On the other hand, the latter wiring layer is a wiring layer between the wiring layer 26 on which the embedded components 41 and 42 are mounted and the wiring layer 21 including the external connection terminal portion. This is because it is considered that a simple wiring pattern should be prepared electrically.

  As the number of the latter wiring layers, the number of incomplete inner layer wiring layers affected by the space occupied by the embedded components 41 and 42 is subtracted as described above. This is because the limitation of pattern formation received by 22 to 25 becomes more conspicuous in design as the embedded parts 41 and 42 are arranged at higher density. These wiring layers 22 to 25 cannot be used to form a free conductive path from the beginning. However, as the electronic module is further reduced in area, the arrangement density of the embedded components 41 and 42 is inevitably considerably increased. The tendency is strengthened.

  As can be seen from the above description, in this electronic module, each of the wiring layers 21, 26, 27 except the incomplete inner layer wiring layers 22-25 affected by the space occupied by the components 41, 42 mounted therein is provided. It is arranged so that it can be fully utilized in circuit formation. As a result, the number of wiring layers can be reduced as a whole, which can contribute to thinning as an electronic module.

  The above configuration is more advantageous because the embedded component 42 is an IC component. This is because, in general, an IC component has a considerably larger number of terminals than a passive element component, and the number of wiring patterns to be prepared by the substrate is greatly increased. That is, in such a case, the possibility of forming a free conductive path between the embedded components 41 and 42 and the externally mounted components 43 to 45 should be further enhanced.

  Next, FIG. 2 is a cross-sectional view schematically showing a configuration of an electronic module according to another embodiment. In the figure, the same or equivalent parts as those shown in FIG. The description of the portion is omitted unless there is a matter to be added.

  As shown in FIG. 2, this electronic module includes insulating layers (plate-like insulating layers) 11 to 16, wiring layers (wiring patterns) 21 to 27, interlayer connectors 31A to 36A, IC components 42A, surface mount type passive elements. Components 43 and 44A, connection members (solder) 52A, 53 and 54A, and solder resists 61 and 62 are included.

  In this electronic module, an interlayer connector 31A obtained by another process is used instead of the interlayer connectors 31 to 36 in FIG. 1 which are conductive bumps formed by printing a conductive composition as an interlayer connector. ~ 36A is used. The interlayer connectors 31A to 36A can be formed by filling the through holes formed in the respective insulating layers 11 to 16 with a conductive composition. Such a configuration of the vertical conductors by the interlayer connectors 31A to 36A is one well-known example in the case of forming a multilayer wiring board.

  Further, as an embedded IC component, for example, an IC component 42A in a chip scale package, which is provided with terminals in a grid arrangement for surface mounting so as to be mounted with solder, is used. According to such an IC component 42A, it can be mounted on the inner wiring layer 26 with the solder 52A by the surface mounting technique, and the cost can be reduced.

  The surface-mounted passive element component 44A mounted on the outside is a chip-type passive element component having a size different from that of the same. Similar to 43, the component 44A is mounted on the component mounting land (wiring pattern) included in the outer wiring layer 27 with solder 54A by a known surface mounting technique.

  This electronic module also extends from the inner layer wiring layer 26 including the inner layer wiring layer 26 on which the embedded component 42A is mounted to the outer layer wiring layer 27 including the outer layer wiring layer 27 having the mounted components 43 and 44A on the outside. In between, two layers of wiring layers 26 and 27 are provided. These wiring layers 26 and 27 are both wiring layers that can be formed without being affected by the space region of the embedded component 42A.

  On the other hand, the wiring layer between the inner layer wiring layer 26 including the outer layer wiring layer 21 having the external connection terminal portion is not included in the wiring layer without including the inner layer wiring layer 26 on which the embedded component 42A is mounted. Although there are five layers 21 to 25, the wiring layer 21 is the only wiring layer that can be formed without being affected by the space region of the embedded component 42A. The four layers of the wiring layers 22 to 25 are incomplete inner layer wiring layers influenced by the space region consumed by the component 42A.

  The advantages obtained by arranging the wiring layers as described above are the same as those described with reference to FIG. That is, in this electronic module, each of the wiring layers 21, 26 and 27 except for the incomplete inner layer wiring layers 22 to 25 affected by the space occupied by the component 41A mounted therein is sufficient for circuit formation. It can be said that it is arranged so that it can be utilized.

  Next, FIG. 3 is a cross-sectional view schematically showing a configuration of an electronic module which is still another embodiment. In the figure, the same or equivalent parts as those shown in the already described figures are denoted by the same reference numerals. The description of the portion is omitted unless there is a matter to be added.

  As shown in FIG. 3, this electronic module includes insulating layers (plate-like insulating layers) 11 to 17, wiring layers (wiring patterns) 21 to 28, interlayer connectors 31 to 37, surface-mounted passive element components 41, ICs It has a component 42A, surface-mounted passive element components 43 and 45A, an IC component 46, connecting members (solder) 51, 52A, 53, 55A and 56, and solder resists 61 and 62.

  In this electronic module, the number of wiring layers is increased by one compared to that shown in FIG. 1 (wiring layer 28). Therefore, the number of insulating layers is also increased by one (insulating layer 17). An interlayer connection 37 that penetrates the insulating layer 17 is newly provided. The interlayer connection 37 is sandwiched between the wiring layers 27 and 28 so that the wiring layer 27 and the wiring layer 28 can be electrically connected.

  Further, as an IC component to be mounted on the outside, for example, an IC component 46 in a chip scale package is provided, which is provided with terminals in a grid arrangement for surface mounting so that it can be mounted with solder. The IC component 46 is mounted on a component mounting land (wiring pattern) included in the outer wiring layer 28 by solder 56. The surface-mounted passive element component 45A mounted on the outside is a chip-type passive element component having a size different from that of the same. The component 45A is mounted on a component mounting land (wiring pattern) included in the outer wiring layer 27 with solder 55A.

  In this electronic module, the outer layer including the inner layer wiring layer 26 on which the embedded components 41 and 42A are mounted and the outer layer wiring layer 28 having the components 43, 45A and 46 mounted on the outside is included in the outer layer. Between the wiring layers 28, three wiring layers 26, 27, and 28 are provided. These wiring layers 26, 27, and 28 are all wiring layers that can be formed without being affected by the space area of the embedded components 41 and 42A.

  On the other hand, between the inner layer wiring layer 26 not including the inner layer wiring layer 26 on which the embedded components 41 and 42A are mounted and including the outer layer wiring layer 21 having the external connection terminal portion, Although there are five wiring layers 21 to 25, the wiring layer 21 is the only wiring layer that can be formed without being affected by the space area of the embedded components 41 and 42A. The four layers of the wiring layers 22 to 25 are incomplete inner layer wiring layers influenced by the space area consumed by the components 41 and 42A.

  The advantages obtained by arranging the wiring layers as described above are the same as those described with reference to FIG. In this electronic module, since the embedded component has the IC component 42A and the mounted component also has the IC component 46 on the outside, the embedded component 41, 42A and the mounted component 43, 45A, 46 on the outer side. It is considered that the number of wiring patterns required between them increases further. Therefore, it is preferable to further enhance the possibility of forming a free conductive path between them. As a result, it can be said that the number of the former wiring layers is further increased.

  Next, FIG. 4 is a cross-sectional view schematically showing a configuration of an electronic module which is still another embodiment. In the figure, the same or equivalent parts as those shown in the already described figures are denoted by the same reference numerals. The description of the portion is omitted unless there is a matter to be added.

  As shown in FIG. 4, this electronic module includes insulating layers (plate-like insulating layers) 10 to 17, wiring layers (wiring patterns) 20 to 28, interlayer connectors 30 to 37, surface-mounted passive element components 41, ICs It has a component 42A, surface-mounted passive element components 43 and 45A, an IC component 46, connecting members (solder) 51, 52A, 53, 55A and 56, and solder resists 61 and 62.

  In this electronic module, the number of wiring layers is increased by one (wiring layer 20) as compared with that shown in FIG. For this reason, the number of insulating layers is also increased by one (insulating layer 10). An interlayer connection 30 that penetrates through the insulating layer 10 is newly provided. The interlayer connection body 30 is sandwiched between the wiring layers 20 and 21 so that the wiring layer 20 and the wiring layer 21 can be electrically connected.

  In this electronic module, the outer layer including the inner layer wiring layer 26 on which the embedded components 41 and 42A are mounted and the outer layer wiring layer 28 having the components 43, 45A and 46 mounted on the outside is included in the outer layer. Between the wiring layers 28, three wiring layers 26, 27, and 28 are provided. These wiring layers 26, 27, and 28 are all wiring layers that can be formed without being affected by the space area of the embedded components 41 and 42A. This is the same as the electronic module shown in FIG.

  On the other hand, between the inner layer wiring layer 26 not including the inner layer wiring layer 26 on which the embedded components 41 and 42A are mounted and including the outer layer wiring layer 20 having the external connection terminal portion, There are six wiring layers 20 to 25, and the wiring layers that can be formed without being affected by the space area of the embedded components 41 and 42 A are the two wiring layers 21 and 20. The four layers of the wiring layers 22 to 25 are incomplete inner layer wiring layers influenced by the space area consumed by the components 41 and 42A.

  The advantages obtained by arranging the wiring layers as described above are the same as those described with reference to FIG. In this electronic module, it can be said that the number of the latter wiring layers is increased as a countermeasure when the number of necessary external connection terminals is increased. However, since the embedded component has the IC component 42A and the mounted component on the outside also has the IC component 46, the gap between the embedded components 41 and 42A and the mounted components 43, 45A and 46 on the outer side. However, the number of necessary wiring patterns is further increased. Therefore, in order to further enhance the possibility of forming a free conductive path between them, the number of the former wiring layers is larger than the number of the latter wiring layers.

  As a modification, the former wiring layer (a wiring layer including those between the inner layer wiring layer on which the components 41 and 42A are mounted and the wiring layer on which the outer components 43, 45A and 46 are mounted) The number of wiring layers that can be formed without being affected by the space area of the embedded components 41 and 42A is maintained, and the embedded components 41 and 42A are mounted and embedded on the upper side of the wiring layer 26 in the figure. Configuration is also conceivable.

  In the case of this configuration, the wiring layers 22 to 25 can be omitted and not provided. Instead, the wiring layers 22 to 25 are affected by the space area of the embedded components 41 and 42A such as the wiring layers 22 to 25. An incomplete inner layer wiring layer includes an inner layer wiring layer 26 on which the components 41 and 42A are mounted, a wiring layer 28 on which the outer components 43, 45A and 46 are mounted (strictly speaking, an inner layer wiring layer 27 below the inner layer wiring layer 27). It becomes the structure newly arrange | positioned between. Therefore, the length of the conductive path connecting the embedded parts 41 and 42A and the external parts 43, 45A and 46 is increased accordingly. Therefore, in the sense that the electrical characteristics are improved with a short wiring, the configuration is a step over.

  10, 11, 12, 13, 14, 15, 16, 17 ... insulating layer (plate-like insulating layer), 20, 21, 22, 23, 24, 25, 26, 27, 28 ... wiring layer (wiring pattern), 30, 31, 32, 33, 34, 35, 36, 37... Interlayer connector (conductive bump by conductive composition printing), 31 A, 32 A, 33 A, 34 A, 35 A, 36 A. Material filling), 41... Surface mounted passive element components (embedded), 42... IC components (embedded; flip mounted), 42 A... IC components (embedded; surface mounted), 42 U. 45, 45A ... surface mount type passive element parts (external), 46 ... IC parts (external; surface mount), 51, 52A, 53, 54, 54A, 55, 55A, 56 ... connecting members (solder), 52 ... Stud bump, 1,62 ... solder resist.

Claims (3)

A plate-like insulating layer having an upper surface and a lower surface facing the upper surface;
A first outer wiring layer having an external connection terminal provided on the lower surface of the plate-like insulating layer;
A second outer wiring layer provided on the upper surface of the plate-like insulating layer;
A plurality of inner wiring layers provided within the thickness of the plate-like insulating layer;
A first component that is electrically mounted to one inner wiring layer of the plurality of inner wiring layers and embedded in the plate-like insulating layer;
A second component electrically mounted on the second outer wiring layer and provided on the plate-like insulating layer,
Since the first component is present in the plate-like insulating layer among the plurality of inner layer wiring layers excluding the one inner layer wiring layer, free pattern formation in the plate spreading direction is restricted. There is an incomplete inner wiring layer,
The incomplete layer existing from the inner layer wiring layer including the inner layer wiring layer on which the first component is mounted to the second outer layer wiring layer including the second outer layer wiring layer; The number of wiring layers excluding the inner layer wiring layer does not include the inner layer wiring layer on which the first component is mounted, and from the inner layer wiring layer to the first outer layer wiring layer including the first outer layer wiring layer. The number of wiring layers excluding the incomplete inner wiring layer existing between the layers is larger than the number of wiring layers.   The electronic module according to claim 1, wherein at least one of the first component and the second component is an IC component.   2. The electronic module according to claim 1, wherein the first component is embedded in the plate-like insulating layer so as to be located closer to the first outer wiring layer than the one inner wiring layer. .

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