JP2012169007A - Hybrid drive with extended memory, and record reproducer including hybrid drive with extended memory - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve convenience of a hybrid drive with an extended memory by mitigating a restriction in data transmission to a nonvolatile memory in the hybrid drive with the extended memory formed by combining an optical disk drive with a nonvolatile memory.SOLUTION: In a hybrid drive 100 with the extended memory formed by combining the optical disk drive with the nonvolatile memory, an optical disk control section 10 includes an expansion bus I/F 30, a nonvolatile memory device 40 is connected thereto by the expansion bus 35, and the expansion bus I/F 30 and a host I/F 13 are also connected by the expansion bus 35. Data from a host apparatus 50 is thus transmittable to a nonvolatile memory 42 via the expansion bus I/F 30, thus providing the hybrid drive with the extended memory that is less susceptible to data transmission requirements of a buffer memory 14 side and has high convenience.

Description

  The present invention relates to a hybrid drive with an expansion memory in which a storage device such as an optical disk, which has a large capacity but requires a relatively long time to access, and a storage device (memory) such as a flash memory with quick access, and the above-described expansion memory. The present invention relates to an audio / video recording / reproducing apparatus using a hybrid drive.

  Currently, an optical disk drive using a large-capacity optical disk such as a BD (Blu-ray Disc), and a recording / playback apparatus (Blu-ray disk recorder) for audio / video, etc., in which the optical disk drive is combined with a tuner, an operation unit, and the like. However, recording / reproducing on / from an optical disc requires a preparation time and is not always easy to use.

  FIG. 9 is a diagram showing a schematic configuration of a conventional general optical disk drive. In FIG. 9, reference numeral 90 denotes the entire optical disk drive. The optical disc drive 90 includes an optical disc control unit 10 for controlling the optical disc drive, and an optical disc drive unit 20 for driving an optical disc and an optical pickup.

  The optical disk control unit 10 connects a CPU 11 that controls the entire optical disk drive, a signal processing circuit 12 that processes data such as control signals, audio and video, and an optical disk drive to an external device 50 (hereinafter referred to as a host device 50). And a buffer memory 14 for temporarily storing data to be written on the optical disc. As the host I / F 13, various interfaces such as a serial interface such as SATA and a parallel interface such as PCI can be used.

  Reference numeral 16 denotes a CPU bus, and the signal processing circuit 12, the host I / F 13 and the like are controlled by the CPU 11 via the CPU bus. Reference numeral 15 denotes a main bus through which data is transmitted between the signal processing circuit 12, the host I / F 13, and the buffer memory 14. The optical disk control unit 10 is usually configured as one LSI, and the LSI in which the optical disk control unit 10 is configured is referred to as an “optical disk control LSI”.

  The optical disk drive unit 20 includes a motor 21 for rotationally driving the optical disk 23, an optical pickup 22 for storing data in the optical disk 23, and reading data from the optical disk 23, and the like. It can be loaded.

  The host device 50 is configured as a main body side device having, for example, a tuner, an operation unit, and the like. When a Blu-ray disc can be used as the optical disc 23, the optical disc drive 90 and the host device 50 A device capable of recording / reproducing audio / video, that is, a Blu-ray disc recorder is configured. In addition, the host device 50 may be a personal computer main body. In this case, a personal computer with a Blu-ray disc drive is configured.

  When recording data such as audio and video from the host device 50 on the optical disk 23, the data from the host device 50 is input to the optical disk control unit 10 via the host I / F 13 and temporarily stored in the buffer memory 14. Is done. The signal processing circuit 12 takes out data to be written on the optical disk 23 from the buffer memory 14, performs error correction code addition and modulation processing, and outputs the data to the optical pickup 22. Conversely, when reproducing the data recorded on the optical disk, the signal processing circuit 12 demodulates the signal output from the optical pickup 22, performs error correction, and writes it in the buffer memory 14.

  The host I / F 13 communicates with the host device 50, writes data transferred from the host device 50 to the buffer memory 14 when recording data, and conversely, when reading data, it is read from the optical disk 23 and read from the buffer memory 14. The data written in is transferred to the host. In this way, data written to or read from the optical disc 23 is transmitted and received between the host I / F 13 and the signal processing circuit 12 via the buffer memory 14. The buffer memory 14 serves as a buffer buffer that adjusts the timing of optical disk control and communication with the host.

  Here, by setting the data transfer rate of the main bus connected to the buffer memory as necessary and sufficient for access to the optical disk, the operation clock frequency of the optical disk control LSI in which the optical disk control unit 10 is configured is lowered. It is suppressed and power consumption is reduced. Further, by setting the capacity of the buffer memory to the minimum size necessary for accessing the optical disc, it is possible to reduce the cost of the optical disc control LSI by suppressing the chip size.

  Patent Document 1 describes a cache device provided with a primary cache memory made of DRAM or the like and a secondary cache memory made of nonvolatile memory such as HDD or flash memory in order to improve the usability of the optical disk drive 90. Yes.

  Patent Document 2 discloses a technology relating to a bus expansion system that expands a main bus and connects various peripheral devices. It is conceivable to add an expansion memory to the optical disk drive by applying this bus expansion technology.

  FIG. 10 shows a drive device 100 (hereinafter referred to as a hybrid drive 100 with an expansion memory) in which a nonvolatile memory is connected to an optical disk drive by applying the technology relating to the bus expansion system described in Patent Document 2. In FIG. 10, the same members as those in FIG. 9 are given the same numbers, and detailed descriptions thereof are omitted.

  In FIG. 10, the hybrid drive 100 with an extended memory has an extended DMAC (Direct Memory Access Controller) 17 in the optical disk control unit 10 and is connected via the DMAC 17. A large-capacity nonvolatile memory device 40 is included. The nonvolatile memory device 40 includes a nonvolatile memory control circuit 41 and a nonvolatile memory 42. The nonvolatile memory 42 may be an eMMC (Embedded Multi Media Card), for example, but is not limited thereto, and may be any nonvolatile memory that can operate at higher speed than the optical disk.

  The extended DMAC 17 is controlled by the CPU 11, and the data from the main bus 15 is stored in the nonvolatile memory 42 in the nonvolatile memory device 40. Since the non-volatile memory 42 such as eMMC does not require a preparation time for start-up, it can be operated immediately. Therefore, according to this hybrid drive with an extended memory, the usability that can compensate for the shortcomings of the optical disk drive It becomes an excellent drive device.

Japanese Patent Laid-Open No. 7-225714 (published August 22, 1995) JP 62-191959 A (published August 22, 1987)

  The technology described in Patent Literature 1 describes providing a primary cache and a secondary cache, and Patent Literature 2 describes technology relating to bus expansion, and according to these technologies, both are optical discs. Although the usability of the drive can be improved as such, there is a problem that the data transfer speed depends on the data transfer performance of the buffer memory and is limited.

  That is, as shown in FIG. 10, the optical disk, the buffer memory 14, and the nonvolatile memory device 40 also share the main bus with the hybrid drive 100 with an extended memory provided with the nonvolatile memory device 40. The transfer rate is determined depending on the data transfer performance. For example, when a 16-bit data bus width SDR (single data rate) SDRAM is used as a buffer memory, data transfer of about 100 Mbytes / second is generally possible, but an SSD (Solid State) using a nonvolatile memory is possible. The transfer rate of (Drive) is 100 to 200 Mbytes / second by itself, and the performance of the SDRAM is used up only by the nonvolatile memory, and the processing of the optical disk becomes impossible. On the other hand, while processing the optical disk, it becomes full to realize several tens of megabytes / second as the transfer rate of the nonvolatile memory.

  In addition, in an “LSI for optical disk control” in which the optical disk control unit 10 is configured, an inexpensive SDR (Single Data Rate) SDRAM is often used as a buffer memory. The SDR SDRAM is an SDRAM that performs data access using only the rising edge of the clock. SDR SDRAM can be accessed with a relatively simple control circuit, but it is difficult to improve the data transfer rate.

  To deal with this, there are high-speed SDRAMs that use both edges of the clock such as DDR, DDR2, and DDR3 (Double Data Rate). However, there is a large-scale control circuit including an analog circuit or the like for clock phase adjustment. It becomes necessary and becomes expensive for an optical disc. Therefore, if the DDR memory is used as the optical disk control LSI, an expensive but not used part is formed when used in a drive that does not use a non-volatile memory, which is disadvantageous in terms of cost. turn into.

  Furthermore, development of an LSI for controlling an optical disc has been promoted with a trend of taking in peripheral functions for an optical disc apparatus and reducing the size. For example, an external SDRAM has been used as a buffer memory for temporarily storing data read from an optical disk in the past, but is now built in an optical disk control LSI. When the buffer memory is built in the optical disk control LSI, it is necessary to reduce the capacity of the buffer memory itself in order to reduce the circuit scale as a whole. In some cases, it is 4 Mbytes or 2 Mbytes when incorporated in an LSI.

  Here, if the buffer memory built in the optical disk control LSI is set to the minimum capacity used in the optical disk, it can be used as a data buffer for temporarily storing data to be recorded / reproduced in the nonvolatile memory when the nonvolatile memory is added. The required memory capacity is insufficient. On the other hand, if the capacity is determined based on the non-volatile memory, the capacity becomes too large when developing a drive that does not use the non-volatile memory. If the capacity is large, the chip size of the optical disk control LSI increases, resulting in a decrease in yield and an increase in cost.

  In the development of an optical disk control LSI, it is required to amortize development costs early by producing as many quantities as possible. Therefore, it is desirable to develop an optical disc control LSI with a configuration that can handle both cases of using and not using a nonvolatile memory, and using it in common. Further, it is required to reduce the cost by increasing the number of optical disk control LSIs that can be produced per wafer by realizing the smallest possible chip size and improving the yield.

  However, as described above, when the nonvolatile memory is used and when it is not used, the data transfer speed requirement and the buffer memory size requirement are significantly different, and it is difficult to adopt a configuration corresponding to both. When optimized for an optical disk, it is difficult to mount a non-volatile memory, and when optimized for a non-volatile memory, the optical disk becomes over-specific and expensive.

  In order to solve the above problems, in the hybrid drive with an expansion memory according to the invention of the present application, an optical disk drive unit, a CPU, a buffer memory for temporarily storing data to be written to the optical disk, and a host for connecting a host device An optical disk control unit having an I / F and a hybrid drive with an expansion memory having an expansion memory having a capacity larger than that of the buffer memory, wherein the optical disk control unit further includes an expansion bus I / F The host I / F and the expansion bus I / F are connected by an expansion bus, and the expansion memory is connected to the expansion bus I / F by an expansion bus.

  According to this, since data transfer between the host device connected via the host I / F and the non-volatile expansion memory can be performed without using the buffer memory, between the host device and the expansion memory. This data transfer is hardly affected by the data transfer rate in the buffer memory. Therefore, for example, the data transfer rate from the host device to the expansion memory can be set faster than the transfer rate between the buffer memory and the optical disk.

  In order to solve the above problems, in the hybrid drive with an expansion memory according to another invention of the present application, the expansion bus I / F includes a selector, a DMAC (direct memory access controller), and an arbitration circuit. The selector switches the connection between the main bus of the optical disc control unit and the expansion bus connected to the host I / F, and the arbitration circuit is connected to the CPU according to the state of the expansion bus. And the access from the DMAC are switched.

  According to this, since the data transfer between the host device connected via the host I / F and the expansion memory can be performed by one DMAC, the circuit scale of the expansion bus I / F is reduced. be able to.

  In order to solve the above problems, in the hybrid drive with an expansion memory according to still another invention of the present application, the expansion bus I / F includes a buffer memory DMAC, a host I / F DMAC, and the buffer memory DMAC. And an arbitration circuit to which the host I / F DMAC is connected.

  According to this, since the parallelism of data transfer between the host device connected via the host I / F and the expansion memory is improved, the use efficiency of the expansion bus is improved and more data is transferred. be able to.

  In order to solve the above problem, in the hybrid drive with an expansion memory according to still another invention of the present application, the expansion bus I / F further includes a volatile memory operable as a buffer memory via a volatile memory control circuit. This is characterized in that a memory is connected.

  According to this, a memory serving as a buffer for data stored in the expansion memory can be added without changing the configuration of the optical disk control unit. Since the size of the data that is read from and written to the nonvolatile memory at a time can be adjusted by the buffer for the extended memory, the data size can be adjusted according to the characteristics of the nonvolatile memory. Transfer performance can be further increased.

  In order to solve the above problem, in the hybrid drive with an expansion memory according to still another invention of the present application, the expansion bus I / F is further provided with an DMAC in the expansion bus, and is connected to the expansion bus. Further, the present invention is characterized in that data transfer between the nonvolatile memory and the volatile memory is enabled, and data movement in the nonvolatile memory and data movement in the volatile memory are enabled.

  According to this, data transfer between various memories can be realized via the DMAC in the expansion bus, and data transfer between the nonvolatile memory and the volatile memory can be performed without intervention of the CPU. Therefore, the use efficiency of the expansion bus can be further improved.

  In order to solve the above problems, a recording / reproducing apparatus including a hybrid drive with an extended memory according to the present invention includes a host device connected via the host I / F.

  According to this, in the recording / reproducing apparatus including the host device, the extended memory can be used effectively, and the convenience as the recording / reproducing apparatus including the hybrid drive with the extended memory can be enhanced.

  In order to solve the above problems, in a recording / reproducing apparatus including a hybrid drive with an expansion memory according to another invention of the present application, an expansion bus I / F is provided in the host device, and the expansion bus I in the host device is provided. / F and an expansion bus I / F provided in the optical disk control unit are connected.

  According to this, in a recording / reproducing apparatus including a hybrid drive with an extended memory, it is possible to use a high-performance memory provided on the host device side as a buffer memory on the hybrid drive main body side. Will have.

  In order to solve the above problems, in a recording / reproducing apparatus including a hybrid drive with an extended memory according to still another invention of the present application, a PCI bus is provided in the host device, and the PCI bus and optical disc control in the host device are provided. The expansion bus I / F provided in the section is connected through a bus bridge circuit.

  According to this, by using a PCI interface that is often installed on the host device side, it is possible to effectively use the memory on the external device side from the hybrid drive side without any special cost increase. The convenience of the recording / reproducing apparatus including the hybrid drive with an extended memory according to the present invention can be enhanced.

  As described above, in the recording / reproducing apparatus including the hybrid drive with an expansion memory and the hybrid drive with the expansion memory according to the present invention, the expansion bus interface (I / F) is provided in the optical disc control unit, and the expansion bus interface is provided. By providing an expansion memory via the external memory, it is possible to transfer data directly between the expansion memory and an external device (host).

  According to this, the expansion memory can be added without being greatly influenced by the requirements regarding the data transfer rate in the optical disk control unit.

It is a figure which shows the basic composition of the hybrid drive with an expansion memory which concerns on this invention. It is a figure which shows the flow of the data with respect to the expansion memory in the hybrid drive with expansion memory which concerns on this invention. It is a figure which shows the 1st Embodiment of this invention. It is a figure which shows the 2nd Embodiment of this invention. It is a figure which shows the 3rd Embodiment of this invention. It is a figure which shows the 4th Embodiment of this invention. It is a figure which shows the 5th Embodiment of this invention. It is a figure which shows the 6th Embodiment of this invention. It is a figure which shows the structure of the conventional common optical drive. It is a figure which shows the structure of the hybrid drive with an expansion memory which added the conventional non-volatile memory.

Hereinafter, the basic configuration and specific embodiments of the present invention will be described in detail with reference to the drawings. In the following description, various preferred limitations for implementing the present invention are given, but the technical scope of the present invention is not limited to the following basic configurations, embodiments, and drawings. Absent.
(Basic configuration of the present invention)
FIG. 1 is a diagram showing a basic configuration of a hybrid drive with an expansion memory according to the present invention, and FIG. 2 is a diagram for explaining an operation in the basic configuration of the present invention. In FIG. 1 and FIG. 2, since the same number is provided to the same part as the prior art demonstrated using FIG. 9, FIG. 10, detailed description about these parts is abbreviate | omitted.

  1 and 2, reference numeral 100 denotes an entire hybrid drive with an expansion memory, which includes an optical disk control unit 10, an optical disk drive unit 20, and a nonvolatile memory device 40 as an expansion memory. The optical disk drive unit 20 of the optical disk includes a motor 21 that drives the optical disk 23, an optical pickup 22, and the like.

  The optical disk control unit 10 basically includes a CPU 11, a signal processing circuit 12, a host I / F 13, a buffer memory 14, a main bus 15, and a CPU bus 16 having the same functions as those of the conventional technology described with reference to FIGS. 9 and 10. The host device 50 is connected via the host I / F 13. The optical disk control unit 10 further includes an expansion bus interface 30 (hereinafter referred to as an expansion bus I / F 30) provided according to the present invention, and the nonvolatile memory device 40 is connected to the non-volatile memory device 40 via the expansion bus 35. It is connected to the expansion bus I / F 30.

  The expansion bus I / F 30 is connected to the CPU 11 via the CPU bus 16 and is controlled by the CPU 11. The expansion bus I / F 30 is connected to the main bus 15 and directly connected to the host I / F 13 via the expansion bus 35, and is connected to the host I / F 13 without going through the path of the buffer memory 14. Have a route. The optical disk control unit 10 includes one LSI as an optical disk control LSI including the expansion bus I / F 30, and in this specification, the optical disk control unit 10 configured as one LSI This is called “optical disk control LSI”.

  The host device 50 is a device externally connected as a host to the hybrid drive 100 with an extended memory, but may be the same as the conventional technology described with reference to FIGS. Specifically, for example, it may be configured as a main body side device having a tuner, an operation unit, and the like. When a Blu-ray disc can be used as the optical disc 23, the hybrid drive 100 with an extended memory and the host The apparatus 50 constitutes a device capable of recording / reproducing audio / video, that is, a Blu-ray disc recorder. In addition, the host device 50 may be a personal computer main body. In this case, a personal computer with a Blu-ray disc drive is configured.

  The non-volatile memory device 40 includes a non-volatile memory control circuit 41 and a non-volatile memory 42. The non-volatile memory 42 may be the same as the conventional memory described with reference to FIG. A memory having a larger capacity than the memory 14, for example, a flash memory or an eMMC (Embedded Multi Media Card) can be used. However, the present invention is not limited to this, and any non-volatile memory that can operate at higher speed than the optical disk may be used.

  FIG. 2 shows a data flow when data is transferred from the host device 50 to the nonvolatile memory 42 in the basic configuration of the present invention shown in FIG.

  When data is transferred from the host device 50 to the non-volatile memory 42, “host device 50” − “host I / F 13” − “expansion bus 35” − “expansion bus I / F 30” − “expansion bus 35” − “ Data is transferred in the order of the nonvolatile memory control circuit 41 "-" nonvolatile memory 42 ". In this case, the nonvolatile memory 42 is accessed without going through the buffer memory 14, and the data transfer rate of the buffer memory 14 does not affect the data transfer rate to the nonvolatile memory 42. Further, data transfer from the nonvolatile memory 42 to the host device 50 is performed by the reverse route described above, and in any case, the data is not passed through the buffer memory 14.

  On the other hand, when data is transferred from the optical disk to the nonvolatile memory, “optical pickup 22” — “signal processing circuit 12” — “main bus 15” — “buffer memory 14” — “main bus 15” — “expansion bus I” Data is transferred in the order of “/ F30” — “expansion bus 35” — “nonvolatile memory control circuit 41” — “nonvolatile memory 42”. The data transfer speed when transferring data between the optical pickup 22 of the optical disk and the nonvolatile memory 42 is the upper limit of the transfer speed performance of the optical disk. Therefore, the data transfer speed of the buffer memory is greater than or equal to the transfer speed of the optical disk. There is nothing. Data transfer from the nonvolatile memory 42 to the optical disk is performed in the reverse route described above.

  That is, the data stored in the nonvolatile memory 42 can be freely transferred to both the host device 50 side and the optical pickup 22 side. Therefore, for example, a large amount of data from the host device 50 side is first stored in the non-volatile memory 42 without going through the buffer memory 14, and during that time, preparation for recording on the optical disk 23 is performed. Thus, the data from the host device 50 side can be transferred to the optical pickup 22.

  As described above, according to the hybrid drive 100 with an expansion memory according to the present invention, the host device 50 directly accesses the nonvolatile memory 42 by providing a data path from the host I / F 13 to the expansion bus I / F 30. Therefore, the data transfer rate in the buffer memory 14 and the main bus 15 inside the optical disc control LSI can be adapted to the data transfer rate of the nonvolatile memory 42 while being optimized for the optical disc. This means that an LSI having the same configuration can be used in an LSI that does not correspond to an LSI that corresponds to the nonvolatile memory 42. Therefore, it is possible to increase the number of shipped optical disk control LSIs and to reduce the cost of the optical disk control LSIs.

  In addition, the nonvolatile memory 42 can be provided without being aware of the data transfer rate requirement of the buffer memory 14 and the size requirement of the buffer memory. Therefore, it is difficult to mount a non-volatile memory when optimized for an optical disk, and it is possible to solve the problem that the optical disk becomes over-spec and becomes expensive when optimized for a non-volatile memory.

  Specifically, by transferring data from the host I / F 13 to the nonvolatile memory 42 via the expansion bus 35 without passing through the buffer memory 14, the data transfer speed capacity of the buffer memory 14 is designed on the premise of the optical disk. Even in such a case, data can be transferred from the host device 50 to the nonvolatile memory 42 at a speed that exceeds the transfer speed of the optical disk. Thus, for example, when the optical disk control unit 10 is configured by one LSI (optical disk control LSI), the optical disk control LSI is designed to be optimized for an optical disk, and the transfer speed of the nonvolatile memory 42 is also supported. be able to.

  In addition, by providing a path for connecting the optical disk buffer memory 14 to the expansion bus 35, operations for transferring the data of the optical disk 23 to the nonvolatile memory 42 and writing the data of the nonvolatile memory 42 to the optical disk 23 are also possible. Therefore, the convenience of the optical disk drive can be improved.

  Furthermore, by providing a path from the optical disk control CPU 11 to the expansion bus I / F 30, it becomes possible to directly control the device connected to the expansion bus 35 from the optical disk control CPU 11.

  For example, by connecting the nonvolatile memory control circuit 41 to the expansion bus 35, a memory such as an SDRAM can be expanded. Here, when the SDRAM is used as a buffer memory of a nonvolatile memory, an insufficient buffer memory can be added. As this buffer memory, for example, a memory suitable for the performance of the nonvolatile memory such as DDR SDRAM can be selected and used, so that data can be transferred from the host I / F 13 at a high speed like the nonvolatile memory. . Details of this case will be described later as a third embodiment with reference to FIG.

  When the optical disk control unit 10 is configured by a single LSI, the optical disk control LSI that constitutes the optical disk control unit 10 can be optimized for an optical disk, so that it is sufficient to be used for a drive that does not use a nonvolatile memory. Cost competitive. On the other hand, since a high-speed device exceeding the performance of the optical disk can be connected to the expansion bus, sufficient performance can be ensured even for a drive using a nonvolatile memory.

In the above description, an example in which the nonvolatile memory 42 is used as the memory to be expanded is taken as an example, but a volatile memory may be used instead of the nonvolatile memory 42. That is, by adding a volatile memory having a high operation speed as the memory to be expanded, for example, the same operation as when the capacity of the buffer memory 14 is added can be performed, and the convenience of the optical disk drive can be improved. It will have the effect. In the specification of the present application, the simple description of “expansion memory” indicates that either the nonvolatile memory 42 or the volatile memory may be used as the “memory to be expanded”.
(First embodiment)
FIG. 3 is a diagram showing a first embodiment of the present invention, and shows a detailed configuration of the expansion bus I / F 30. In FIG. 3, the configuration of the expansion bus I / F 30 is shown in detail, and the other parts are omitted, but basically, the configuration shown in FIGS. The same configuration may be used.

  As shown in FIG. 3, in the first embodiment, the expansion bus I / F 30 includes a selector 31, a DMAC (direct memory access controller) 32, and an arbitration circuit 33. It is connected. As shown in FIG. 3, the selector 31, the DMAC 32, and the arbitration circuit 33 are each connected to the expansion bus 35, and the arbitration circuit 33 and the nonvolatile memory control circuit 41 are further connected via the expansion bus 35. . Although the nonvolatile memory 42 is omitted in FIG. 3, the nonvolatile memory 42 is actually connected to the nonvolatile memory control circuit 41.

  The selector 31 is connected to the host I / F 13 via the expansion bus 35 and is also connected to the main bus 15. In the first embodiment of the present application, the optical disk control unit 10 including the expansion bus I / F 30 is configured as one LSI (optical disk control LSI). The selector 31 switches and connects either the host I / F 13 or the buffer memory 14 to the DMAC 32 under the control of the CPU 11.

  The DMAC 32 transfers the data from the host I / F 13 or the buffer memory 14 selected by the selector 31 to the nonvolatile memory device 40 via the arbitration circuit 33, and further transfers the data from the nonvolatile memory device 40 to the buffer memory 14 or the host I / F 13. The CPU 11 sets the DMAC 32 via the CPU bus 16 and instructs a data transfer operation.

  The expansion bus 35 and the CPU bus 16 from the DMAC 32 are connected to the arbitration circuit 33. The arbitration circuit 33 switches access to the nonvolatile memory device 40 from the CPU 11 and access from the DMAC 32 to the nonvolatile memory device 40 according to the state of the expansion bus 35. Since this configuration has only one DMAC, the circuit scale can be kept small.

As an example, an operation procedure when data is transferred from the host I / F 13 to the nonvolatile memory device 40 is as follows.
(1) The CPU 11 controls the nonvolatile memory control circuit 41 through the path of the CPU bus 16-the arbitration circuit 33-the nonvolatile memory control circuit 41, and issues an access command to the nonvolatile memory device 40.
(2) Data transfer is set to the DMAC 32 using the CPU bus 16, and the selector 31 is switched to the host I / F 13 side.
(3) Data transfer is executed through the path of the host I / F 13 -selector 31 -DMAC 32 -arbiter circuit 33 -nonvolatile memory control circuit 41.

  During data transfer by the DMAC 32, the CPU bus 16 is not used. Therefore, the CPU 11 can control the optical disk while the DMAC 32 is transferring data between the host I / F 13 and the nonvolatile memory control circuit 41.

As described above, in this first embodiment, one DMAC 32 is provided in the expansion bus I / F 30, and the circuit configuration of the expansion bus I / F can be simplified.
(Second Embodiment)
FIG. 4 is a diagram showing a second embodiment of the present invention. The configuration of the expansion bus I / F 30 is different from that of the first embodiment shown in FIG. In the case of FIG. 4 as well, the configuration of the expansion bus I / F 30 is shown in detail as in the case of FIG. 3, and the other parts are omitted. The configuration may be the same as the configuration shown in FIG.

  In FIG. 4, two DMACs are provided in the expansion bus I / F 30 and are divided into a buffer memory DMAC 32A and a host I / F DMAC 32B. In the first embodiment shown in FIG. 3, only one of the host I / F 13 and the buffer memory 14 can transfer data to the expansion bus 35, but the second embodiment shown in FIG. Then, since the arbitration circuit 33 switches between the data transfer from the host I / F 13 and the data transfer from the buffer memory 14, the parallelism of the data transfer is improved.

  For example, the data transfer rate from the buffer memory 14 to the expansion bus I / F 30 is limited to the transfer rate of the optical disc, but the data transfer rate from the host I / F 13 to the expansion bus I / F 30 depends on the performance of the optical disc. Since it does not depend, it generally has a higher transfer rate. The arbitration circuit 33 sets the switching timing and priority of the expansion bus 35 and the like according to the difference in transfer speed between the DMAC 32A and the DMAC 32B, thereby improving the use efficiency of the expansion bus and transferring more data. be able to.

As described above, in the second embodiment, it is possible to further improve the parallelism of data transfer, and between the devices including the host connected to the outside and the data transfer in the optical disc control unit 10. This has the effect of improving the efficiency of data transfer.
(Third embodiment)
FIG. 5 is a diagram showing a third embodiment according to the present invention. In the third embodiment of the present invention shown in FIG. 5, a volatile memory control circuit 61 is provided in addition to the first embodiment shown in FIG. A buffer memory 62 composed of a volatile memory is connected.

  In the third embodiment, as shown in FIG. 5, a volatile memory device 60 is further provided in addition to the nonvolatile memory device 40 having the nonvolatile memory control circuit 41 and the nonvolatile memory 42. The volatile memory device 60 includes a volatile memory control circuit 61 and a buffer memory 62 composed of a volatile memory connected to the volatile memory control circuit 61. The nonvolatile memory control circuit 41, the volatile memory control circuit 61, and the expansion bus I / F 30 are connected by an expansion bus 35.

  In FIG. 5, the configurations of the optical disk control unit 10 including the expansion bus I / F 30, the optical disk drive unit 20, and the like are the same as those of the first embodiment of the present application shown in FIGS. A detailed description of these parts is omitted.

  According to the third embodiment, recording / reproducing is performed in the nonvolatile memory 42 without modifying the optical disk control LSI when the optical disk control unit 10 including the expansion bus I / F 30 is configured as one LSI. A buffer memory 62 for temporarily storing data to be stored can be provided.

  According to this, it is possible to transfer data between the host I / F 13 and the buffer memory 62 constituted by the volatile memory using the expansion bus, and the buffer memory 62 constituted by the volatile memory and the nonvolatile memory. Data transfer to and from the volatile memory 42 becomes possible. That is, data transfer between the volatile memory and the nonvolatile memory can be performed via the expansion bus.

  This is because, for example, a small-capacity volatile buffer memory 62 having a relatively high speed but a high operation speed is provided for a relatively low-cost and high-speed non-volatile memory 42. It is effective for increasing the performance (operation speed) of the entire apparatus at a low cost.

  In general, the nonvolatile memory 42 issues a read command and a write command from the nonvolatile memory control circuit 41 to control the operation. If the command is issued for each small data unit, the command issue processing time Therefore, the time allocated for data transfer is shortened and the data transfer rate is reduced. In the present embodiment, data can be stored in the buffer memory 62, and a large amount of data can be transferred to the nonvolatile memory 42 at a time with a single command, so that the transfer speed can be improved.

In the third embodiment of the present invention, the volatile memory control circuit 61 is connected to the expansion bus 35, so that a memory such as an SDRAM can be added to form the buffer memory 62. Here, by using the SDRAM as the buffer memory of the nonvolatile memory 42, the capacity of the buffer memory 14 that is insufficient can be easily increased. For this buffer memory 62, a memory suitable for the performance of the nonvolatile memory 42 such as DDR SDRAM can be selected and used, so that data is transferred at a high speed from the host I / F 13 like the nonvolatile memory 42. be able to.
(Fourth embodiment)
FIG. 6 is a diagram showing a fourth embodiment according to the present invention. In the fourth embodiment of the present invention shown in FIG. 6, a plurality of DMACs are further added to the expansion bus I / F 30 compared to the third embodiment of the present invention shown in FIG. Except for the configuration of the expansion bus I / F 30, the other parts may be the same as those in the third embodiment shown in FIG. 5, and therefore, in FIG. Yes.

  As shown in FIG. 6, in the fourth embodiment, the expansion bus I / F 30 has a buffer memory DMAC 32A and a host I / F DMAC 32B, as in the second embodiment described with reference to FIG. Furthermore, it has a DMAC 32C in the expansion bus, and has three DMACs in total. These three DMACs are connected to the arbitration circuit 33.

  The arbitration circuit 33 sets the switching timing and priority of the three DMACs according to the difference in transfer speed among the buffer memory DMAC 32A, the host I / F DMAC 32B, and the expansion bus DMAC 32C. The use efficiency can be improved and more data can be transferred.

By adding the expansion bus DMAC 32C to the expansion bus I / F 30, the following four transmission paths can be realized.
(1) Volatile memory 62-DMAC 32C in extension bus-Data transfer path of nonvolatile memory 42 (2) Non-volatile memory 42-DMAC 32C in extension bus-Data transfer path of volatile memory 62 (3) Volatile memory 62- Intra-expansion DMAC 32C-data transfer path of volatile memory 62 (4) Non-volatile memory 42-In-extension bus DMAC 32C-data transfer path of non-volatile memory 42 For example, data is transferred to volatile memory 62 or non-volatile memory 42 In this case, the DMAC 32C in the expansion bus accesses the volatile memory control circuit 61 to read out the data from the volatile memory 62 and import it into the nonvolatile memory 42 by writing the captured data into the nonvolatile memory control circuit 41. Transfer data. On the contrary, data can be transferred from the nonvolatile memory 42 to the volatile memory 62 by the same operation. In addition, by setting the reading source and the writing destination to the volatile memory 62, data can be moved in the volatile memory 62. Similarly, data can be moved within the nonvolatile memory 42.

As described above, in the fourth embodiment, a non-volatile memory and a volatile memory can be freely added to the optical disc control unit 10, and further, between the added non-volatile memory and the volatile memory. Since data transfer and the like can be performed freely, a variety of memory management is possible, and the convenience of the hybrid drive with an expansion memory can be enhanced.
(Fifth embodiment)
FIG. 7 is a diagram showing a fifth embodiment according to the present invention.

  In the fifth embodiment shown in FIG. 7, an expansion bus I / F 53 is provided in the host device 50 to create a path for connecting to the nonvolatile memory device 40. A control CPU (not shown) is provided in the host device 50, and a high-speed volatile memory 54 is connected via a memory control circuit 52. The expansion bus I / F 53 is connected to and controlled by a CPU (not shown). Therefore, the memory 54 can be accessed via the memory control circuit 52. A CPU, a memory control circuit 52, an expansion bus I / F 53, and the like (not shown) are normally configured as a single LSI as the host LSI 51.

  The optical disk control unit 10 can access the memory 54 in the host device 50 via “the expansion bus I / F 30 in the optical disk control unit 10” − “the expansion bus I / F 53 in the host device 50”. The internal memory 54 can also be used as a buffer memory for temporarily storing data to be recorded / reproduced in the nonvolatile memory 42.

  For example, when a video signal processing LSI for a Blu-ray disc recorder is used as the host LSI 51, a high-speed, large-capacity memory is used for the memory 54 on the host LSI 51 side for high-definition image processing. On the other hand, since the data handled by the optical disk control unit 10 is mainly compressed video data, the operation is extremely light when viewed from the overall memory transfer speed of the host LSI 51, and data transfer via an expansion bus is added. Even if it does, it will have a minor effect on the data transfer bandwidth.

  Therefore, it is sufficiently possible to use a part of the memory 54 of the host LSI 51 as a buffer memory of the nonvolatile memory 42 without substantially affecting the processing on the host LSI 51 side. Conversely, by deleting the volatile memory control circuit 61 and the buffer memory 62 composed of the volatile memory provided in the third embodiment shown in FIG. 5, it is possible to contribute to the cost reduction of the entire system. .

  That is, a volatile memory control circuit as shown in FIG. 5 is connected by providing an expansion bus I / F 53 in the host LSI 51 and accessing the memory 54 of the host LSI 51 from the optical disk control LSI via the expansion bus I / F 53. The capacity of the buffer memory can be increased without doing so. As a result, it is possible to add a buffer memory for the nonvolatile memory 42 with almost no increase in cost.

As described above, in the fifth embodiment of the present invention, the optical disk control unit 10 is implemented by mounting a common expansion bus I / F in an LSI that is assumed to be used in combination in a specific application. The cost for adding a non-volatile memory to the optical disk control LSI that constitutes can be further reduced.
(Sixth embodiment)
FIG. 8 is a sixth embodiment according to the present invention.

  In the sixth embodiment, an expansion PCI bus I / F 55 is already mounted on the host LSI 51. In such a case, the fifth embodiment described with reference to FIG. 7 is performed by inserting a bus bridge circuit 57 for connecting the expansion bus 35 of the optical disk control LSI forming the optical disk control unit 10 to the PCI bus 56. The same effect as the form can be obtained.

  In this case, there is no need to revise the host LSI 51 by using the PCI bus 56 that is already installed in the host LSI 51, so that the LSI development cost can be reduced.

  For the hybrid drive according to the basic configuration of the present invention shown in FIGS. 1 and 2 and the hybrid drive according to the first to sixth embodiments of the present invention shown in FIGS. Furthermore, it goes without saying that the host device 50 can be provided to constitute a “recording / reproducing apparatus including a hybrid drive”.

  The present invention improves the convenience of a hybrid drive with an extended memory in which a large-capacity non-volatile memory is added to an optical disc drive using a Blu-ray disc or the like, and has high industrial applicability.

10 Optical disk controller 11 CPU
12 Signal processing circuit 13 Host I / F
14 Buffer memory 15 Main bus 16 CPU bus 20 Optical disk drive unit 21 Motor 22 Optical pickup 23 Optical disk 30 Expansion bus I / F
31 Selector 32 DMAC (Direct Memory Access Controller)
33 Arbitration circuit 35 Expansion bus 40 Nonvolatile memory device 41 Nonvolatile memory control circuit 42 Nonvolatile memory 50 Host device 51 Host LSI
52 Memory control circuit 53 Expansion bus I / F
54 Memory 55 PCI bus I / F
56 PCI bus 57 Bus bridge circuit 60 Volatile memory device 61 Volatile memory control circuit 62 Buffer memory composed of volatile memory

Claims (8)

An optical disk drive unit;
An optical disk controller having a CPU, a buffer memory for temporarily storing data to be written to the optical disk, and a host I / F for connecting a host device;
A hybrid drive with an extended memory having an extended memory larger than the buffer memory,
The optical disc control unit further includes an expansion bus I / F, and the host I / F and the expansion bus I / F are connected by an expansion bus,
The hybrid drive with an expansion memory, wherein the expansion memory is connected to the expansion bus I / F by an expansion bus. The expansion bus I / F includes a selector, a DMAC (direct memory access controller), and an arbitration circuit.
The selector switches the connection between the main bus of the optical disc control unit and the expansion bus connected to the host I / F,
2. The hybrid drive with expansion memory according to claim 1, wherein the arbitration circuit switches access from the CPU and access from the DMAC according to the state of the expansion bus. The expansion bus I / F includes a buffer memory DMAC, a host I / F DMAC,
2. The hybrid drive with expansion memory according to claim 1, further comprising an arbitration circuit in which the buffer memory DMAC and the host I / F DMAC are connected.   2. The hybrid drive with expansion memory according to claim 1, wherein a volatile memory operable as a buffer memory is further connected to the expansion bus I / F via a volatile memory control circuit.   The expansion bus I / F is further provided with a DMAC in the expansion bus, which enables data transfer between the nonvolatile memory and the volatile memory connected to the expansion bus, and in the nonvolatile memory. 5. The hybrid drive with an extended memory according to claim 4, wherein the data can be moved and the data can be moved in a volatile memory.   6. A recording / reproducing apparatus comprising a hybrid drive with an extended memory according to claim 1, further comprising a host device connected via the host I / F.   7. The expansion bus I / F is provided in the host device, and the expansion bus I / F in the host device is connected to the expansion bus I / F provided in the optical disc control unit. Recording / reproducing apparatus equipped with a hybrid drive with extended memory. The PCI bus in the host device is provided, and the expansion bus I / F provided in the optical disk control unit and the PCI bus in the host device are connected via a bus bridge circuit. A recording / playback device including a hybrid drive with an extended memory.

Images