JP2012010049A - Rf integrated circuit for development - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an RF integrated circuit for development for radio transmission/reception, which is integrated independent of a physical layer circuit and a MAC circuit and for which an interface frequency with the physical layer circuit has a width of at least about 10 MHz.SOLUTION: The RF integrated circuit 1 for development incorporates a demodulation circuit 11, a modulation circuit 12, and a switch circuit for switching an antenna to either of the demodulation circuit 11 and the modulation circuit 12. The RF integrated circuit 1 is integrated independent of a physical layer circuit 21 and a MAC circuit 22. Also, the demodulation circuit 11 converts received radio frequency signals to the frequency signals of frequencies 5-20 MHz, and the modulation circuit 12 converts the frequency signals of the frequencies 5-20 MHz to radio frequency signals.

Description

  The present invention relates to an RF integrated circuit for development, and more specifically to an RF integrated circuit suitable for development integrated independently of a physical layer circuit and a MAC circuit.

  In Japan (Japan), analog television broadcasting will end in July 2011 and will shift to digital television broadcasting. Overseas, recently, an increasing number of countries have finished analog TV broadcasting and have shifted to digital TV broadcasting. In Japan, the 700 MHz band (about 10 MHz from 715 M to 725 MHz) currently used by analog television broadcasting is used for ITS (Intelligent Transport Systems) and the like. ITS is applied to vehicle-to-vehicle communication for preventing vehicle collisions.

  Also, WiMAX (IEEE 802.16: Worldwide Interoperability for Microwave Access) that enables the use of a high-speed wireless Internet that can use the high-speed Internet while on the go or on the move is also becoming popular. Furthermore, an environment in which a wireless LAN can be used in a personal facility or a public facility is being prepared.

  As shown in FIG. 7, in the communication device 8 used for ITS, iMAX, wireless LAN, etc., when the product is incorporated, the wireless post-modulation circuit (RF circuit 81) includes a physical layer circuit (PHY layer circuit) 82 and a MAC circuit. It is assumed that the (media access control circuit) 83 is integrated and manufactured (that is, as one chip) (see Patent Document 1, etc.).

  The frequency (analog frequency) handled by the physical layer circuit 82 is often different for each development, such as 10 MHz for ITS, 10 MHz for WiMAX, and 5 MHz for wireless LAN. Therefore, in the development of the communication device 8 having the configuration shown in FIG. 7, the RF circuit 81 must be redesigned each time. Therefore, it is not practical from the viewpoint of cost to integrate the RF circuit 91 alone.

  Therefore, as shown in FIG. 8, in the development of the communication device 9, the RF circuit 91 in the development process is formed on a substrate separate from the physical layer circuit 92 and the MAC circuit 93 in the development process. The physical layer circuit 92 and the MAC circuit 93 are configured so as to be compatible with the frequency of the signal received from the RF circuit 91, and need not be changed. Therefore, the physical layer circuit 92 and the MAC circuit 93 may have a substrate configuration as shown in FIG. 8, or may be general-purpose products integrated into an integrated circuit.

JP2007-215174A

  However, since the RF circuit 91 shown in FIG. 8 is not integrated, there may be inconveniences in development, such as generation of noise due to signal line routing. For example, when a development circuit on a substrate is applied to an integrated circuit, scale wrinkles often occur, so that application to the integrated circuit is not easy. Conventionally, it has been a problem to eliminate such inconvenience.

  An object of the present invention is to provide a development RF integrated circuit that is integrated independently of a physical layer circuit and a MAC circuit and that has an interface frequency of at least about 10 MHz with the physical layer circuit.

(1)
A demodulation circuit that lowers the radio frequency band signal received by the antenna to an arbitrary frequency and outputs it to another circuit;
A modulation circuit that raises a signal of an arbitrary frequency input from the other circuit to a radio frequency and outputs the signal to the antenna;
A switch circuit for switching the antenna to either the demodulation circuit or the modulation circuit;
An RF integrated circuit for development,
The RF integrated circuit is integrated independently of the other circuits, and
The demodulation circuit converts the received radio frequency signal into a frequency signal having a frequency of 5 to 20 MHz,
The development RF integrated circuit, wherein the modulation circuit converts a frequency signal having a frequency of 5 to 20 MHz into a radio frequency signal.

(2)
The other circuit is
A physical layer circuit that performs AD conversion with the demodulation circuit and performs DA conversion with the modulation circuit;
A media access control circuit connected to the physical layer circuit;
The development RF integrated circuit according to (1), characterized by comprising:

(3)
The development RF integrated circuit according to (1), including the demodulation circuit and a post-modulation circuit functioning as the modulation circuit,
The demodulation circuit includes at least a low noise amplifier, a subsequent image rejection mixer, and a subsequent power amplifier as common components,
A switch for switching between a signal path for sending a signal from the antenna to the physical layer circuit via the demodulation circuit and a signal path for sending a signal from the physical layer circuit to the antenna via the demodulation circuit A group of circuits;
An RF integrated circuit for development, comprising:

The image rejection mixer is
A phase shifter for generating two signals having a phase difference of 90 ° from the oscillation signal of the local oscillator;
A demultiplexer for demultiplexing the input signal into two signals having a phase difference of 90 °;
A first mixer that multiplies one of the two signals demultiplexed by the demultiplexer and one of the two signals generated by the first phase shifter;
A second mixer for multiplying the other of the two signals demultiplexed by the demultiplexer and the other of the two signals generated by the first phase shifter;
A synthesizer that inputs the signals from the first mixer and the second mixer and adds them in phase;
Can be configured.
The image rejection mixer is:
A phase shifter for generating two signals having a phase difference of 90 ° from the oscillation signal of the local oscillator;
A demultiplexer that demultiplexes the input signal into two signals in the same phase;
A first mixer that multiplies one of the two signals demultiplexed by the demultiplexer and one of the two signals generated by the first phase shifter;
A second mixer for multiplying the other of the two signals demultiplexed by the demultiplexer and the other of the two signals generated by the first phase shifter;
A synthesizer for inputting each signal from the first mixer and the second mixer and shifting one input signal by 90 ° and adding the signals;
Can be configured.

  In the RF integrated circuit for development of the present invention, since there is a range of interface frequencies with other circuits, it is not necessary to redesign the RF circuit each time even if the frequency differs for each development.

  In the present invention, a frequency conversion circuit that converts a frequency signal (for example, 5 MHz to 20 MHz) from a physical layer circuit into a radio signal (for example, 700 MHz band) and a radio signal (for example, 700 MHz band) are provided in the RF integrated circuit. A frequency conversion circuit that converts a signal for a physical layer circuit (for example, from 5 MHz to 20 MHz) is built as an IC. Thus, if the physical layer circuit is a post-modulation circuit that operates in a predetermined range (for example, a range of 5 MHz to 20 MHz), it can be developed using the RF integrated circuit (RF integrated circuit of the same specification) of the present invention. .

It is a circuit diagram showing one embodiment of the present invention, and is a block diagram showing a state where an RF integrated circuit is connected to a physical layer circuit and a MAC circuit. FIG. 2 is a block diagram showing a demodulation circuit and a modulation circuit of the RF integrated circuit of FIG. It is a figure which shows the RF integrated circuit of FIG. 1 concretely. FIG. 4A is a diagram showing an image rejection mixer of the demodulation circuit of FIG. 3, and FIG. 4B is a diagram showing an image rejection mixer of the modulation circuit of FIG. In the RF integrated circuit of this invention, it is a principle figure which shows the back modulation circuit which shares a demodulation circuit and a modulation circuit by one circuit. FIG. 6 is an explanatory diagram showing the RF integrated circuit 1 of FIG. 5 in more detail. It is a block diagram which shows the conventional communication circuit. It is a block diagram which shows the circuit for development of the conventional communication circuit.

  1 and 2 are explanatory views showing an embodiment of the RF integrated circuit of the present invention. In FIG. 1, the RF integrated circuit 1 includes a demodulation circuit 11, a modulation circuit 12, and a switch circuit 13. The RF integrated circuit 1 is connected to a circuit 2 including a physical layer circuit 21 and a MAC circuit 22, and the circuit 2 is connected to a computer 3.

  The demodulation circuit 11 reduces the radio frequency band signal (here, a signal of 715 M to 725 MHz) received by the antenna 7 to an arbitrary frequency (5 MHz to 20 MHz), and outputs it to the physical layer circuit 21. The modulation circuit 12 raises a signal of an arbitrary frequency (5 MHz to 20 MHz) input from the physical layer circuit 21 to a radio frequency (a signal of 715 M to 725 MHz) and outputs it to the antenna 7.

  The physical layer circuit 21 is typically an interface circuit. In this embodiment, the A / D converter 411 and the D / A converter 412 are provided between the physical layer circuit 21 and the RF integrated circuit 1, but can be provided in the physical layer circuit 21 or RF integrated. It can be provided in the circuit 1. The physical layer circuit 21 is connected to the MAC circuit 22, a signal from the demodulation circuit 11 is passed to the MAC circuit 22, and a signal from the MAC circuit 22 is passed to the modulation circuit 12. The antenna 7 is connected to the demodulation circuit 11 and the modulation circuit 12 via the switch circuit 13. The switch circuit 13 can switch the antenna 7 to either the demodulation circuit 11 or the modulation circuit 12 by an external switching signal SC.

  As shown in FIG. 2, the demodulation circuit 11 can be composed of an intermediate frequency conversion circuit 1101 and a low frequency conversion circuit 1102. The intermediate frequency conversion circuit 1101 converts the radio frequency signal input via the switch circuit 13 into an intermediate frequency, and further converts the radio frequency signal into a frequency of about 5 to 25 MHz by the low frequency conversion circuit 1102. Then, a specific frequency signal among these frequency signals is output to the physical layer circuit 21 of FIG. Further, as shown in FIG. 2, the modulation circuit 12 can be composed of an intermediate frequency conversion circuit 1201 and a high frequency conversion circuit 1202. A specific frequency signal among the frequency signals from the physical layer circuit 21 is converted into an intermediate frequency by the intermediate frequency conversion circuit 1201. Further, the intermediate frequency signal is modulated into a radio frequency (700 MHz band) signal by the high frequency conversion circuit 1202 and output to the antenna 7 via the switch circuit 13.

  FIG. 3 shows a specific example of the RF integrated circuit 1 of the present invention. At the time of demodulation (at the time of reception), the switch circuit 13 is set to the side indicated by the solid line by the control signal SC. The demodulation circuit 11 includes a low noise amplifier 111, a received signal level adjusting amplifier 112, a duplexer 113, a received signal intensity detector 114, a variable gain unit 115, an image rejection mixer 116, and a power amplifier. 117.

  A signal in the frequency band of 700 MHz from the antenna terminal ANT is input to the image rejection mixer 116 via the BPF (bandpass filter) 16 and the low noise amplifier 111, the reception signal level adjustment amplifier 112 and the variable gain unit 115. . The output of the received signal level adjusting amplifier 112 is demultiplexed by the demultiplexer 113 and is output from the RSSI terminal to an external control device (not shown) via the received signal intensity detector 114. The control device generates a gain adjustment signal for the variable gain device 115 based on the input signal. The RF integrated circuit 1 inputs this gain adjustment signal from the reception level adjustment signal terminal RLA, and operates the variable gain device 115.

  The image rejection mixer 116 receives the output signal of the variable gain device 115 and demodulates it. The demodulated signal is amplified by the power amplifier 117 and sent from the reception signal terminal RX to the physical layer circuit 21 (see FIG. 1) via the A / D converter 411 (see FIG. 1).

  As shown in FIG. 4A, the image rejection mixer 116 includes a duplexer 1161, a phase shifter 1162, mixers 1163 and 1164, and a combiner 1165. The demultiplexer 1161 demultiplexes the input signal into two in-phase signals and sends them to the mixers 1163 and 1164. A signal from the local oscillator 14 is input to the phase shifter 1162, and the phase shifter 1162 outputs two signals whose phases are different by 90 ° to the mixers 1163 and 1164. Here, the mixer 1163 mixes the signal from the duplexer 1161 and the 90 ° phase-shifted signal from the phase shifter 1162 and sends the mixed signal to the combiner 1165. The mixer 1164 mixes the signal from the branching filter 1161 and the 0 ° phase-shifted signal from the phase shifter 1162 and sends the mixed signal to the combiner 1165. The combiner 1165 combines the signal obtained by shifting the signal from the mixer 1164 by 90 ° and the signal from the mixer 1164 and outputs the combined signal to the power amplifier 117.

  At the time of modulation (at the time of transmission), the switch circuit 13 is set to the side indicated by the dotted line by the control signal SC. The modulation circuit 12 includes a buffer amplifier 121, an image rejection mixer 122, a variable gain unit 123, a power amplifier 124, a duplexer 125, and a transmission signal strength detector 126.

  A signal having a frequency of 20 MHz from the physical layer circuit 21 (see FIG. 1) is input from the transmission signal input terminal TX to the image rejection mixer 122 via the buffer amplifier 121 having a gain of 0 dB, and the image rejection mixer. After frequency modulation at 122, the signal is amplified by a variable gain unit 123 and a power amplifier 124. Then, the signal is output from the antenna terminal ANT to the antenna 7 (see FIG. 1) via the switch circuit 13 and the BPF (band pass filter) 16. The output of the power amplifier 124 is demultiplexed by the demultiplexer 125, and is output from the TSSI terminal to an external control device (not shown) via the transmission signal intensity detector 126. This control device generates a gain adjustment signal for the variable gain device 123 based on the input signal. The RF integrated circuit 1 inputs this gain adjustment signal from the transmission level adjustment signal terminal TLA, and operates the variable gain unit 123.

  As shown in FIG. 4B, the image rejection mixer 122 includes a duplexer 1221, a phase shifter 1222, mixers 1223 and 1224, and a synthesizer 1225. The demultiplexer 1221 demultiplexes the input signal into two in-phase signals and sends them to the mixers 1223 and 1224. A signal from the local oscillator 14 is input to the phase shifter 1222, and the phase shifter 1222 outputs two signals whose phases are different by 90 ° to the mixers 1223 and 1224. Here, the mixer 1223 mixes the signal from the branching filter 1221 and the 90 ° phase-shifted signal from the phase shifter 1222 and sends it to the combiner 1225. The mixer 1224 mixes the signal from the branching filter 1221 and the 0 ° phase-shifted signal from the phase shifter 1222 and sends the mixed signal to the combiner 1225. In the synthesizer 1225, the signal obtained by shifting the signal from the mixer 1224 by 90 ° and the signal from the mixer 1224 are combined and output to the power amplifier 124.

  FIG. 5 is a principle diagram showing a post-modulation circuit in which the demodulation circuit and the modulation circuit are shared by one circuit in the RF integrated circuit of the present invention. The RF integrated circuit 1 includes interlocking switch circuits 131, 132, 133, and 134 and a post-modulation circuit 15. The post-modulation circuit 15 includes a low noise amplifier A1, an image rejection mixer IRM, a local oscillator 14, and a power amplifier A2.

  At the time of demodulation, the switch circuits 131, 132, 133, and 134 are set to the sides indicated by the solid lines by the control signal SC, respectively, and the signal in the frequency band of 700 MHz received by the antenna 7 (see FIG. 1) is transmitted from the antenna terminal ANT to the RF signal. Input to the integrated circuit 1. That is, the received signal is input to the image rejection mixer IRM via the BPF 16, the switch circuit 131, the switch circuit 132, and the low noise amplifier A1. In the image rejection mixer IRM, the input signal is converted into a low frequency signal (5 to 25 MHz) using the local oscillation signal LO from the local oscillator 14. The low frequency signal passes through the power amplifier A2, the switch circuit 133, and the switch circuit 134, and is transmitted from the transmission / reception signal input / output terminal RX / TX to the physical layer circuit via the A / D converter 411 (see FIG. 1). 21 (see FIG. 1).

  At the time of modulation, the switch circuits 131, 132, 133, and 134 are set on the sides indicated by dotted lines by the control signal SC, and pass through the D / A converter 412 (see FIG. 1) from the physical layer circuit 21 (see FIG. 1). The transmission signal (5 to 25 MHz) is input to the RF integrated circuit 1 from the transmission / reception signal input / output terminal RX / TX. That is, the transmission signal is input to the image rejection mixer IRM via the switch circuit 134, the switch circuit 132, and the low noise amplifier A1. In the image rejection mixer IRM, an input signal is converted into a high-frequency signal (a signal having a frequency of 700 MHz band) using the local oscillation signal LO from the local oscillator 14. The high frequency signal is sent from the antenna terminal ANT to the antenna 7 (see FIG. 1) via the power amplifier A2, the switch circuit 133, the switch circuit 131, and the BPF 16.

  FIG. 6 is an explanatory diagram showing the RF integrated circuit 1 of FIG. 5 in more detail. In FIG. 6, the post-modulation circuit 15 includes a low noise amplifier 151, a duplexer 152, a switch circuit 153, a signal strength detector 154, a variable gain unit 155, an image rejection mixer 156, a variable gain. And 157, a power amplifier 158, a duplexer 159, and a local oscillator 14.

  In the demodulating circuit 15 of FIG. 6, at the time of demodulation, the switch circuits 131, 132, 133, and 134 and the switch circuit 153 are set to the sides indicated by the solid lines by the control signal SC and received by the antenna 7 (see FIG. 1). The 700 MHz band signal is input to the RF integrated circuit 1 from the antenna terminal ANT. That is, the received signal is input to the BPF 16, the switch circuit 131, the switch circuit 132, the low noise amplifier 151, the duplexer 152, and the variable gain device 155. The signal demultiplexed by the demultiplexer 152 is input to the signal strength detector 154 via the switch circuit 153, and the signal from the signal strength detector 154 is received from the reception / transmission signal strength signal output terminal RSSI / TSSI. Not sent to the control device. In this control device, a reception level adjustment signal is generated. This reception level adjustment signal is input from the reception level adjustment signal terminal RLA to the control terminal of the variable gain device 155, and the gain of the variable gain device 155 is adjusted.

  The image rejection mixer 156 converts the signal from the variable gain device 155 into a low frequency signal (5 to 25 MHz) using the local oscillation signal LO from the local oscillator 14. The low-frequency signal passes through the variable gain unit 157, the power amplifier 158, the duplexer 159, the switch circuit 133, and the switch circuit 134, and is transmitted from the transmission / reception signal input / output terminal RX / TX to the A / D converter 411 ( 1) to the physical layer circuit 21 (see FIG. 1). In this embodiment, at the time of demodulation, an instruction signal with a gain of zero (0 db) is input to the control terminal of the variable gain device 157.

  In the post-modulation circuit 15 of FIG. 6, at the time of modulation, the switch circuits 131, 132, 133, and 134 and the switch circuit 153 are set on the sides indicated by the dotted lines by the control signal SC, respectively, from the physical layer circuit 21 (see FIG. 1) A transmission signal (5 to 25 MHz) transmitted through the D / A converter 412 (see FIG. 1) is input to the RF integrated circuit 1 from the transmission / reception signal input / output terminal RX / TX. That is, the received signal is input to the image rejection mixer 156 via the switch circuit 134, the switch circuit 132, the low noise amplifier 151, the duplexer 152, and the variable gain unit 155. In this embodiment, an instruction signal with a gain of zero (0 db) is input to the control terminal of the variable gain device 155 during modulation. The image rejection mixer 156 converts the input signal into a high frequency signal (frequency 700 MHz band signal) using the local oscillation signal LO from the local oscillator 14. The high frequency signal is sent to the variable gain device 157, the power amplifier 158, the duplexer 159, and the switch circuit 133. The signal demultiplexed by the demultiplexer 159 is input to the signal strength detector 154 via the switch circuit 153, and the signal from the signal strength detector 154 is received from the reception / transmission signal strength signal output terminal RSSI / TSSI. Are sent to a control device (not shown). In this control device, a transmission level adjustment signal is generated. This transmission level adjustment signal is input from the transmission level adjustment signal terminal TLA to the control terminal of the variable gain device 157, and the gain of the variable gain device 157 is adjusted. Then, the transmission signal from the switch circuit 133 is transmitted from the antenna terminal ANT to the antenna 17 (see FIG. 1) via the switch circuit 131 and the BPF 16.

DESCRIPTION OF SYMBOLS 1 RF integrated circuit 2 Circuit 3 Computer 5 Frequency 7,17 Antenna 8,9 Communication apparatus 11 Demodulation circuit 12 Modulation circuit 13,131,132,133,134 Switch circuit 14 Local oscillator 15 Demodulation circuit 16 BPF
21, 82, 92 Physical layer circuit 22, 83, 93 MAC circuit 81, 91 RF circuit 111 Low noise amplifier 112 Received signal level adjusting amplifier 113, 125, 152, 159, 1161, 1221 Demultiplexer 114 Received signal strength detector 115, 123, 155, 157 Variable gain device 116, 122, 156, IRM image rejection mixer 117, 124, 158, A2 Power amplifier 121 Buffer amplifier 126 Transmission signal strength detector 151, A1 Low noise amplifier 154 Signal strength detection 411 A / D converter 412 D / A converter 1101, 1201 Intermediate frequency conversion circuit 1102 Low frequency conversion circuit
1162, 1222 Phase shifter 1163, 1164, 1223, 1224 Mixer 1165, 1225 Synthesizer 1202 High frequency conversion circuit ANT antenna terminal
LO Local oscillation signal RLA reception level adjustment signal terminal RX reception signal terminal SC switching signal TLA transmission level adjustment signal terminal TX transmission signal input terminal

Claims (3)

A demodulation circuit that lowers the radio frequency band signal received by the antenna to an arbitrary frequency and outputs it to another circuit;
A modulation circuit that raises a signal of an arbitrary frequency input from the other circuit to a radio frequency and outputs the signal to the antenna;
A switch circuit for switching the antenna to either the demodulation circuit or the modulation circuit;
An RF integrated circuit for development with built-in
The RF integrated circuit is integrated independently of the other circuits, and
The demodulation circuit converts the received radio frequency signal into a frequency signal having a frequency of 5 to 20 MHz,
The RF integrated circuit, wherein the modulation circuit converts a frequency signal having a frequency of 5 to 20 MHz into a radio frequency signal. The other circuit is
A physical layer circuit that performs AD conversion with the demodulation circuit and performs DA conversion with the modulation circuit;
A media access control circuit connected to the physical layer circuit;
The RF integrated circuit according to claim 1, comprising: The RF integrated circuit according to claim 1, wherein the demodulation circuit and a demodulation circuit functioning as the modulation circuit are incorporated.
The demodulation circuit includes at least a low noise amplifier, a subsequent image rejection mixer, and a subsequent power amplifier as common components,
A switch for switching between a signal path for sending a signal from the antenna to the physical layer circuit via the demodulation circuit and a signal path for sending a signal from the physical layer circuit to the antenna via the demodulation circuit A group of circuits;
An RF integrated circuit comprising:

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