JP2011171643A - Method of manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device which can manufacture a semiconductor device having a semiconductor substrate protected by a supporting substrate by dicing before grinding (DBG). <P>SOLUTION: The method of manufacturing a semiconductor device includes steps of: bringing the supporting substrate into tight contact with a semiconductor wafer ground into a predetermined thickness; applying a process of dicing before grinding (DBG) to the semiconductor wafer in this state; and thus dividing the semiconductor wafer into respective semiconductor devices. In concrete, the supporting substrate 26 is stuck to an upper surface of the semiconductor wafer 10 having a semiconductor device part 14 provided, and a separation groove 48 is provided to have the semiconductor substrate 10 divided and to reach the middle of the supporting substrate 26. By removing the supporting substrate 26 by a grinder 28 from the upper surface in this state, the semiconductor device having the semiconductor substrate protected by the supporting substrate 26 can be manufactured. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device for manufacturing a thin WLP.

  2. Description of the Related Art Conventionally, a semiconductor device set in an electronic device is used in a mobile phone, a portable computer, and the like, so that it is required to be downsized, thinned, and lightweight. In order to satisfy these conditions, a semiconductor device called a CSP (Chip Scale Package) having a size equivalent to a built-in semiconductor element has been developed.

  Among these CSPs, there is a WLP (Wafer Level Package) as a particularly miniaturized one (see, for example, Patent Document 1 below). A general method for manufacturing WLP is to provide a semiconductor wafer with a large number of semiconductor device portions in a matrix, and after forming wirings and solder electrodes connected to the diffusion regions of each semiconductor device portion on one main surface of the semiconductor wafer, Each semiconductor device part is separated individually by dicing the semiconductor wafer into a lattice shape.

  However, in the above general WLP manufacturing method, in order to reduce the thickness of the formed WLP to, for example, 100 μm or less, it is necessary to extremely reduce the thickness of the semiconductor wafer itself to 100 μm or less before dicing. For this reason, the mechanical strength of the semiconductor wafer after being reduced in thickness is lowered, and there are many problems that the semiconductor wafer is damaged in the transporting process or the like.

  Dicing Before Grinding (hereinafter abbreviated as DBG) has been developed as a WLP manufacturing method for solving such problems (see Patent Document 2). In this method of manufacturing a semiconductor device by DBG, a semiconductor wafer on which wirings and the like are formed is half-cut from the front surface side and then ground from the back surface side, so that the semiconductor wafer is individually separated in the half-cut region. This is a method of dividing into semiconductor devices. A method of dividing a semiconductor wafer by DGB will be described in detail with reference to FIG.

  Referring to FIG. 8A, first, a semiconductor wafer 100 in which semiconductor device portions 108 are formed in a matrix is prepared. In the vicinity of the upper surface of each semiconductor device portion 108, an element such as a transistor is formed by a diffusion process. Further, the upper surface of the semiconductor wafer 100 is covered with an insulating layer 102 made of an oxide film, and wiring 104 connected to the element region is formed on the upper surface of the insulating film 102. Further, an external electrode 106 made of solder is formed on the wiring 104. The thickness of the semiconductor wafer 100 in this step is, for example, about 625 μm or 725 μm.

  With reference to FIG. 8B, next, dicing is performed from the upper surface of the semiconductor wafer 100 to form grooves 110 between the semiconductor device portions 108. The dicing here does not divide the semiconductor wafer 100, and the depth of the groove 110 formed by dicing is formed to be shallower than the thickness of the semiconductor wafer 100. As an example, when the thickness of the semiconductor wafer 100 is 280 μm as described above, the depth of the groove 110 is set to about 100 μm. Therefore, the semiconductor wafer 100 that has undergone this process is not in a divided state, but presents a single plate-like body.

  With reference to FIG. 8C, after the semiconductor wafer 100 is turned upside down, the lower surface of the semiconductor wafer 100 on which the wiring 104 is formed is attached to the adhesive tape 112. Furthermore, the semiconductor wafer 100 is ground from the upper surface, and the semiconductor wafer 100 is thinned over the entire surface.

  Referring to FIG. 8D, by advancing grinding from the upper surface of semiconductor wafer 100, each semiconductor device portion 108 is individually separated at the location where groove 110 is separated.

JP 2004-172542 A JP 2005-101290 A

  In the manufacturing method described above, as is apparent with reference to FIG. 8D, the main surface of the semiconductor wafer 100 is entirely ground to separate the semiconductor device portions 108. Accordingly, the upper surface of each semiconductor device portion 108 is in a state where a semiconductor substrate such as silicon is exposed. In such a state, there is a problem that cracks are easily generated when an impact is applied to the semiconductor substrate. Furthermore, there is a problem that a stamp indicating the characteristics of the semiconductor device cannot be easily stamped on the semiconductor substrate.

  Here, referring to FIG. 8D, it is also possible to individually attach a support substrate to the upper surface of each semiconductor device portion 108 after being separated. However, in this case, it is necessary to prepare a support substrate that matches the shape and size of each semiconductor device 108. Furthermore, it is necessary to individually align each semiconductor device unit 108 and the support substrate. For this reason, after separating the semiconductor wafer 100, sticking the support substrate to each semiconductor device unit 108 is very complicated and increases the cost.

  The present invention has been made in view of the above-described problems, and a main object of the present invention is to provide a semiconductor device manufacturing method capable of manufacturing a semiconductor device in which a semiconductor substrate is protected by a support substrate by pre-dicing (DBG). It is to provide.

  The method for manufacturing a semiconductor device according to the present invention includes a step of preparing a semiconductor wafer including a first main surface on which wirings connected to a semiconductor device portion are disposed, and a second main surface opposite to the first main surface. A step of removing the semiconductor wafer from the second main surface in a thickness direction, a step of providing a support substrate in close contact with the second main surface of the semiconductor wafer, and a lattice defined between the semiconductor device portions Dicing from the first main surface of the semiconductor wafer along a dicing line to form a separation groove so as to penetrate the semiconductor wafer and reach the middle of the thickness direction of the support substrate; And removing the support substrate in the thickness direction until reaching the separation groove, thereby separating the semiconductor wafer attached to the support substrate for each semiconductor device portion. .

  According to the present invention, a dividing method by prior dicing (DBG) is applied to a semiconductor wafer to which a support substrate is attached. That is, in the present invention, a support substrate is attached to the main surface of the semiconductor wafer, and separation grooves are provided in a lattice shape so as to reach the support substrate. The support substrate is ground on the entire surface until the semiconductor wafer and the support substrate are divided at the location where the separation groove is provided. Therefore, a semiconductor device in which the semiconductor substrate is supported by the support substrate can be manufactured by the DBG manufacturing method.

  Furthermore, in the present invention, a support substrate made of resin is formed in close contact with the main surface of the semiconductor wafer by transfer molding using a mold. As a result, a support substrate having an arbitrary thickness can be formed on the main surface of the semiconductor wafer without using an adhesive.

It is a figure which shows the manufacturing method of the semiconductor device of this invention, (A) is a top view, (B) is sectional drawing. It is a figure which shows the manufacturing method of the semiconductor device of this invention, (A) is a perspective view, (B) is sectional drawing. It is a figure which shows the manufacturing method of the semiconductor device of this invention, (A) and (B) are sectional drawings. It is a figure which shows the manufacturing method of the semiconductor device of this invention, (A) and (B) are sectional drawings. It is a figure which shows the manufacturing method of the semiconductor device of this invention, (A) is a perspective view, (B) is sectional drawing. It is a figure which shows the manufacturing method of the semiconductor device of this invention, (A) is a perspective view, (B) is sectional drawing, (C) is sectional drawing. It is a figure which shows the semiconductor device manufactured by the manufacturing method of the semiconductor device of this invention, (A) is a perspective view, (B) is sectional drawing. It is a figure which shows the manufacturing method of the semiconductor device of background art, (A)-(D) is sectional drawing.

  In this embodiment, a method for manufacturing a semiconductor device will be described with reference to FIGS. In the method of manufacturing a semiconductor device according to this embodiment, a support substrate is brought into close contact with a semiconductor wafer ground to a predetermined thickness, and a semiconductor wafer is applied with a pre-dicing (DBG) process on the semiconductor wafer in this state. Are separated into semiconductor devices.

  Referring to FIG. 1, first, a semiconductor wafer 10 is prepared. FIG. 1A is a plan view showing the semiconductor wafer 10, and FIG. 1B is a cross-sectional view showing a part of the semiconductor wafer 10.

  Referring to FIG. 1A, a semiconductor wafer 10 is formed with a large number (for example, several hundreds) of semiconductor device sections 14 in a matrix. Here, the semiconductor device unit 14 is a part that becomes one semiconductor device. In addition, dicing lines 12 are defined in a lattice shape between the semiconductor device portions 14, and the semiconductor wafer 10 is separated into individual semiconductor devices along the dicing lines 12 in a later process.

  With reference to FIG. 1B, in each semiconductor device portion 14, elements (diffusion regions) such as transistors are formed inside the semiconductor wafer 10 by a diffusion process. Further, a pad 20 connected to this element is formed on the lower surface of the semiconductor wafer 10. An insulating layer 16 made of an oxide film or the like is formed on the lower surface of the semiconductor wafer 10 with the pads 20 exposed. In addition, on the lower surface of the insulating layer 16, a wiring 22 connected to the pad 20 is formed from the peripheral portion of each semiconductor device portion 14 toward the central portion. An external electrode 24 made of solder is welded to the lower surface of the wiring 22 formed in a pad shape. Further, except for the region where the external electrode 24 is provided, the lower surfaces of the wiring 22 and the insulating layer 16 are covered with a coating layer 18 made of resin. The thickness of the semiconductor wafer 10 in this step varies depending on the diameter of the semiconductor wafer. For example, the thickness of the semiconductor wafer 10 having a diameter of 6 inches is 625 μm, and if the diameter of the semiconductor wafer 10 is 8 inches, the thickness is 725 μm.

  Referring to FIG. 2, next, the semiconductor wafer 10 is ground to a predetermined thickness. FIG. 2A is a perspective view showing this step, and FIG. 2B is a cross-sectional view showing this step.

  Referring to FIG. 2A, in this step, the main surface of the semiconductor wafer on which the external electrode 24 is formed is attached to a sheet (not shown), and then the upper surface of the chuck table of the grinding device (grinding device). Then, fix by suction. Then, the grinder 28 provided with the grindstone on the lower surface is rotated at high speed to grind the semiconductor wafer 10 from the upper surface, thereby gradually reducing the thickness of the semiconductor wafer 10 entirely.

  In this step, the thickness of the substrate portion of the semiconductor wafer 10 is made thinner than the thickness of the semiconductor device to be manufactured. Specifically, if the thickness of the substrate portion of the manufactured semiconductor device 50 shown in FIG. 7 is 200 μm as a whole, the thickness T2 of the substrate portion of the semiconductor wafer 10 after being ground in this step is, for example, 100 μm or less. It is. Further, as described above, the thickness T1 of the substrate portion of the semiconductor wafer 10 before being ground is, for example, about 625 μm.

  Next, referring to the cross-sectional view of FIG. 3, the support substrate 26 is brought into close contact with the upper surface of the thin semiconductor wafer 10 that has been ground.

  The planar size and shape of the support substrate 26 are the same as those of the semiconductor wafer 10, and the thickness T3 of the support substrate 26 is, for example, 200 μm or more (for example, 400 μm). The material of the support substrate 26 can be generally adopted as long as the semiconductor wafer 10 can be reinforced. For example, a resin, a metal such as aluminum or copper, or a semiconductor material such as silicon is employed. The lower surface of the support substrate 26 and the upper surface of the semiconductor wafer 10 are bonded via an adhesive such as an epoxy resin. The support substrate 26 has a function of mechanically supporting the semiconductor wafer 10 in the middle of the manufacturing process, and functions as a layer for protecting the upper surface of the semiconductor substrate in the manufactured semiconductor device.

  After this step, the semiconductor wafer and the support substrate 26 are handled as an integrated laminated substrate, and a separation method using DBG is applied to this laminated substrate.

  With reference to FIG. 4, another method for forming a support substrate on the upper surface of the semiconductor wafer 10 will be described. Here, a support substrate made of resin is formed on the upper surface of the semiconductor wafer 10 by transfer molding using the mold 30.

  Referring to FIG. 4A, a mold 30 for molding includes an upper mold 32 and a lower mold 34, and a cavity 36 that is a space where resin sealing is performed is formed by abutting both. Is done. In this step, after the lower surface of the semiconductor wafer 10 on which the external electrode is provided is attached to the upper surface of the resin sheet 42, the semiconductor wafer 10 in this state is placed on the upper surface of the lower mold 34. By doing so, the lower surface of the resin sheet 42 contacts the upper surface of the lower mold 34. Further, the semiconductor die 10 is accommodated in the cavity 36 by bringing the lower die 34 and the upper die 32 into contact with each other.

  Here, the position of the semiconductor wafer 10 in the cavity 36 may be fixed by sucking the resin sheet 42 by the suction means provided in the lower mold 34. By doing so, the movement of the semiconductor wafer during resin injection is suppressed, and the thickness of the resin (support substrate) covering the upper surface of the semiconductor wafer 10 becomes uniform.

  Referring to FIG. 4B, next, a liquid resin 38 (epoxy resin) is injected into the cavity 36 from the gate provided in the mold 30, thereby covering the upper surface of the semiconductor wafer 10 with the resin 38. . Furthermore, after the resin 38 is sufficiently heated and cured, the upper mold 32 and the lower mold 34 are separated from each other, and the semiconductor wafer 10 covered with the resin 38 is taken out.

  In this step, the position of the semiconductor wafer 10 inside the cavity 36 is fixed by fixing the semiconductor wafer 10 adhered to the resin sheet 42 to the lower mold 34. There is no need to pinch and fix the wafer 10. That is, since the fragile semiconductor wafer 10 is not in contact with the mold 30, damage to the semiconductor wafer 10 in this step is prevented.

  Referring to FIG. 5, next, separation grooves for separating the semiconductor wafer 10 into the respective semiconductor devices are formed. FIG. 5A is a perspective view showing this step, and FIG. 5B is a cross-sectional view showing the semiconductor wafer 10 after this step. The dicing in this step does not completely separate the laminated plate composed of the semiconductor wafer 10 and the support substrate 26, but is half dicing that forms separation grooves for subsequent separation by DBG.

  Referring to FIG. 5A, first, the semiconductor wafer 10 is attached to the upper surface of a dicing sheet 46 whose periphery is supported by a wafer ring 44. Here, the lower surface of the support substrate 26 attached to the lower surface of the semiconductor wafer 10 is attached to the upper surface of the dicing sheet 46 (see FIG. 5B). That is, the semiconductor wafer 10 is adhered to the dicing sheet 46 with the main surface on which the wiring 22 and the external electrode 24 are provided facing upward.

  In this step, dicing is performed by moving a blade 40 that rotates at high speed along a dicing line 12 defined at the boundary between the semiconductor device portions 14 provided on the semiconductor wafer 10, and the semiconductor wafer 10 and its upper surface Each layer (see FIG. 1) stacked on the substrate is cut, and the support substrate 26 is partially diced in the thickness direction.

  Referring to FIG. 5B, dicing in this step does not completely divide the laminated plate of the semiconductor wafer 10 and the support substrate 26. The separation groove 48 formed by dicing in this step terminates in the middle of the support substrate 26 in the thickness direction. Specifically, if the thickness T2 of the semiconductor wafer 10 is 100 μm, the thickness T3 of the support substrate 26 is 300 μm, and the overall thickness of the substrate of the semiconductor device to be manufactured is 200 μm, this is formed in this step. The depth L1 of the separation groove 48 is 300 μm, for example. Thus, although the semiconductor wafer 10 is separated for each semiconductor device unit 14 by dicing in this step, the support substrate 26 that is in close contact with the semiconductor wafer 10 is a support substrate in which the separation groove 48 is not formed. The remaining 26 thickness portions are integrally connected. Accordingly, the semiconductor device portions 14 are integrally connected by the support substrate 26 in the process and transport from the present process to the separation.

  After this step is completed, the support substrate 26 is peeled from the dicing sheet 46.

  Next, referring to FIG. 6, each semiconductor device portion 14 included in the semiconductor wafer 10 is individually separated by performing grinding from the exposed surface of the support substrate 26. 6A is a perspective view showing this process, FIG. 6B is a cross-sectional view showing this process, and FIG. 6C shows the state of the semiconductor wafer 10 after this process is completed. It is sectional drawing.

  With reference to FIGS. 6A and 6B, in this step, first, a protective sheet 54 having an adhesive layer 55 provided on the upper surface is prepared, and the semiconductor wafer 10 provided with the wiring 22 and the like is prepared. Is attached to the upper surface of the protective sheet 54. In this state, the support substrate 26 and the semiconductor wafer 10 are fixed to a stage on which grinding is performed. Then, the support substrate 26 is ground from the upper surface by the grinder 28 that rotates while moving at a high speed. With reference to FIG. 6B, this grinding process is performed until reaching the separation groove 48. The grinding process in this step is performed until the thickness T3 of the support substrate 26 becomes, for example, 300 μm to 100 μm.

  With reference to FIG. 6C, by doing so, the thickness portion of the support substrate 26 that integrally supports the semiconductor device portions 14 included in the semiconductor wafer 10 is removed. As a result, each semiconductor device unit 14 is individually separated while the semiconductor substrate is protected by the support substrate 26.

  Through the above steps, a semiconductor device in which the upper surface of the semiconductor substrate is protected by the support substrate 26 is manufactured by the DBG process.

  With reference to FIG. 7, the structure of the semiconductor device 50 manufactured by the above process will be described. 7A is a perspective view showing the semiconductor device 50, and FIG. 7B is a cross-sectional view.

  7A and 7B, a semiconductor device 50 includes a semiconductor substrate 52, a wiring 22 formed on the lower surface of the semiconductor substrate 52, and a support substrate 26 that covers the upper surface of the semiconductor substrate 52. It is equipped with. Further, the semiconductor device 50 of this embodiment is a WLP in which the external electrodes 24 made of solder are formed on the lower surface in a grid shape.

  The semiconductor substrate 52 is made of a semiconductor material such as silicon, and an element region is formed near its lower surface by a diffusion process. For example, a bipolar transistor, MOSFET, diode, IC, LSI or the like is formed inside the semiconductor substrate 52. The thickness of the semiconductor substrate 52 is, for example, about 50 μm to 100 μm. As described above, in this embodiment, since the mechanical strength of the semiconductor wafer at the time of manufacture is ensured by the support substrate 26, it is possible to reduce the thickness of the semiconductor substrate 52 as compared with a general DBG process. . The upper surface of the semiconductor substrate 52 is a rough surface that has been ground by grinding.

  Further, the support substrate 26 covers the entire upper surface of the semiconductor substrate 52, and has a function of protecting the upper surface of the semiconductor substrate 52 and reinforcing the semiconductor substrate 52. As described above, resin, metal, or ceramic can be used as the material of the support substrate 26. Here, if a resin material such as an epoxy resin is employed as the material of the support substrate 26, it becomes easy to form the seal 66 by laser irradiation.

  Referring to FIG. 7B, a pad 20 electrically connected to an element region (active region) formed by a diffusion process is formed on the lower surface of the semiconductor substrate 52. Except for the portion where the pad 20 is formed, the lower surface of the semiconductor substrate 52 is covered with the insulating layer 16. The insulating layer 16 is made of, for example, a nitride film or a resin film.

  A wiring 22 connected to the pad 20 is formed on the lower surface of the insulating layer 16. Here, the pad 20 is provided in the peripheral portion of the semiconductor device 50, and the wiring 22 extends from the peripheral portion to the inside. A part of the wiring 22 is formed in a pad shape, and an external electrode 24 made of a conductive adhesive such as solder is welded to the pad-shaped portion. Further, the lower surfaces of the wiring 22 and the insulating layer 16 are covered with the covering layer 18 made of an insulating material such as a resin, except for the region where the external electrode 24 is formed.

  Referring to FIG. 7A, a stamp 66 is formed on the upper surface of the semiconductor substrate 52. Here, the seal 66 includes a position mark 64 and a symbol mark 62. The position mark 64 is provided for detecting a planar position (angle) of the semiconductor device 50. That is, the position mark 46 is used to determine whether or not the electrode disposed on the back surface of the semiconductor device 50 exists at a regular position.

  On the other hand, the symbol mark 62 is composed of letters, numbers, and the like, and indicates the name of the manufacturing company, the manufacturing time, the product name, the lot number, the characteristics of the built-in elements, and the like. In this embodiment, these markings 66 are provided by irradiating the upper surface of the support substrate 26 with a laser.

  In this embodiment, with reference to FIG. 6B, the DBG process is applied to a laminated plate in which the semiconductor wafer 10 and the support substrate 26 are laminated. In this way, the upper surface of the semiconductor substrate included in the manufactured semiconductor device is covered with the support substrate 26. Therefore, the support substrate 26 that covers the semiconductor substrate is provided, and an extremely thin semiconductor device as a whole is manufactured.

  Referring to FIG. 5, in this embodiment, in the DBG process, the semiconductor device portions 14 are integrally held at the thickness portion of the support substrate 26 where the separation groove 48 is not provided without being separated. . Accordingly, when the support substrate 26 is excellent in mechanical strength such as resin or metal, the semiconductor wafer 10 can be firmly supported, so that the substrate is prevented from being damaged in the transfer process and the yield is improved. Is done.

  Further, in this embodiment, referring to FIG. 4, the support substrate is formed on the upper surface of the semiconductor wafer 10 by transfer molding using a mold 30 for molding. By doing in this way, it becomes possible to easily form a support substrate made of a resin having a thickness and composition according to requirements on the upper surface of the semiconductor wafer 10. In this case, the supporting substrate can be provided on the upper surface of the semiconductor wafer 10 without using an adhesive.

DESCRIPTION OF SYMBOLS 10 Semiconductor wafer 12 Dicing line 14 Semiconductor device part 16 Insulating layer 18 Covering layer 20 Pad 22 Wiring 24 External electrode 26 Support substrate 28 Grinder 30 Mold 32 Upper mold 34 Lower mold 36 Cavity 38 Resin 40 Blade 42 Resin sheet 44 Wafer Ring 46 Dicing sheet 48 Separation groove 50 Semiconductor device 52 Semiconductor substrate 54 Protective sheet 55 Adhesive layer 62 Symbol mark 64 Position mark 66 Sealing

Claims (5)

Preparing a semiconductor wafer having a first main surface on which wiring to be connected to the semiconductor device portion is disposed, and a second main surface facing the first main surface;
Removing the semiconductor wafer from the second main surface in the thickness direction;
Providing a support substrate in close contact with the second main surface of the semiconductor wafer;
Dicing is performed from the first main surface of the semiconductor wafer along a lattice-shaped dicing line defined between the semiconductor device portions, and passes through the semiconductor wafer to the middle in the thickness direction of the support substrate. Forming a separation groove to reach,
Removing the support substrate in the thickness direction until reaching the separation groove, thereby separating the semiconductor wafer to which the support substrate is attached for each semiconductor device unit; and
A method for manufacturing a semiconductor device, comprising:   The method for manufacturing a semiconductor device according to claim 1, wherein the support substrate is made of metal, resin, ceramic, or silicon.   3. The method of manufacturing a semiconductor device according to claim 2, wherein in the step of providing the support substrate, the support substrate is formed by transfer molding. The step of providing the support substrate includes:
The semiconductor wafer in which the first main surface is covered with a protective sheet is accommodated in the cavity of the mold, and the resin is injected into the cavity, whereby the resin is applied to the second main surface of the semiconductor wafer. The method of manufacturing a semiconductor device according to claim 3, wherein the support substrate is formed.   5. The method of manufacturing a semiconductor device according to claim 4, wherein in the step of providing the support substrate, a thickness of the support substrate attached to the semiconductor wafer is twice or more that of the semiconductor wafer.

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