JP2011114176A - Power semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a power semiconductor device that suppresses deterioration in heat dissipation performance and insulation performance. <P>SOLUTION: The power semiconductor device 101 includes a power semiconductor element 1 as a first power semiconductor element, metal members 6, 8 as a pair of metal members arranged with the power semiconductor element 1 interposed therebetween, a pair of insulating layers 12a, 12b laminated on metal plates 11a, 11b as a pair of heat sinks with the pair of metal members 6, 8 interposed therebetween, and a filling resin 18 charged while covering at least the power semiconductor element 1, the pair of metal members 6, 8, and the pair of insulating layers 12a, 12b. The coefficient of thermal expansion of the pair of insulating layers 12a, 12b is substantially equal to that of the filling resin 18. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a power semiconductor device, and more particularly to a power semiconductor device that incorporates one or a plurality of power semiconductor elements such as MOSFETs and IGBTs and controls a load such as a motor.

  Since the power semiconductor element controls a large load such as a motor, the current to be controlled is large, and thus the self-heating is large. Therefore, the power semiconductor device that houses the power semiconductor element needs to consider heat dissipation of the power semiconductor element.

  A power semiconductor element in a conventional power semiconductor device is mounted on an insulating substrate, and the insulating substrate is bonded to a metal plate and stored in a case. A plurality of bonding wires are connected to the upper surface electrode of the power semiconductor element, and the other end of the bonding wire is connected to a wiring on the insulating substrate or an electrode attached to the case. On the other hand, the back electrode of the power semiconductor element is mounted by soldering to the wiring on the insulating substrate. The power semiconductor device is attached to the cooler through grease or the like on the surface of the metal plate, and the heat generated by the power semiconductor element is dissipated by the cooler through the solder, the insulating substrate, and the metal plate.

  In addition, in order to supply a voltage for operating the power semiconductor element, a control electrode is provided on the same plane as the upper surface electrode of the power semiconductor element. Connected to the connected electrode. A wiring or electrode through which a large current flows and a control wiring or electrode are often provided on the same substrate surface or case surface.

  Power semiconductor elements are widely used in applications in which elements such as MOSFETs and IGBTs control large currents, and currents of several A to several hundreds A are controlled by a power semiconductor device. For this reason, in order to improve the cooling performance of the power semiconductor device, for example, there is a power semiconductor device described in Patent Document 1.

  In Patent Document 1, a plurality of power semiconductor elements each having an emitter electrode formed on the same surface as the collector electrode and the control electrode are provided, and are provided so as to sandwich these power semiconductor elements. There is a high thermal conductive insulating substrate provided with an electrode pattern for bonding to the electrode, and the electrode pattern of the high heat dissipation conductive substrate and the electrode of the semiconductor element are bonded by brazing.

JP-A-10-56131

  In the conventional power semiconductor device, since the insulating substrate is provided so as to sandwich the front and back of the power semiconductor element, the parallelism of the surface of the insulating substrate is deteriorated due to variation in assembly. In particular, as described in Patent Document 1, when ceramics such as aluminum nitride is used for the insulating substrate, the insulating substrate is very hard, and therefore, when the cooler is attached to the surface of the insulating substrate, contact per unit occurs. There is a risk of destroying them by applying excessive force to the local area. In addition, a large gap is generated between the cooler and the insulating substrate even before destruction, resulting in a thick grease layer and poor heat dissipation performance.

  In addition, when a resin is filled between two upper and lower insulating substrates, if the resin and the insulating substrate are not in close contact with each other, there is a risk of causing dielectric breakdown when a high voltage is applied to the power semiconductor element. is there. Here, since the adhesiveness between ceramics and resin is generally not good, such a situation is likely to occur. In addition, since the thermal expansion difference between ceramics and resin is large, a large thermal stress is generated on the bonding surface due to thermal expansion, and if the cooling and heating cycle is repeated as it is, peeling occurs between the insulating substrate and the resin, and the insulating property is reduced. There was a problem of deterioration.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a power semiconductor device that suppresses deterioration of heat dissipation performance and insulation performance.

  A power semiconductor device according to the present invention includes a first power semiconductor element, a pair of first metal members disposed with the first power semiconductor element interposed therebetween, and a pair of heat sinks with the pair of first metal members interposed therebetween. A pair of insulating layers stacked thereon, at least the first power semiconductor element, the pair of first metal members, and a filling resin filled to cover the pair of insulating layers, The insulating layer and the filling resin have substantially the same coefficient of thermal expansion.

  According to the power semiconductor device of the present invention, the first power semiconductor element, the pair of first metal members disposed with the first power semiconductor element interposed therebetween, and the pair of the first metal members sandwiched between the pair of first metal members. A pair of insulating layers stacked on a heat sink, at least the first power semiconductor element, the pair of first metal members, and a filled resin filled to cover the pair of insulating layers, The pair of insulating layers and the filling resin have substantially the same thermal expansion coefficient, so that they have sufficient heat dissipation performance, and peeling occurs due to a difference in thermal expansion between the insulating layer and the filling resin, resulting in deterioration of insulation. This can be suppressed.

1 is a cross-sectional view of a power semiconductor device according to a first embodiment. FIG. 3 is a diagram showing a method for manufacturing the power semiconductor device according to the first embodiment; FIG. 3 is a diagram showing a method for manufacturing the power semiconductor device according to the first embodiment; FIG. 6 is a cross-sectional view of a power semiconductor device according to a second embodiment. FIG. 10 is a diagram showing a method for manufacturing the power semiconductor device according to the second embodiment; It is sectional drawing of the power semiconductor device concerning Embodiment 3. FIG. FIG. 6 is a circuit diagram of a power semiconductor device according to a third embodiment. It is sectional drawing of the power semiconductor device concerning Embodiment 3. FIG. It is sectional drawing of the power semiconductor device concerning Embodiment 3. FIG. FIG. 6 is a cross-sectional view of a power semiconductor device according to a fourth embodiment.

<A. Embodiment 1>
<A-1. Configuration>
Embodiment 1 of the present invention will be described. FIG. 1 is a schematic sectional view of a power semiconductor device for explaining the first embodiment of the present invention. As shown in FIG. 1, a power semiconductor element 1 as a first power semiconductor element (in FIG. 1, a case where two are included) includes a collector electrode 2 as a first electrode and a second electrode as a first electrode. The emitter electrodes 3 are formed on the front and back surfaces of the power semiconductor element 1.

  On the emitter electrode 3 side, a control electrode 4 for supplying electric power necessary for driving the power semiconductor element 1 is provided. The collector electrode 2 is joined to a metal block 5 as a first metal block via a solder layer 1001, and the metal block 5 is electrically connected to a metal member 6 which is one of a pair of first metal members via a solder layer 1001. Are joined together.

  On the other hand, a metal block 7 as a second metal block having a slightly smaller area than the metal block 5 is joined to the upper side of the emitter electrode 3 via a solder layer 1001. The other metal member 8 is joined to the metal member 8 via the solder layer 1001.

  The power semiconductor device 101 is sandwiched between a pair of upper and lower metal plates, that is, a metal plate 11a and a metal plate 11b as heat radiating plates, and surfaces 111 and 121 on the opposite side of the power semiconductor element 1 of the metal plates 11a and 11b The structure is exposed to the outside. Insulating layers 12a and 12b are attached to the surface opposite to the exposed surface (the surface on the power semiconductor element 1 side), and a pair of metal members 6 and 8 and a second metal member are attached to the insulating layers 12a and 12b. A metal member 1002 is attached.

  In the power semiconductor device 101, each of the above-described parts is covered with the filling resin 18 except for a part of the surfaces (surfaces 111 and 121) of the pair of upper and lower metal plates 11a and 11b. However, the metal member 6 is provided with a portion where the lower insulating layer 12a is exposed, for example, as shown in FIG.

  In FIG. 1, a metal member 1002 that is a second metal member is electrically separated from the metal member 6 and disposed on the insulating layer 12a, and constitutes, for example, a wiring. The metal member 1002 is connected to the power semiconductor element 1 via a wire. In FIG. 1, the metal member 1002 is disposed on the insulating layer 12a, but may be disposed on the insulating layer 12b.

  The insulating layers 12a and 12b are made of a resin material, and are made of a material having substantially the same thermal expansion coefficient as that of the filling resin 18, preferably the same kind of material. By using the same kind of material as the material of the filling resin 18, the reaction between the insulating layers 12 a and 12 b and the filling resin 18 proceeds well at the joining portion, and not only the joining strength is improved but also the effect of disappearing the interface. Therefore, even if thermal stress occurs due to a difference in linear expansion from the metal plates 11a and 11b, the metal blocks 5 and 7, or the power semiconductor element 1, the insulating layers 12a and 12b and the filling resin 18 are easily peeled off. Therefore, high insulation reliability and solder crack resistance can be maintained. If these materials are all epoxy materials, the strength of the package is increased, the effect of dispersing the stress around the power semiconductor element 1 built in the filling resin 18 is great, and the handling property is also improved.

  The power semiconductor element in the present invention is an element made of, for example, silicon. However, since the heat generated by the element can be efficiently released from the vertical direction of the element, an organic material such as a filling resin can be used even when the temperature of the element increases. The temperature rise can be suppressed without spreading the heat.

  Further, the heat spread is small for other electronic components around the power semiconductor element. Therefore, the reliability of the apparatus can be ensured even if the element made of silicon carbide is operated at a high temperature. In addition, since the insulating layers 12a and 12b are formed between the power semiconductor elements 1 and the surfaces 111 and 121 of the upper and lower metal plates 11a and 11b attached to the cooler, the power semiconductor elements 1 have a high temperature cycle. Since the expansion and contraction in the vertical direction is absorbed by the soft insulating layers 12a and 12b, the thermal resistance of the contact portion of the mounting surface of the cooler (that is, the surfaces 111 and 121 of the metal plates 11a and 11b) does not change. In these respects, a power semiconductor device equipped with a power semiconductor element made of silicon carbide in particular can exhibit a very excellent effect.

<A-2. Manufacturing method>
Next, a method for manufacturing the power semiconductor device 101 according to the first embodiment will be described with reference to FIGS. The metal plate 11a or the insulating layer 12a and the metal members 6 and 1002 are laminated in advance through a process such as hot pressing. The metal members 6 and 1002 may be formed by arranging a plurality of members in an island shape and joining the insulating layer 12a, or the plate-like metal member 6 having an area equivalent to that of the metal plate 11a and the insulating layer 12a. , 1002 may be laminated and then formed into a desired shape by a method such as etching. The latter is an industrially useful method because the metal members 6 and 1002 having various shapes can be formed at a time. Similarly, metal members 6 and 1002 previously formed into a desired shape may be laminated.

  As shown in FIG. 2A, the metal block 5, the power semiconductor element 1, and the metal block 7 are mounted on the laminated structure thus manufactured (hereinafter, laminated substrate 102a) in that order. In the first embodiment, these members and the laminated substrate 102a are soldered using, for example, solder. The solder layer 1001 (FIG. 2B) in this case is soldered together using the same solder material.

  Next, the control electrode 4 of the power semiconductor element 1 and a predetermined portion of the metal member 6 are electrically connected by a wire 16 (FIG. 2B). Further, another laminated substrate 102b manufactured by the same method as the method of manufacturing the laminated substrate 102a described above is placed and bonded so that the metal member 8 side is in contact with the metal block 7. Also in this case, it joins, for example using a solder material (FIG. 3 (a)). This solder material preferably has a melting point equal to or lower than that of the three solder layers 1001. This is because the influence on the solder layer 1001 due to the heating for soldering in the step shown in FIG. In particular, when the solder layer 1001 is remelted, the relative position between the power semiconductor element 1 and the metal member 6 changes, and stress may be applied to the wire 16, so that the melting point is set as described above so that the solder layer 1001 does not melt. It is preferable to combine them.

  Next, the power semiconductor element 1 having a structure sandwiched between the laminated substrates 102a and 102b is set in the mold 17, and a filling resin 18 is injected to fill the resin (FIG. 3B). At this time, the surfaces 111 and 121 of the pair of upper and lower laminated substrates 102 a and 102 b are in pressure contact with the surface of the mold 17 to prevent the resin from flowing to the surfaces 111 and 121. After filling the resin, the mold 17 is removed, and the power semiconductor device 101 is manufactured (FIG. 3C).

  Here, the filling resin 18 and the insulating layers 12a and 12b are made of the same kind of material. As the material, epoxy resin is used as a filling structure and has high mechanical strength, and the holding state of the power semiconductor device 101 is good. An epoxy resin filling method includes a transfer mold method which is a method with excellent productivity.

  In the step of laminating the members shown in FIGS. 2 (a) and 3 (a), a certain amount of deviation can occur in the height direction. Therefore, the parallelism of the surfaces 111 and 121 of the pair of upper and lower laminated substrates 102a and 102b is not necessarily good. is not. However, in the first embodiment, a pair of silicon-based insulating layers 12a and 12b are formed on both sides of the power semiconductor element 1, and the insulating layers 12a and 12b are formed of the power semiconductor element 1 and other metal. Since it is a soft material compared to the above, it is possible to absorb the deviation of the contact between the mold 17 and the surfaces 111 and 121 of the metal plates 11a and 11b when contacting the mold 17. Therefore, the mold 17 and the surfaces 111 and 121 of the metal plates 11a and 11b can be in close contact with each other so that the resin does not enter, and damage to the power semiconductor element 1 due to bias pressure can be prevented. In addition, the resin can be filled.

  Further, the power semiconductor element 1 and the outer surface of the power semiconductor device 101 are insulated by the pair of upper and lower insulating layers 12a and 12b. Further, by incorporating the insulating layers 12a and 12b inside the filling resin 18, there is no deterioration in insulation due to adhesion of moisture, ionic components, foreign matters, etc. in the external environment, and a highly reliable device can be obtained. Since the power semiconductor device 101 controls a high voltage and a large current, it is very useful to provide a device with excellent insulation reliability.

  In the first embodiment, the metal members 6, 8, 1002 can take various shapes. For example, the metal members 6, 8, 1002 can be connected to a plurality of power semiconductor elements 1 or a plurality of external connection terminals. The electrical wiring can be formed.

  The wiring from the emitter electrode 3 of the power semiconductor element 1 can be formed by the metal members 6 and 1002 on the upper side of the multilayer substrate 102a through the metal block 5, while the collector electrode 2 and the control wiring pattern are the multilayer substrate. The lower metal member 8 can be formed of 102b. By forming wiring with the metal members 6, 8, and 1002 of the pair of upper and lower laminated substrates 102a and 102b, not only a very compact power semiconductor device 101 can be realized, but also the wiring length can be minimized and loss can be reduced. Can be reduced.

  By the way, the insulating layer 12b in the multilayer substrate 102b is formed in advance on the metal plate 11b, so that the soft insulating layer 12b can be brought into contact with the power semiconductor element 1 from above while being planarly supported. Further, the metal plates 11a and 11b are made of copper or aluminum, or an alloy or a laminated plate containing them as a main component so that the metal plates 11a and 11b themselves can be uniformly pressed without being deformed when contacting the mold 17. The thickness is preferably 0.1 mm or more. Moreover, in order to ensure favorable heat dissipation, it is preferable to set it as about 3 mm or less.

  The insulating layers 12a and 12b are made of epoxy or the like (same quality as the filling resin 18). In particular, the insulating layer 12b fixed to the metal plate 11b is a semi-cured state (B stage state). The power semiconductor device 101 can be manufactured while suppressing damage to the element 1.

  Specifically, the power semiconductor element 1 is mounted on the metal plate 11a, the insulating layer 12a, the metal member 6, and the metal block 5, and the insulating layer 12a is in a state where the curing is almost completed. Next, after the metal block 7, the metal member 8, the insulating layer 12 b, and the metal plate 11 b are arranged, the filling resin 18 is brought into contact with the surfaces 111 and 121 of the upper and lower metal plates 11 a and 11 b by the mold 17 and heated. Fill. At this time, if the insulating layer 12b is in a semi-cured state, it can be easily deformed by the pressure at the time of contacting the mold 17 and at the time of resin injection. For this reason, damage to the power semiconductor element 1 can be prevented.

  Further, a columnar member (first columnar member) serving as a spacer for controlling the height between the surfaces 111 and 121 of the pair of upper and lower metal plates 11a and 11b may be attached to the metal members 6 and 8 in advance at appropriate positions. . For example, a plurality of columnar members (members such as the bent portion 22 in FIG. 9) that expand the pair of metal members 6 and 8 to a predetermined width where they do not interfere with other components and support them are provided. If formed so as to avoid the power semiconductor element 1, the metal members 6 and 8 are fixed by the plurality of columnar members.

  By doing so, the accuracy of the height between the metal plates 11a and 11b is controlled by the plurality of columnar members. Therefore, if the columnar members ensure the desired member accuracy, the pair of metal members 6 and 8 are stacked. The parallelism of the surfaces 111 and 121 of the upper and lower metal plates 11a and 11b thus obtained is obtained, and when the die 17 comes into contact, pressure is generated and the power semiconductor element 1 is damaged or the metal plates 11a and 11b are damaged. It is possible to prevent excessive resin from entering the surface of the resin.

  Further, when the electrical wiring is formed with the metal members 6 and 8, the exposed insulating layers 12a and 12b are provided around the metal members 6 and 8 as much as possible around the electrical wiring except for the portion extending as the wiring. It is good. By doing so, the metal members 6 and 8 are unlikely to have good adhesion to the filling resin 18, but the insulating layers 12 a and 12 b having excellent adhesion in the vicinity thereof are firmly bonded to the filling resin 18. The metal members 6 and 8 are preferable since there is no progress of peeling.

<A-3. Effect>
According to the first embodiment of the present invention, in a power semiconductor device, a power semiconductor element 1 that is a first power semiconductor element and a metal member that is a pair of first metal members arranged with the power semiconductor element 1 interposed therebetween. 6, 8; a pair of insulating layers 12a, 12b stacked on metal plates 11a, 11b which are a pair of heat sinks with a pair of metal members 6, 8 sandwiched therebetween; at least the power semiconductor element 1; Members 6 and 8 and a filling resin 18 filled to cover the pair of insulating layers 12a and 12b, and the pair of insulating layers 12a and 12b and the filling resin 18 have substantially the same thermal expansion coefficient, It has sufficient heat dissipation performance, and it is possible to prevent the insulation from deteriorating due to the difference in thermal expansion between the insulating layers 12a and 12b and the filling resin 18 and deterioration.

  Further, according to the first embodiment of the present invention, in the power semiconductor device, the pair of insulating layers 12a and 12b and the filling resin 18 are made of the same material, so that they have sufficient heat dissipation performance, and Further, it is possible to prevent the insulation from deteriorating due to the difference in thermal expansion between the insulating layers 12a and 12b and the filling resin 18 and degrading the insulation.

  Further, since the insulating layers 12a and 12b made of resin are provided so as to sandwich the power semiconductor element 1, even if the parallelism of the pair of upper and lower metal plates 11a and 11b is biased, the bias is offset by the insulating layers 12a and 12b. Therefore, the power semiconductor device 1 can be manufactured without damaging the power semiconductor element 1.

  Moreover, it is excellent in adhesiveness with the filling resin 18, suppresses peeling between the insulating layers 12a and 12b and the filling resin 18, and improves the insulation performance of the power semiconductor device.

  Further, according to the first embodiment of the present invention, in the power semiconductor device, the filling resin 18 is opposite to the power semiconductor element 1 that is the first power semiconductor element of the metal plates 11a and 11b that are the pair of heat sinks. By covering and filling the area excluding the side surfaces 111 and 121, sufficient heat dissipation performance can be ensured.

  In addition, according to the first embodiment of the present invention, in the power semiconductor device, the metal members 6 and 8 that are the pair of first metal members are electrically separated from each other and on at least one of the pair of insulating layers 12a and 12b. The metal member 1002 which is the 2nd metal member arrange | positioned in this is further provided, and the metal member 1002 is electrically connected with the power semiconductor element 1 which is a 1st power semiconductor element, The metal member 1002 is made into a power semiconductor element. Therefore, the module size of the power semiconductor device can be reduced.

  Further, according to the first embodiment of the present invention, in the power semiconductor device, the metal member 1002 that is the second metal member includes a plurality of electrical wirings connected to the power semiconductor element 1 that is the first power semiconductor element. By including, it becomes possible to mount with high density, and the module size of the power semiconductor device can be reduced.

  According to the first embodiment of the present invention, the power semiconductor device further includes the first columnar member that supports the pair of metal plates 11a and 11b between the metal plates 11a and 11b that are the pair of heat radiating plates. Thus, the height between the metal plates 11a and 11b can be adjusted, and the parallelism of the surfaces 111 and 121 of the metal plates 11a and 11b can be ensured.

  Further, according to the first embodiment of the present invention, in the power semiconductor device, the power semiconductor element 1 as the first power semiconductor element is made of silicon carbide, so that the heat can be efficiently generated even at a high temperature. It can be transported to the outside of the apparatus, and heat can be prevented from being accumulated inside the apparatus, and organic materials such as the filling resin 18 and other electronic components can be prevented from being deteriorated by heat.

<B. Second Embodiment>
<B-1. Configuration>
A second embodiment of the present invention will be described. FIG. 4 is a diagram showing a power semiconductor device according to the second embodiment. As in the first embodiment, the power semiconductor element 1a has the collector electrode 2a on the lower metal block 5a and the emitter electrode 3a on the upper side. The power semiconductor element 1b as the second power semiconductor element is configured such that the collector electrode 2b is on the upper metal block 5b and the emitter electrode 3b is on the lower metal block 7b. The power semiconductor elements 1a and 1b are switched upside down.

  Specifically, a power semiconductor element 1a sandwiched in the same configuration as in the first embodiment and a power semiconductor element 1b sandwiched in an upside down configuration are provided, and the power semiconductor element 1b includes an insulating layer. A metal member 6b as a third metal member is disposed on 12a, and a metal block 7b is disposed thereon. The power semiconductor element 1b is disposed on the metal block 7b, and the metal block 5b, the metal member 8b as the third metal member, and the insulating layer 12b are disposed thereon. The collector electrode 2b of the power semiconductor element 1b is The emitter electrode 3b is in contact with the metal block 5b side. A metal member 1003, which is a fourth metal member, is disposed on the insulating layer 12b. The metal member 1003 is electrically separated from the metal member 8b, and is a power semiconductor that is a second power semiconductor element via a wire 16b. It is connected to the element 1b.

  The second embodiment is, for example, a power semiconductor device 103 in which a plurality of power semiconductor elements 1a and 1b are connected in series by switching the vertical direction. In the wiring using the metal member 1002 on one side, the wiring is drawn out in the horizontal direction. In the case of the second embodiment, compact wiring can be easily performed by forming wiring with a wiring pattern made up of a pair of upper and lower metal members 1002 and 1003. Can be formed.

<B-2. Manufacturing method>
Further, the control wiring of the power semiconductor element 1b is wired by the upper metal member 1003. In this case, the wire 16b is pulled out from the control electrode of the power semiconductor element 1b and joined to the upper metal member 1003. However, as shown in FIG. Through the process of manufacturing the bonded multilayer substrate assemblies 201a and 201b (FIG. 5A), the upper multilayer substrate assembly 201b is turned over and the pair of upper and lower multilayer substrate assemblies 201a and 201b are bonded together (FIG. 5B). )), A power semiconductor device 103 capable of wire bonding can be realized without impairing productivity (FIG. 5C).

  According to the second embodiment, a compact power semiconductor device 103 can be obtained. Moreover, although FIG. 4 demonstrated based on the example which mounted a pair of power semiconductor element 1a, 1b connected in series, many power semiconductor elements with which the upper and lower electrodes exchanged and the upper and lower electrodes are the same direction are many. Needless to say, the mounted power semiconductor device can also be manufactured, and can be applied to various combinations of circuit configurations.

  The stacked substrate assemblies 201a and 201b shown in FIG. 5 can be manufactured by manufacturing the same stacked substrate assembly when the same power semiconductor elements are arranged in series, and turning one of them upside down. It is not necessary to create a different shape for each substrate assembly, and it can be easily manufactured.

<B-3. Effect>
According to the second embodiment of the present invention, in the power semiconductor device, the power semiconductor element 1a that is the first power semiconductor element and the electrode are opposite to each other between the pair of metal members 6b and 8b that are the third metal members. Is further provided with a power semiconductor element 1b, which is a second power semiconductor element, disposed between the pair of insulating layers 12a, 12b, and is electrically separated from the metal members 6b, 8b, which are a pair of third metal members. The metal member 1003 is a fourth metal member disposed on at least one of the insulating layers 12a and 12b, and the metal member 1003 is electrically connected to the power semiconductor element 1b, thereby insulating the upper and lower sides. Wiring can be formed using the layers 12a and 12b efficiently, and the power semiconductor device can be made compact. In addition, the inductance can be reduced.

<C. Embodiment 3>
<C-1. Configuration>
Embodiment 3 of the present invention will be described. FIG. 6 is a diagram showing the power semiconductor device according to the third embodiment. In the power semiconductor element 1c, the collector electrode 2c is connected to the lower metal block 5c and the metal member 6c.

  On the other hand, the emitter electrode 3c of the power semiconductor element 1c is connected to the collector electrode 2d of the power semiconductor element 1d. Further, the point that the emitter electrode 3d of the power semiconductor element 1d is connected to the upper metal block 7d and the metal member 8d is the same as in the first embodiment.

  In the third embodiment, an intermediate wiring member 19 is provided between the emitter electrode 3c of the power semiconductor element 1c and the collector electrode 2d of the power semiconductor element 1d, and the emitter electrode 3c and the power semiconductor of the power semiconductor element 1c. The element 1d is connected to the collector electrode 2d through the intermediate wiring member 19. That is, the power semiconductor element 1 c that is the first power semiconductor element is stacked with the intermediate wiring member 19 interposed therebetween.

  On the other hand, FIG. 6 also shows a power semiconductor element 1e and a power semiconductor element 1f, and the collector electrode 2e of the power semiconductor element 1e is connected to the same metal member 6c as the collector electrode 2c of the power semiconductor element 1c. The emitter electrode 3e of the element 1e and the collector electrode 2f of the power semiconductor element 1f are connected to the same polarity part of the intermediate wiring member 19.

  The emitter electrode 3c of the power semiconductor element 1c and the collector electrode 2d of the power semiconductor element 1d are also connected to the same polarity part of the intermediate wiring member 19, and the emitter electrode 3f of the power semiconductor element 1f is the emitter electrode of the power semiconductor element 1d. It is connected to the same metal member 8d as 3d.

  FIG. 7 shows an example of a basic circuit configuration of the power semiconductor device according to the third embodiment. As shown in FIG. 7A, the combination of the transistor elements A and B and the diode elements C and D is a half-bridge circuit. A circuit in which two are connected in parallel to form a bridge circuit becomes a single-phase full-bridge circuit shown in FIG.

  Moreover, as shown in FIG.7 (c), direct-current power is converted into a three-phase alternating current by the three-phase half bridge circuit which connected three half bridge circuits of Fig.7 (a) in parallel. That is, the transistor elements A and B in FIG. 7A correspond to the power semiconductor elements 1c and 1e, and the diode elements C and D correspond to the power semiconductor elements 1d and 1f.

  The configuration of the third embodiment is a half-bridge circuit, and FIGS. 7B and 7C can be easily manufactured by appropriately arranging these configurations.

<C-2. Manufacturing method>
The power semiconductor device according to the third embodiment is manufactured through the following manufacturing process. First, the insulating layer 12c and the metal member 6c are previously laminated on the metal plate 11c by hot pressing. This is referred to as a laminated substrate 102c. Similarly, a laminate in which an insulating layer 12d and a metal member 8d are laminated on a metal plate 11d is referred to as a laminated substrate 102d.

  Next, the metal blocks 5c and 5e and the power semiconductor elements 1c and 1e are mounted on the metal member 6c of each multilayer substrate 102c by a method such as soldering or conductive resin bonding. On the other hand, the power semiconductor elements 1d and 1f are similarly mounted on the intermediate wiring member 19 by a method such as soldering or conductive resin.

  Next, the laminated substrate 102c on which the power semiconductor elements 1c and 1e are mounted and the intermediate wiring member 19 are overlapped, and further, the laminated substrate 102d is stacked and bonded by a method such as soldering or conductive adhesion. assemble. The metal blocks 7d and 7f are stacked on the side where the power semiconductor elements 1d and 1f are mounted, and the stacked substrate 102d is further stacked thereon in the order of the metal member 8d, the insulating layer 12d, and the metal plate 11d. .

  At this time, the intermediate wiring member 19 is provided with a jig (first columnar member or the like) for controlling the height with respect to the surface 111a of the metal plate 11c, and the power of the intermediate wiring member 19 with respect to the surface 111a of the metal plate 11c. The height of the semiconductor element mounting surface 20 is accurately controlled. Further, in some cases, the height of the power semiconductor element mounting surface 20 of the intermediate wiring member 19 and the surface 121b of the metal plate 11d is adjusted by a jig and controlled.

  According to the third embodiment described above, since the half bridge circuits as the basic configuration of the power circuit can be stacked in the vertical direction, wiring members such as bonding wires and lead terminals that are wired for each electrode of the power semiconductor element become unnecessary. A very compact and highly productive structure can be realized. In particular, by pulling out the output terminal of the power semiconductor device by the intermediate wiring member 19, it is possible to collect the wiring required for electrical connection from each power semiconductor element.

  In addition, since the transistor elements and diode elements in the half-bridge circuit are evenly dissipated from the upper and lower metal plates, there is no unbalance in temperature rise between the power semiconductor elements, and heat is dissipated very efficiently, resulting in a temperature rise. Can be suppressed.

  Further, even if the power semiconductor elements are stacked in the vertical direction, the metal against the stress on the power semiconductor element when the mold 17 is in contact with the resin and the resin intrusion into the surfaces 111a and 121b of the metal plates 11c and 11d. The insulating layers 12c and 12d between the plates 11c and 11d and the metal members 6c and 8d are sufficiently soft to absorb the stress and improve the adhesion to the mold 17, thereby causing damage to each power semiconductor element and resin burrs. Can be reduced.

  In the third embodiment, the power semiconductor elements 1c and 1e and the power semiconductor elements 1d and 1f are connected to one metal member 6c and 8d, respectively, but (A) and (B) in FIG. As shown in FIG. 8, when the metal member 61c and the metal member 62c are divided, for example, when the metal members are connected by the bonding wire 21a or the ribbon 21b, the power semiconductor elements 1c and 1d and the power semiconductor element Since 1e and 1f have a structure of independent suspension with respect to the mold contact, they can be deformed independently and flexibly, and damage to the power semiconductor element can be further reduced.

  In FIG. 9, a part of the wiring member is bent from the intermediate wiring member 19 toward the metal plate 11 c that is a heat radiating plate to form a bent portion 22 as a second columnar member that contacts the metal member 1000. The bent portion 22 may be in contact with the insulating layer 12c. However, if the metal member 1000 for contacting the bent portion 22 is separately provided so as to contact the metal member 1000, the stress caused by the bent portion 22 is caused. Therefore, the insulating layer 12c is not damaged.

  With the bent portion 22, the height and parallelism between the surface 111 a of the metal plate 11 c and the intermediate wiring member 19 can be secured. The bent portion 22 is formed integrally with the intermediate wiring member 19 by bending. If the bending accuracy is taken into account, the height accuracy can be ensured. Therefore, even when a plurality of power semiconductor elements are stacked, they can be accurately stored in the mold 17 during resin filling without being affected by variations in thickness.

  Further, the bent portion 22 may be formed so as to be bent also on the upper side between the intermediate wiring members 19, supporting the upper metal plate 11 d, and the height accuracy between the surface 121 b of the metal plate 11 d and the intermediate wiring member 19. Can be secured. Of course, a height control member may be attached between the flat intermediate wiring members 19 later.

  Furthermore, a columnar member such as a pin for controlling the height between the intermediate wiring members 19 is attached to the metal members 6c and 8d previously laminated on the surfaces 111a and 121b of the metal plates 11c and 11d, so that the power semiconductor element, the intermediate The wiring member 19 may be laminated. In this way, since the flat intermediate wiring member 19 can be used for manufacturing, the space for storing the wiring member can be reduced at the time of manufacturing, and the space can be reduced when the equipment is flowed to the facility. High value on.

<C-3. Effect>
According to the third embodiment of the present invention, in the power semiconductor device, the power semiconductor element that is the first power semiconductor element includes the pair of power semiconductor elements 1c and 1e stacked with the intermediate wiring member 19 interposed therebetween. Thus, the required wiring can be minimized. Further, since the intermediate wiring member 19 can be supported in the height direction, the height accuracy is increased, and element damage and resin burrs when contacting the mold 17 can be reduced. Since each power semiconductor element is directly mounted and electrically connected to the intermediate wiring member 19, wiring for electrically connecting the power semiconductor element to the wiring member becomes unnecessary.

  According to the third embodiment of the present invention, in the power semiconductor device, the intermediate wiring member 19 further includes the bent portion 22 that is the second columnar member that supports the metal plates 11a and 11b that are the pair of heat radiating plates. By providing, the height and parallelism between the surface 111a of the metal plate 11c and the intermediate wiring member 19 can be ensured.

<D. Embodiment 4>
<D-1. Configuration>
Embodiment 4 of the present invention will be described. FIG. 10 is a schematic cross-sectional view showing the power semiconductor device according to the fourth embodiment. The power semiconductor device according to the fourth embodiment has a structure in which a metal member 26 is newly provided and an electronic component is mounted on the metal member 26 with respect to the power semiconductor device 101 shown in the first embodiment.

  The electronic component provided on the metal member 26 protects the electronic component group 104 such as the passive component group 23, ICs 24 and 25, or the power semiconductor device necessary for driving the power semiconductor, that is, controlling the transistor gate, for example. For example, a thermistor for detecting the temperature inside the power semiconductor device or a shunt resistor for measuring current is necessary.

<D-2. Operation>
It goes without saying that the circuit device can be made more compact as these components are arranged closer to the power semiconductor element, but the electronic components necessary for the circuit for controlling the transistor gate are closer to the power semiconductor element. Arrangement also improves the controllability of the gate. Moreover, noise tolerance is also improved.

  Furthermore, a temperature measuring element, a current detection element, and the like are provided in the wiring portion of the power semiconductor element so that the temperature or current of the power semiconductor element can be detected, and the protection function of the power semiconductor device can be enhanced.

  Since these electronic components can be mounted in the same process as the mounting of the power semiconductor element, manufacturing rationalization can be realized. Further, by forming a wiring pattern with the metal member 1002, more complicated circuit patterns can be formed on the insulating layers 12a and 12b on the metal plates 11a and 11b, so that the power semiconductor is very compact and has high functionality. An apparatus can be realized.

  Of course, the electronic component can be easily mounted on the upper and lower metal members by mounting the upper metal plate not only on the metal member on one side but also on the upper and lower metal members in advance. Can be made even more compact.

<D-3. Effect>
According to the fourth embodiment of the present invention, the power semiconductor device further includes an electronic component group 104 that is an electronic component arranged on the metal member 1002 that is the second metal member, thereby driving the power semiconductor element. The electronic components to be placed can be arranged closest to each other, and the driving speed is improved and the balance is improved. In addition, the noise tolerance is improved. Further, the power semiconductor device can be made compact.

  1, 1a, 1b, 1c, 1d, 1e, 1f Power semiconductor element, 2, 2a, 2b, 2c, 2d, 2e, 2f Collector electrode, 3, 3a, 3b, 3c, 3d, 3e, 3f Emitter electrode, 4 Control electrode 5, 5a, 5b, 5c, 5e, 7, 7a, 7b, 7d, 7f Metal block, 6, 6a, 6b, 6c, 8, 8a, 8b, 8d, 26, 61c, 62c, 1000, 1002 , 1003 Metal member, 11a, 11b, 11c, 11d Metal plate, 12a, 12b, 12c, 12d Insulating layer, 16, 16b Wire, 17 Mold, 18 Filling resin, 19 Intermediate wiring member, 20 Semiconductor element mounting surface, 21a Bonding wire, 21b Ribbon, 22 Bent part, 23 Passive component group, 101, 103 Power semiconductor device, 102a, 102b, 102c, 102 Layered substrate, 104 an electronic component group, 111, 111a, 121,121B surface, 201a, 201b laminated substrate assembly 1001 solder layer.

Claims (11)

A first power semiconductor element;
A pair of first metal members disposed across the first power semiconductor element;
A pair of insulating layers stacked on a pair of heat sinks across the pair of first metal members;
At least the first power semiconductor element, the pair of first metal members, and a filled resin filled to cover the pair of insulating layers,
The pair of insulating layers and the filling resin have substantially the same coefficient of thermal expansion,
Power semiconductor device. The pair of insulating layers and the filling resin are the same kind of material.
The power semiconductor device according to claim 1. The filling resin is filled so as to cover a region excluding the surface of the pair of heat sinks opposite to the first power semiconductor element,
The power semiconductor device according to claim 1 or 2. A second metal member electrically separated from the pair of first metal members and disposed on at least one of the pair of insulating layers;
The second metal member is electrically connected to the first power semiconductor element;
The power semiconductor device according to claim 1. The second metal member includes a plurality of electrical wirings connected to the first power semiconductor element.
The power semiconductor device according to claim 4. The electronic component further disposed on the second metal member,
The power semiconductor device according to claim 4 or 5. A first columnar member that supports the pair of heat sinks between the pair of heat sinks;
The power semiconductor device according to claim 1. A second power semiconductor element sandwiched between a pair of third metal members, wherein the first power semiconductor element and the electrode are disposed between the pair of insulating layers in opposite directions;
A fourth metal member electrically separated from the pair of third metal members and disposed on at least one of the pair of insulating layers;
The fourth metal member is electrically connected to the second power semiconductor element;
The power semiconductor device according to claim 1. The first power semiconductor element is:
Including a pair of power semiconductor elements stacked with an intermediate wiring member interposed therebetween,
The power semiconductor device according to claim 1. The intermediate wiring member further includes a second columnar member that supports the pair of heat sinks.
The power semiconductor device according to claim 9. The first power semiconductor element is made of silicon carbide.
The power semiconductor device according to claim 1.

Images