JP2011077602A - Image transfer device, and image forming device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an image transfer device for allowing a reception side to detect an error in an image control signal. <P>SOLUTION: The image transfer device includes a signal line 3, a transmission circuit 12, and a reception circuit 22. The signal line 3 transmits an image signal and an image control signal used when an image is reproduced from the image signal. The transmission circuit 12 generates an error check signal for the image control signal by a predetermined operation from the image control signal, and multiplexes the image signal, the image control signal, and the error check signal to output to the signal line. The reception circuit 22 demultiplexes the multiplexed image signal, image control signal, and error check signal, and determines whether an error occurs in the image control signal based on the error check signal. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an image transfer apparatus and an image forming apparatus.

  If an error occurs due to noise or the like when transferring an image signal, it may be difficult to reproduce the image on the receiving side. For this reason, various techniques for performing error detection and error correction of an image signal on the receiving side have been proposed (see, for example, Patent Document 1).

  In recent years, integrated circuits have been developed for transferring image signals at high speed in electronic devices. For example, as a standard for transferring an image signal with such an integrated circuit, there is a flat panel display link method.

JP-A-1-103070

  When transferring an image signal, an image control signal (such as a synchronization signal) used when reproducing the image signal is often transferred together with the image signal. In the error detection and error correction described above, error detection and error correction of the image control signal are not taken into consideration, and if an error occurs in the image control signal, it becomes difficult to reproduce the image.

  SUMMARY An advantage of some aspects of the invention is that it provides an image transfer apparatus and an image forming apparatus that can detect an error of an image control signal on a receiving side.

  In order to solve the above problems, the present invention is configured as follows.

  An image transfer apparatus according to the present invention includes an image signal, a signal line for transmitting an image control signal used for reproducing an image from the image signal, and an error check signal of the image control signal by a predetermined calculation from the image control signal. A transmission circuit that multiplexes the image signal, the image control signal, and the error check signal and outputs the multiplexed signal to the signal line, and separates the multiplexed image signal, the image control signal, and the error check signal, based on the error check signal And a receiving circuit for determining whether an error has occurred in the image control signal.

  Thereby, the error detection of the image control signal can be performed on the receiving side of the image signal or the like.

  In addition to the image transfer apparatus described above, the image transfer apparatus according to the present invention may be configured as follows. In this case, the transmission circuit includes a multiplexing circuit that multiplexes signals having a predetermined number of signals, and the reception circuit includes a separation circuit that separates the multiplexed signals into signals having a predetermined number of signals. The multiplexing circuit multiplexes the error check signal using the remaining transmission channels when the number of image signals and image control signals is smaller than the number of transmission channels of the signal line.

  Thereby, it is possible to detect an error of the image control signal on the receiving side of the image signal or the like without providing another signal line for error detection.

  The image transfer apparatus according to the present invention may be as follows in addition to any of the image transfer apparatuses described above. In this case, the multiplexing circuit multiplexes the image signal, the image control signal, and the error check signal by the flat panel display link method and outputs them to the signal line, and the separation circuit has the image signal multiplexed by the flat panel display link method. Separate the image control signal and the error check signal.

  The image transfer apparatus according to the present invention may be as follows in addition to any of the image transfer apparatuses described above. In this case, the multiplexing circuit multiplexes the 28-bit signal, the image signal is a 24-bit signal, the image control signal is a 3-bit signal, and the error check signal is a 1-bit signal. .

  The image transfer apparatus according to the present invention may be as follows in addition to any of the image transfer apparatuses described above. In this case, the reception circuit generates an error check signal from the image control signal by the same calculation as the transmission circuit, and compares the error check signal received from the transmission circuit with the error check signal generated by the reception circuit. It is determined whether or not an error has occurred in the image control signal based on the error check signal.

  The image transfer apparatus according to the present invention may be as follows in addition to any of the image transfer apparatuses described above. In this case, when the receiving circuit determines that an error has occurred in the image control signal based on the error check signal, the image control signal received immediately before instead of the image control signal in which the error has occurred. Is output.

  An image forming apparatus according to the present invention includes any of the above-described image transfer apparatuses.

  Thereby, when image data is transferred in the image forming apparatus, an error of the image control signal can be detected on the receiving side of the image signal or the like.

  The image forming apparatus according to the present invention may be configured as follows in addition to the image forming apparatus described above. In this case, the transmission circuit is provided in a first circuit board having a circuit group for generating scan image data using a scanner, and the reception circuit is a second circuit having a circuit group for performing image processing on the scan image data. The transmission circuit provided on the substrate transfers the scan image data as an image signal and an image control signal from the first circuit substrate to the second circuit substrate.

  According to the present invention, it is possible to obtain an image transfer apparatus and an image forming apparatus that perform error detection of an image control signal on the receiving side of an image signal or the like.

FIG. 1 is a block diagram showing a configuration of an image transfer apparatus according to an embodiment of the present invention. FIG. 2 is a circuit diagram showing a configuration of the transmission circuit in FIG. FIG. 3 is a circuit diagram showing a configuration of the receiving circuit in FIG.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a block diagram showing a configuration of an image transfer apparatus according to an embodiment of the present invention.

  The image transfer apparatus shown in FIG. 1 includes a circuit board 1, a circuit board 2, and signal lines 3 that connect the circuit boards 1 and 2. The circuit board 1 is provided with a circuit group 11 for performing predetermined processing and a transmission circuit 12, and the circuit board 2 is provided with a circuit group 21 for performing predetermined processing and a receiving circuit 22. Yes. When image data is transferred from the circuit group 11 of the circuit board 1 to the circuit group 21 of the circuit board 2, the transmission circuit 12 transfers the image data to the reception circuit 22 via the signal line 3 by a predetermined method. At this time, the signal line 3 transmits an image signal and an image control signal used when an image is reproduced from the image signal.

  The image transfer apparatus is built in an image forming apparatus such as a scanner or a multifunction peripheral. The circuit group 11 generates scan image data using the scanner, and the circuit group 21 performs image processing on the scan image data. Execute. Then, the transmission circuit 12 transfers the scan image data from the circuit board 1 to the circuit board 2 as an image signal and an image control signal.

  The transmission circuit 12 generates an error check signal of the image control signal by a predetermined calculation from the image control signal, multiplexes the image signal, the image control signal, and the error check signal and outputs the multiplexed signal to the signal line.

  FIG. 2 is a circuit diagram showing a configuration of the transmission circuit 12 in FIG. As illustrated in FIG. 2, the transmission circuit 12 includes a multiplexing circuit 31 and an XOR circuit 32. As the multiplexing circuit 31, for example, “DS09CF383B + 3.3V Programmable LVDS Transmitter 24-bit Flat Panel Display (FPD) Link-65 MHz” manufactured by National Semiconductor Corporation can be used.

  The multiplexing circuit 31 multiplexes a predetermined number of signals. In this embodiment, 28-bit parallel signals can be multiplexed by a flat panel display link (FPD-LINK) system and output to the four signal lines 3 as 4-bit serial signals. That is, in this embodiment, the transmission circuit 12 can provide 28 transmission channels and transfer 28-bit signals through the four signal lines 3.

  The XOR circuit 32 calculates the parity of the image control signal and outputs it as a 1-bit error check signal. In this embodiment, a 1-bit horizontal synchronization signal HSYNC, a 1-bit vertical synchronization signal VSYNC, and a 1-bit data enable signal DATA_ENABLE are image control signals, and the XOR circuit 32 is exclusive of these three signals. Calculate logical sum as parity. Therefore, the multiplexing circuit 31 multiplexes the RGB 8-bit image signal, the 3-bit image control signal, and the 1-bit error check signal, and outputs a 4-bit serial signal.

  The multiplexing circuit 31 multiplexes the error check signal using the remaining transmission channels because the number of image signals and image control signals (here, 27) is smaller than the number of transmission channels of the signal line (here, 28). Turn into.

  The receiving circuit 22 receives a serial signal from the signal line 3 and separates the multiplexed image signal, image control signal, and error check signal, and an error occurs in the image control signal based on the error check signal. It is determined whether or not.

  FIG. 3 is a circuit diagram showing a configuration of the receiving circuit 22 in FIG. As illustrated in FIG. 3, the reception circuit 22 includes a separation circuit 51, an XOR circuit 52, a comparison circuit 53, a selector 54, and a holding circuit 55. As the separation circuit 51, for example, “DS09CF386 + 3.3V LVDS Receiver 24-bit Flat Panel Display (FPD) Link-85 MHz” manufactured by National Semiconductor Corporation can be used.

  The separation circuit 51 separates the multiplexed signal into a predetermined number of signals. In this embodiment, a 4-bit serial signal is separated into a 28-bit parallel signal by a flat panel display link (FPD-LINK) system. In this embodiment, the multiplexed 24-bit image signal, 3-bit image control signal, and 1-bit error check signal are separated and output as a 28-bit parallel signal.

  The XOR circuit 52 calculates the parity of the separated image control signal and outputs it as a 1-bit error check signal. In this embodiment, a 1-bit horizontal synchronization signal HSYNC, a 1-bit vertical synchronization signal VSYNC, and a 1-bit data enable signal DATA_ENABLE are image control signals. Calculate logical sum as parity.

  The comparison circuit 53 compares the error check signal ERROR_CHECK received from the transmission circuit 12 with the error check signal generated by the reception circuit 22, and determines whether an error has occurred in the image control signal based on the error check signal. judge. The comparison circuit 53 outputs a 1-bit value corresponding to the comparison result to the selector 54.

  When the values of the two error check signals are the same according to the output value of the comparison circuit 53 (that is, when no error has occurred in the image control signal), the selector 54 outputs 3 from the separation circuit 3. When a bit image control signal is output and the values of the two error check signals are not the same (that is, when an error has occurred in the image control signal), one clock before held in the holding circuit 55 The 3-bit image control signal is output.

  The holding circuit 55 operates with a predetermined clock, holds the output value (3 bits) of the selector 54, and updates the held value with the output value of the selector 54 every clock cycle. The holding circuit 55 is configured by, for example, a D flip-flop.

  Next, the operation of the above apparatus will be described.

  When transferring image data from the circuit group 11 of the circuit board 1 to the circuit group 21 of the circuit board 2, the circuit group 11 sends an image signal (24 bits in this embodiment) and an image control signal (this implementation) to the transmission circuit 12. 3 bits are supplied in the form of

  In the transmission circuit 12, the XOR circuit 32 generates an error check signal from the image control signal, and the multiplexing circuit 31 multiplexes the image signal, the image control signal, and the error check signal in synchronization with a predetermined clock.

  In this way, the image data is output from the transmission circuit 12 to the signal line 3 as an image signal, an image control signal, and an error check signal.

  In the reception circuit 22, the separation circuit 51 receives four serial signals from the signal line 3 and separates them into an image signal, an image control signal, and an error check signal. The image signal is output to the circuit group 21. The image control signal is output to the XOR circuit 52 and the selector 54.

  Then, the XOR circuit 52 generates an error check signal from the separated image control signal. The comparison circuit 53 determines whether or not the value of the separated error check signal and the value of the error check signal generated by the XOR circuit 52 are the same, and the determination result (that is, the comparison result) is used as the selector 54. To supply. In this embodiment, the output value of the comparison circuit 53 is 1 when the values of the two error check signals are the same, and is 0 when the values of the two error check signals are different.

  When the output value of the comparison circuit 53 is 1 (that is, when no error has occurred), the selector 54 outputs the separated image control signal to the circuit group 21 as it is. On the other hand, when the output value of the comparison circuit 53 is 0 (that is, when an error has occurred), the selector 54 outputs the image control signal one clock before held in the holding circuit 55 to the circuit group 21. Output to. Since the image control signal has little temporal change, even if a value one clock before is used, a problem hardly occurs.

  As described above, the image transfer apparatus according to the above embodiment includes the image signal, the signal line 3 for transmitting the image control signal used when reproducing the image from the image signal, and the predetermined calculation from the image control signal. A transmission circuit 12 that generates an error check signal of the image control signal, multiplexes the image signal, the image control signal, and the error check signal and outputs them to the signal line, and the multiplexed image signal, image control signal, and error check signal And a receiving circuit 22 that determines whether an error has occurred in the image control signal based on the error check signal.

  Thereby, the error detection of the image control signal can be performed on the receiving side of the image signal or the like.

  The above-described embodiments are preferred examples of the present invention, but the present invention is not limited to these, and various modifications and changes can be made without departing from the scope of the present invention. is there.

  For example, in the above embodiment, the parity of the image control signal is used as the value of the error check signal, but other codes may be used.

  The present invention can be applied to transfer of an image signal and its accompanying signal in an image forming apparatus such as a printer, a scanner, or a multifunction peripheral.

1 Circuit board (an example of a first circuit board)
2 Circuit board (an example of a second circuit board)
3 Signal line 12 Transmission circuit 22 Reception circuit 31 Multiplexing circuit 51 Separation circuit

Claims (8)

A signal line for transmitting an image signal and an image control signal used when reproducing an image from the image signal;
A transmission circuit that generates an error check signal of the image control signal by a predetermined calculation from the image control signal, multiplexes the image signal, the image control signal, and the error check signal and outputs the multiplexed signal to the signal line;
A receiving circuit that separates the multiplexed image signal, the image control signal, and the error check signal, and determines whether an error has occurred in the image control signal based on the error check signal;
An image transfer apparatus comprising: The transmission circuit includes a multiplexing circuit that multiplexes a predetermined number of signals,
The receiving circuit includes a separation circuit that separates multiplexed signals into the predetermined number of signals,
The multiplexing circuit multiplexes the error check signal using the remaining transmission channels when the number of signals of the image signal and the image control signal is less than the number of transmission channels of the signal line;
The image transfer apparatus according to claim 1. The multiplexing circuit multiplexes the image signal, the image control signal and the error check signal in a flat panel display link method, and outputs the multiplexed signal to the signal line,
The separation circuit separates the image signal, the image control signal and the error check signal multiplexed by a flat panel display link method;
The image transfer apparatus according to claim 2. The multiplexing circuit multiplexes a 28-bit signal,
The image signal is a 24-bit signal,
The image control signal is a 3-bit signal,
The error check signal is a 1-bit signal;
The image transfer apparatus according to claim 3.   The reception circuit generates an error check signal from the image control signal by the same calculation as the transmission circuit, and compares the error check signal received from the transmission circuit with the error check signal generated by the reception circuit The image transfer apparatus according to claim 1, wherein it is determined whether an error has occurred in the image control signal based on the error check signal.   When it is determined that an error has occurred in the image control signal based on the error check signal, the receiving circuit receives the image received immediately before instead of the image control signal in which an error has occurred. The image transfer apparatus according to claim 1, wherein a control signal is output.   An image forming apparatus comprising the image transfer apparatus according to claim 1. The transmission circuit is provided on a first circuit board having a circuit group for generating scan image data using a scanner,
The receiving circuit is provided on a second circuit board having a circuit group for performing image processing on the scanned image data,
The transmission circuit transfers the scan image data as the image signal and the image control signal from the first circuit board to the second circuit board;
The image forming apparatus according to claim 7.

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