JP2011062034A - Charging circuit for secondary battery - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a charging circuit for a secondary battery, having a miniaturized current control element without increasing an output drive capability of an amplifier circuit, and having high efficiency and small chip area. <P>SOLUTION: The charging circuit employs an NMOS transistor M33 in which a gate of a PMOS transistor M31 as a current control element is connected to a grounding terminal having a voltage for controlling the PMOS transistor M31 so that the ON-resistance of the PMOS transistor M31 becomes smaller than the ON-resistance of the PMOS transistor M31 when the PMOS transistor M31 is controlled by a first amplifier circuit 31. The NMOS transistor M33 is turned on in response to a rapid charging switching signal, thereby connecting the gate of the PMOS transistor M31 to the grounding terminal. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a charging circuit for a secondary battery used in a portable electronic device, and more particularly to a charging circuit for a secondary battery provided with a small current charging mode in addition to a quick charging mode.

  The charging circuit for the secondary battery usually includes a plurality of charging modes with different charging methods depending on the battery voltage and the charging current. In the charging mode generally used in the case of a lithium ion battery, (a) when the voltage of the secondary battery is less than the overdischarge voltage, a small current is charged with a relatively small constant current until the overdischarge voltage is exceeded. Charge mode, (b) Constant current charge mode for charging with a constant current due to a large current when the secondary battery voltage is equal to or higher than the overdischarge voltage, (c) Full charge when the full charge voltage is reached during constant current charging There are a constant voltage charging mode in which charging is performed with a voltage, and (d) a complementary charging mode in which charging is performed with a constant current after a charging completion signal is output after the charging current becomes less than a predetermined charging current during the constant voltage charging mode.

  FIG. 3 is a circuit diagram showing a charging circuit according to the prior art. The charging circuit of FIG. 3 has the above-described charging mode, and includes a power supply circuit 10 using an AC-DC converter, a quick charging circuit 20 that performs rapid charging by constant current charging and constant voltage charging, and charging with a small current. And a voltage control circuit 40 for controlling the DC voltage Vdd output from the power supply circuit 10. The charging circuit includes a terminal T1 and a terminal T2 for connecting the secondary battery BAT. A positive electrode of the secondary battery BAT is connected to the terminal T1, and a negative electrode is connected to the terminal T2. In addition, a quick charge switching signal for switching between quick charge and small current charge is input from an external circuit (not shown).

  The power supply circuit 10 is an AC-DC converter that receives AC 100 V and outputs a DC voltage Vdd for charging the secondary battery BAT from the output terminal Vout. The power supply circuit 10 includes a voltage control input terminal Vcnt for controlling the DC voltage Vdd. When the sink current of the input terminal Vcnt is increased, the DC voltage Vdd increases, and when it is decreased, the DC voltage Vdd decreases.

  The quick charging circuit 20 is a charging circuit that operates when the voltage Vbat of the secondary battery BAT is equal to or higher than the overdischarge voltage. When the voltage Vbat of the secondary battery BAT is less than the full charge voltage, a constant current with a predetermined constant current A constant-current charging circuit 201 that performs charging and a constant-voltage charging circuit 202 that performs constant-voltage charging using the full charge voltage when the voltage Vbat reaches the full charge voltage are provided. If the charging current becomes less than a predetermined charging end current value during constant voltage charging, a charging completion signal (not shown) is output to stop charging.

  The constant current charging circuit 201 includes a second amplifier circuit 21, a second reference voltage Vr2, and a current detection resistor R21. A charging current flows through the current detection resistor R21, and the second amplifier circuit 21 controls the gate voltage of the NMOS transistor M1 so that the voltage drop Vcc2 of the current detection resistor R21 becomes equal to the second reference voltage Vr2, The DC voltage Vdd output from the power supply circuit 10 is controlled. The output terminal of the second amplifier circuit 21 is an open drain type in which a transistor is connected to the ground terminal side.

  The constant voltage charging circuit 202 includes a third amplifier circuit 22, a third reference voltage Vr3, and battery voltage detection resistors R22 and R23. The battery voltage detection resistors R22 and R23 are connected in series between the terminal T1 and the ground terminal. The third amplifier circuit 22 controls the gate voltage of the NMOS transistor M1 so that the voltage Vcv at the connection node between the resistor R22 and the resistor R23 becomes equal to the third reference voltage Vr3, and the direct current output from the power supply circuit 10 The voltage Vdd is controlled. Note that the output terminal of the third amplifier circuit 22 is also of an open drain type in which a transistor is connected to the ground terminal side.

  The small current charging circuit 30 is a circuit that performs constant current charging with a predetermined small current, for example, 30 mA, when the voltage Vbat of the secondary battery BAT is less than the overdischarge voltage. When the battery voltage Vbat is less than the overdischarge voltage, charging with a large current may shorten the life of the battery, generate heat, or ignite. Therefore, the battery voltage Vbat must be small until the battery voltage Vbat exceeds the overdischarge voltage. Charge. The small current charging circuit 30 is also used for supplementary charging in which constant current charging is performed with a small current after charging by the quick charging circuit 20 is completed.

  The small current charging circuit 30 includes a first amplifier circuit 31, PMOS transistors M31 and M32, a first reference voltage Vr1, and a resistor R31. The source of the PMOS transistor M31 is connected to the output terminal Vout of the power supply circuit 10, the drain is connected to the terminal T1, and the gate is connected to the output terminal of the first amplifier circuit 31. The source of the PMOS transistor M32 is connected to the output terminal Vout of the power supply circuit 10, the drain is connected to the ground terminal via the non-inverting input terminal of the first amplifier circuit 31 and the resistor R31, and the gate is connected to the PMOS transistor M31. Connected to the gate. Since the PMOS transistors M31 and M32 form a current mirror circuit, a current proportional to the charging current flowing through the PMOS transistor M31 flows through the PMOS transistor M32. Since this current also flows through the resistor R31, the voltage drop Vcc1 of the resistor R31 is a voltage proportional to the charging current.

  The first amplifier circuit 31 controls the gate voltage of the PMOS transistor M31 so that the voltage drop Vcc1 of the resistor R31 is equal to the first reference voltage Vr1. The first amplifier circuit 31 has a control input terminal, and a quick charge switching signal is connected to the control input terminal. When the quick charge switching signal is at a low level, the first amplifier circuit 31 operates. On the other hand, when the quick charge switching signal is at a high level, the first amplifier circuit 31 does not operate and the first amplifier circuit 31 outputs a low level.

  The voltage control circuit 40 controls the DC voltage Vdd output from the power supply circuit 10 when the small current charging circuit 30 is operating. Since the small current charging circuit 30 operates with the DC voltage Vdd output from the power supply circuit 10, if the voltage Vbat of the secondary battery BAT is less than the overdischarge voltage, the operating voltage of the small current charging circuit 30 may not be ensured. is there. Therefore, the voltage control circuit 40 controls the DC voltage Vdd to be equal to or higher than a voltage at which the small current charging circuit 30 can operate. Further, as described above, since the small current charging circuit 30 is also used for the auxiliary charging in this charging circuit, the voltage control circuit 40 controls the DC voltage Vdd to the fully charged voltage of the secondary battery BAT. That is, the voltage control circuit 40 controls the DC voltage Vdd so that the DC voltage Vdd = (the fully charged voltage of the secondary battery BAT) ≧ (the voltage at which the small current charging circuit 30 can operate).

  The voltage control circuit 40 includes a fourth amplifier circuit 41, a fourth reference voltage Vr4, a resistor R41, a resistor R42, a resistor R43, and an NMOS transistor M41. The resistor R41, the resistor R42, and the resistor R43 are connected in series between the output terminal Vout of the power supply circuit 10 and the ground terminal. An NMOS transistor M41 is connected in parallel to the resistor R43 connected to the ground terminal side. A quick charge switching signal is connected to the gate of the NMOS transistor M41.

  A connection node between the resistor R41 and the resistor R42 is connected to the inverting input terminal of the fourth amplifier circuit 41, and a fourth reference voltage Vr4 is connected to the non-inverting input terminal. The output of the fourth amplifier circuit 41 is connected to the gate of the NMOS transistor M1. The fourth amplifier circuit 41 controls the gate voltage of the NMOS transistor M1 so that the voltage Vd at the connection node between the resistor R41 and the resistor R42 becomes equal to the fourth reference voltage Vr4, and the direct current output from the power supply circuit 10 The voltage Vdd is controlled. Note that the output terminal of the fourth amplifier circuit 41 is also of an open drain type in which a transistor is connected to the ground terminal side.

  FIG. 2 is a timing chart showing the operation of the charging circuit. With reference to FIG. 2, the operation of the charging circuit according to the prior art will be described. A current Ichg1 is a charging current when the small current charging circuit 30 is charged, a current Ichg2 is a charging current when the constant current charging circuit 201 is charged, and a current Ichg3 is a charging end current when the constant voltage charging circuit 202 finishes charging. It is. The voltage Vbat of the secondary battery BAT is indicated by a broken line, and the DC voltage Vdd output from the power supply circuit 10 is indicated by a solid line and a one-dot chain line. In addition, a dashed-dotted line is the direct current voltage Vdd in the charging circuit which concerns on the prior art demonstrated here, and a continuous line is the direct current voltage Vdd in the charging circuit which concerns on this invention.

  When the battery voltage Vbat is less than the overdischarge voltage before time t1, the quick charge switching signal is at a low level, and the first amplifier circuit 31 of the small current charging circuit 30 is in an operating state. Further, the NMOS transistor M41 of the voltage control circuit 40 is turned off. Since the NMOS transistor M41 is off, the voltage control circuit 40 controls the gate voltage of the NMOS transistor M1 so that the DC voltage Vdd output from the power supply circuit 10 becomes the value of Expression (1). Note that the reference voltage Vr4, the resistor R41, the resistor R42, and the resistor R43 are set so that the DC voltage Vdd in the equation (1) becomes equal to the full charge voltage of the secondary battery BAT.

[Equation 1]
Vdd = Vr4 × (R41 + R42 + R43) / (R42 + R43) (1)

  The small current charging circuit 30 supplies and charges the secondary battery BAT with a current Ichg1 (for example, 30 mA). At this time, the reference voltage Vr1 and the resistor R31 are set so that the small current charging circuit 30 supplies the current Ichg1. In charging with the current Ichg1, the voltage drop Vcc2 in the current detection resistor R21 is small and smaller than the second reference voltage Vr2. For this reason, the second amplifier circuit 21 outputs a high level, but since the output circuit has an open drain configuration, the final output stage transistor (not shown) of the second amplifier circuit 21 is in an open state. . When the battery voltage Vbat is less than the overdischarge voltage, the voltage Vcv at the connection node between the resistor R22 and the resistor R23 is equal to or lower than the third reference voltage Vr3. For this reason, the third amplifier circuit 22 outputs a high level, but as with the second amplifier circuit 21, the final output stage transistor (not shown) of the third amplifier circuit 22 is in an open state. . As a result, the gate voltage Vo1 of the NMOS transistor M1 is controlled only by the fourth amplifier circuit 41 of the voltage control circuit 40.

  When the battery voltage Vbat becomes equal to or higher than the overdischarge voltage at time t1, the external circuit sets the quick charge switching signal to a high level. As a result, the first amplifier circuit 31 stops its operation and outputs a low level, so that the PMOS transistor M31 is turned on. Thereby, the current Ichg2 flows from the power supply circuit 10 to the secondary battery BAT. For this reason, when the voltage drop Vcc2 of the resistor R21 increases and the voltage drop Vcc2 approaches the second reference voltage Vr2, the voltage output from the second amplifier circuit 21 decreases, and the gate voltage of the NMOS transistor M1 is controlled. . As a result, the second amplifier circuit 21 controls the DC voltage Vdd to a voltage through which the current Ichg2 flows such that the voltage drop Vcc2 of the resistor R21 becomes equal to the second reference voltage Vr2, and constant current charging is performed (hereinafter referred to as “constant current charging”). This is called constant current charging operation.) Note that the current Ichg2 takes the value of equation (2).

[Equation 2]
Ichg2 = Vr2 / R21 (2)

  Further, when the quick charge switching signal becomes high level, the NOMS transistor M41 is turned on. At this time, the voltage control circuit 40 tries to control the DC voltage Vdd output from the power supply circuit 10 so as to have the value of Expression (3). Note that the DC voltage Vdd in Expression (3) is larger than the DC voltage Vdd in Expression (1).

[Equation 3]
Vdd = Vr4 × (R41 + R42) / R42 (3)

  However, at this time, the PMOS transistor M31 is on, and the DC voltage Vdd output from the power supply circuit 10 is lower than the full charge voltage of the secondary battery BAT. Therefore, the voltage Vd at the connection node between the resistors R41 and R42 is lower than the fourth reference voltage Vr4. As a result, the fourth amplifier circuit 41 tries to output a high level, and the final output stage transistor (not shown) of the fourth amplifier circuit 41 is in an open state. Therefore, the voltage control circuit 40 is connected to the NMOS transistor M1. The gate voltage cannot be controlled. Similarly, in the constant voltage charging circuit 202 in the quick charging circuit 20, the voltage Vcv at the connection node between the resistor R22 and the resistor R23 becomes lower than the third reference voltage Vr3, and the final output stage transistor of the third amplifier circuit 22 (Not shown) is in an open state. Therefore, the constant voltage charging circuit 202 cannot control the gate voltage of the NMOS transistor M1.

  As a result, the DC voltage Vdd output from the power supply circuit 10 is controlled only by the second amplifier circuit 21 of the constant current charging circuit 201, and becomes a voltage higher than the battery voltage Vbat as shown by a one-dot chain line in FIG. The difference between the DC voltage Vdd and the battery voltage Vbat is the source-drain voltage of the PMOS transistor M31. This voltage is proportional to the on-resistance of the PMOS transistor M31.

  When the constant current charging operation proceeds and the battery voltage Vbat reaches the fully charged voltage at time t2, the voltage Vcv at the connection node between the resistor R22 and the resistor R23 reaches the third reference voltage Vr3. As a result, the voltage Vo3 output from the third amplifier circuit 22 decreases, the gate voltage of the NMOS transistor M1 is controlled, and the direct current output from the power supply circuit 10 so that the battery voltage Vbat becomes the full charge voltage. The voltage Vdd is controlled, and constant voltage charging is performed (hereinafter referred to as constant voltage charging operation). As a result, the current for charging the secondary battery BAT decreases, the voltage drop Vcc2 of the resistor R21 becomes equal to or lower than the second reference voltage Vr2, and the final output stage transistor (not shown) of the second amplifier circuit 21 is open. It becomes a state. Since the final output stage transistor (not shown) of the fourth amplifier circuit 41 of the voltage control circuit 40 is also in an open state, the DC voltage Vdd output from the power supply circuit 10 is the third voltage of the constant voltage charging circuit 202. 2 is controlled only by the amplifier circuit 22 and becomes a voltage slightly higher than the battery voltage Vbat so that the battery voltage Vbat becomes a full charge voltage as shown by a one-dot chain line in FIG. Note that the difference between the DC voltage Vdd and the battery voltage Vbat is the source-drain voltage of the PMOS transistor M31.

  When the constant voltage charging operation proceeds and the charging current decreases to the current Ichg3 at time t3, it is determined that charging is complete and charging is stopped. Thereafter, constant current charging may be performed as supplementary charging while a predetermined time elapses. In this case, the quick charge switching signal becomes a low level, the first amplifier circuit 31 of the small current charging circuit 30 operates, and charging with the current Ichg1 is resumed. In addition, since the NMOS transistor M41 is turned off, the DC voltage Vdd output from the power supply circuit 10 is controlled to the full charge voltage by the voltage control circuit 40 as described above. For this reason, the secondary battery BAT is not overcharged. The auxiliary charging is terminated by an instruction from an external circuit (not shown) at time t4 when a predetermined time has elapsed.

  Patent Document 1 discloses an invention similar to the above charging circuit. In Patent Document 1, a current control element is connected between the power supply circuit and the battery terminal in order to ensure the power supply voltage of the charging circuit in charging when the secondary battery is overdischarged, and the power supply side of the current control element Is controlled so as not to be lower than the operating voltage of the charging circuit.

  However, the charging circuit according to the related art has a large difference between the DC voltage Vdd output from the power supply circuit 10 and the battery voltage Vbat, as shown in the period from time t1 to t3 in FIG. There is a problem of being big. In order to reduce the power loss, it is necessary to increase the size of the PMOS transistor M31.

  Further, since the first amplifier circuit 31 is designed for small current charging, the drive capability is small and the PMOS transistor M31 cannot be turned on to a sufficiently low resistance value. On the other hand, if the drive capability of the first amplifier circuit 31 is increased in order to turn it on to a sufficiently low resistance value, the specification at the time of small current charging becomes overspec, the chip size is increased and the current consumption is increased, which is efficient. There is a problem that is not.

  The object of the present invention is to solve the above-mentioned problems, and without increasing the drive capability of the first amplifier circuit 31, the PMOS transistor M31 can be made into a small element, and is a highly efficient secondary battery with a small chip area. It is to provide a charging circuit.

A charging circuit for a secondary battery according to the present invention includes a quick charging circuit for controlling charging of the secondary battery by controlling at least one of a DC voltage and a DC current output from the output terminal of the power supply circuit,
A small current charging circuit that operates at the DC voltage output from the power supply circuit, charges the secondary battery at a constant current with a predetermined current, and stops according to a predetermined switching signal;
A voltage control circuit for controlling a DC voltage output from the power supply circuit to a predetermined voltage during charging by the small current charging circuit;
While the small current charging circuit is operating, the quick charging circuit does not operate, and when the small current charging circuit is stopped in response to the switching signal, the quick charging circuit operates. In the charging circuit,
The small current charging circuit includes:
A current control element having a control terminal and connected between the output terminal of the power supply circuit and the secondary battery;
A first amplifier circuit for controlling the current control element by applying a predetermined voltage to a control terminal of the current control element;
A signal line having a voltage for controlling the on-resistance of the current control element to be smaller than the on-resistance of the current control element when the current control element is controlled by the first amplifier circuit. First switch means for connecting a control terminal of the current control element;
When the small current charging circuit stops in response to the switching signal, the signal line is connected to the control terminal of the current control element by turning on the first switch means.

  In the secondary battery charging circuit, a constant current source is connected between the signal line and the first switch means.

Furthermore, in the charging circuit for the secondary battery, the small current charging circuit includes:
Second switch means connected between a positive power supply terminal of the first amplifier circuit and an output terminal of the power supply circuit;
Third switch means connected between a negative power supply terminal of the first amplifier circuit and a ground terminal of the power supply circuit;
When the small current charging circuit stops according to the switching signal, the second switch means and the third switch means are turned off.

Still further, in the charging circuit for the secondary battery, the quick charging circuit is configured such that when the voltage of the secondary battery is equal to or higher than an overdischarge voltage,
(A) constant current charge control for constant current charge at a predetermined current;
(B) After the secondary battery reaches a full charge voltage, at least one of constant voltage charge control for performing constant voltage charge at the full charge voltage until a predetermined charge end current is performed. .

  Further, in the charging circuit for the secondary battery, the small current charging circuit controls the secondary battery to be charged when the voltage of the secondary battery is less than an overdischarge voltage.

  Furthermore, in the charging circuit for the secondary battery, the small current charging circuit performs supplementary charging control by charging the secondary battery at a constant current with a predetermined current after charging by the quick charging circuit. And

  Furthermore, in the charging circuit for the secondary battery, the voltage control circuit stops controlling the power supply circuit when the small current charging circuit is stopped in response to the switching signal. .

  Further, in the charging circuit for the secondary battery, the voltage control circuit makes the voltage output from the power supply circuit higher than the full charge voltage when the small current charging circuit is stopped in response to the switching signal. It is characterized by setting as follows.

  Furthermore, in the charging circuit for the secondary battery, the power supply circuit is an AC-DC converter.

  According to the present invention, when the secondary battery is charged with a constant current or a constant voltage, the on-resistance of the current control element when the current control element is controlled by the first amplifier circuit using the first switch means. In comparison, since the control terminal of the current control element is connected to a signal line having a voltage for controlling the on-resistance of the current control element to be small, the on-resistance of the current control element becomes small and the current control element Power consumption can be reduced, and charging efficiency can be improved. Further, when the on-resistance of the current control element is set to the same value as that controlled by the first amplifier circuit, the size of the current control element can be reduced and the chip area can be reduced. Furthermore, since the constant current source is connected between the first switch means and the signal line, a rapid change in the charging current is suppressed, and the generation of noise can be suppressed.

It is a circuit diagram which shows the charging circuit which concerns on embodiment of this invention. FIG. 4 is a timing chart showing an operation of the charging circuit of FIGS. 1 and 3. FIG. It is a circuit diagram which shows the charging circuit which concerns on a prior art.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a circuit diagram showing a charging circuit according to an embodiment of the present invention. Compared with the charging circuit of FIG. 3, the charging circuit of FIG. 1 includes an NMOS transistor M33 as a first switch means, a PMOS transistor M34 as a second switch means, an NMOS transistor M35 as a third switch means, The difference is that an inverter circuit 32 and a current source I31 are added to the small current charging circuit 30. Other circuits are the same as those in FIG. The same elements as those in FIG. 3 are denoted by the same reference numerals. Since the configuration and operation of the charging circuit have been described in detail in the background art, only the added portion will be described here.

  The drain of the NMOS transistor M33 is connected to the gate of the PMOS transistor M31 and the output terminal of the first amplifier circuit 31, the source is connected to one end of the current source I31, and the gate is connected to the quick charge switching signal. . The other end of the current source I31 is connected to the ground terminal. The source of the PMOS transistor M34 is connected to the output terminal Vout of the power supply circuit 10, the drain is connected to the positive power supply terminal of the first amplifier circuit 31, and the gate is connected to the quick charge switching signal. The drain of the NMOS transistor M35 is connected to the negative power supply terminal of the first amplifier circuit 31, the source is connected to the ground terminal, and the gate is connected to the output of the inverter circuit 32. A quick charge switching signal is connected to the input terminal of the inverter circuit 32.

  FIG. 2 is a timing chart showing the operation of the charging circuit. With reference to FIG. 2, the operation of the charging circuit of the present embodiment will be described. If the battery voltage Vbat is less than the overdischarge voltage before time t1, the quick charge switching signal is at a low level. At this time, the NMOS transistor M33 is turned off, and the PMOS transistor M34 and the NMOS transistor M35 are turned on. Since the PMOS transistor M34 and the NMOS transistor M35 are on, the power supply Vdd is supplied to the first amplifying circuit 31 to be in an operating state. Further, since the NMOS transistor M33 is off, the operation of the small current charging circuit 30 is not affected. In this state, the circuit of FIG. 1 is in the same state as the circuit of FIG. 3, and operates in the same manner.

  When the battery voltage Vbat becomes equal to or higher than the overdischarge voltage at time t1, the external circuit sets the quick charge switching signal to a high level. As a result, the PMOS transistor M34 and the NMOS transistor M35 are turned off, and the first amplifier circuit 31 is turned off and stops operating. Since the NMOS transistor M33 is turned on, the gate of the PMOS transistor M31 is connected to the ground voltage. Therefore, the PMOS transistor M31 is turned on.

  In the charging circuit according to the prior art, the gate voltage of the PMOS transistor M31 is set to the low level by the first amplifier circuit 31, but since the drive capability of the first amplifier circuit 31 is low, the low level potential is higher than the ground potential. it was high. In the present embodiment, since the gate of the PMOS transistor M31 is connected to the ground terminal via the NMOS transistor M33 and the current source I31, the gate voltage of the PMOS transistor M31 can be made lower than in the prior art, and the PMOS transistor M31 The on-resistance can be made smaller than that in the prior art. As a result, the charging circuit according to the present embodiment operates in the same manner as the constant current charging operation described above, and as shown in FIG. 2, the value of the DC voltage Vdd output from the power supply circuit 10 is a value indicated by a solid line, It becomes lower than the value of the prior art shown with the dashed-dotted line.

  Further, the current source I31 suppresses the rate at which the gate voltage of the PMOS transistor M31 decreases. As a result, the charging current is gradually switched from the current Ichg1 to the current Ichg2, so that the generation of noise due to switching of the charging current can be suppressed.

  When the battery voltage Vbat reaches the full charge voltage at time t2, the constant current charge is switched to the constant voltage charge. Also at this time, since the gate voltage of the PMOS transistor M31 is lower than that in the prior art, the on-resistance of the PMOS transistor M31 is reduced. As a result, the charging circuit according to the present embodiment operates in the same manner as the constant voltage charging operation described above, and as shown in FIG. 2, the value of the DC voltage Vdd is lower than that in the prior art, and the PMOS transistor M31 Can reduce the power consumption.

  When the charging current decreases to the current Ichg3 at time t3, it is determined that charging is complete and charging is stopped. After that, when constant current charging is performed as supplementary charging while a predetermined time elapses, the rapid charging switching signal is set to a low level to achieve the same state as before time t1, and supplementary charging is performed with current Ichg1. .

  Similarly to the case of the prior art, since the NMOS transistor M41 is turned on from time t1 to time t3, the voltage Vd at the connection node between the resistor R41 and the resistor R42 becomes lower than the fourth reference voltage Vr4. Since the final output stage transistor (not shown) of the fourth amplifier circuit 41 is in the open state, the voltage control circuit 40 does not control the DC voltage Vdd.

  As described above, according to the present embodiment, when the secondary battery BAT is charged by the quick charge circuit 20, the gate of the PMOS transistor M31 is connected to the first amplification via the NMOS transistor M33 and the current source I31. Since the circuit 31 is connected to the ground terminal having a voltage lower than the low level output from the circuit 31, the on-resistance of the PMOS transistor M31 is reduced, the power consumption in the PMOS transistor M31 can be reduced, and the charging efficiency is improved. be able to. When the on-resistance of the PMOS transistor M31 is set to the same value as that controlled by the first amplifier circuit 31, the size of the PMOS transistor M31 can be reduced and the chip area can be reduced. Furthermore, since the current source I31 is connected between the NMOS transistor M33 and the ground terminal, a rapid change in the charging current is suppressed, and the generation of noise can be suppressed. In the present embodiment, the source of the NMOS transistor M33 is connected to the ground terminal via the current source I31. However, the connection destination need not be limited to the ground terminal. If there is a node having a lower voltage, the on-resistance of the PMOS transistor M31 can be further lowered by connecting to the node.

  As described above in detail, according to the secondary battery charging circuit of the present invention, when the secondary battery is charged with constant current or constant voltage, the first amplifying circuit is used with the first switch means. The control terminal of the current control element is connected to a signal line having a voltage for controlling the on resistance of the current control element to be smaller than the on resistance of the current control element when the current control element is controlled. Therefore, the on-resistance of the current control element is reduced, power consumption in the current control element can be reduced, and charging efficiency can be improved. Further, when the on-resistance of the current control element is set to the same value as that controlled by the first amplifier circuit, the size of the current control element can be reduced and the chip area can be reduced. Furthermore, since the constant current source is connected between the first switch means and the signal line, a rapid change in the charging current is suppressed, and the generation of noise can be suppressed.

10 ... power supply circuit,
20 ... Rapid charging circuit,
201 ... constant current charging circuit,
202 ... constant voltage charging circuit,
21 ... Second amplifier circuit,
22 ... Third amplifier circuit,
30 ... small current charging circuit,
31 ... first amplifier circuit,
32. Inverter circuit,
40 ... Voltage control circuit,
41 ... Fourth amplifier circuit,
M33 ... first switch means,
M34 ... second switch means,
M35 ... third switch means,
Vr1 ... first reference voltage,
Vr2 ... second reference voltage,
Vr3 ... third reference voltage,
Vr4 is a fourth reference voltage.

JP 2001-327096 A.

Claims (9)

A quick charging circuit that controls charging of the secondary battery by controlling at least one of a DC voltage and a DC current output from the output terminal of the power supply circuit;
A small current charging circuit that operates at the DC voltage output from the power supply circuit, charges the secondary battery at a constant current with a predetermined current, and stops according to a predetermined switching signal;
A voltage control circuit for controlling a DC voltage output from the power supply circuit to a predetermined voltage during charging by the small current charging circuit;
While the small current charging circuit is operating, the quick charging circuit does not operate, and when the small current charging circuit is stopped in response to the switching signal, the quick charging circuit operates. In the charging circuit,
The small current charging circuit includes:
A current control element having a control terminal and connected between the output terminal of the power supply circuit and the secondary battery;
A first amplifier circuit for controlling the current control element by applying a predetermined voltage to a control terminal of the current control element;
A signal line having a voltage for controlling the on-resistance of the current control element to be smaller than the on-resistance of the current control element when the current control element is controlled by the first amplifier circuit. First switch means for connecting a control terminal of the current control element;
When the small current charging circuit stops in response to the switching signal, the signal line is connected to the control terminal of the current control element by turning on the first switch means. Battery charging circuit.   2. The secondary battery charging circuit according to claim 1, wherein a constant current source is connected between the signal line and the first switch means. The small current charging circuit includes:
Second switch means connected between a positive power supply terminal of the first amplifier circuit and an output terminal of the power supply circuit;
Third switch means connected between a negative power supply terminal of the first amplifier circuit and a ground terminal of the power supply circuit;
3. The secondary battery according to claim 1, wherein when the small current charging circuit stops in response to the switching signal, the second switch unit and the third switch unit are turned off. Charging circuit. When the voltage of the secondary battery is equal to or higher than the overdischarge voltage, the quick charging circuit is
(A) constant current charge control for constant current charge at a predetermined current;
(B) After the secondary battery reaches a full charge voltage, at least one of constant voltage charge control for performing constant voltage charge at the full charge voltage until a predetermined charge end current is performed. The secondary battery charging circuit according to any one of claims 1 to 3.   5. The small current charging circuit controls the secondary battery to be charged when the voltage of the secondary battery is less than an overdischarge voltage. A charging circuit for a secondary battery according to claim.   5. The supplementary charging control according to claim 1, wherein the small current charging circuit performs auxiliary charging control by charging the secondary battery with a constant current with a predetermined current after charging by the quick charging circuit. A charging circuit for a secondary battery according to claim 1.   The voltage control circuit stops controlling the power supply circuit when the small current charging circuit is stopped in response to the switching signal. A charging circuit for a secondary battery according to claim.   The voltage control circuit is configured to set a voltage output from the power supply circuit to be higher than the full charge voltage when the small current charging circuit stops in response to the switching signal. A charging circuit for a secondary battery according to claim 7.   The secondary battery charging circuit according to claim 1, wherein the power supply circuit is an AC-DC converter.

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