JP2011036046A - Power supply backup device - Google Patents

Power supply backup device Download PDF

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JP2011036046A
JP2011036046A JP2009180512A JP2009180512A JP2011036046A JP 2011036046 A JP2011036046 A JP 2011036046A JP 2009180512 A JP2009180512 A JP 2009180512A JP 2009180512 A JP2009180512 A JP 2009180512A JP 2011036046 A JP2011036046 A JP 2011036046A
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electric double
circuit
voltage
layer capacitor
double layer
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JP5390981B2 (en
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Yuji Takizawa
雄二 滝澤
Koichi Nara
宏一 奈良
Akira Maruyama
明 丸山
Masaru Suzuki
大 鈴木
Takeshi Ishii
威 石井
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Fujitsu Telecom Networks Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To maintain reliability in a power supply backup device having an electric double-layer capacitor. <P>SOLUTION: In the power supply backup device, DC power is supplied from a DC power supply to a load circuit 2 via a first diode D1; boosting is performed by a boosting circuit 5 and the electric double-layer capacitor C1 is charged; and charging voltage of the electric double layer capacitor C1 is supplied to the load circuit 2 via a switching circuit 4 and a second diode D2, when the DC power supply is abnormal. The device is provided with a voltage/current detecting circuit 7 for detecting a charging voltage and a discharging current; a voltage detecting circuit 8 detecting the voltage supplied to the load circuit 2 via the first and second diodes D1 and D2 and a control processing circuit 1 for detecting DC current and DC voltage from the electric double-layer capacitor C1 by the voltage/current detecting circuit 7, by turning on the switching circuit 4; calculating capacitance and internal resistance of the electric double-layer capacitor C1 and determining the presence or the absence of abnormality state of the electric double-layer capacitor C1, based on the capacitance and the internal resistance. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は、負荷回路に直流の動作電力を供給する為の直流電源から大容量コンデンサを充電し、直流電源の障害発生時に、大容量コンデンサから直流負荷に動作電力を供給する電源バックアップ装置に関する。   The present invention relates to a power supply backup device that charges a large-capacity capacitor from a DC power supply for supplying DC operating power to a load circuit, and supplies the operating power from the large-capacitance capacitor to the DC load when a failure occurs in the DC power supply.

電子回路等の各種の直流の負荷回路の動作電力を供給する直流電源は、既に各種の構成が提案され、且つ実用化されている。このような直流電源は、例えば、商用交流電源からの交流電圧をトランス等により所望の電圧に変換して整流し、スイッチング制御等により、直流の負荷回路の動作電圧に変換して供給する構成が比較的多く適用されている。その場合、商用交流電源側又は直流電源側の障害により、直流の負荷回路に動作電力を継続して供給することができない場合が発生する。そこで、電源バックアップ装置を設けて、障害発生時に於いても、継続して直流の負荷回路に動作電力を供給する構成が各種提案されている。直流の負荷回路が比較的大きい電力を消費する構成の場合、電源バックアップ装置として、エンジン駆動発電機や大容量バッテリを用いた構成が一般的であり、又比較的小容量の場合はバッテリのみの構成が一般的である。又各種の電子回路に動作電力を供給する直流電源のバックアップ用として、大容量コンデンサの一種の電気二重層コンデンサを用いた構成が知られている。   Various configurations have already been proposed and put into practical use for DC power supplies that supply operating power for various DC load circuits such as electronic circuits. Such a DC power source has a configuration in which, for example, an AC voltage from a commercial AC power source is converted to a desired voltage by a transformer or the like and rectified, and converted to an operating voltage of a DC load circuit by switching control or the like. Relatively many applications have been applied. In this case, there may be a case where the operating power cannot be continuously supplied to the DC load circuit due to a failure on the commercial AC power supply side or the DC power supply side. Therefore, various configurations have been proposed in which a power backup device is provided to continuously supply operating power to a DC load circuit even when a failure occurs. In the case of a configuration in which the DC load circuit consumes a relatively large amount of power, a configuration using an engine-driven generator or a large-capacity battery is generally used as a power backup device. The configuration is common. In addition, a configuration using a kind of electric double layer capacitor as a large-capacitance capacitor is known as a backup for a DC power supply that supplies operating power to various electronic circuits.

この電気二重層コンデンサは、正極と負極との両方に電気二重層によるコンデンサを形成して電荷を蓄積し、その蓄積電荷を直流電力として負荷に供給できる大容量のコンデンサであり、内部抵抗が低く、短時間で充放電が可能であると共に、利用可能の充放電サイクル数は、10万〜100万回程度とされている。このような特性の電気二重層コンデンサを直流電源側に設けて、直流電圧供給を継続可能とする各種の構成が提案されている。例えば、AC/DCコンバータの出力電圧を、出力スイッチを介して直流負荷に供給する構成とし、その出力スイッチのオン、オフを制御すると共にAC/DCコンバータの動作の開始/停止を制御するオン/オフ制御回路の動作電力を、AC/DCコンバータの出力電圧で充電される電気二重層コンデンサから供給し、出力スイッチをオフとすると共にAC/DCコンバータを休止状態としている時に、電気二重層コンデンサの充電電圧が低下すると、この電圧低下をオン/オフ制御回路により検出して、AC/DCコンバータを一時的に動作させ、電気二重層コンデンサを充電し、この電気二重層コンデンサによるバックアップを継続可能とする構成が提案されている(例えば、特許文献1参照)。   This electric double layer capacitor is a large-capacity capacitor that can store electric charge by forming an electric double layer capacitor on both the positive and negative electrodes, and supply the accumulated charge to the load as DC power, and has low internal resistance. In addition, charging / discharging is possible in a short time, and the number of usable charging / discharging cycles is about 100,000 to 1,000,000 times. Various configurations have been proposed in which an electric double layer capacitor having such characteristics is provided on the DC power supply side so that DC voltage supply can be continued. For example, the output voltage of the AC / DC converter is supplied to the DC load via the output switch, and the on / off control of the output switch and the start / stop of the operation of the AC / DC converter are controlled. The operating power of the off-control circuit is supplied from the electric double layer capacitor charged with the output voltage of the AC / DC converter, and when the output switch is turned off and the AC / DC converter is in the sleep state, the electric double layer capacitor When the charging voltage drops, this voltage drop is detected by the on / off control circuit, the AC / DC converter is temporarily operated, the electric double layer capacitor is charged, and the backup by this electric double layer capacitor can be continued. The structure which performs is proposed (for example, refer patent document 1).

又商用交流電源からの交流電圧を整流して電子回路等を含む直流の負荷回路に直流動作電力を供給すると共に、直流電源バックアップ装置の電気二重層コンデンサに充電しておき、商用交流電源の停電時に、直流電源バックアップ装置の電気二重層コンデンサから電子回路等を含む直流の負荷回路の必要最小限の安定動作停止処理を実行する為に必要な動作電力を供給する構成も提案されている(例えば、特許文献2参照)。又直流電源と並列に電気二重層コンデンサを接続し、この電気二重層コンデンサの充電電圧を直流電源の出力電圧低下時に、バックアップ用として直流の負荷回路に供給する構成に於いて、電気二重層コンデンサの内部抵抗が温度の上昇により低下する特性を基に、電気二重層コンデンサと共振回路を構成するリアクトルを接続して共振電流を流し、電気二重層コンデンサの放電特性の向上を図る手段が提案されている(例えば、特許文献3参照)。   Also, the AC voltage from the commercial AC power supply is rectified to supply the DC operating power to the DC load circuit including the electronic circuit, etc., and the electric double layer capacitor of the DC power supply backup device is charged so that the commercial AC power supply fails. In some cases, a configuration has also been proposed in which operating power necessary for executing the minimum stable operation stop processing of a DC load circuit including an electronic circuit or the like is performed from an electric double layer capacitor of a DC power supply backup device (for example, , See Patent Document 2). In addition, an electric double layer capacitor is connected in parallel with the DC power supply, and the charging voltage of the electric double layer capacitor is supplied to the DC load circuit as a backup when the output voltage of the DC power supply is lowered. Based on the characteristic that the internal resistance of the capacitor decreases with increasing temperature, a means to improve the discharge characteristics of the electric double layer capacitor by connecting the electric double layer capacitor and the reactor that constitutes the resonance circuit to flow the resonance current is proposed. (For example, refer to Patent Document 3).

又各種機器に付属して設置したカレンダ時計(リアルタイムクロック)等の電子回路には、常時直流電圧を印加する必要があり、その為に電気二重層コンデンサの充電電圧を利用した構成に於いて、各種機器の本体の動作用の直流電圧供給時に、電源側の電気二重層コンデンサに充電し、且つカレンダ時計の動作電圧として供給し、直流電圧供給停止時には、電源側の電気二重層コンデンサの充電電圧により、カレンダ時計側の電気二重層コンデンサを充電する回路構成を設け、このカレンダ時計側の電気二重層コンデンサの充電電圧を、カレンダ時計の動作電圧として供給する構成が提案されている(例えば、特許文献4参照)。   In addition, it is necessary to always apply DC voltage to electronic circuits such as calendar clocks (real-time clocks) installed with various devices. For this reason, in the configuration using the charging voltage of the electric double layer capacitor, When supplying DC voltage for the operation of the main body of various devices, it charges the electric double layer capacitor on the power supply side and supplies it as the operating voltage of the calendar clock, and when the DC voltage supply is stopped, the charging voltage of the electric double layer capacitor on the power supply side Therefore, a configuration is proposed in which a circuit configuration for charging an electric double layer capacitor on the calendar watch side is provided, and a charging voltage of the electric double layer capacitor on the calendar watch side is supplied as an operating voltage of the calendar watch (for example, a patent) Reference 4).

特開2006−254655号公報JP 2006-254655 A 特開2006−341555号公報JP 2006-341555 A 特開2007−288986号公報JP 2007-288986 A 特開2009−81904号公報JP 2009-81904 A

前述のように、電気二重層コンデンサを直流電源側から充電し、その直流電源からの直流電圧供給停止時に、電気二重層コンデンサの充電電圧を直流の負荷回路に供給する電源バックアップ装置に於いては、主に経時劣化により、電気二重層コンデンサの特性が低下して、所望のバックアップ特性を維持できなくなる可能性がある。このような電気二重層コンデンサの特性劣化の有無を判定し、特性劣化時には、使用中の電気二重層コンデンサを新しい電気二重層コンデンサと交換して、バックアップ特性を所望の特性に維持することが必要である。   As described above, in the power backup device that charges the electric double layer capacitor from the DC power supply side and supplies the charging voltage of the electric double layer capacitor to the DC load circuit when the DC voltage supply from the DC power supply is stopped. The characteristics of the electric double layer capacitor may be deteriorated mainly due to deterioration with time, and the desired backup characteristics may not be maintained. It is necessary to determine whether such characteristics of the electric double layer capacitor have deteriorated, and when the characteristic deteriorates, it is necessary to replace the electric double layer capacitor in use with a new electric double layer capacitor and maintain the backup characteristic at the desired characteristic. It is.

その為に、例えば、図6に示す電源バックアップ装置の特性試験構成が提案された。同図に於いて、D1,D2は逆流阻止用のダイオード、C1は電気二重層コンデンサ、31は計算回路、32は電子回路等の直流の負荷回路、33は定電圧回路、34はスイッチ回路、35は昇圧回路、36はスイッチ回路、37は電圧検出回路、38は擬似負荷回路、39はタイマを示す。負荷回路32は、各種の電子回路の場合が一般的であり、比較的低電圧で動作するもので、定電圧回路33は、負荷回路32に一定の動作電圧を供給する為のものである。又DC電源入力は、例えば、商用交流電源からの交流電圧を所望の電圧に変換して整流した入力直流電圧を示し、又電源断情報は、商用交流電源の停電検出情報で、DC電源入力が断となったことを示し、常時オフ状態のスイッチ回路34を電源断情報によりオンとして、電気二重層コンデンサC1の充電電荷を定電圧回路33に入力し、負荷回路32に対する動作電圧を継続して供給する。電気二重層コンデンサC1は、1個のコンデンサとして図示しているが、耐電圧特性は数V程度の低いものであるから、通常は複数個を直列接続した構成が一般的である。又負荷回路32の電流容量に対応したバックアップ用の電流を供給する為に、複数個を並列接続した構成とすることも一般的である。又昇圧回路35は、正常時のDC電源入力の直流電圧を昇圧して電気二重層コンデンサC1を充電する。ダイオードD1,D2は、DC電源入力が直接的に電気二重層コンデンサC1に印加されないように、且つスイッチ回路34がオンとなった時に、電気二重層コンデンサC1の充電電荷が、DC電源側へ流れないように阻止する為のものである。   For this purpose, for example, a characteristic test configuration of the power backup device shown in FIG. 6 has been proposed. In the figure, D1 and D2 are backflow blocking diodes, C1 is an electric double layer capacitor, 31 is a calculation circuit, 32 is a DC load circuit such as an electronic circuit, 33 is a constant voltage circuit, 34 is a switch circuit, Reference numeral 35 denotes a booster circuit, 36 denotes a switch circuit, 37 denotes a voltage detection circuit, 38 denotes a pseudo load circuit, and 39 denotes a timer. The load circuit 32 is generally a variety of electronic circuits and operates at a relatively low voltage. The constant voltage circuit 33 is for supplying a constant operating voltage to the load circuit 32. The DC power input indicates, for example, an input DC voltage obtained by converting an AC voltage from a commercial AC power source into a desired voltage and rectified, and the power interruption information is a power failure detection information of the commercial AC power source. The switch circuit 34 that is normally off is turned on according to the power-off information, the charge of the electric double layer capacitor C1 is input to the constant voltage circuit 33, and the operating voltage for the load circuit 32 is continued. Supply. Although the electric double layer capacitor C1 is illustrated as a single capacitor, since the withstand voltage characteristic is as low as several volts, a configuration in which a plurality of capacitors are connected in series is generally common. In order to supply a backup current corresponding to the current capacity of the load circuit 32, it is also common to have a configuration in which a plurality of them are connected in parallel. The booster circuit 35 boosts the DC voltage of the DC power supply input in the normal state to charge the electric double layer capacitor C1. The diodes D1 and D2 charge the electric double layer capacitor C1 to the DC power supply side so that the DC power input is not directly applied to the electric double layer capacitor C1 and the switch circuit 34 is turned on. This is to prevent it from happening.

又タイマ39は、計算回路31に時間情報を供給する為のもので、例えば、電気二重層コンデンサC1の特性試験を定期的に行う為の時間情報及び特性試験中の時間情報を供給する為のものであり、予め設定された時間間隔による特性試験時には、計算回路31の制御によりスイッチ回路36をオンとして、電気二重層コンデンサC1に擬似負荷回路38を接続する。それにより、電気二重層コンデンサC1から擬似負荷回路38に充電電荷が供給される。電圧検出回路37は、電気二重層コンデンサC1の端子電圧を検出して計算回路31に入力する。計算回路31は、試験開始から時間経過に伴う電気二重層コンデンサC1の電圧の変化特性を基に、特性劣化状態か否かを判定する。試験開始から試験終了までの間の電圧低下が所定値以下の場合は、特性劣化と判定することができる。或は、電気二重層コンデンサC1の標準放電特性と比較して、その差の大小に応じて特性劣化か否かを判定することもできる。   The timer 39 is for supplying time information to the calculation circuit 31. For example, the timer 39 is for supplying time information for periodically conducting a characteristic test of the electric double layer capacitor C1 and time information during the characteristic test. At the time of a characteristic test at a preset time interval, the switch circuit 36 is turned on under the control of the calculation circuit 31, and the pseudo load circuit 38 is connected to the electric double layer capacitor C1. As a result, the charge charge is supplied from the electric double layer capacitor C1 to the pseudo load circuit 38. The voltage detection circuit 37 detects the terminal voltage of the electric double layer capacitor C1 and inputs it to the calculation circuit 31. The calculation circuit 31 determines whether or not the characteristic is in a deteriorated state based on the change characteristic of the voltage of the electric double layer capacitor C1 over time from the start of the test. When the voltage drop from the start of the test to the end of the test is equal to or less than a predetermined value, it can be determined that the characteristic is deteriorated. Alternatively, it can be determined whether or not the characteristics are deteriorated according to the difference between the standard discharge characteristics of the electric double layer capacitor C1 and the difference.

しかし、電気二重層コンデンサC1を用いた電源バックアップ装置の試験としては、電気二重層コンデンサC1に擬似負荷回路38を接続して放電させるもので、この擬似負荷回路38の特性を、定電圧回路33を含む負荷回路32の特性に一致させることは困難であり、且つダイオードD2の正常性を含めた電源バックアップ回路としての正常性の試験としては充分ではない問題がある。そこで、図7に示す電源バックアップ装置の試験構成が提案された。同図に於いて、D1,D2は逆流阻止用のダイオード、C1は電気二重層コンデンサ、41は計算回路、42は負荷回路、43は定電圧回路、44はスイッチ回路、45は昇圧回路、46は電流制限回路、47は電圧検出回路、48は電圧検出回路、49はタイマを示す。   However, as a test of the power backup device using the electric double layer capacitor C1, the pseudo load circuit 38 is connected to the electric double layer capacitor C1 and discharged, and the characteristics of the pseudo load circuit 38 are expressed by the constant voltage circuit 33. Therefore, there is a problem that it is difficult to match the characteristics of the load circuit 32 including the normality of the power supply backup circuit including the normality of the diode D2. Therefore, a test configuration of the power backup device shown in FIG. 7 has been proposed. In the figure, D1 and D2 are backflow prevention diodes, C1 is an electric double layer capacitor, 41 is a calculation circuit, 42 is a load circuit, 43 is a constant voltage circuit, 44 is a switch circuit, 45 is a boost circuit, 46 Indicates a current limiting circuit, 47 indicates a voltage detection circuit, 48 indicates a voltage detection circuit, and 49 indicates a timer.

スイッチ回路44は、常時オン状態であり、計算回路41による特性試験時にオフに制御する。又電流制限回路46は、電気二重層コンデンサC1の初期充電等の場合の充電電流が過大な値とならないように制限する為のものである。又昇圧回路45は、電気二重層コンデンサC1の充電電圧が、DC電源入力の電圧と同程度又はそれ以下であるから、昇圧して定電圧回路43に入力する為のものである。又タイマ49からの時間情報により計算回路41は、定期的に特性試験を行うもので、特性試験時に、スイッチ回路44をオフとし、電気二重層コンデンサC1の端子電圧を電圧検出回路47により検出した値と、電気二重層コンデンサC1の端子電圧が、昇圧回路45とダイオードD2とを介して定電圧回路43に入力される電圧を電圧検出回路48により検出した値とを基に、電気二重層コンデンサC1によるバックアップ機能を定期的に試験する。この場合、ダイオードD2の正常性を含めて試験をすることができる。   The switch circuit 44 is always on, and is controlled to be off during the characteristic test by the calculation circuit 41. The current limiting circuit 46 is for limiting the charging current in the case of initial charging of the electric double layer capacitor C1 so that it does not become an excessive value. The booster circuit 45 is for boosting and inputting the voltage to the constant voltage circuit 43 because the charging voltage of the electric double layer capacitor C1 is approximately equal to or less than the voltage of the DC power supply input. The calculation circuit 41 periodically performs a characteristic test based on time information from the timer 49. During the characteristic test, the switch circuit 44 is turned off, and the terminal voltage of the electric double layer capacitor C1 is detected by the voltage detection circuit 47. The electric double layer capacitor C1 is based on the value and the value detected by the voltage detection circuit 48 when the voltage of the terminal voltage of the electric double layer capacitor C1 is input to the constant voltage circuit 43 via the booster circuit 45 and the diode D2. Regularly test C1 backup function. In this case, the test including the normality of the diode D2 can be performed.

しかし、電気二重層コンデンサC1が正常か否かを判定する前に、正常なDC電源入力をスイッチ回路44によりオフとし、電気二重層コンデンサC1の充電電荷による端子電圧を昇圧回路45により昇圧し、ダイオードD2を介して定電圧回路43に入力するものであるから、電気二重層コンデンサC1の特性劣化時には、負荷回路42に動作電圧を供給できなくなる問題がある。   However, before determining whether or not the electric double layer capacitor C1 is normal, the normal DC power input is turned off by the switch circuit 44, the terminal voltage due to the charge of the electric double layer capacitor C1 is boosted by the boost circuit 45, Since the voltage is input to the constant voltage circuit 43 via the diode D2, there is a problem that the operating voltage cannot be supplied to the load circuit 42 when the characteristics of the electric double layer capacitor C1 deteriorate.

本発明は、前述の従来の問題点を解決することを目的とし、電気二重層コンデンサの静電容量や内部抵抗等のパラメータを基に特性劣化か否かを判定し、且つ正常な電源バックアップが可能か否かについても判定可能として、電気二重層コンデンサを用いた電源バックアップ装置の信頼性を維持可能とするものである。   The present invention aims to solve the above-mentioned conventional problems, and determines whether or not the characteristics are deteriorated based on parameters such as capacitance and internal resistance of the electric double layer capacitor, and normal power backup is possible. Whether it is possible or not can also be determined, and the reliability of the power backup device using the electric double layer capacitor can be maintained.

本発明の電源バックアップ装置は、直流電源から第1のダイオードを介して負荷回路に直流電力を供給し、且つ前記直流電源から昇圧回路により昇圧して電気二重層コンデンサを充電し、前記直流電源の異常発生時に、前記電気二重層コンデンサの充電電圧を、スイッチ回路と第2のダイオードとを介して前記負荷回路に供給する電源バックアップ装置であって、前記電気二重層コンデンサの充電電圧及び放電電流を検出する電圧・電流検出回路と、前記第1及び第2のダイオードを介して前記負荷回路に供給する電圧を検出する電圧検出回路と、タイマからの時間情報を基に、予め設定された期間毎に前記スイッチ回路をオンに制御し、前記電気二重層コンデンサの充電電圧を前記第2のダイオードを介して前記負荷回路に供給し、前記電圧・電流検出回路により前記電気二重層コンデンサから供給する直流電流と直流電圧とを検出して、前記電気二重層コンデンサの静電容量と内部抵抗とを算出し、該算出した静電容量及び内部抵抗を基に前記電気二重層コンデンサの異常の有無を判定処理する制御処理回路とを備えている。   The power backup device of the present invention supplies DC power from a DC power supply to a load circuit via a first diode, and boosts the DC power supply by boosting from the DC power supply by a booster circuit. A power backup device for supplying a charging voltage of the electric double layer capacitor to the load circuit via a switch circuit and a second diode when an abnormality occurs, wherein the charging voltage and discharging current of the electric double layer capacitor are A voltage / current detection circuit for detection, a voltage detection circuit for detecting a voltage supplied to the load circuit via the first and second diodes, and a preset period based on time information from a timer The switch circuit is turned on, and the charging voltage of the electric double layer capacitor is supplied to the load circuit via the second diode, A DC current and a DC voltage supplied from the electric double layer capacitor are detected by a current detection circuit to calculate the capacitance and internal resistance of the electric double layer capacitor, and the calculated capacitance and internal resistance And a control processing circuit for determining whether or not there is an abnormality in the electric double layer capacitor.

又電気二重層コンデンサの周囲温度を検出する温度センサを備え、制御処理回路は、この温度センサによる検出温度を基に、電気二重層コンデンサの静電容量及び内部抵抗の算出値を補正処理する機能を備えている。又制御処理回路は、スイッチ回路をオンに制御して電気二重層コンデンサの充電電圧を負荷回路に供給する放電試験と、スイッチ回路をオフに制御して、電気二重層コンデンサを昇圧回路により昇圧した直流電圧により充電する充電試験とを、タイマからの時間情報に従って予め設定された期間毎に実施する機能を備えることができる。又制御処理回路は、タイマからの時間情報を基に、予め設定された期間毎の電気二重層コンデンサの静電容量と内部抵抗とを算出して記憶させるメモリを備え、このメモリに記憶された電気二重層コンデンサの静電容量と内部抵抗との変化傾向を基に、電気二重層コンデンサの残存使用可能期間の推定処理を行う機能を備えている。   In addition, a temperature sensor that detects the ambient temperature of the electric double layer capacitor is provided, and the control processing circuit corrects the calculated values of the capacitance and internal resistance of the electric double layer capacitor based on the temperature detected by the temperature sensor. It has. In addition, the control processing circuit controls the switch circuit to turn on and discharges the charging voltage of the electric double layer capacitor to the load circuit, and controls the switch circuit to turn off and boosts the electric double layer capacitor by the boost circuit. It is possible to provide a function of performing a charge test for charging with a DC voltage for each preset period according to time information from a timer. The control processing circuit includes a memory for calculating and storing the capacitance and the internal resistance of the electric double layer capacitor for each preset period based on the time information from the timer, and stored in this memory. A function is provided for estimating the remaining usable period of the electric double layer capacitor based on the changing tendency of the capacitance and internal resistance of the electric double layer capacitor.

電気二重層コンデンサを備えた電源バックアップ装置で、その電気二重層コンデンサの電圧及び電流を検出して、電気二重層コンデンサの静電容量及び内部抵抗を求め、その静電容量と内部抵抗との変化傾向を基に、残存使用可能期間の推定も可能とし、電源バックアップ装置の信頼性を向上することができる。   A power backup device equipped with an electric double layer capacitor detects the voltage and current of the electric double layer capacitor to determine the capacitance and internal resistance of the electric double layer capacitor, and changes between the capacitance and internal resistance Based on the tendency, the remaining usable period can be estimated, and the reliability of the power backup device can be improved.

本発明の実施例1の説明図である。It is explanatory drawing of Example 1 of this invention. 本発明の実施例1の電気二重層コンデンサの充放電特性説明図である。It is charging / discharging characteristic explanatory drawing of the electric double layer capacitor of Example 1 of this invention. 電気二重層コンデンサの静電容量及び内部抵抗の特性説明図である。It is characteristic explanatory drawing of the electrostatic capacitance and internal resistance of an electric double layer capacitor. 本発明の実施例1の残存寿命判定処理の説明図である。It is explanatory drawing of the remaining life determination process of Example 1 of this invention. 本発明の実施例2の説明図である。It is explanatory drawing of Example 2 of this invention. 従来例の説明図である。It is explanatory drawing of a prior art example. 従来例の説明図である。It is explanatory drawing of a prior art example.

本発明の電源バックアップ装置は、図1を参照すると、直流電源から第1のダイオードD1を介して負荷回路2に直接又は定電圧回路3を介して直流電力を供給し、且つ直流電源から昇圧回路5により昇圧して電気二重層コンデンサC1を充電し、直流電源の異常発生時に、電気二重層コンデンサC1の充電電圧を、スイッチ回路4と第2のダイオードD2とを介して負荷回路2に供給する電源バックアップ装置であって、電気二重層コンデンサC1の充電電圧及び放電電流を検出する電圧・電流検出回路7と、第1及び第2のダイオードD1,D2を介して負荷回路2に供給する電圧を検出する電圧検出回路8と、タイマ9からの時間情報を基に、予め設定された期間毎にスイッチ回路4をオンに制御し、電気二重層コンデンサC1の充電電圧を第2のダイオードD2を介して負荷回路2に供給し、電圧・電流検出回路7により電気二重層コンデンサC1から供給する直流電流と直流電圧とを検出して、電気二重層コンデンサC1の静電容量と内部抵抗とを算出し、この算出した静電容量及び内部抵抗を基に、電気二重層コンデンサC1の異常の有無を判定処理する制御処理回路1とを備えている。   Referring to FIG. 1, the power supply backup device of the present invention supplies DC power from a DC power supply to the load circuit 2 via the first diode D1 or via the constant voltage circuit 3, and from the DC power supply to the booster circuit. 5 to charge the electric double layer capacitor C1 and supply the charging voltage of the electric double layer capacitor C1 to the load circuit 2 via the switch circuit 4 and the second diode D2 when an abnormality occurs in the DC power supply. A power supply backup device that supplies a voltage / current detection circuit 7 for detecting a charging voltage and a discharging current of the electric double layer capacitor C1 and a voltage supplied to the load circuit 2 via the first and second diodes D1 and D2. Based on the voltage detection circuit 8 to be detected and the time information from the timer 9, the switch circuit 4 is controlled to be turned on for each preset period to charge the electric double layer capacitor C1. The voltage is supplied to the load circuit 2 through the second diode D2, and the DC / DC voltage supplied from the electric double layer capacitor C1 is detected by the voltage / current detection circuit 7 to detect the static voltage of the electric double layer capacitor C1. A control processing circuit 1 is provided that calculates electric capacity and internal resistance, and determines whether or not the electric double layer capacitor C1 is abnormal based on the calculated electrostatic capacity and internal resistance.

図1は、本発明の実施例1の説明図であり、1は制御処理回路、2は電子回路等の負荷回路、3は定電圧回路、4はスイッチ回路、5は昇圧回路、6は電流検出回路、7は電圧・電流検出回路、8は電圧検出回路、9はタイマ、10は温度センサ、C1は電気二重層コンデンサ、D1,D2は第1、第2のダイオードを示す。DC電源入力として示す直流電圧が正常の場合、スイッチ回路4はオフ状態に制御されており、第1のダイオードD1を介して定電圧回路3に直流電圧を入力し、負荷回路2に所定の一定電圧に制御した直流電圧を供給し、又昇圧回路5により昇圧して電気二重層コンデンサC1を充電する。又DC電源入力断の場合、電源断情報によりスイッチ回路4をオンとして、電気二重層コンデンサC1に充電された電圧を、第2のダイオードD2を介して定電圧回路3に入力することにより、負荷回路2に継続して所定の直流電圧を供給し、電源バックアップ装置として機能する。なお、定電圧回路3は、負荷回路2に供給する直流電圧を一定の値に制御するものであるが、負荷回路2が印加電圧の変化によっても動作を継続可能の構成を有する場合は、この定電圧回路3を省略することも可能である。   FIG. 1 is an explanatory diagram of Embodiment 1 of the present invention, where 1 is a control processing circuit, 2 is a load circuit such as an electronic circuit, 3 is a constant voltage circuit, 4 is a switch circuit, 5 is a booster circuit, and 6 is a current. A detection circuit, 7 is a voltage / current detection circuit, 8 is a voltage detection circuit, 9 is a timer, 10 is a temperature sensor, C1 is an electric double layer capacitor, and D1 and D2 are first and second diodes. When the DC voltage indicated as the DC power supply input is normal, the switch circuit 4 is controlled to be in the OFF state, and the DC voltage is input to the constant voltage circuit 3 via the first diode D1, and the load circuit 2 has a predetermined constant voltage. A DC voltage controlled to a voltage is supplied and boosted by the booster circuit 5 to charge the electric double layer capacitor C1. When the DC power input is cut off, the switch circuit 4 is turned on according to the power cut-off information, and the voltage charged in the electric double layer capacitor C1 is input to the constant voltage circuit 3 via the second diode D2, thereby A predetermined DC voltage is continuously supplied to the circuit 2 to function as a power backup device. The constant voltage circuit 3 controls the DC voltage supplied to the load circuit 2 to a constant value. If the load circuit 2 has a configuration capable of continuing operation even when the applied voltage changes, this constant voltage circuit 3 The constant voltage circuit 3 can be omitted.

制御処理回路1は、メモリを含むプロセッサ等により構成することができるものであり、温度センサ10による電気二重層コンデンサC1の温度検出値、昇圧回路5により昇圧した電圧で電気二重層コンデンサC1を充電する電流を電流検出回路6により検出した充電電流検出値、スイッチ回路4をオンとした時の電圧・電流検出回路7により検出した電気二重層コンデンサC1の端子電圧及び放電電流の検出値、電圧検出回路8によるダイオードD2を介した定電圧回路3への入力電圧検出値をそれぞれ入力する。又タイマ9による時間情報を入力する。このタイマ9からの時間情報により、制御処理回路1は、予め設定された時間間隔で、電気二重層コンデンサC1を含む電源バックアップ装置を試験する。この電源バックアップ装置の試験時には、スイッチ回路4をオンとして、電気二重層コンデンサC1の充電電圧を、ダイオードD2を介して定電圧回路3に入力する。この時、電気二重層コンデンサC1の端子電圧は、昇圧回路5により昇圧して充電されていたから、直流入力電圧より高い値であり、従って、電気二重層コンデンサC1からダイオードD2を介して定電圧回路3に入力されて、負荷回路2に、電気二重層コンデンサC1の充電電力が定電圧化されて供給される。この時、制御処理回路1は、電圧検出回路8によるダイオードD2を介して定電圧回路3に入力される電圧の検出値が、電圧・電流検出回路7による電圧検出値とダイオードD2の順方向電圧降下分に相当する電圧差であれば、電気二重層コンデンサC1による電源断時のバックアップが正常に行われていると判断することができる。   The control processing circuit 1 can be configured by a processor including a memory, and charges the electric double layer capacitor C1 with the temperature detection value of the electric double layer capacitor C1 by the temperature sensor 10 and the voltage boosted by the booster circuit 5. Charge current detection value detected by the current detection circuit 6, detection value of the terminal voltage and discharge current of the electric double layer capacitor C1 detected by the voltage / current detection circuit 7 when the switch circuit 4 is turned on, voltage detection The input voltage detection values to the constant voltage circuit 3 are input by the circuit 8 via the diode D2. Also, time information by the timer 9 is input. Based on the time information from the timer 9, the control processing circuit 1 tests the power supply backup device including the electric double layer capacitor C1 at a preset time interval. When testing this power backup device, the switch circuit 4 is turned on, and the charging voltage of the electric double layer capacitor C1 is input to the constant voltage circuit 3 via the diode D2. At this time, the terminal voltage of the electric double layer capacitor C1 is boosted and charged by the booster circuit 5, and therefore is higher than the DC input voltage. Therefore, the constant voltage circuit 3 from the electric double layer capacitor C1 through the diode D2 is used. The charging power of the electric double layer capacitor C1 is supplied at a constant voltage to the load circuit 2. At this time, the control processing circuit 1 determines that the voltage detection value input to the constant voltage circuit 3 via the diode D2 by the voltage detection circuit 8 is the voltage detection value by the voltage / current detection circuit 7 and the forward voltage of the diode D2. If the voltage difference corresponds to the drop, it can be determined that the backup by the electric double layer capacitor C1 when the power is cut off is normally performed.

又制御処理回路1は、前述のように、タイマ9からの時間情報に従って所定の時間間隔で試験を行うものであり、スイッチ回路4をオンとした試験開始による電気二重層コンデンサC1の電圧低下分Vd、即ち、電圧・電流検出回路7による電気二重層コンデンサC1の端子電圧がスイッチ回路4をオンとする前後の電圧差と、負荷回路2側へ供給する電流Icとを基に、電気二重層コンデンサC1の内部抵抗Rを、R=Vd/Icにより求める。又試験開始後の或る時間Δtと、時間Δtの前後の電気二重層コンデンサC1の電圧変化ΔVtと、電気二重層コンデンサC1からの電流Icとを基に、電気二重層コンデンサC1の静電容量を、C=Ic・Δt/ΔVtにより求めることができる。制御処理回路1は、定期的な試験毎の電気二重層コンデンサC1の放電電流、端子電圧、温度センサ10による温度及び算出した内部抵抗Rや静電容量C等を内部のメモリに保存し、電気二重層コンデンサC1の特性変化を監視する。又試験時間は、電気二重層コンデンサC1によりバックアップ可能の継続時間に比較して充分に短い時間とし、電源断による実際のバックアップに悪影響を与えないように、制御処理回路1は、タイマ1からの時間情報を基に試験継続時間を制御する。   Further, as described above, the control processing circuit 1 performs a test at a predetermined time interval according to the time information from the timer 9, and the voltage drop of the electric double layer capacitor C1 due to the start of the test with the switch circuit 4 turned on. Based on Vd, that is, the voltage difference before and after the switch circuit 4 is turned on by the terminal voltage of the electric double layer capacitor C1 by the voltage / current detection circuit 7 and the current Ic supplied to the load circuit 2 side, the electric double layer The internal resistance R of the capacitor C1 is obtained by R = Vd / Ic. The capacitance of the electric double layer capacitor C1 is based on a certain time Δt after the start of the test, a voltage change ΔVt of the electric double layer capacitor C1 before and after the time Δt, and a current Ic from the electric double layer capacitor C1. Can be obtained by C = Ic · Δt / ΔVt. The control processing circuit 1 stores the discharge current of the electric double layer capacitor C1, the terminal voltage, the temperature by the temperature sensor 10, the calculated internal resistance R, the capacitance C, and the like in an internal memory for each periodic test. The characteristic change of the double layer capacitor C1 is monitored. In addition, the test processing time is set to a time sufficiently short compared with the continuation time that can be backed up by the electric double layer capacitor C1, and the control processing circuit 1 starts from the timer 1 so as not to adversely affect the actual backup due to power interruption. Control test duration based on time information.

又制御処理回路1による前述の電源バックアップの機能の試験は、電気二重層コンデンサC1の放電特性を基に実施する場合を示すが、電気二重層コンデンサC1の充電特性を基に実施することも可能である。図2は、図1に示す電気二重層コンデンサC1の充放電特性説明図であり、出力電圧は、ダイオードD2を介して負荷回路2側に出力する電圧、即ち、電圧検出回路8により検出した電圧を示し、コンデンサ電圧は、電気二重層コンデンサC1の端子電圧、即ち、電圧・電流検出回路7により検出した電圧を示す。スイッチ回路4をオンとして試験を開始すると、電気二重層コンデンサC1は、昇圧回路5によって入力電圧より高い電圧により充電されているから、出力電圧は昇圧回路5により昇圧された電圧分高くなる。又電気二重層コンデンサC1の端子電圧は、昇圧回路5により昇圧した充電電圧となっているが、スイッチ回路4をオンとして放電試験を開始すると、電気二重層コンデンサC1の端子電圧は、Vdの電圧降下となり、放電試験継続により、端子電圧は徐々に低下する。又放電試験後に充電試験、即ち、スイッチ回路4をオフとし、昇圧回路5により昇圧した電圧で電気二重層コンデンサC1を充電することにより、徐々に上昇する。この充電試験時の電気二重層コンデンサC1の端子電圧の変化を、電圧・電流検出回路7により検出し、充電電流を電流検出回路6により検出して、制御処理回路1により、内部抵抗Rは、前述のように、R=Vd/Icにより求め、静電容量Cにつても同様に、C=Ic・Δt/Δvとして求めることができる。   In addition, although the test of the power supply backup function by the control processing circuit 1 is performed based on the discharge characteristics of the electric double layer capacitor C1, it can also be performed based on the charge characteristics of the electric double layer capacitor C1. It is. FIG. 2 is an explanatory diagram of the charge / discharge characteristics of the electric double layer capacitor C1 shown in FIG. 1, and the output voltage is the voltage output to the load circuit 2 side via the diode D2, that is, the voltage detected by the voltage detection circuit 8. The capacitor voltage indicates a terminal voltage of the electric double layer capacitor C1, that is, a voltage detected by the voltage / current detection circuit 7. When the test is started with the switch circuit 4 turned on, the electric double layer capacitor C1 is charged with a voltage higher than the input voltage by the booster circuit 5, and therefore the output voltage becomes higher by the voltage boosted by the booster circuit 5. The terminal voltage of the electric double layer capacitor C1 is a charging voltage boosted by the booster circuit 5. When the discharge test is started with the switch circuit 4 turned on, the terminal voltage of the electric double layer capacitor C1 is Vd. As the discharge test continues, the terminal voltage gradually decreases. Further, after the discharge test, the charging test is performed, that is, the switch circuit 4 is turned off, and the electric double layer capacitor C1 is charged with the voltage boosted by the booster circuit 5 to gradually increase. A change in the terminal voltage of the electric double layer capacitor C1 during the charging test is detected by the voltage / current detection circuit 7, the charging current is detected by the current detection circuit 6, and the internal resistance R is determined by the control processing circuit 1. As described above, R = Vd / Ic, and the capacitance C can be similarly obtained as C = Ic · Δt / Δv.

図3は、電気二重層コンデンサの静電容量及び内部抵抗の特性説明図であり、(a)静電容量は、温度に対する静電容量の変化を示し、(b)内部抵抗は、温度に対する抵抗の変化率を示す。静電容量は、温度が低くなるに従って減少する傾向を有し、又内部抵抗は、温度が低くなるに従って急速に増大する傾向を有するものである。従って、図1に示す温度センサ10により、電気二重層コンデンサC1の温度を測定し、制御処理部1は、測定温度情報により、前述の内部抵抗及び静電容量の測定値に対して、基準温度に換算して特性判断を行うことができる。   FIG. 3 is an explanatory diagram of the characteristics of the capacitance and internal resistance of the electric double layer capacitor. (A) The capacitance indicates a change in the capacitance with respect to temperature, and (b) the internal resistance indicates the resistance with respect to temperature. Indicates the rate of change. Capacitance has a tendency to decrease with decreasing temperature, and internal resistance has a tendency to increase rapidly with decreasing temperature. Accordingly, the temperature of the electric double layer capacitor C1 is measured by the temperature sensor 10 shown in FIG. 1, and the control processing unit 1 determines the reference temperature with respect to the measured values of the internal resistance and the capacitance based on the measured temperature information. Characteristic judgment can be made in terms of.

又負荷回路2の特性が、ダイオードD1を介して電流を供給する場合と、ダイオードD2を介して電流を供給する場合とに於いて殆ど同一値の電流を供給できる場合、電圧・電流検出回路7は、電圧検出の機能のみの構成とすることも可能である。又制御処理回路1による電気二重層コンデンサC1を含むバックアップ機能の良否判定を、タイマ9からの時間情報に従って1時間毎や1ヶ月毎等に於いて行い、過去の測定値と現在の測定値とから、残存使用可能期間を予測することも可能である。例えば、図4に示すように、横軸を時間、縦軸を、前述の静電容量や内部抵抗等をパラメータとし、閾値を設定しておくことにより、過去の特性変化と現在の特性とから、寿命として示す残存期間を推測することが可能となり、残存時間が所定値以下となった場合に警報を送出して、保守管理者に通知することができる。   When the current of the load circuit 2 is supplied through the diode D1 and when the current is supplied through the diode D2, the voltage / current detection circuit 7 It is also possible to adopt a configuration having only a voltage detection function. The control processing circuit 1 determines whether the backup function including the electric double layer capacitor C1 is good or not according to the time information from the timer 9 every hour, every month, and so on. Therefore, it is possible to predict the remaining usable period. For example, as shown in FIG. 4, by setting the threshold value with the horizontal axis as time, the vertical axis as the above-described capacitance, internal resistance, and the like, the past characteristic change and the current characteristic can be obtained. The remaining period indicated as the life can be estimated, and when the remaining time is equal to or less than a predetermined value, an alarm can be sent to notify the maintenance manager.

図5は、本発明の実施例2の説明図であり、図1と同一符号は、同一名称部分を示し、1aは演算回路、1bはA/D変換器、1cはメモリ、7aは電圧検出回路、7bは電流検出回路、11は電源回路、12はAC/DC変換回路、13は断検出回路、14は異常発生通知端子、15は状態情報通知端子、ACは100V又は200Vの商用交流電源を示す。又電気二重層コンデンサC1として、複数の単一電気二重層コンデンサを複数直列接続し、且つ複数並列接続した構成を示す。電源回路11は、AC/DC変換回路12により交流100V又は200Vを負荷回路2の動作電圧に対応した電圧の直流電圧に変換し、第1のダイオードD1を介して定電圧回路3に供給し、定電圧回路3は、負荷回路2の動作電圧を安定化して供給する。又昇圧回路5により昇圧して電気二重層コンデンサC1を充電し、その充電電流を電流検出回路6により検出して、制御処理回路1に入力する。又電源回路11の断検出回路13は、商用交流電源ACの停電検出時にはスイッチ回路4をオンとし、電気二重層コンデンサC1の充電電荷を、第2のダイオードD2を介して定電圧回路3に供給し、負荷回路2に継続して安定化直流電圧を供給する。   FIG. 5 is an explanatory diagram of a second embodiment of the present invention. The same reference numerals as those in FIG. 1 denote the same parts, 1a is an arithmetic circuit, 1b is an A / D converter, 1c is a memory, and 7a is voltage detection. Circuit, 7b is a current detection circuit, 11 is a power supply circuit, 12 is an AC / DC conversion circuit, 13 is a disconnection detection circuit, 14 is an abnormality occurrence notification terminal, 15 is a status information notification terminal, and AC is a 100V or 200V commercial AC power supply Indicates. Further, as the electric double layer capacitor C1, a configuration in which a plurality of single electric double layer capacitors are connected in series and connected in parallel is shown. The power supply circuit 11 converts AC 100V or 200V into a DC voltage corresponding to the operating voltage of the load circuit 2 by the AC / DC conversion circuit 12, and supplies the DC voltage to the constant voltage circuit 3 via the first diode D1. The constant voltage circuit 3 stabilizes and supplies the operating voltage of the load circuit 2. Further, the electric double layer capacitor C1 is charged by being boosted by the booster circuit 5, and the charging current is detected by the current detection circuit 6 and input to the control processing circuit 1. Further, the disconnection detection circuit 13 of the power supply circuit 11 turns on the switch circuit 4 when a power failure of the commercial AC power supply AC is detected, and supplies the charge of the electric double layer capacitor C1 to the constant voltage circuit 3 via the second diode D2. Then, the stabilized DC voltage is continuously supplied to the load circuit 2.

制御処理回路1は、電流検出回路6と、電圧検出回路7aと、電流検出回路7b,8と、温度センサ10とからの入力信号を、A/D変換器1bによりディジタル信号に変換して、演算回路1aに入力する。演算回路1aは、プロセッサ等の演算機能及び制御機能を有するもので、タイマ9からの時間情報を入力し、予め設定した時間間隔で、昇圧回路5に昇圧して電気二重層コンデンサC1を充電する充電電流を、電流検出回路6により検出し、充電電圧を、電圧検出回路7aにより検出し、それぞれ制御処理回路1に入力し、電気二重層コンデンサC1の充電特性を監視する。又予め設定したバックアップ機能の試験を行う場合、スイッチ回路4をオンとする。その時の電気二重層コンデンサC1の端子電圧を電圧検出回路7aにより検出し、負荷回路2側へ供給する電流を電流検出回路7bにより検出し、ダイオードD2を介して定電圧回路3に入力する電圧を、電圧検出回路8により検出し、温度センサ10により温度を検出し、それぞれの検出信号を、A/D変換器1bを介して演算回路1aに入力し、電気二重層コンデンサC1の内部抵抗、静電容量の測定演算を行い、演算結果のデータをメモリ1cに格納する。又メモリ1cに保持されている過去の測定データを参照して、電気二重層コンデンサC1の使用可能残存期間の判定処理等を行う。正常の場合は、状態情報通知端子15から保守管理者の装置へ、ネットワーク等を介して、測定演算結果情報を伝送する。又電気二重層コンデンサC1の使用可能残存期間が僅かの場合、又は、電圧検出回路8による電圧検出値が、電圧検出回路7aによる電圧検出値に比較して、ダイオードD2の順方向電圧降下に比較して異常に低い場合等の異常状態と判定した場合、異常発生通知端子14から警報装置等に緊急状態情報を送出する。これらの異常発生通知端子14及び状態情報通知端子15からの情報は、既に知られている各種の通信手段により行うことが可能である。   The control processing circuit 1 converts input signals from the current detection circuit 6, the voltage detection circuit 7a, the current detection circuits 7b and 8 and the temperature sensor 10 into digital signals by the A / D converter 1b, Input to the arithmetic circuit 1a. The arithmetic circuit 1a has an arithmetic function and a control function such as a processor. The arithmetic circuit 1a inputs time information from the timer 9, boosts the booster circuit 5 at a predetermined time interval, and charges the electric double layer capacitor C1. The charging current is detected by the current detection circuit 6, the charging voltage is detected by the voltage detection circuit 7a, and each is input to the control processing circuit 1 to monitor the charging characteristics of the electric double layer capacitor C1. When a backup function test set in advance is performed, the switch circuit 4 is turned on. The terminal voltage of the electric double layer capacitor C1 at that time is detected by the voltage detection circuit 7a, the current supplied to the load circuit 2 side is detected by the current detection circuit 7b, and the voltage input to the constant voltage circuit 3 via the diode D2 is detected. The voltage detection circuit 8 detects the temperature, the temperature sensor 10 detects the temperature, and each detection signal is input to the arithmetic circuit 1a via the A / D converter 1b, and the internal resistance of the electric double layer capacitor C1 is reduced. An electric capacity measurement calculation is performed, and data of the calculation result is stored in the memory 1c. In addition, referring to past measurement data held in the memory 1c, a determination process for the remaining usable period of the electric double layer capacitor C1 is performed. If normal, the measurement calculation result information is transmitted from the status information notification terminal 15 to the maintenance manager's device via a network or the like. When the remaining usable period of the electric double layer capacitor C1 is small, or the voltage detection value by the voltage detection circuit 8 is compared with the voltage detection value by the voltage detection circuit 7a, compared with the forward voltage drop of the diode D2. If the abnormal state is determined to be abnormally low, emergency state information is transmitted from the abnormality occurrence notification terminal 14 to the alarm device or the like. Information from the abnormality occurrence notification terminal 14 and the state information notification terminal 15 can be obtained by various known communication means.

1 制御処理回路
2 負荷回路
3 定電圧回路
4 スイッチ回路
5 昇圧回路
6 電流検出回路
7 電圧・電流検出回路
8 電圧検出回路
9 タイマ
10 温度センサ
C1 電気二重層コンデンサ
D1,D2 第1、第2のダイオード
DESCRIPTION OF SYMBOLS 1 Control processing circuit 2 Load circuit 3 Constant voltage circuit 4 Switch circuit 5 Booster circuit 6 Current detection circuit 7 Voltage / current detection circuit 8 Voltage detection circuit 9 Timer 10 Temperature sensor C1 Electric double layer capacitor D1, D2 First, second diode

Claims (4)

直流電源から第1のダイオードを介して負荷回路に直流電力を供給し、且つ前記直流電源から昇圧回路により昇圧して電気二重層コンデンサを充電し、前記直流電源の異常発生時に、前記電気二重層コンデンサの充電電圧を、スイッチ回路と第2のダイオードとを介して前記負荷回路に供給する電源バックアップ装置に於いて、
前記電気二重層コンデンサの充電電圧及び放電電流を検出する電圧・電流検出回路と、
前記第1及び第2のダイオードを介して前記負荷回路に供給する電圧を検出する電圧検出回路と、
タイマからの時間情報を基に、予め設定された期間毎に前記スイッチ回路をオンに制御し、前記電気二重層コンデンサの充電電圧を前記第2のダイオードを介して前記負荷回路に供給し、前記電圧・電流検出回路により前記電気二重層コンデンサから供給する直流電流と直流電圧とを検出して、前記電気二重層コンデンサの静電容量と内部抵抗とを算出し、該算出した静電容量及び内部抵抗を基に前記電気二重層コンデンサの異常の有無を判定処理する制御処理回路と
を備えたことを特徴とする電源バックアップ装置。
DC power is supplied from the DC power source to the load circuit via the first diode, and the electric double layer capacitor is charged by boosting from the DC power source by a booster circuit. When an abnormality occurs in the DC power source, the electric double layer In a power backup device for supplying a charging voltage of a capacitor to the load circuit via a switch circuit and a second diode,
A voltage / current detection circuit for detecting a charging voltage and a discharging current of the electric double layer capacitor;
A voltage detection circuit for detecting a voltage supplied to the load circuit via the first and second diodes;
Based on the time information from the timer, the switch circuit is controlled to be turned on every preset period, the charging voltage of the electric double layer capacitor is supplied to the load circuit via the second diode, A DC current and a DC voltage supplied from the electric double layer capacitor are detected by a voltage / current detection circuit, and an electrostatic capacity and an internal resistance of the electric double layer capacitor are calculated. And a control processing circuit for determining whether or not the electric double layer capacitor is abnormal based on a resistance.
前記電気二重層コンデンサの周囲温度を検出する温度センサを備え、前記制御処理回路は、前記温度センサによる検出温度を基に前記電気二重層コンデンサの静電容量及び内部抵抗の算出値を補正処理する機能を備えていることを特徴とする請求項1記載の電源バックアップ装置。   A temperature sensor for detecting the ambient temperature of the electric double layer capacitor is provided, and the control processing circuit corrects the calculated values of the capacitance and internal resistance of the electric double layer capacitor based on the temperature detected by the temperature sensor. 2. The power backup apparatus according to claim 1, further comprising a function. 前記制御処理回路は、前記スイッチ回路をオンに制御して前記電気二重層コンデンサの充電電圧を前記負荷回路に供給する放電試験と、前記スイッチ回路をオフに制御して、前記電気二重層コンデンサを前記昇圧回路により昇圧した直流電圧により充電する充電試験とを、前記タイマからの時間情報に従って予め設定された期間毎に実施する機能を備えていることを特徴とする請求項1記載の電源バックアップ装置。   The control processing circuit controls the switch circuit to turn on and discharges the charge voltage of the electric double layer capacitor to the load circuit, and controls the switch circuit to turn off the electric double layer capacitor. 2. The power backup apparatus according to claim 1, further comprising a function of performing a charge test for charging with a DC voltage boosted by the booster circuit for each preset period in accordance with time information from the timer. . 前記制御処理回路は、前記タイマからの時間情報を基に、予め設定された期間毎の前記電気二重層コンデンサの静電容量と内部抵抗とを算出して記憶させるメモリを備え、該メモリに記憶された前記静電容量と内部抵抗との変化傾向を基に、前記電気二重層コンデンサの残存使用可能期間の推定処理を行う機能を備えていることを特徴とする請求項1記載の電源バックアップ装置。   The control processing circuit includes a memory that calculates and stores the capacitance and internal resistance of the electric double layer capacitor for each preset period based on time information from the timer, and stores the memory in the memory 2. The power backup apparatus according to claim 1, further comprising a function of performing an estimation process of a remaining usable period of the electric double layer capacitor based on the change tendency of the capacitance and the internal resistance. .
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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102529460A (en) * 2011-12-28 2012-07-04 珠海天威技术开发有限公司 Memory chip, charging control method for memory chip in intermittent power supply, consumables container with memory chip, and imaging equipment with memory chip
WO2013121916A1 (en) * 2012-02-17 2013-08-22 住友建機株式会社 Excavator and method for controlling excavator
JP2013253940A (en) * 2012-06-08 2013-12-19 Gs Yuasa Corp Life estimating device and life estimating method for electricity storage element, and electricity storage system
KR101365162B1 (en) * 2011-11-04 2014-02-21 아즈빌주식회사 Electromotive actuator
KR101364667B1 (en) 2011-11-04 2014-02-28 아즈빌주식회사 Electromotive actuator
WO2015037184A1 (en) * 2013-09-11 2015-03-19 株式会社Gsユアサ Power storage element lifespan estimation device and lifespan estimation method and power storage system
CN105978136A (en) * 2016-06-07 2016-09-28 南京协澳智能控制系统有限公司 Charging type switching power supply
JP2020150639A (en) * 2019-03-12 2020-09-17 富士電機株式会社 Power supply system

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06189471A (en) * 1992-08-05 1994-07-08 Merlin Gerin Method for determining backup period of battery
JP2006105641A (en) * 2004-10-01 2006-04-20 Shin Kobe Electric Mach Co Ltd Backup power supply system
JP2008268042A (en) * 2007-04-23 2008-11-06 Power System:Kk Abnormality determining method and device for capacitor power supply

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06189471A (en) * 1992-08-05 1994-07-08 Merlin Gerin Method for determining backup period of battery
JP2006105641A (en) * 2004-10-01 2006-04-20 Shin Kobe Electric Mach Co Ltd Backup power supply system
JP2008268042A (en) * 2007-04-23 2008-11-06 Power System:Kk Abnormality determining method and device for capacitor power supply

Cited By (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101365162B1 (en) * 2011-11-04 2014-02-21 아즈빌주식회사 Electromotive actuator
KR101364667B1 (en) 2011-11-04 2014-02-28 아즈빌주식회사 Electromotive actuator
WO2013097568A1 (en) * 2011-12-28 2013-07-04 珠海天威技术开发有限公司 Memory chip and charging control method for memory chip, consumables container, and imaging device
CN102529460B (en) * 2011-12-28 2013-12-11 珠海天威技术开发有限公司 Memory chip, charging control method for memory chip in intermittent power supply, consumables container with memory chip, and imaging equipment with memory chip
CN102529460A (en) * 2011-12-28 2012-07-04 珠海天威技术开发有限公司 Memory chip, charging control method for memory chip in intermittent power supply, consumables container with memory chip, and imaging equipment with memory chip
US9548615B2 (en) 2012-02-17 2017-01-17 Sumitomo(S.H.I.) Construction Machinery Co., Ltd. Shovel and control method of shovel
WO2013121916A1 (en) * 2012-02-17 2013-08-22 住友建機株式会社 Excavator and method for controlling excavator
KR20140126709A (en) * 2012-02-17 2014-10-31 스미토모 겐키 가부시키가이샤 Excavator and method for controlling excavator
JPWO2013121916A1 (en) * 2012-02-17 2015-05-11 住友建機株式会社 Excavator and control method of excavator
KR101888044B1 (en) * 2012-02-17 2018-08-13 스미토모 겐키 가부시키가이샤 Excavator and method for controlling excavator
JP2013253940A (en) * 2012-06-08 2013-12-19 Gs Yuasa Corp Life estimating device and life estimating method for electricity storage element, and electricity storage system
WO2015037184A1 (en) * 2013-09-11 2015-03-19 株式会社Gsユアサ Power storage element lifespan estimation device and lifespan estimation method and power storage system
JPWO2015037184A1 (en) * 2013-09-11 2017-03-02 株式会社Gsユアサ Storage device lifetime estimation device, lifetime estimation method, and storage system
US9983269B2 (en) 2013-09-11 2018-05-29 Gs Yuasa International Ltd. Apparatus and method for estimating life of energy storage device and energy storage system
CN105978136A (en) * 2016-06-07 2016-09-28 南京协澳智能控制系统有限公司 Charging type switching power supply
JP2020150639A (en) * 2019-03-12 2020-09-17 富士電機株式会社 Power supply system
JP7196700B2 (en) 2019-03-12 2022-12-27 富士電機株式会社 power system

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