JP2010146191A - Information processing apparatus and method of checking performance of storage system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To allow a host computer to determine the feasible performance of a host application by checking a data recording speed (processing speed) that is effective for all media. <P>SOLUTION: A sequence for use at an application for operation on an information processing apparatus is generated and sent to media that are data-communicably connected to the information processing apparatus. The times of start and end of measurement of the execution time of the sequence by the media are received and the execution time of the sequence is measured so as to generate speed check result data. Based on the speed check result data generated, the performance that can be achieved with the application is determined. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an information processing apparatus and a storage system performance confirmation method that can confirm the actual data processing capacity (processing speed) of a connected memory.

  A medium in which a flash memory is a card type is sold by various companies, and is used as a recording medium such as a DSC (digital still camera) or a camcorder as the memory capacity increases. In a DSC or camcorder that saves a photograph taken as recorded data, a data transfer speed that is higher than a certain processing speed (speed) may be required. For example, in the case of DSC, it is a case where still image continuous shooting is performed in which a fixed number of images are recorded per second. The data recording speed is proportional to the number of still image continuous shots per second and the number of pixels of the imager (imaging device). As image processing circuits have evolved with the times, the number of still image continuous shots per second increases and the number of pixels of the imager increases, so that faster data recording processing is required. Thus, the speed required of the media changes with the times.

  For example, in the case of still image continuous shooting, still image data processed during continuous shooting is temporarily stored in a buffer memory inside the DSC, but it is necessary to sequentially transfer the data to a medium. If the data transfer speed to the media is slower than the data speed stored in the buffer memory, the buffer memory will eventually become full, and still image continuous shooting will be stopped, or still image continuous shooting will continue intermittently. . This is an unexpected performance degradation during use for the user and causes a problem.

  Also, the effective data transfer rate during this period varies depending on the combination of DSC and media. When the data transfer rate affects the performance of the DSC application, the performance of the application changes depending on the combination of the DSC and the media, and further confuses the user. As an example, when “Media A” and “Media B” are used for a certain DSC, the expected duration of shooting at the number of shots per second and the number of shots per second change depending on the media. Problems arise. Similarly, the same problem occurs when an A type DSC and a B type DSC are used for a certain medium.

In order to solve such a problem, there is a technique for measuring the speed of a medium. However, it generates a pseudo writing operation inside the medium and measures the speed. For example, Patent Document 1 describes a technique for measuring performance by a write command, that is, measuring a busy time of a specified memory cell and managing it as a table.
JP-A-2005-222201

  However, in the device described in Patent Document 1, the busy time is measured in the medium, does not include the time for the host to operate, and the measurement result does not change depending on the host to be measured. When the sequence of the host application is different from the sequence of the pseudo writing operation inside the medium, the speed measured inside the medium is different from the speed when the actual host application is operated. Therefore, it is difficult to use the above-described technique for accurately determining the performance of the host application.

  Further, even if the speed is measured from the host computer side, the result is only displayed, and it is difficult to receive the feedback from the user, perform the remeasurement, and approach the usage of the application desired by the user.

  The present invention has been made in view of such a situation, and the host computer can confirm the effective data recording speed (processing speed) for all the media and determine the feasible performance of the host application. It is what you want to do.

  In order to solve the above-described problems and achieve the object, the present invention generates a sequence used by an application that operates on the information processing apparatus, and transfers the sequence to a medium that is connected to the information processing apparatus so that data communication is possible. Send. Then, the start time and the end time of measurement of the execution time of the sequence by the medium are received, the execution time of the sequence is measured, and speed check result data is generated. The performance that can be executed by the application is determined from the generated speed check result data.

  According to the above configuration, since the performance of the media is measured using the actual application sequence, the performance of the application is determined based on the effective speed of the combination of the actual media and the information processing apparatus (host computer). be able to.

  According to the present invention, the host computer can confirm the effective data recording speed (processing speed) for all the media, and can determine the feasible performance of the host application.

Hereinafter, an example of the best mode for carrying out the present invention will be described with reference to the accompanying drawings. The description will be given in the following order.
1. First embodiment (speed confirmation result recording area: provided in information processing apparatus)
2. Second embodiment (speed confirmation result recording area: provided in the medium)
3. Third embodiment (speed confirmation result recording area: provided in information processing apparatus and medium)
4). Fourth Embodiment (Information Processing Device: Contains Recording Area)
5). Fifth embodiment (information processing device: equipped with multiple slots)
6). Sixth embodiment (information processing apparatus: equipped with a plurality of application control units)

<First Embodiment>
[Configuration example of information processing device (host computer)]
The present invention, in a storage system composed of a host and a medium, has a function of confirming the speed (processing speed) of the medium by executing the transmission pattern (sequence) of the Read / Write command used by the application on the medium. In addition, the host has a function of calculating the maximum value of the processing capacity of the host in the application to be used from the speed confirmation result and determining the realizable performance according to the calculated value. In the first embodiment described below, the speed confirmation result recording area is provided inside the information processing apparatus (host computer).

  FIG. 1 is a block diagram of a storage system including a host computer (hereinafter simply referred to as “host”) 100 and a medium 200 to which the information processing apparatus according to the first embodiment of the present invention is applied.

The host 100 includes an input unit 101, a speed check activation unit 102, a data generation unit 103, a dummy data generation unit 104, a multiplexer (hereinafter referred to as “MUX”) 105, a sequence generation unit 106, a speed measurement unit 107, and a speed check. A result processing unit 108, a performance determination unit 109, a display unit 110, a media control unit 111, an external interface 112, an application control unit 113, and a speed check result recording area 114 are configured.
The medium 200 includes an external interface 201, a memory controller 202, and a nonvolatile memory 203 having a storage area 204.

Details of each block of the host 100 will be described.
The input unit 101 receives input of a performance confirmation request (speed confirmation request) and application operation settings for the medium 200 from the user, and outputs these pieces of information to the speed confirmation activation unit 102.

FIG. 2 is a block diagram showing an internal configuration of the speed check activation unit 102.
The speed check activation unit 102 includes an OR circuit 102-1 and an operation setting change unit 102-2, determines a factor for starting processing, and changes the activation procedure according to the factor.

  The inputs are a “performance confirmation request from the user” from the input unit 101, an operation setting of the application, and a speed confirmation request from the speed confirmation result processing unit 108. When the input to the OR circuit 102-1 is “Performance Confirmation Request from User”, the speed confirmation request and the current application operation setting are output to the dummy data generation unit 104, the MUX 105, and the sequence generation unit 106. . When the input is “application operation setting (change)”, an inquiry about a speed check result is output to the speed check result processing unit 108. On the other hand, when a speed check request is returned to the OR circuit 102-1, the speed check request and the application operation setting are output to the dummy data generation unit 104, the MUX 105, and the sequence generation unit 106 (see FIG. 2).

  The host 100 has operation setting information for one or a plurality of applications in a memory (not shown), and has a function of switching operation settings according to an instruction from the user via the input unit 101 when there are a plurality of operation setting information for applications. .

  The data generation unit 103 generates data used in the application and inputs it to the MUX 105. For example, when photographing data from the image sensor is input to the data generation unit 103, processing such as conversion to a data format suitable for application use is performed, and the data is output to the MUX 105.

FIG. 3 is a block diagram showing an internal configuration of the dummy data generation unit 104.
The input of the dummy data generation unit 104 is an application operation setting from the speed check activation unit 102. The dummy data generation unit 104 includes a data generation unit 104-1 and a data output timing adjustment unit 104-2. Data (dummy data) used when checking the speed is generated by the data generation unit 104-1. Then, based on the application operation setting, the data output timing adjustment unit 104-2 controls the dummy data output timing to be the same as the actual data, and outputs the dummy data to the MUX 105. The dummy data is the same sequence (read / write command transmission pattern) as that used in the actual application.

  The MUX 105 is a switching unit that switches input data of the sequence generation unit 106 in response to a speed confirmation request. The inputs of the MUX 105 are data from the data generation unit 103, dummy data from the dummy data generation unit 104, and a speed confirmation request from the speed confirmation activation unit 102. The MUX 105 outputs the input data from the dummy data generation unit 104 when there is a speed check request, and outputs the data from the data generation unit 103 otherwise.

FIG. 4 is a block diagram showing an internal configuration of the sequence generation unit 106.
The sequence generation unit 106 switches the sequence to be generated according to the operation setting of the input application, outputs the sequence to the media control unit 111, and outputs a speed measurement start / end request. The inputs of the sequence generation unit 106 are data from the MUX 105, a speed confirmation request from the speed confirmation activation unit 102, and application operation settings.

  The sequence generation unit 106 includes a sequence A generation unit 106-1 to a sequence N generation unit 106-4 that generates a sequence, a MUX (multiplexer) 106-5 that selects an execution sequence, and a speed measurement start / end control unit 106-. 6 is composed. In response to the speed confirmation request, the speed measurement start / end control unit 106-6 outputs a measurement start request to the speed measurement unit 107. Also, a sequence to be executed by switching the MUX 106-5 is selected based on the operation setting of the application, and the sequence is output to the media control unit 111. When the execution of the sequence is completed, the speed measurement start / end control unit 106-6 outputs a measurement end request to the speed measurement unit 107. Information on the operation setting of the application is also output to the speed measurement unit 107.

FIG. 5 shows a sequence for writing an image file as an example of the sequence.
In this example, an image file is written in a FAT (File Allocation Tables) file system. Process numbers 1 and 2 of a series of sequences are read processing of a directory (DIR) to be written, and process number 3 is FAT read processing. Process numbers 4 to 8 are image data writing or reading processes. Process numbers 9 and 10 are FAT writing processes for reflecting the recording area of the written image data. Process number 11 is a write process for reflecting the directory structure.

FIG. 6 is a block diagram showing an internal configuration of the speed measuring unit 107.
The speed measuring unit 107 measures the execution time of the sequence. The input of the speed measurement unit 107 is information on a measurement start request, an end request, and application operation setting from the sequence generation unit 106.

  The speed measuring unit 107 includes a timer 107-1 and a speed confirmation result data generating unit 107-2. The timer 107-1 includes a counter, and measures time and date by counting a reference clock such as an internal clock of an MPU (Micro Processing Unit) (not shown). The speed measurement unit 107 receives the measurement start request from the sequence generation unit 106, clears the counter, starts counting, and stops counting with the measurement end request. The speed check result data generation unit 107-2 generates speed check result data based on the count value of the timer and outputs the data to the speed check result processing unit 108.

  The data of the speed confirmation result includes, for example, the count number of the counter, reference clock information, speed confirmation result including application operation setting information (see FIG. 7). That is, information (application setting information) for specifying the application and sequence for which the speed check has been performed, speed information, information for specifying the date, and arbitrary information that the application stores together with the speed check result are included. The speed information can be expressed by a count value of a reference clock, for example. Further, the time can be measured by the frequency information of the reference clock and the number of clocks. In addition, information (not shown) for specifying the medium on which the speed has been confirmed is also included. Note that the speed confirmation result data is not limited to this example.

FIG. 8 is a block diagram showing an internal configuration of the speed confirmation result processing unit 108.
The speed confirmation result processing unit 108 mainly performs buffering of the speed confirmation result and a request for reading the speed confirmation result to the speed confirmation result recording area 114 of the host 100. Then, it is determined whether or not the read speed check result is the same as the speed check result measured by the operation setting of the application in the current host 100. The input of the speed check result processing unit 108 is an inquiry of the speed check result from the speed check starting unit 102, a speed check result and an operation setting of the application from the speed measuring unit 107, and an output from the speed check result recording area 114 of the host 100. This is the speed confirmation result.

  As shown in FIG. 8, the speed confirmation result processing unit 108 includes a buffer 108-1, a speed confirmation result filter 108-2, and a speed confirmation result read control unit 108-3. When the speed check result from the speed measuring unit 107 is input, it is unconditionally taken into the buffer 108-1, and the speed check result is stored in the speed check result recording area 114 as the payload (information to be transferred). Output a write request. The buffer 108-1 outputs the speed check result to the performance determination unit 109. When writing the speed check result in the speed check result recording area 114, the speed check result has the information described with reference to FIG. 7 and the information for specifying the medium on which the speed check has been performed.

  The speed check result recording area 114 is a volatile or non-volatile memory. When it is necessary to hold the speed confirmation result, for example, when there is a purpose of using the speed confirmation result later, a nonvolatile memory is used. In the speed confirmation result recording area 114, for example, one or a plurality of speed confirmation results can be recorded and stored for each medium. The same applies to a speed confirmation result recording area provided on the medium side described later.

Here, with reference to the sequence diagram of FIG. 9, the exchange of the speed check result read request and the speed check result reception by the speed check result processing unit 108 will be described.
First, when a speed confirmation result query is input from the speed confirmation activation unit 102, the speed confirmation result reading control unit 108-3 outputs a request for reading the speed confirmation result (speed recording data) to the speed confirmation result recording area 114 ( Step S1).

  The speed confirmation result filter 108-2 receives the speed confirmation result for the medium 200 output from the speed confirmation result recording area 114 (step S2). Then, it is checked whether or not the received speed confirmation result is a measurement result by the host 100 itself, and is an expected application operation setting result. If the expected speed confirmation result is received, the result is stored in the buffer 108-. Temporarily save to 1.

  When the expected speed result cannot be received, the speed confirmation result filter 108-2 repeats retransmission of the request command for the speed confirmation result (steps S3 and S5). The speed confirmation result recording area 114 transmits the data stored in the speed confirmation result recording area 514 one by one in response to the speed confirmation result transmission request from the speed confirmation result processing unit 108 (step S4). . In the example of FIG. 9, the command confirmation result transmitted in step S4 is the last command confirmation result.

  When there is no speed check result to be transmitted to the speed check result recording area 114, the speed check result processing unit 108 detects a speed check result read error after transmitting a speed check result read request (step S6). When receiving the speed check result read error, the speed check result processing unit 108 outputs a speed check request to the speed check starting unit 102.

Returning to the description of each block of the host 100 in FIG.
The performance determination unit 109 determines the performance executable by the application based on the received speed confirmation result. The input of the performance determination unit 109 is a speed confirmation result output from the speed confirmation result processing unit 108. The reference clock information included in the speed check result, the count value of the counter, and the performance determination result calculated from the application setting information are output to the display unit 110.

  The input of the display unit 110 is the performance determination result of the application output from the performance determination unit 109. The display unit 110 displays the performance information of the application in a form that can be recognized by the user, for example, GUI (Graphical User Interface).

  The input of the media control unit 111 is a sequence from the sequence generation unit 106 and a speed confirmation result read request from the speed confirmation result processing unit 108, and controls the external interface 112 based on these inputs.

  The external interface 112 is an example of a connection terminal unit described in the claims, and the medium 200 is mounted, and data is transmitted to and received from the medium 200 based on control from the media control unit 111.

[Example of media configuration]
Next, details of each block of the medium 200 will be described.
In the example illustrated in FIG. 1, the medium 200 includes an external interface 201, a memory controller 202, and a nonvolatile memory 203.

  The external interface 201 exchanges data with the host 100 based on control from the memory controller 202.

  The memory controller 202 performs reading and writing to the nonvolatile memory 203 (storage area 204). When a data read request is received from the host 100, a read process is performed on the storage area 204 and the read data is sent to the host 100. When a write request is received, the storage area 204 is written.

[Performance confirmation processing]
FIG. 10 is a flowchart showing the performance confirmation processing for the medium 200 by the host 100.
The processing start factor may be a performance confirmation request from the user, media detection, application setting change, or the like.

  In step S11, a start factor is determined, and the processing procedure is branched according to the factor. If it is a performance confirmation request from the user, the sequence is executed and the execution time is measured, so that the sequence proceeds to step S14. If the start factor is media detection or application setting change, the process proceeds to step S12 in order to read the speed confirmation result stored and recorded in the speed confirmation result recording area 114. The processing in step S11 is performed by the speed check activation unit 102.

  Even when the speed confirmation result data confirmed in the sequence of the application to be executed is found in the area for recording the speed confirmation result of the media, the user performance measurement request via the input unit 101 is accepted. May be. In this case, the speed check is performed again in accordance with the performance measurement request from the user, and the speed check result recording area is overwritten with the new speed check result that has been executed again, whereby the latest speed check result is saved.

  In step S12, the speed confirmation result recorded in the speed confirmation result recording area 114 is read. This processing is performed by the speed confirmation result processing unit 108.

  In step S13, it is determined whether the execution of the sequence is necessary from the read result of the speed confirmation result in step S12, and the processing procedure is branched. If there is a speed check result in the application operation settings of the current host 100 in the speed check read result in step S12, step S16 is used to determine the executable performance of the application from the existing speed check result. Move on. On the other hand, when there is no speed confirmation result in the application operation setting of the current host 100, the sequence proceeds to step S14 in order to obtain the speed confirmation result. In this process, reading of the speed check result and discrimination of the read result are performed by the speed check result processing unit 108, and the shift to step S14 is performed by the speed check starting unit 102.

  In step S14, a sequence is generated / executed in accordance with the operation setting of the application, the medium 200 is actually accessed, and the time required until the end of the sequence is measured. In this processing, sequence generation / execution is performed by the data generation unit 103, the dummy data generation unit 104, the MUX 105, and the sequence generation unit 106, and the execution time of the sequence is measured by the speed measurement unit 107.

  In step S15, the measured sequence execution time information and the application setting operation information at that time are written in the speed confirmation result recording area 114 in the host 100 as a speed confirmation result. This processing is performed by the speed confirmation result processing unit 108.

  In step S16, the executable performance of the application is determined from the speed confirmation result obtained in step S15. This process is performed by the performance determination unit 109. Even when the data of the speed confirmation result confirmed in the sequence of the application to be implemented is found, the realizable performance is judged using the data of the speed confirmation result. The same applies when there is a speed confirmation result recording area on the medium side described later.

  In step S17, the executable performance of the application obtained in step S16 is displayed on the display unit 110. This process is performed by the display unit 110.

  According to the above-described embodiment, the host can confirm the effective speed (processing speed) for all the media and determine the feasible performance of the host application.

  In addition, the user can check the capability value (upper limit) of the host application for the medium he wants to use before using the application, and can consider how to use the host application in advance. For example, it is assumed that a user takes a motion with a combination of a certain DSC and a certain medium. In this case, by knowing the actual (upper limit) value of continuous shooting duration before starting shooting, the point at which continuous shooting starts is considered from the duration of movement and the duration of continuous shooting, and the moment when you want to take a picture is captured. It becomes easy.

  In addition, the performance of the media can be measured using the actual application sequence instead of the minimum guaranteed speed of the media, and the performance of the application can be defined at the effective speed of the combination of the actual media and the host. Become.

  In addition, it is possible to switch the setting of the host device while grasping the performance of the executable host application, thereby improving the convenience for the user.

  In addition, the host application version information is included as data set by the application included in the speed check result, so that when the host application is upgraded, the recorded speed check result is implemented in a new version. Can be determined.

  In addition, when a user purchases a new medium, it is possible to purchase it after testing whether the host application to be used can be used with the medium.

<2. Second Embodiment>
[Configuration example of information processing device (host computer)]
The second embodiment of the present invention is a case where a speed confirmation result recording area is provided in the medium. FIG. 11 is a block diagram of a storage system including a host computer (host) 100A to which the information processing apparatus according to the second embodiment is applied and a medium 200A. 11, parts corresponding to those in FIG. 1 are denoted by the same reference numerals, and detailed description thereof is omitted.

  In the host 100A shown in FIG. 11, the functions of the blocks of the speed confirmation result processing unit 108A and the media control unit 111A are different from the corresponding parts in the first embodiment. The speed confirmation result recording area is mounted as a speed confirmation result recording area 205 in the nonvolatile memory 203A of the medium 200A. The other parts are the same as in the first embodiment.

  The speed confirmation result processing unit 108A differs from the first embodiment in that the speed confirmation result processing unit 108A reads the speed confirmation result into the speed confirmation result recording area 205 in the medium 200A. In the first embodiment, the speed confirmation result recording area 114 in the host is read.

  The input of the media control unit 111A is a sequence from the sequence generation unit 106 and a speed confirmation result read request from the speed confirmation result processing unit 108, and controls the external interface 312 based on these inputs.

[Example of media configuration]
The memory controller 202A reads from and writes to the nonvolatile memory 203A (the storage area 204 and the speed check result recording area 205). When a speed confirmation result read request is received from the host 100A, the speed confirmation result recording area 205 is read and read data is sent to the host 100A. When a request for writing the speed confirmation result is received, the speed confirmation result recording area 205 is written. When a request other than reading and writing of the speed confirmation result is received, reading and writing are performed on the storage area 204.

  The speed confirmation result recording area 205 is a dedicated area for recording and storing the speed confirmation result independently of the normal data recording area (storage area 204) of the nonvolatile memory 203. The speed confirmation result recording area 205 is managed separately from the data recording area, and is not erased even if the data recording area is erased. The speed check result recording area 205 can be rewritten only by a dedicated command for writing the speed check result. Therefore, the data in the speed confirmation result recording area 205 is not erased by the normal operation of the user.

  The performance check process of the medium 200A by the host 100A in this embodiment is the same as that in FIG. 10, but the processes in steps S12 and S15 are different from those in the first embodiment. Other processing steps are the same as those in the first embodiment. Differences between steps S12 and S15 will be described.

  In the present embodiment, in step S12, the speed confirmation result is read from the speed confirmation result recording area 205 inside the medium 200A. This processing is performed by the speed confirmation result processing unit 108A.

  In step S15, the measured sequence execution time information and the application setting operation information at that time are written in the speed check result recording area 205 in the medium 200A as the speed check result. This processing is performed by the speed confirmation result processing unit 108A. When writing the speed confirmation result in the speed confirmation result recording area 205, the speed confirmation result has the information described with reference to FIG. 7 and the information for identifying the host that performed the speed confirmation.

  The above-described embodiment has the same operational effects as the first embodiment, but also has the following operational effects.

  According to the present embodiment, after connecting to the medium, the host reads the speed confirmation result stored in the medium, and if there is a speed confirmation result of itself, can determine the performance that can be realized immediately. Thus, it is not necessary to execute the sequence every time the medium is mounted on the external interface and measure the time required for the sequence. Therefore, it is possible to display the performance of the host application at high speed.

  In addition, since the recording area of the speed confirmation result in the medium can be rewritten only by a dedicated command, the speed confirmation result in the medium is not intended even if the medium is connected to a host that does not implement the present invention. Will not be rewritten.

<3. Third Embodiment>
[Configuration example of information processing device (host computer)]
The third embodiment of the present invention is a case where the speed confirmation result recording area is provided both inside the host and on the medium. FIG. 12 is a block diagram of a storage system including a host computer (host) 100 to which an information processing apparatus according to the third embodiment is applied and a medium 200A. 12, parts corresponding to those in FIGS. 1 and 11 are denoted by the same reference numerals, and detailed description thereof is omitted.

  The host 100 is the same as that of the first embodiment shown in FIG. The medium 200A is the same as that in the second embodiment. The performance check processing of the medium 200A by the host 100 in this embodiment is the same as that in FIG. 10, but the processing in steps S12 and S15 is different from that in the first embodiment. Other processing steps are the same as those in the first embodiment. Differences between steps S12 and S15 will be described.

  In the present embodiment, in step S12, the speed confirmation result is read from the speed confirmation result recording areas inside the host and inside the medium. This processing is performed by the speed confirmation result processing unit 108.

In step S15, the measured sequence execution time information and the operation setting information of the application at that time are written as speed check results in the speed check result recording areas inside the host and inside the medium, respectively. This processing is performed by the speed confirmation result processing unit 108.
The difference from the first and second embodiments is that the speed confirmation result processing unit 108 reads the speed confirmation result in the speed confirmation result recording area 114 in the host and the speed confirmation result recording area 205 in the medium. The point is that a read request is issued to both sides (see FIG. 13). When reading the speed check result, either the host side or the media side may be read first.

  The input of the speed check result recording area 205 is a speed check result read request from the speed check result read control unit 108-3 of the speed check result processing unit 108, and the speed check result is sent to the speed check result processing unit 108 in response to the request. Output to. The speed confirmation result recording area 114 of the host 100 is the same as that of the first embodiment. When writing the speed confirmation result in the speed confirmation result recording area, as shown in FIG. 13, a speed confirmation result write request is sent to both speed confirmation result recording areas. That is, a speed check result write request is sent from the speed check result reading control unit 108-3 of the speed check result processing unit 108 to the speed check result recording areas inside the host and inside the medium.

  The above-described embodiment has the same operational effects as the first embodiment, but also has the following operational effects.

  According to the present embodiment, since the speed confirmation result recording area is recorded both in the host and in the medium, even if one of the speed confirmation results disappears, the speed confirmation for the media loaded in the host is performed. The result can be read out.

<4. Fourth Embodiment>
The fourth embodiment of the present invention is an embedded (built-in) case in which the recording area (nonvolatile memory) that was external in the second embodiment is mounted inside the host. Examples include a digital still camera (DSC) and an SSD (Solid State Drive).

  FIG. 14 is a block diagram illustrating an internal configuration of a host computer (host) to which the information processing apparatus according to the fourth embodiment is applied. Compared to the second embodiment, there is no external interface that mediates the exchange of information between the host and the medium, and there is no media control unit in the host, and the memory controller 202B and the non-volatile memory 203B are in the host. Included.

  The performance check processing of the nonvolatile memory 203B by the host 100B in this embodiment is the same as that in FIG. 10, but the processing in step S12 and step S15 is different from that in the second embodiment. Other processing steps are the same as those in the second embodiment. Differences between steps S12 and S15 will be described.

  In this embodiment, in step S12, the speed confirmation result recorded in the speed confirmation result recording area 205 of the nonvolatile memory 203B in the host is read out via the memory controller 202B. This processing is performed by the speed confirmation result processing unit 108B.

  In step S15, the information on the execution time of the measured sequence and the operation setting information of the application at that time are used as the speed check result, and the speed check result recording area 205 of the nonvolatile memory 203B in the host is passed through the memory controller 202B. Write. This processing is performed by the speed confirmation result processing unit 108B.

The operation of the memory controller 202B is different from that of the second embodiment (see FIG. 11).
The memory controller 202B exchanges data between the application control unit 113 and the nonvolatile memory 203B. Inputs to the memory controller 202B are a sequence from the sequence generation unit 106, a read request for the speed check result from the speed check result processing unit 108B, and a write request for the speed check result.

When the input is a sequence from the sequence generator 106, the input sequence is sequentially executed, and data is exchanged with the nonvolatile memory 203B.
When the input is a request for reading the speed check result from the speed check result processing unit 108B, the data in the speed check result recording area 205 in the nonvolatile memory 203B is read and the read result is returned to the speed check result processing unit 108B.
When the input is a request for writing the speed check result from the speed check result processing unit 108B, the speed check result is written in the speed check result recording area 205 in the nonvolatile memory 203B.

  The above-described embodiment has the same functions and effects as those of the second embodiment, but also has the following functions and effects.

  According to the present embodiment, since the non-volatile memory 203B is built in the host 100B, an external medium is unnecessary.

<5. Fifth embodiment>
The fifth embodiment of the present invention is an example applied to a so-called multi-slot host computer when the host computer has a plurality of slots (connection terminal portions) for mounting media. In this example, there are two, but may be three or more.

  FIG. 15 is a block diagram of a storage system including a host computer (host) to which the information processing apparatus according to the fifth embodiment is applied and a plurality of media. Compared to the third embodiment, media is added. That is, the host computer 100C has two slots (external interfaces 112C1 and 112C2), and two media 200C1 and 200C2 are mounted. The media control unit 111C controls the exchange between the application control unit 113 and the two media 200C1 and 200C2.

  As the flow of the performance confirmation processing by the host 100C of this embodiment, the processing of steps S11 to S16 in the flowchart of FIG. 10 is repeated for each slot, and the performance of the application is displayed in association with the media mounted in each slot. .

  The above-described embodiment has the same functions and effects as those of the second embodiment, but also has the following functions and effects.

  According to the present embodiment, the user can check the speed of each medium mounted in the slot, select a medium according to the performance of the application to be used, and record data. For example, based on the speed confirmation result, it is possible to select a medium determined to have higher performance, and to record data that requires high processing capability for the medium, such as still image continuous shooting. Further, data that may have a low processing capability may be recorded on a medium with low performance.

  This media selection may be automatically executed by the speed confirmation result reading control unit 108-3 of the speed confirmation result processing unit 108 based on the speed confirmation result. It is also possible to use the cache memory in a pseudo manner by appropriately selecting the media.

  Further, for example, when data is not written on one selected medium A, the data recorded on the medium A is moved to the other medium B that is not selected, so that the free space of the medium A can be increased. it can. Thereby, preparation for the next use becomes possible, and the media A selected in accordance with the application to be used can be used effectively.

<6. 6. Sixth Embodiment> (Information processing apparatus: comprises a plurality of application control units)
The sixth embodiment of the present invention is different from the other embodiments in that the host includes a plurality of application control units. In the following, a case where there are two application control units will be described.

  FIG. 16 is a block diagram of a host computer (host) to which the information processing apparatus according to the sixth embodiment is applied. The host 100D of this example further includes an application control unit 113D for controlling an application different from the application control unit 113 shown in FIG. In FIG. 16, portions corresponding to those in FIG. 1 are denoted by the same reference numerals, and description of overlapping portions such as a block configuration in the application control unit is omitted.

  In this example, imaging data from the imaging element is input to the application control unit 113 and the application control unit 113D via the data generation unit 103. The application control unit 113 and the application control unit 113D control different applications. For example, when the application control unit 113 performs moving image processing, data used for moving image processing is input from the data generation unit 103 to the application control unit 113, and a sequence based on the moving image processing setting operation is output to the media control unit 111. Is done. For example, when the application control unit 113D performs still image processing, data used for still image processing is input from the data generation unit 103 to the application control unit 113D, and the sequence based on the still image processing setting operation is media control. Is output to the unit 111.

  Similar to the application control unit 113, the application control unit 113 </ b> D accepts “performance check request from user” and “application operation setting” from the input unit 101. Further, the speed confirmation result data is input / output to / from the speed confirmation result recording area 114. Furthermore, the performance determination result of the application determined by the performance determination unit (see FIG. 1) is output to the display unit 110 and displayed in a form that can be recognized by a user such as a GUI.

  The media control unit 111 is a sequence output from the sequence generation unit of each application control unit, and controls the external interface 112 based on this input.

  According to the present embodiment, since the plurality of application control units corresponding to each application are provided, the performance that can be executed by the application can be determined for each application sequence. In addition, the same operational effects as those of the first embodiment can be obtained.

  Note that a series of processes performed by the information processing apparatus described above can be executed by hardware or can be executed by software. Needless to say, the function of executing these processes can also be realized by a combination of hardware and software. When a series of processing is executed by software, it is possible to execute various functions by installing a computer in which a program constituting the software is incorporated in dedicated hardware, or by installing various programs. For example, it is installed from a program recording medium in a general-purpose computer or the like.

  In addition, in this specification, the processing of each step shown in FIG. 10 is not limited to processing performed in time series according to the described order. Includes processes executed in different orders or individually.

  The embodiment described above is a specific example of a preferred embodiment for carrying out the present invention, and therefore various technically preferable limitations are given. However, the present invention is not limited to these embodiments unless otherwise specified in the above description of the embodiments. For example, the processing time, processing order, numerical conditions of each parameter, and the like given in the above description are only preferred examples, and the dimensions, shapes, arrangement relationships, etc. in each drawing used for the description are examples of the embodiments. It is the schematic thing which shows. Therefore, the present invention is not limited to the above-described embodiments, and various modifications and changes can be made without departing from the scope of the present invention.

It is a block diagram which shows the internal structure of the information processing apparatus which concerns on the 1st Embodiment of this invention. It is a block diagram which shows the internal structure of the speed confirmation starting part of FIG. It is a block diagram which shows the internal structure of the dummy data generation part of FIG. It is a block diagram which shows the internal structure of the sequence generation part of FIG. It is a figure which shows the example of the sequence which writes an image file. It is a block diagram which shows the internal structure of the speed measurement part of FIG. It is a figure which shows the example of a speed confirmation result. It is a block diagram which shows the internal structure of the speed confirmation result process part of FIG. It is the sequence diagram which showed the exchange of the read request | requirement of the speed confirmation result and reception of a speed confirmation result based on the 1st Embodiment of this invention. It is a flowchart which shows the process by the information processing apparatus of FIG. It is a block diagram which shows the internal structure of the information processing apparatus which concerns on the 2nd Embodiment of this invention. It is a block diagram which shows the internal structure of the information processing apparatus which concerns on the 3rd Embodiment of this invention. It is a block diagram which shows the internal structure of the speed confirmation result process part of FIG. It is a block diagram which shows the internal structure of the information processing apparatus which concerns on the 4th Embodiment of this invention. It is a block diagram which shows the internal structure of the information processing apparatus which concerns on the 5th Embodiment of this invention. It is a block diagram which shows the internal structure of the information processing apparatus which concerns on the 6th Embodiment of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 100,100A, 100B, 100C ... Information processing apparatus (host computer), 101 ... Input part, 102 ... Speed confirmation starting part, 102-1 ... OR circuit, 102-2 ... Operation setting change part, 103 ... Data generation part , 104 ... dummy data generation unit, 104-1 ... data generation unit, 104-2 ... data output timing adjustment unit, 105 ... MUX (multiplexer), 106 ... sequence generation unit, 106-1 to 106-4 ... sequence A generation Unit to sequence N generation unit, 106-5 ... MUX (multiplexer), 106-6 ... speed measurement start / end control unit, 107 ... speed measurement unit, 107-1 ... timer, 107-2 ... speed confirmation result data generation unit 108, 108A ... Speed confirmation result processing unit, 108-1 ... Buffer unit, 108-2 ... Speed confirmation Fruit filter 108-3 ... Speed confirmation result control unit 109 ... Performance determination unit 110 ... Display unit 111, 111C ... Media control unit 112, 112C1, 112C2 ... External interface 113, 113D ... Application control unit 114 ... Speed confirmation result recording area, 200, 200A, 200C1, 200C2 ... Media, 201 ... External interface, 202,202B ... Memory controller, 203,203B ... Non-volatile memory, 204 ... Storage area, 205 ... Speed confirmation result recording area

Claims (13)

A connection terminal part for connecting to the medium so that data communication is possible, and
Comprising at least one application control unit for controlling an application to input / output data to / from the medium;
The application control unit
A sequence generation unit that generates a sequence to be used in the application, and transmits the sequence to a medium attached to the connection terminal unit;
A speed measurement unit that receives from the sequence generation unit measurement start time and measurement end time of the sequence execution time by the media, and generates speed confirmation result data obtained by measuring the execution time of the sequence;
An information processing apparatus, comprising: a performance determination unit that determines performance that can be executed by the application from speed confirmation result data generated by the speed measurement unit. The information processing apparatus according to claim 1, wherein the sequence is a transmission pattern of a read / write command used in the application. The information processing apparatus according to claim 2, wherein the performance determination unit outputs a performance determination result calculated based on information related to a sequence execution time included in the speed check result data to a display unit. The information processing apparatus according to claim 3, further comprising: a speed check result processing unit that records speed check result data generated by the speed measuring unit for each application in a recording unit. The speed confirmation result data includes information for identifying the application and sequence for which the speed confirmation has been performed, speed information indicating the execution time, information for identifying the date, and information for identifying the information processing apparatus that has performed the speed confirmation The information processing apparatus according to claim 4. The speed check result data includes information for specifying the application and sequence for which the speed check has been performed, speed information indicating the execution time, information for specifying the date, and information for specifying the medium on which the speed check has been performed. The information processing apparatus according to claim 4. In the speed measurement, the process of measuring the execution time of the sequence by the media and the process of determining the performance executable by the application are:
The information processing apparatus according to claim 5, wherein the information processing apparatus is executed when a performance measurement request from a user, detection of the media, or setting of the application changes. The information processing apparatus according to claim 7, wherein the recording unit is provided in the information processing apparatus or the medium. The said connection terminal part is provided with two or more units | sets, The said performance determination part determines the performance of the application realizable with the medium with which each connection terminal part was mounted | worn, The result of determination is output to the said display part. Information processing device. Have multiple application controls,
The information processing apparatus according to claim 7, wherein an execution time is measured for each sequence of applications controlled by each application control unit. The medium comprises a non-volatile memory comprising an area for storing general data and an area for storing speed check result data,
The speed confirmation result processing unit has a dedicated read command for reading the speed confirmation result data from the medium and a dedicated write command for writing the speed confirmation result data to the medium. The dedicated read command and the dedicated write command The information processing apparatus according to claim 4, wherein the speed check result data is read and written only by. When the speed confirmation result data of the selected application is stored in the recording unit for the media attached to the connection terminal unit,
The information processing apparatus according to claim 4, wherein a performance that can be executed by the application is determined from speed confirmation result data stored in the recording unit, and the performance determination result is output to the display unit. A first step of generating a sequence to be used in an application that operates on the information processing apparatus;
A second step of transmitting the sequence to a medium connected to the information processing apparatus so as to allow data communication;
Receiving a measurement start time and a measurement end time of the execution time of the sequence by the medium;
A fourth step of measuring the execution time of the sequence and generating speed confirmation result data;
And a fifth step of determining performance executable by the application from the generated speed confirmation result data.

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