JP2010048635A - Radar system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve problems that conventional converters are expensive and noise increases when a ΔΣ type A/D converter of patent document 1 is merely exchanged to an inexpensive successive-approximation type A/D converter. <P>SOLUTION: The radar system includes a signal output section outputting a first analogue signal having a first frequency and a second analogue signal having a second frequency; a successive-approximation type A/D converter, connected to the signal output section, converting the first and second analogue signals output by the signal output section respectively into a first and a second digital signals, overlapping the first and the second digital signals, and outputting them as one digital signal; and an operational circuit, connected to a signal conversion section, separating the one digital signal into a first and a second digital signals, and outputting them; in which the operational circuit computes a first representative value indicating a representative value of the first digital signal in a first time interval and computes a second representative value indicating a representative value of the second digital signal in a second time interval within a unit time. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a radar apparatus that detects an obstacle using continuous radio waves.

  A radar device using millimeter waves is widely used as a device for measuring the distance to an obstacle or a forward vehicle when traveling in an automobile. The radar device emits radio waves and receives reflected waves from objects such as obstacles and vehicles. Then, the intensity of the received reflected wave, the Doppler shift of the frequency, the propagation time from the emission of the radio wave to the reception of the reflected wave, and the like are detected, and the distance and relative velocity to the object are measured from the result.

  Here, there is a technique related to a modulation / demodulation circuit in a two-frequency CW radar device (see Patent Document 1).

Japanese Patent No. 2945821

  In the conventional method, demodulation is performed using the demodulation circuits 11 and 12 and two ΔΣ A / D converters (15 and 16) (see FIG. 2). However, the converter has a problem that the circuit configuration is complicated and the cost is high. Therefore, it is conceivable to use a successive approximation A / D converter with a simple circuit configuration and low cost. However, in the technique of Patent Document 1, a ΔΣ A / D converter is simply replaced with a successive approximation A / D converter. However, there is a problem that the anti-aliasing filter built in the ΔΣ A / D converter cannot be used, and a signal having a frequency exceeding the Nyquist frequency is mixed as aliasing noise, resulting in increased noise.

  Accordingly, an object of the present invention is to provide a radar apparatus that can suppress noise even when a successive approximation A / D converter is used.

  In order to solve the above problems, one of the desirable embodiments of the present invention is as follows.

  The radar apparatus includes a signal output unit that outputs a first analog signal having a first frequency and a second analog signal having a second frequency, and a first signal output from the signal output unit. And a successive approximation A / D converter that converts the first and second analog signals into first and second digital signals, and superimposes the first and second digital signals to output a single digital signal. And an arithmetic circuit that is connected to the signal conversion unit and distributes one digital signal to the first and second digital signals and outputs the first digital signal, and the arithmetic circuit includes the first time interval in a first time interval in a unit time. A first representative value indicating a representative value of the digital signal is calculated, and a second representative value indicating a representative value of the second digital signal is calculated in a second time interval.

  ADVANTAGE OF THE INVENTION According to this invention, the radar apparatus which can suppress noise even if it uses a successive approximation type A / D converter can be provided.

  Hereinafter, embodiments will be described with reference to the drawings.

  FIG. 1 is a configuration diagram of a radar apparatus.

  The radar apparatus includes a modulation / demodulation circuit 1, a high-frequency generator 2 that converts a signal output from the modulation / demodulation circuit into a millimeter-wave radio wave, and a millimeter-wave radio wave output from the high-frequency generator 2 that is mixed with a transmitter. Directional coupler 3 for distribution for use, transmitting antenna 4 for transmitting the transmission radio wave output from the directional coupler 4, receiving antenna 5 for receiving the radio wave reflected on an object such as a preceding vehicle, etc. The mixer 6 that mixes the radio waves for mixing output from the directional coupler 3 and generates a beat signal, the operational amplifier 7 that amplifies the beat signal output from the mixer 6, and the amplified analog signal output from the operational amplifier 7 A successive approximation A / D converter 8 that converts beat signals into digital signals (A / D conversion), and a digital signal output from the successive approximation A / D converter 8 is converted by a conventional ΔΣ A / D converter. Same as result The arithmetic circuit 9 that calculates to be a digital signal, and the digital signal output from the arithmetic circuit 9 perform FFT analysis processing and the like to determine the distance, angle, relative speed, etc. between the radar device and the preceding vehicle, etc. It comprises a signal processing device 10 for calculation.

  Here, a general two-frequency CW system will be described. In this method, two radio waves having frequencies f1 and f2 are transmitted while being switched, and a reflected wave reflected by an object and returned is received. Since a beat signal is obtained for each of the two transmission signals f1 and f2, the frequency of the beat signal measured from the data acquired in the section transmitting f1 is Doppler proportional to the relative speed V with the target. The shift fd is equal to −2Vf1 / c. Therefore, V is obtained by Equation 1.

(Formula 1)
V = −fd × c / (2 × f1)
Furthermore, since the received wave reciprocates the distance R to the target, the phase of the received wave is different from the phase of the transmitted wave when the received wave is received. If the phase measured from the data acquired in the section transmitting f1 is Δφ1, and the phase measured from the data acquired in the section transmitting f2 is Δφ2, R is obtained by Equation 2.

(Formula 2)
Δφ1−Δφ2 = 4πR × (f1−f2) / c
FIG. 2 is a configuration diagram of a conventional two-frequency CW radar device.

  A conventional radar apparatus is used for transmitting a modulation / demodulation circuit 1, a high-frequency generator 2 for converting a signal output from the modulation / demodulation circuit into a millimeter-wave radio wave, and a millimeter-wave radio wave output by a high-frequency generator 2 for transmission. Directional coupler 3 to be distributed for mixing 3, transmitting antenna 4 for transmitting the output radio wave output from the directional coupler 4, receiving antenna 5 for receiving the radio wave reflected on an object such as a preceding vehicle, etc. A mixer 6 that generates a beat signal by mixing a radio wave and a mixing radio wave output from the directional coupler 3, an operational amplifier 7 that amplifies the beat signal output from the mixer 6, and a demodulation controlled in conjunction with the modulation timing Circuit 11 and demodulating circuit 12, sample and hold circuits 13 and 14, ΔΣ type A / D converters 15 and 16, and A / D conversion result digital signal is subjected to FFT analysis processing etc. The signal processing device 10 calculates the distance, angle, relative speed, etc.

  In the two-frequency CW system radar, since the frequency to be transmitted is temporally switched, a demodulation circuit that separates the beat signal fd1 obtained by transmitting f1 and the beat signal fd2 obtained by transmitting frequency f2 is usually provided. Necessary. The demodulation circuits 11 and 12 are controlled by a control signal sent from the modulation / demodulation circuit 01 in conjunction with the modulation timing of the transmission frequency. That is, when fd1 is obtained, the analog switch gate of the demodulation circuit 11 is opened at the time when f1 is transmitted, and when the f2 is transmitted, the analog switch gate of the demodulation circuit 12 is closed. Sample hold circuits 13 and 14 are connected to the subsequent stage of each analog switch, hold the respective output signals, and then convert the beat signals into digital signals by ΔΣ type A / D converters 15 and 16.

  Next, in order to make this embodiment easier to understand, first, a processing procedure after A / D conversion of the conventional method will be described.

  In the case of a two-frequency CW system radar, the beat signal received and output from the mixer 6 is shown as in FIG. The beat signal is observed as a signal in which two Sin waves having different phases are time-divided at a timing when the transmission frequencies f1 and f2 are switched.

  FIG. 3 is a diagram showing the contents of a conventional demodulation process. 101 of (A) shows a modulation waveform of a general two-frequency CW radar, and the timing of signal processing synchronized with 101 is schematically shown in (B).

  In the A / D conversion, one data output is performed for each channel f1 and f2 during a unit time (period) T. However, since the ΔΣ A / D converter performs oversampling processing in all time zones of T. During the period in which the f2 signal is transmitted / received, the f1 data is held to prevent the information of f2 from entering the f1. Conversely, during the period during which the f1 signal is transmitted and received, the f2 data is held so that the information of f1 does not wrap around f2.

  In this way, the signals that have passed through the demodulation circuits 11 and 12 and the sample and hold circuits 13 and 14 are digitally converted by the ΔΣ A / D converters 15 and 16. The ΔΣ A / D converter 15 outputs a sample value of the beat signal fd1 in the section where the transmission signal is f1, and the ΔΣ A / D converter 16 outputs the beat signal fd2 in the section where the transmission signal is f2. Sample value is output. FIG. 5 shows the relationship between the beat signals fd1 and fd2 and the output value of the ΔΣ A / D converter.

  Since the ΔΣ A / D converter repeats integration and comparison with a period obtained by dividing the data output cycle by the number of oversampling as a unit, if the input voltage changes greatly during the conversion cycle, it greatly affects the output.

  As shown in FIG. 5, the output of the ΔΣ A / D converter outputs f1 and f2 at the same time, but the oversampled data is not actual data but pseudo data in which about half of it is held. Therefore, the accuracy of the output signal always includes an error, and the error does not always overlap with each other because the sampling periods of f1 and f2 do not overlap each other.

  Next, demodulation processing in the present embodiment will be described with reference to FIGS.

  In this embodiment, the operational amplifier 07 (signal output unit) that outputs the first analog signal having the first frequency f1 and the second analog signal having the second frequency f2 is connected to the operational amplifier 07, and the operational amplifier The first and second analog signals output from 07 are converted into first and second digital signals, respectively, and the first and second digital signals are superimposed and output as one digital signal. An arithmetic circuit 09 that is connected to the A / D converter and the successive approximation A / D converter and outputs the superimposed one digital signal to the first and second digital signals is used. The arithmetic circuit 09 calculates a first representative value indicating the representative value of the first digital signal in the first time interval in the unit time, and calculates the representative value of the second digital signal in the second time interval. A second representative value is calculated.

  Here, the successive approximation A / D converter 08 is an A / D converter typified by a SAR A / D converter that operates at a higher speed than a conventionally used ΔΣ A / D converter. is there. The arithmetic circuit 09 distributes the digital signal according to which time of f1 or f2 is converted, calculates a representative value of each time interval, and calculates the first digital signal and the first digital signal in a cycle of unit time T. 2 digital signals are output.

  Since the ΔΣ type A / D converter performs oversampling at least about 256 times that of the successive approximation type A / D converter, a noise shaving effect is obtained and the signal-to-noise ratio (S / N ratio) is excellent. Even if it is simply replaced with a successive approximation type A / D converter and the same processing as in the prior art is performed, the S / N ratio is deteriorated and the measurement accuracy is not practical.

  In order to obtain an S / N equivalent to that of a ΔΣ A / D converter using a successive approximation A / D converter, A / D conversion is performed at a higher speed, and a representative value of the obtained digital signal is obtained. It is necessary to do. When taking the average value of the acquired digital signal, the same performance can be obtained by calculating the average value of 8 data by A / D conversion about 8 times faster than the ΔΣ type A / D converter. This has been proved by experimental results.

  However, if a ΔΣ A / D converter is replaced with a successive approximation A / D converter, and an arithmetic circuit is provided that calculates and outputs the average value of the eight outputs, the availability of the A / D converter However, an arithmetic circuit is required, but there is no cost or space merit.

  Therefore, in this embodiment, the conventional demodulation circuit (11, 12 in FIG. 2) is deleted and the beat signal fd1 obtained by transmitting f1 and the beat signal fd2 obtained by transmitting f2 are not separated. Among the digital signals obtained by inputting to one successive approximation A / D converter and A / D conversion 16 times faster than the ΔΣ A / D converter, the beat signal obtained from f1 The first digital signal converted from fd1 and the second digital signal converted from the beat signal fd2 obtained from f2 are allocated, and the average value of each of the eight signals is calculated.

  When A / D conversion is performed on a signal near the switching timing of the signals fd1 and fd2, this data becomes a noise factor and affects the measurement accuracy. Therefore, in this embodiment, the measurement accuracy is improved by not calculating the signal near the switching timing (the dotted upward arrow in FIG. 6) by the arithmetic circuit 09. As a result of the experiment, the data of the switching portions of fd1 and fd2 of the digital signal obtained by performing A / D conversion at 16 times the speed are thinned out, and the remaining 6 data are averaged. Performance equal to or better than the method is obtained.

  As for aliasing noise, when the A / D conversion speed is 16 times and an average value of 6 data is taken as one representative value, aliasing noise does not occur at least up to 16 times the Nyquist frequency. The result is obtained.

  Since the successive approximation A / D converter has a sample-and-hold circuit inside and converts only the instantaneous voltage of the conversion timing, unlike the ΔΣ A / D converter, the input voltage changes greatly during the conversion cycle. However, there is no problem if the instantaneous voltage of the conversion timing is stable. However, the error due to the noise of the input signal is greatly inferior to the noise shaving function of the ΔΣ type A / D converter, so the noise error is eliminated by calculating the average value etc. by increasing the conversion cycle. Demodulation is performed based on the signal after A / D conversion by omitting the configured demodulation circuit.

  The beat signal that has passed through the operational amplifier 07 in FIG. 1 is converted into an A / D signal at a timing that is 16 times as fast as the unit time T by a timing signal from the modulation / demodulation circuit 01 in the successive approximation A / D converter 08. The converted and digitized signal is input to the arithmetic circuit 09. The arithmetic circuit 09 calculates an average of six data obtained by decimating the signal of the low-reliability signal switching portion of the beat signal portion of f1, and of the low-reliability signal switching portion of the beat signal portion of f2. The average of the six data obtained by thinning out the signals is calculated and used as each A / D conversion result. The timing of thinning out the signal is grasped by the signal from the modulation / demodulation circuit 01.

  Here, considering the phase difference of the A / D converted signal, the A / D conversion result of the beat signal of f1 and the A / D conversion result of the beat signal of f2 are ½ of the unit time T in terms of time. There is a gap. In the signal processing apparatus 10, the distance is calculated using the phase difference between f1 and f2, and at this time, a time shift of 1/2 of the unit time T is taken into consideration.

  FIG. 6 is a diagram showing the input beat signal and the sample timing in the successive approximation A / D converter, and FIG. 7 is a diagram showing the relationship between the beat signal and the output value of the arithmetic circuit 09 in this embodiment. In the case of a two-frequency CW radar, the beat signal output from the mixer 6 is observed as a signal that is time-divided at the timing when two Sin waves having different phases are switched between the transmission frequencies f1 and f2. This beat signal is A / D converted at high speed using a successive approximation A / D converter. FIG. 6 shows an example in which an average of six data obtained by thinning out signals of a signal switching portion with low reliability is calculated, and an average value in a section where the transmission frequency is f1 and a section where the transmission frequency is f2 is obtained. ing. A value sampled at a high speed is output from the successive approximation A / D converter 08, and the arithmetic circuit 09 obtains an average value in a section where the transmission frequency is f1 and a section where the transmission frequency is f2, and the signal processing device Each average value is output to 10. In FIG. 10, the beat signals fd1 and fd2 can be reproduced by connecting the output values of the section of the transmission frequency f1 and the section of the transmission frequency f2 output by the arithmetic circuit 09. However, in this case, the time difference between the sample points of fd1 and fd2 is included by ½ of the period T for calculating the average value, and therefore it is necessary to consider in subsequent calculations.

  In the case of a two-frequency CW system radar, the distance R is calculated from the data acquired in the section transmitting f1 and the phase Δφ1 measured from the data acquired in the section transmitting f1 using Equation 2. It is obtained from the measured phase Δφ2. In the case of using the successive approximation A / D converter, the time difference (T / 2) of the sample points is included, and therefore, the relationship of the following equation is established.

(Formula 3)
(Δφ1−Δφ2) −2π × fd × (T / 2) = 4πR × (f1−f2) / c

  Next, a second embodiment will be described. In the present embodiment, filter processing such as FIR and thinning-out processing (decimation) are used for calculating the representative value of each time interval. Filter processing such as FIR and thinning-out processing are digital processing as in the first embodiment, and six pieces of signals obtained by thinning out the signal switching portion of the beat signal portion of f1 by the arithmetic circuit 09 in FIG. The FIR filter processing is performed on the data, and the FIR filter processing is performed on the six data obtained by thinning out the signals of the signal switching portion with low reliability among the beat signal portions of f2, and the respective A / D conversion results Is possible.

  Next, a third embodiment will be described. In this embodiment, in an FMCW radar, the received analog signal is converted to a digital signal at a speed of 16 times or more of the sampling period necessary for obtaining the frequency of the beat signal, and the reflected wave near the modulation control switching time is stable. The average value or FIR filter processing is performed by thinning out the data converted into the digital signal in the time interval not to be performed. The schematic configuration of the radar control circuit is the same as that shown in FIG.

  FIG. 8 is a diagram illustrating an example of a transmission / reception frequency pattern. The transmission wave (Tx) is drawn with a solid line, and the reception wave (Rx) is drawn with a broken line. Τ is the time required for the radio wave to travel back and forth between the radar device and the object, fd is the Doppler shifted frequency, and fbU is the beat signal obtained in the interval where the frequency of the transmitted wave is increasing. The frequency fbD indicates a beat frequency obtained in a section where the frequency of the transmission wave is decreasing.

  Here, a signal in which A / D conversion is performed in a section where the frequency changes over time, for example, a portion where the frequency changes from a portion where the frequency increases linearly upward to a portion where the frequency decreases downward as time elapses, is an arithmetic circuit. At 09, the signal is discriminated by the timing signal from the modulation / demodulation circuit 01 and thinned out. By calculating the average value of the thinned-out signal and inputting it to the signal processing device 10, the influence of noise caused by the voltage resolution of the successive approximation A / D converter 08 and aliasing noise caused by the conversion speed can be obtained. Radar that is difficult to receive can be provided.

  According to this article, the A / D converter, which conventionally required two systems, becomes one system, and the demodulating circuit constituted by an analog circuit is digitized, thereby facilitating cost reduction and space saving. In addition, by eliminating the analog circuit in the previous stage of the A / D converter, measurement errors due to element variations are eliminated, and measurement with higher accuracy becomes possible. Furthermore, A / D conversion was also performed for the signal of the unnecessary part with the signal held in the sample hold circuit in the past. However, since the signal of the unnecessary part is not used, measurement with higher accuracy is possible and all signals are processed. This makes it possible to simplify the processing circuit.

The block diagram of a radar apparatus. The block diagram of the conventional 2 frequency CW system radar apparatus. The figure which shows the timing of the conventional demodulation. The figure which shows the received beat signal. The figure which shows the relationship between the conventional beat signal and the output value of a delta-sigma A / D converter. The figure which shows the A / D sample timing of a present Example, and the beat signal average value output. The figure which shows the relationship between the beat signal of a present Example, and the output value of an arithmetic circuit. The figure which shows an example of a transmission / reception frequency pattern.

Explanation of symbols

01 modulation / demodulation circuit 02 high frequency generator 03 directional coupler 04 transmission antenna 05 reception antenna 06 mixer 07 operational amplifier 08 successive approximation A / D converter 09 arithmetic circuit 10 signal processing device 11 demodulation circuit (for f1)
12 Demodulator (for f2)
13 Sample hold circuit (for f1)
14 Sample hold circuit (for f2)
15 ΔΣ A / D converter (for f1)
16 ΔΣ A / D converter (for f2)

Claims (5)

A signal output unit for outputting a first analog signal having a first frequency and a second analog signal having a second frequency;
The first and second analog signals connected to the signal output unit and output from the signal output unit are converted into first and second digital signals, respectively, and the first and second digital signals are superimposed. A successive approximation A / D converter that outputs a single digital signal together;
An arithmetic circuit connected to the successive approximation A / D converter, for distributing and outputting the one digital signal to the first and second digital signals;
The arithmetic circuit calculates a first representative value indicating a representative value of the first digital signal in a first time interval in a unit time, and a representative of the second digital signal in a second time interval. A radar apparatus that calculates a second representative value indicating a value. The first representative value indicates an average value of a plurality of digital signals converted within the first time interval,
The radar apparatus according to claim 1, wherein the second representative value indicates an average value of a plurality of digital signals converted within the second time interval.   The radar apparatus according to claim 1, wherein the arithmetic circuit performs a filtering process and a thinning process when calculating the representative value.   The arithmetic circuit does not use data converted into a digital signal when switching from the first time interval to the second time interval to calculate the first and second representative values. 3. The radar device according to any one of 3.   The radar device according to any one of claims 1 to 4, wherein the arithmetic circuit converts an analog signal into a digital signal in a time that is 16 times faster than the unit time.

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