JP2010040411A - Plasma display panel - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce an external light reflection of a plasma display panel and raise contrast without adding a new process and without inducing a new problem such as viewing angle dependence or the like. <P>SOLUTION: When the maximum value among a width B2 of a scanning bus electrode 22b, the width B3 of a maintenance bus electrode 23b, and the width B5 of a black stripe 25 is Bmax, the minimum value among a clearance W23 of a gap between the scanning bus electrode 22b and the maintenance bus electrode 23b, a clearance W35 of a gap between the maintenance bus electrode 23b and the black stripe 25, and a clearance W52 of a gap between the black stripe 25 and the scanning bus electrode 22b is Wmin, and if an optical distance between the scanning bus electrode 22b and the maintenance bus electrode 23b and a phosphor layer 35 is H, Bmax≤H≤Wmin is satisfied. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an AC surface discharge type plasma display panel used in a plasma display device.

  A typical AC surface discharge type panel as a plasma display panel (hereinafter abbreviated as “panel”) has a large number of discharge cells formed between a front substrate and a rear substrate which are arranged to face each other. On the front substrate, a plurality of display electrode pairs each formed of a pair of scan electrodes and sustain electrodes are formed in parallel to each other. Each of the scan electrode and the sustain electrode has an opaque bus electrode for enhancing conductivity. In addition, black stripes are formed between adjacent display electrode pairs to suppress external light reflection and increase the contrast of the display image. A dielectric layer and a protective layer are formed so as to cover the display electrode pair and the black stripe. A plurality of parallel data electrodes, a dielectric layer covering them, and a plurality of barrier ribs are formed on the rear substrate in parallel with the data electrodes. The surface of the dielectric layer and the side surfaces of the barrier ribs are formed on the rear substrate. A phosphor layer is formed on the substrate. Then, the front substrate and the rear substrate are disposed opposite to each other so that the display electrode pair and the data electrode are three-dimensionally crossed and sealed, and a discharge gas is sealed in the internal discharge space. Here, a discharge cell is formed at a portion where the display electrode pair and the data electrode face each other. Ultraviolet rays are generated by gas discharge inside each discharge cell of such a panel, and phosphors of red, green, and blue colors are excited and emitted by the ultraviolet rays to display an image.

  The quality of the displayed image depends on various factors such as brightness, contrast, color reproducibility, resolution, and gradation expression ability. Among these, the ratio between the maximum luminance and the luminance at the time of black display, that is, the contrast, is a major factor that affects the impact of the display image.

Conventionally, various studies for increasing the contrast have been made. For example, by forming the black part so as to overlap with each of the bus electrode and the black stripe part and having a small interval, the contrast of the light is suppressed in a bright place without reducing the light emission luminance of the panel. Japanese Patent Application Laid-Open No. H10-228688 discloses a panel that improves the above.
JP 2005-19008 A

  However, when an image is displayed using the panel described in Patent Document 1, there is a problem that the luminance changes depending on the viewing angle. That is, when viewed from the front of the panel, the bus electrode and black stripe portion and the black portion overlap completely, so the luminance does not decrease, but when viewed from above or below the panel, the bus electrode, black stripe portion and black portion shift. Since it can be seen, the luminance is reduced.

  Moreover, in order to manufacture the panel of patent document 1, it was necessary to add the process of forming a black part newly independently from other processes, and there also existed a subject that productivity fell.

  The present invention has been made in view of the above problems, and provides a panel that reduces external light reflection and increases contrast without adding new steps and without generating new problems such as viewing angle dependency. With the goal.

  To achieve the above object, the present invention provides a front substrate having a scan electrode having a scan bus electrode, a sustain electrode having a sustain bus electrode, and a black stripe, a back substrate having a data electrode and a phosphor layer, , Wherein the maximum value of the width of the scan bus electrode, the width of the sustain bus electrode, and the width of the black stripe is Bmax, and the gap between the scan bus electrode and the sustain bus electrode is maintained. The minimum value of the gap between the bus electrode and the black stripe and the gap between the black stripe and the scan bus electrode is Wmin, and the optical distance between the scan bus electrode, the sustain bus electrode and the phosphor layer is H. In this case, Bmax ≦ H ≦ Wmin is satisfied. With this configuration, it is possible to supply a panel with reduced external light reflection and increased contrast without adding a new process and without generating new problems such as viewing angle dependency.

  In the panel of the present invention, the width of the scan bus electrode, the width of the sustain bus electrode, and the width of the black stripe may be equal to each other. With this configuration, reflection of external light with respect to external light at various angles can be suppressed.

  In the panel of the present invention, the gap between the scan bus electrode and the sustain bus electrode, the gap between the sustain bus electrode and the black stripe, and the gap between the black stripe and the scan bus electrode are equal to each other. It may be. With this configuration, reflection of external light with respect to external light at various angles can be suppressed.

  According to the present invention, it is possible to supply a panel with reduced external light reflection and increased contrast without adding a new process and without generating new problems such as viewing angle dependency.

  Hereinafter, a panel driving method according to an embodiment of the present invention will be described with reference to the drawings.

(Embodiment)
FIG. 1 is an exploded perspective view of a panel 10 according to the embodiment of the present invention. The panel 10 is configured by disposing the front substrate 21 and the rear substrate 31 so as to face each other and sealing the periphery using low-melting glass (not shown), and a large number of discharge cells are formed therein. ing.

  On the glass front substrate 21, a plurality of pairs of display electrodes 24 including a pair of scanning electrodes 22 and sustaining electrodes 23 are formed in parallel to each other. A black stripe 25 is formed between adjacent display electrode pairs 24.

  The scanning electrode 22 includes a scanning transparent electrode 22a and an opaque scanning bus electrode 22b. Similarly, sustain electrode 23 includes sustain transparent electrode 23a and sustain bus electrode 23b. Hereinafter, the scanning transparent electrode and the sustaining transparent electrode are also simply referred to as “transparent electrode”, and the scanning bus electrode and the sustaining bus electrode are also simply referred to as “bus electrode”.

The transparent electrodes 22a and 23a are formed by forming a conductive metal oxide such as ITO, SnO ₂ , ZnO or the like in a strip shape on the front substrate 21, and the bus electrodes 22b and 23b are formed by laminating a black layer and a white layer. Is formed. The black layer is provided to make the display electrode pair 24 appear black when the panel 10 is viewed from the display surface side, and a black material is placed on each of the transparent electrodes 22a and 23a. It is formed by stacking narrower than 23a. And in order to improve electroconductivity, the white layer using the electroconductive material containing Ag is laminated | stacked on the black layer.

  The black stripe 25 is formed using a black layer. The black layer is provided to make the display electrode pair 24 appear black when the panel 10 is viewed from the display surface side, and a black material is formed on the front substrate 21.

  A dielectric layer 27 is formed so as to cover the display electrode pair 24 and the black stripe 25, and a protective layer 28 is formed on the dielectric layer 27.

  A plurality of data electrodes 32 are formed in parallel to each other on a glass back substrate 31. The data electrode 32 is made of a conductive material containing Ag as a main component. A dielectric layer 33 is formed so as to cover the data electrode 32, and a partition wall 34 is formed on the dielectric layer 33 in parallel with the data electrode 32. A phosphor layer 35 that emits red, green, and blue light is formed on the surface of the dielectric layer 33 and the side surfaces of the partition walls 34.

  The front substrate 21 and the rear substrate 31 are arranged to face each other so that the display electrode pair 24 and the data electrode 32 are three-dimensionally crossed, and a discharge cell is formed at a portion where the display electrode pair 24 and the data electrode 32 face each other. The front substrate 21 and the rear substrate 31 are sealed using low-melting glass at a position outside the image display area where the discharge cells are formed, and a discharge gas is sealed in the internal discharge space.

  In the panel 10 thus configured, the optical distance (the geometrical distance and the distance from the bus electrodes 22b and 23b and the black stripe 25 to the surface of the phosphor layer 35 formed on the surface of the dielectric layer 33). The integral value of the refractive index) is quoted below as the optical distance H between the bus electrodes 22b, 23b and the phosphor layer 35.

FIG. 2 is a view of panel 10 according to the embodiment of the present invention as viewed from the front substrate 21 side. In the present embodiment, the width B2 of the scan bus electrode 22b is equal to the width B3 of the sustain bus electrode 23b, and the width B5 of the black stripe 25 is designed to be equal to the widths B2 and B3 of the bus electrodes 22b and 23b. Yes. That is,
B2 = B3 = B5
It is.

Further, the gap interval W52 between the black stripe 25 and the scan bus electrode 22b is equal to the gap interval W35 between the sustain bus electrode 23b and the black stripe 25, and the gap between the scan bus electrode 22b and the sustain bus electrode 23b is the same. The interval W23 is also designed to be equal to the intervals W52 and W35 of these gaps. That is,
W52 = W23 = W35
It is.

Further, the widths B2 and B3 of the bus electrodes 22b and 23b and the width B5 of the black stripe 25 are less than or equal to the optical distance H between the bus electrodes 22b and 23b and the phosphor layer 35, and the gap intervals W52, W23 and W35 are the bus electrodes. It is set to be equal to or longer than the optical distance H between 22b and 23b and the phosphor layer 35. That is,
B2 = B3 = B5 ≦ H ≦ W52 = W23 = W35
It is. In this way, by setting the bus electrodes 22b and 23b and the black stripe 25, reflection of external light can be reduced and contrast can be increased. The reason will be described below.

  3A and 3B are diagrams for explaining the reason why external light reflection of the panel 10 in the embodiment of the present invention is reduced. FIG. 3A is a cross-sectional view of the panel 10, and FIG. FIG. 3A shows the front substrate 21, the bus electrodes 22b and 23b, the black stripes 25, the phosphor layer 35, and the rear substrate 31, and the others are omitted.

  Although external light of various angles is incident on the image display surface of the panel 10, external light incident from obliquely above is dominant under normal installation conditions of the plasma display device. FIG. 3A shows how shadows are formed on the bus electrodes 22b and 23b and the black stripe 25 when the most dominant external light 41 having an oblique angle of 45 ° is incident on the panel 10. For simplicity of explanation, it is assumed that the refractive index of light of each element constituting the panel 10 is “1”.

  As shown in FIG. 3B, the shadow 42 of the bus electrode 22b due to the external light 41 at an angle of 45 ° is projected onto the gap between the scan bus electrode 22b and the sustain bus electrode 23b. The shadow 43 of the bus electrode 23b is projected into the gap between the sustain bus electrode 23b and the black stripe 25, and the shadow 45 of the black stripe 25 is projected into the gap between the black stripe 25 and the scanning bus electrode 22b. As described above, in the present embodiment, when the panel 10 is viewed from the front, the shadows 42, 43, and 45 projected by the external light 41 at an oblique angle of 45 ° onto the phosphor layer 35 are the bus electrodes 22b. , 23b and the black stripe 25 are projected onto the gaps between the bus electrodes 22b, 23b and the black stripe 25, so that the reflected luminance of the external light 41 can be effectively reduced.

  FIG. 4 is a diagram for obtaining a condition for reducing the reflection luminance of the external light 41 of the panel 10 according to the embodiment of the present invention. FIG. 4 shows details of the bus electrode 22b and its shadow 42 and the gap between the bus electrode 22b and the bus electrode 23b. The projection points of the shadows of the x point and y point of the bus electrode 22b by the external light 41 at the incident angle θ (where θ = 45 °) are the x ′ point and the y ′ point, and the bus electrode by the external light at the incident angle of 0 °. The projection points of the shadows of the x point and y point of 22b are set as x "point and y" point. When the panel 10 is viewed from the front, the first condition for the shadow 42 of the bus electrode 22b to be projected onto the gap between the bus electrodes 22b and 23b without overlapping the bus electrodes 22b and 23b is x ″ −x The length of ', that is, Htanθ must be greater than or equal to the width B2 of the bus electrode 22b. The second condition is that the length of y ″ −y ′, that is, Htanθ is equal to or smaller than the gap W23 between the bus electrodes 22b and 23b. Must.

In order for these conditions to hold for the sustain bus electrode 23b and the black stripe 25, the maximum value of the width B2 of the scan bus electrode 22b, the width B3 of the sustain bus electrode 23b, and the width B5 of the black stripe 25 is Bmax, The minimum value of the gap interval W23 between the scan bus electrode 22b and the sustain bus electrode 23b, the gap interval W35 between the sustain bus electrode 23b and the black stripe 25, and the gap interval W52 between the black stripe 25 and the scan bus electrode 22b. When Wmin and the optical distance between the bus electrodes 22b and 23b and the phosphor layer 35 is H,
Bmax ≦ Htanθ ≦ Wmin (where θ = 45 °)
It is a condition to satisfy.

  Actually, external light of various angles is incident on the panel 10, but practically, as described above, paying attention to the external light 41 at an oblique angle of 45 °, the bus electrodes 22b and 23b and the black stripe 25 are formed. Just design.

  Further, the structure of the panel 10 is not limited to that described above. FIG. 5 is an exploded perspective view of another panel 50 according to the embodiment of the present invention. The front substrate 21 is the same as the front substrate 21 of the panel 10. On the back substrate 31, like the panel 10, a plurality of data electrodes 32 are formed in parallel to each other, and a dielectric layer 33 is formed so as to cover the data electrodes 32.

On the dielectric layer 33 of the panel 50, a grid-like partition wall 64 having a vertical partition wall 64a parallel to the data electrode 32 and a horizontal partition wall 64b intersecting the vertical partition wall 64a is formed. In the present embodiment, the height of the vertical barrier ribs 64a is set to the height of the horizontal barrier ribs 64b in order to ensure the exhaust conductance during the manufacture of the panel 50 while preventing the mutual interference of the discharge cells corresponding to the adjacent data electrodes 32. It is formed slightly higher than that. In the panel 50 having such a configuration, a part of the shadow of the black stripe 25 by the external light 41 at an oblique angle of 45 ° is blocked by the horizontal partition wall 64b, but instead, the shadow of the horizontal partition wall 64b is projected. Conditions,
Bmax ≦ Htanθ ≦ Wmin
The bus electrodes 22b and 23b and the black stripe 25 may be designed using

  Thus, in order to suppress external light reflection by paying attention to the external light 41 having the most dominant oblique 45 ° angle, the widths B2 and B3 of the bus electrodes 22b and 23b, the width B5 of the black stripe 25, and those The gap intervals W52, W23, and W35 may be designed to satisfy the above formula. At this time, it is not necessary to design the widths B2 and B3 of the bus electrodes 22b and 23b and the width B5 of the black stripe 25 to be equal to each other, and it is not necessary to design the intervals W52, W23 and W35 to be equal to each other.

However, in the usage environment of the panel, it may be necessary to consider outside light at an angle other than 45 ° obliquely. In this case, the intensity of external light reflection is the sum of external light reflections with respect to external light at various angles. In order to suppress external light reflection with respect to external light at various angles, it is desirable to satisfy the above-described conditions not only for θ = 45 ° but also for external light with a wide range of incident angles θ other than 45 °. In order to satisfy the above conditions over a wide range of angles, the widths B2 and B3 of the bus electrodes 22b and 23b and the width B5 of the black stripe 25 are designed to be equal to each other, and the gap between the black stripe 25 and the bus electrodes 22b and 23b is reduced. The intervals W52 and W35 and the interval W23 of the gap between the bus electrodes 22b and 23b may be designed to be equal to each other. That is,
B2 = B3 = B5 ≦ H ≦ W52 = W23 = W35
It is.

  As a specific design example, in a high-definition panel with a display screen size of 50 mm, for example, the pixel pitch is 810 μm and H = 145 μm, so B2 = B3 = B5 = 80 μm, W52 = W23 = The above equation can be satisfied by setting W35 = 190 μm. Further, in a high-definition panel having a display screen size of 40 mm, for example, the pixel pitch is 675 μm and H = 145 μm, so that B2 = B3 = B5 = 80 μm and W52 = W23 = W35 = 145 μm. The above formula can be satisfied.

  It should be noted that the specific numerical values used in the present embodiment are merely examples, and it is desirable to set them to optimal values as appropriate in accordance with panel characteristics, plasma display device specifications, and the like.

  The panel of the present invention is useful as a panel of a plasma display device because it can reduce external light reflection and increase contrast without adding a new process and without generating new problems such as viewing angle dependency. is there.

The disassembled perspective view of the panel in embodiment of this invention View of the panel from the front substrate side The figure explaining the reason that external light reflection of the panel decreases Diagram for obtaining conditions to reduce the reflection brightness of external light from the panel The exploded perspective view of other panels in an embodiment of the invention

Explanation of symbols

10, 50 Panel 21 Front substrate 22 Scan electrode 22a (Scan) transparent electrode 22b (Scan) bus electrode 23 Sustain electrode 23a (Maintain) transparent electrode 23b (Maintain) bus electrode 24 Display electrode pair 25 Black stripe 27 Dielectric layer 28 Protection Layer 31 Rear substrate 32 Data electrode 33 Dielectric layer 34, 64 Partition 35 Phosphor layer 41 External light 42, 43, 45 Shadow 64a Vertical partition 64b Horizontal partition

Claims (3)

A plasma display panel comprising a scan electrode having a scan bus electrode, a sustain electrode having a sustain bus electrode, and a front substrate having a black stripe, and a rear substrate having a data electrode and a phosphor layer arranged opposite to each other. There,
Bmax is the maximum value of the width of the scan bus electrode, the width of the sustain bus electrode, and the width of the black stripe,
The minimum value of the gap interval between the scan bus electrode and the sustain bus electrode, the gap interval between the sustain bus electrode and the black stripe, and the gap interval between the black stripe and the scan bus electrode is Wmin,
When the optical distance between the scan bus electrode and the sustain bus electrode and the phosphor layer is H,
Bmax ≦ H ≦ Wmin
A plasma display panel characterized by satisfying The plasma display panel of claim 1, wherein the width of the scan bus electrode, the width of the sustain bus electrode, and the width of the black stripe are equal to each other. The gap between the scan bus electrode and the sustain bus electrode, the gap between the sustain bus electrode and the black stripe, and the gap between the black stripe and the scan bus electrode are equal to each other. The plasma display panel according to claim 1, wherein:

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