JP2009224571A - Power module substrate with heat sink, and power module with the heat sink - Google Patents

Power module substrate with heat sink, and power module with the heat sink Download PDF

Info

Publication number
JP2009224571A
JP2009224571A JP2008067663A JP2008067663A JP2009224571A JP 2009224571 A JP2009224571 A JP 2009224571A JP 2008067663 A JP2008067663 A JP 2008067663A JP 2008067663 A JP2008067663 A JP 2008067663A JP 2009224571 A JP2009224571 A JP 2009224571A
Authority
JP
Japan
Prior art keywords
heat sink
power module
buffer layer
substrate
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2008067663A
Other languages
Japanese (ja)
Other versions
JP5163199B2 (en
Inventor
Joji Kitahara
丈嗣 北原
Hiromasa Hayashi
浩正 林
Hiroshi Tonomura
宏史 殿村
Hiroya Ishizuka
博弥 石塚
Yoshio Kuromitsu
祥郎 黒光
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Materials Corp
Original Assignee
Mitsubishi Materials Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Materials Corp filed Critical Mitsubishi Materials Corp
Priority to JP2008067663A priority Critical patent/JP5163199B2/en
Publication of JP2009224571A publication Critical patent/JP2009224571A/en
Application granted granted Critical
Publication of JP5163199B2 publication Critical patent/JP5163199B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a power module substrate with a heat sink and a power module with a heat sink capable of increasing junction reliability during a heat cycle, by preventing the concentration of stress at the corner of a buffer layer and also by reducing the heat resistance. <P>SOLUTION: The power module substrate with the heat sink includes the power module substrate, in which a circuit layer 3 is formed on one face of an insulating substrate 2 and a metallic layer 4 is formed on the other face, and the heat sink connected to the metal layer 4 side for cooling the power module substrate, wherein the buffer layer 13 consisting of a solid metal plate is disposed between the metal layer 4 and the heat sink, and the buffer layer 13 has a flat rectangular shape with its four corners 13b cut out. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、絶縁基板の一方の面に回路層が形成されるとともに他方の面に金属層が形成されたパワーモジュール基板と、前記金属層側に接合されて前記パワーモジュール基板を冷却するヒートシンクとを備えたヒートシンク付パワーモジュール用基板及びヒートシンク付パワーモジュールに関する。   The present invention provides a power module substrate having a circuit layer formed on one surface of an insulating substrate and a metal layer formed on the other surface, and a heat sink bonded to the metal layer side to cool the power module substrate. The present invention relates to a power module substrate with a heat sink and a power module with a heat sink.

一般に、半導体素子の中でも電力供給のためのパワーモジュールは、その発熱量が比較的高いことが知られている。パワーモジュールに搭載されるパワーモジュール基板としては、例えば、ＡｌＮ（窒化アルミニウム）からなるセラミック絶縁基板（絶縁基板）の一面に回路層を接合し、他面に金属層を接合して形成されたものがある。また、回路層の一面には、はんだ材を介して半導体チップ等のパワーデバイス（電子部品）が搭載される。また、金属層はこの電子部品から発せられる熱を効率良く放熱させるための熱伝達層として設けられており、この金属層を介してヒートシンクにパワーモジュール基板が接合されるようになっている。   In general, it is known that a power module for supplying power among semiconductor elements has a relatively high calorific value. As the power module substrate mounted on the power module, for example, a circuit layer is bonded to one surface of a ceramic insulating substrate (insulating substrate) made of AlN (aluminum nitride) and a metal layer is bonded to the other surface. There is. A power device (electronic component) such as a semiconductor chip is mounted on one surface of the circuit layer via a solder material. The metal layer is provided as a heat transfer layer for efficiently dissipating heat generated from the electronic component, and the power module substrate is joined to the heat sink via the metal layer.

このようなパワーモジュール基板を備えたパワーモジュールとしては、例えば、特許文献１に記載されるものが知られている。この特許文献１のパワーモジュールは、パワーモジュール基板の金属層とヒートシンクとの間に、該金属層と略同一の外形を有し複数の貫通穴を形成したアルミニウム材からなる応力緩和部材（緩衝層）を設け、セラミック絶縁基板とヒートシンクとの熱膨張係数の差に起因して生じる熱応力や温度サイクル時に発生するセラミック絶縁基板と金属層の界面に生じるせん断応力を緩和して、界面の破断（剥離）を抑制し、熱サイクル時における接合信頼性を向上させている。
特開２００６−２９４６９９号公報 As a power module provided with such a power module substrate, for example, one described in Patent Document 1 is known. The power module disclosed in Patent Document 1 includes a stress relaxation member (buffer layer) made of an aluminum material having a substantially identical outer shape and a plurality of through holes between a metal layer of a power module substrate and a heat sink. ) To relieve the thermal stress caused by the difference in thermal expansion coefficient between the ceramic insulating substrate and the heat sink and the shear stress generated at the interface between the ceramic insulating substrate and the metal layer during the temperature cycle. (Peeling) is suppressed, and the bonding reliability during thermal cycling is improved.
JP 2006-294699 A

しかしながら、特許文献１に記載のパワーモジュールでは、緩衝層に複数の貫通穴が設けられているため、該緩衝層内を熱が伝わる際に、これら貫通穴が伝熱を妨げ、熱抵抗が高くなるという課題を有している。すなわち、緩衝層の熱の拡がり（ヒートスプレッド）が貫通穴の空洞で妨げられ、発熱した電子部品及びパワーモジュール基板を効率よく冷却することができない。また、このような緩衝層では、熱抵抗が高いため熱サイクル時における接合信頼性が充分に確保されているとは言い難い。  However, in the power module described in Patent Document 1, since a plurality of through holes are provided in the buffer layer, when the heat is transmitted through the buffer layer, the through holes prevent heat transfer and have high thermal resistance. It has a problem of becoming. That is, the heat spread (heat spread) of the buffer layer is hindered by the cavity of the through hole, and the heated electronic component and the power module substrate cannot be efficiently cooled. In addition, since such a buffer layer has a high thermal resistance, it is difficult to say that the bonding reliability during thermal cycling is sufficiently ensured.

また、パワーモジュール基板とヒートシンクとが矩形平板状の緩衝層を介して接合される場合、角部のセラミック絶縁基板と金属層界面に、熱膨張係数の差による熱応力や温度サイクル時に発生するせん断応力の集中が起こり、これら角部から界面の破断（剥離）が発生する。   In addition, when the power module substrate and the heat sink are joined via a rectangular flat buffer layer, the thermal stress due to the difference in thermal expansion coefficient or the shear generated at the temperature cycle at the corner ceramic insulating substrate and metal layer interface Stress concentration occurs, and interface breakage (peeling) occurs from these corners.

本発明は、前述の課題に鑑みてなされたもので、緩衝層の角部の応力集中を抑え、また熱抵抗を低減して、熱サイクル時における接合信頼性を高めることができるヒートシンク付パワーモジュール用基板及びヒートシンク付パワーモジュールを提供することを目的とする。   The present invention has been made in view of the above-described problems, and a power module with a heat sink that can suppress the stress concentration at the corners of the buffer layer and reduce the thermal resistance to increase the bonding reliability during the thermal cycle. It is an object to provide a power module with a heat sink substrate and a heat sink.

前記目的を達成するために、本発明は以下の手段を提案している。
すなわち本発明は、絶縁基板の一方の面に回路層が形成されるとともに他方の面に金属層が形成されたパワーモジュール基板と、前記金属層側に接合されて前記パワーモジュール基板を冷却するヒートシンクとを備えたヒートシンク付パワーモジュール用基板であって、前記金属層と前記ヒートシンクとの間に、中実の金属板からなる緩衝層が配設され、前記緩衝層は、４つの角部が切り欠かれた矩形平板状をなしていることを特徴とする。 In order to achieve the above object, the present invention proposes the following means.
That is, the present invention includes a power module substrate having a circuit layer formed on one surface of an insulating substrate and a metal layer formed on the other surface, and a heat sink bonded to the metal layer side to cool the power module substrate. A power module substrate with a heat sink comprising a buffer layer made of a solid metal plate between the metal layer and the heat sink, the buffer layer being cut at four corners. It is characterized by a rectangular flat plate shape lacking.

本発明に係るヒートシンク付パワーモジュール用基板によれば、矩形平板状の緩衝層の４つの角部が切り欠かれており、金属層の４つの角部の直下は接合されていない状態となるため、絶縁基板と金属層界面における熱膨張差による熱応力や温度サイクル時に発生するせん断応力の集中が緩和され角部からの界面破断（剥離）が防止される。よって、熱サイクル時における接合信頼性が向上する。  According to the power module substrate with a heat sink according to the present invention, the four corners of the rectangular flat buffer layer are notched, and the portions immediately below the four corners of the metal layer are not joined. The concentration of thermal stress due to the difference in thermal expansion at the interface between the insulating substrate and the metal layer and the shear stress generated during the temperature cycle are alleviated, and interface fracture (peeling) from the corners is prevented. Therefore, the bonding reliability during the heat cycle is improved.

また、本発明に係るヒートシンク付パワーモジュール用基板において、前記緩衝層は、前記絶縁基板よりも外形が幅広に形成されていることとしてもよい。   In the power module substrate with a heat sink according to the present invention, the buffer layer may have a wider outer shape than the insulating substrate.

本発明によれば、緩衝層は中実となっており、緩衝層にて熱を十分に拡散させることができる。さらに外形が絶縁基板よりも大きく幅広に形成されているため、たとえ回路層の端部に電子部品が実装された場合でも、該端部を基点として周囲に十分に熱を拡散させることができる。したがってヒートシンクにおける放熱面積が十分に確保され、その結果、熱抵抗を下げることができる。   According to the present invention, the buffer layer is solid, and heat can be sufficiently diffused in the buffer layer. Furthermore, since the outer shape is larger and wider than the insulating substrate, even when an electronic component is mounted on the end portion of the circuit layer, heat can be sufficiently diffused around the end portion. Therefore, a sufficient heat radiation area is ensured in the heat sink, and as a result, the thermal resistance can be lowered.

すなわち、電子部品の配置される位置の如何に係わらず、該電子部品から緩衝層に伝わる熱が周囲に良好に拡がり、冷却効率が高められていて、かつ、熱サイクル時における接合信頼性が向上している。   That is, regardless of the position of the electronic component, the heat transmitted from the electronic component to the buffer layer spreads well to the surroundings, the cooling efficiency is improved, and the bonding reliability during the thermal cycle is improved. is doing.

また、本発明に係るヒートシンク付パワーモジュールは、前述のヒートシンク付パワーモジュール用基板と、該ヒートシンク付パワーモジュール用基板の前記回路層上に搭載された電子部品と、を備えることを特徴とする。
本発明のヒートシンク付パワーモジュールによれば、冷却効率が高く、熱サイクル時における接合信頼性が向上する。 In addition, a power module with a heat sink according to the present invention includes the above-mentioned power module substrate with a heat sink and an electronic component mounted on the circuit layer of the power module substrate with a heat sink.
According to the power module with a heat sink of the present invention, the cooling efficiency is high, and the bonding reliability during the heat cycle is improved.

本発明に係るヒートシンク付パワーモジュール用基板及びヒートシンク付パワーモジュールによれば、絶縁基板と金属層界面の角部における応力集中を抑え、また熱抵抗を低減して、熱サイクル時における接合信頼性を高めることができる。   According to the substrate for a power module with a heat sink and the power module with a heat sink according to the present invention, the stress concentration at the corner of the interface between the insulating substrate and the metal layer is suppressed, and the thermal resistance is reduced, thereby improving the bonding reliability during the thermal cycle. Can be increased.

以下、図面を参照し、本発明の実施の形態について説明する。
図１は本発明の一実施形態に係るヒートシンク付パワーモジュールの概略構成を示す断面図、図２は本発明の一実施形態に係るヒートシンク付パワーモジュールの緩衝層の形状を示す概略平面図、図３は図２におけるＡ−Ａ矢視を示す断面図、図４は図２におけるＢ−Ｂ矢視を示す断面図、図５は本発明の一実施形態に係るヒートシンク付パワーモジュールの緩衝層の第１変形例を示す概略平面図、図６は本発明の一実施形態に係るヒートシンク付パワーモジュールの緩衝層の第２変形例を示す概略平面図である。 Embodiments of the present invention will be described below with reference to the drawings.
FIG. 1 is a cross-sectional view showing a schematic configuration of a power module with a heat sink according to an embodiment of the present invention. FIG. 2 is a schematic plan view showing the shape of a buffer layer of the power module with a heat sink according to an embodiment of the present invention. 3 is a cross-sectional view showing an arrow AA in FIG. 2, FIG. 4 is a cross-sectional view showing an arrow BB in FIG. 2, and FIG. 5 is a buffer layer of a power module with a heat sink according to an embodiment of the present invention. FIG. 6 is a schematic plan view showing a second modification of the buffer layer of the power module with a heat sink according to one embodiment of the present invention.

図１に示すように、本実施形態のヒートシンク付パワーモジュール１０は、ヒートシンク付パワーモジュール用基板２０の上面に、例えばＩＧＢＴ（Ｉｎｓｕｌａｔｅｄ Ｇａｔｅ Ｂｉｐｏｌａｒ Ｔｒａｎｓｉｓｔｏｒ）などのパワーデバイスからなる電子部品１１がはんだ付けにより接合されて形成されている。   As shown in FIG. 1, the power module 10 with a heat sink of the present embodiment has an electronic component 11 made of a power device such as an IGBT (Insulated Gate Bipolar Transistor) by soldering on the upper surface of the power module substrate 20 with a heat sink. It is formed by bonding.

また、ヒートシンク付パワーモジュール用基板２０は、パワーモジュール基板３０と、ヒートシンク１２とを備え、これらパワーモジュール基板３０とヒートシンク１２との間に後述する緩衝層１３を介在させ、互いにろう付け又ははんだ付けにより一体に接合されている。ヒートシンク１２は、内部に冷媒である冷却水を流通させるための複数の流路１２ａを備えている。そして、電子部品１１で生じた熱がヒートシンク１２に伝達され熱交換されて、装置が冷却される。   The power module substrate 20 with a heat sink includes a power module substrate 30 and a heat sink 12, and a buffer layer 13 described later is interposed between the power module substrate 30 and the heat sink 12, and brazed or soldered to each other. Are joined together. The heat sink 12 includes a plurality of flow paths 12a for circulating cooling water, which is a coolant, inside. The heat generated in the electronic component 11 is transmitted to the heat sink 12 to exchange heat, and the apparatus is cooled.

パワーモジュール基板３０は、例えばＡｌＮ（窒化アルミニウム）やＳｉ３Ｎ４（窒化珪素）からなる矩形平板状のセラミック絶縁基板（絶縁基板）２と、このセラミック絶縁基板２の上面に配置され該セラミック絶縁基板２よりも外形の小さな矩形平板状の回路層３と、セラミック絶縁基板２の下面に配置され該セラミック絶縁基板２よりも外形の小さな矩形平板状の金属層４と、を備えており、これらセラミック絶縁基板２、回路層３及び金属層４が互いにろう材により接合されている。また、回路層３と金属層４とは、セラミック絶縁基板２を挟んで互いに面対称に対向配置されて、略同一形状とされている。 The power module substrate 30 includes a rectangular flat ceramic insulating substrate (insulating substrate) 2 made of, for example, AlN (aluminum nitride) or Si 3 N 4 (silicon nitride), and the ceramic insulating substrate 2 disposed on the upper surface of the ceramic insulating substrate 2. A rectangular flat plate-like circuit layer 3 having an outer shape smaller than that of the substrate 2, and a rectangular flat plate-like metal layer 4 disposed on the lower surface of the ceramic insulating substrate 2 and having an outer shape smaller than that of the ceramic insulating substrate 2. The ceramic insulating substrate 2, the circuit layer 3, and the metal layer 4 are joined to each other by a brazing material. Further, the circuit layer 3 and the metal layer 4 are arranged to face each other symmetrically with respect to the ceramic insulating substrate 2 and have substantially the same shape.

回路層３は、例えばＡｌなどの高熱伝導率を有する金属により形成されており、また、金属層４も、Ａｌなどの高熱伝導率を有する金属により形成されている。
また、この金属層４の下面を覆うようにして、該金属層４よりも外形が幅広の緩衝層１３が接合されている。 The circuit layer 3 is made of a metal having a high thermal conductivity such as Al, and the metal layer 4 is also made of a metal having a high thermal conductivity such as Al.
Further, a buffer layer 13 having an outer shape wider than that of the metal layer 4 is bonded so as to cover the lower surface of the metal layer 4.

緩衝層１３は、Ａｌ（アルミニウム）又はＣｕ（銅）からなるバルク板材等の中実の金属板から形成されており、その厚みｔ１はセラミック絶縁基板２下面からヒートシンク１２の冷却面（冷媒と接する面）までの厚み（距離）ｔ２が２ｍｍから５ｍｍになるように設定され、より好ましくは厚みｔ２が３ｍｍから４ｍｍの範囲に設定される。尚、セラミック絶縁基板２下面からヒートシンク１２の冷却面までの厚み（距離）ｔ２が２ｍｍよりも小さく設定した場合には、電子部品１１から発生する熱を拡散するヒートスプレッド効果が充分に得られずヒートシンク１２の冷却面積が狭くなって熱抵抗が高くなり、また、セラミック絶縁基板２下面からヒートシンク１２の冷却面までの厚み（距離）ｔ２を５ｍｍよりも大きく設定した場合には、その距離が大きくなることによる熱抵抗上昇分がヒートスプレットによる熱抵抗低減効果を上回り、全体の熱抵抗は大きくなるため、上述の範囲とされるのが好ましい。   The buffer layer 13 is made of a solid metal plate such as a bulk plate made of Al (aluminum) or Cu (copper), and has a thickness t1 from the lower surface of the ceramic insulating substrate 2 to the cooling surface of the heat sink 12 (in contact with the refrigerant). The thickness (distance) t2 to the surface) is set to be 2 mm to 5 mm, and more preferably, the thickness t2 is set to a range of 3 mm to 4 mm. When the thickness (distance) t2 from the lower surface of the ceramic insulating substrate 2 to the cooling surface of the heat sink 12 is set to be smaller than 2 mm, the heat spread effect for diffusing the heat generated from the electronic component 11 cannot be obtained sufficiently. When the cooling area of the heat sink 12 is narrowed and the thermal resistance is increased, and the thickness (distance) t2 from the lower surface of the ceramic insulating substrate 2 to the cooling surface of the heat sink 12 is set to be larger than 5 mm, the distance is increased. The increase in the thermal resistance due to the above exceeds the thermal resistance reduction effect by the heat spread, and the overall thermal resistance becomes large.

また本発明者は、３次元の熱計算を行い、熱抵抗が低減される最適なセラミック絶縁基板２下面からヒートシンク１２の冷却面までの厚みｔ２を求めた。その結果、ヒートシンク１２での熱伝達係数が〜１００００Ｗ／Ｋ・ｍ２の場合において、前記厚みｔ２が２ｍｍ〜５ｍｍの範囲に設定されるのが好ましいことがわかった。 In addition, the present inventor performed a three-dimensional heat calculation and obtained an optimum thickness t2 from the lower surface of the ceramic insulating substrate 2 where the thermal resistance is reduced to the cooling surface of the heat sink 12. As a result, it was found that the thickness t2 is preferably set in the range of 2 mm to 5 mm when the heat transfer coefficient in the heat sink 12 is 10000 W / K · m 2 .

また、緩衝層１３の面方向（厚みｔ１，ｔ２に直交する方向）の外形は、セラミック絶縁基板２よりも大きく幅広に形成されている。詳しくは、図２、図３に示すように、これらセラミック絶縁基板２と緩衝層１３とを、互いの重心位置を重ねるようにして厚みｔ１，ｔ２方向に積層した状態で、緩衝層１３の端部１３ａが、セラミック絶縁基板２の端部２ａよりも外方に寸法Ｄだけ突出して配置される。ここで、寸法Ｄは０．５ｍｍ以上とされ、より好ましくは２ｍｍ以上に設定される。また、緩衝層１３の端部１３ａは、回路層３の端部３ａ及び金属層４の端部４ａから面方向外方に前記寸法Ｄを超えて突出されていて、距離が充分に設けられている。   Further, the outer shape of the buffer layer 13 in the surface direction (a direction orthogonal to the thicknesses t1 and t2) is larger and wider than the ceramic insulating substrate 2. Specifically, as shown in FIGS. 2 and 3, the ceramic insulating substrate 2 and the buffer layer 13 are stacked in the thickness t1 and t2 directions so that the positions of the center of gravity of each other overlap each other. The portion 13a is disposed so as to protrude outward from the end portion 2a of the ceramic insulating substrate 2 by a dimension D. Here, the dimension D is set to 0.5 mm or more, and more preferably set to 2 mm or more. Further, the end 13a of the buffer layer 13 protrudes beyond the dimension D outwardly in the plane direction from the end 3a of the circuit layer 3 and the end 4a of the metal layer 4, and is provided with a sufficient distance. Yes.

また、緩衝層１３は、４つの角部１３ｂが切り欠かれた矩形平板状をなしており、これら角部１３ｂは、略同一半径の円弧状に夫々形成されている。また、図２の平面視において、夫々の角部１３ｂの径方向外方の位置には、回路層３の４つの角部３ｂ、金属層４の４つの角部４ｂ及びセラミック絶縁基板２の４つの角部２ｂが夫々配置されている。すなわち、図４に示すように、回路層３の角部３ｂ、金属層４の角部４ｂ及びセラミック絶縁基板２の角部２ｂが、夫々緩衝層１３の角部１３ｂより外方に突出した状態とされていて、金属層４の角部４ｂ近傍の下面は、該緩衝層１３の上面に接合されてはいない。   The buffer layer 13 has a rectangular flat plate shape in which four corners 13b are cut out, and these corners 13b are each formed in an arc shape having substantially the same radius. Further, in the plan view of FIG. 2, there are four corners 3 b of the circuit layer 3, four corners 4 b of the metal layer 4, and 4 of the ceramic insulating substrate 2 at positions radially outward of the respective corners 13 b. Two corners 2b are respectively arranged. That is, as shown in FIG. 4, the corner 3b of the circuit layer 3, the corner 4b of the metal layer 4, and the corner 2b of the ceramic insulating substrate 2 protrude outward from the corner 13b of the buffer layer 13, respectively. The lower surface of the metal layer 4 near the corner 4b is not bonded to the upper surface of the buffer layer 13.

以上説明したように、本実施形態におけるヒートシンク付パワーモジュール１０によれば、矩形平板状の緩衝層１３の４つの角部１３ｂが切り欠かれており、金属層４の４つの角部４ｂの直下は接合されていない状態となるため、従来のようにセラミック絶縁基板２と金属層４界面の角部４ｂに熱膨張係数差に起因する温度サイクル時のせん断応力が集中し、角部４ｂからの界面破断（剥離）が発生するようなことが防止されている。よって、熱サイクル時における接合信頼性が向上する。   As described above, according to the power module with heat sink 10 in the present embodiment, the four corners 13b of the rectangular flat buffer layer 13 are notched, and are directly below the four corners 4b of the metal layer 4. Is in a state of not being joined, the shear stress during the temperature cycle due to the difference in thermal expansion coefficient is concentrated on the corner 4b at the interface between the ceramic insulating substrate 2 and the metal layer 4 as in the prior art. Interfacial fracture (peeling) is prevented from occurring. Therefore, the bonding reliability during the heat cycle is improved.

緩衝層１３は中実となっているため、緩衝層１３及びヒートシンク１２のそれぞれの接合面積が充分に確保され、緩衝層１３にて熱を十分に拡散させることができる。さらに外形がセラミック絶縁基板２よりも大きく幅広に形成されているため、たとえ回路層３の端部３ａ近傍に電子部品１１が実装された場合でも、該端部３ａを基点として周囲に十分に熱を拡散させることができる。したがってヒートシンク１２において放熱面積が十分に確保され、その結果、熱抵抗を下げることができる。   Since the buffer layer 13 is solid, the bonding areas of the buffer layer 13 and the heat sink 12 are sufficiently secured, and the buffer layer 13 can sufficiently diffuse heat. Furthermore, since the outer shape is larger and wider than the ceramic insulating substrate 2, even when the electronic component 11 is mounted in the vicinity of the end 3a of the circuit layer 3, sufficient heat is generated around the end 3a. Can be diffused. Therefore, a sufficient heat radiation area is secured in the heat sink 12, and as a result, the thermal resistance can be lowered.

このような構成によれば、回路層３上において電子部品１１の配置される位置の如何に係わらず、該電子部品１１から緩衝層１３に伝わる熱が周囲に良好に拡がり、冷却効率が高められていて、かつ、熱サイクル時における接合信頼性が向上している。   According to such a configuration, regardless of the position where the electronic component 11 is arranged on the circuit layer 3, the heat transmitted from the electronic component 11 to the buffer layer 13 spreads well around the circuit layer 3, and the cooling efficiency is increased. In addition, the bonding reliability during thermal cycling is improved.

尚、本発明は前記実施の形態に限定されるものではなく、本発明の趣旨を逸脱しない範囲において種々の変更を加えることが可能である。
例えば、本実施形態では、緩衝層１３の４つの角部１３ｂは、略同一半径の円弧状に夫々切り欠かれて形成されているとして説明したが、これに限定されるものではない。 The present invention is not limited to the above embodiment, and various modifications can be made without departing from the spirit of the present invention.
For example, in the present embodiment, the four corners 13b of the buffer layer 13 have been described as being cut out into arcs having substantially the same radius, but the present invention is not limited to this.

図５に示すものは、本実施形態の第１変形例であり、緩衝層２３の面方向の外形は、セラミック絶縁基板２よりも大きく幅広に形成されており、緩衝層２３の端部２３ａが、セラミック絶縁基板２の端部２ａよりも外方に寸法Ｄだけ突出して配置されている。また、緩衝層２３の４つの角部２３ｂは、夫々内方に向け窪む略凹円弧状に切り欠かれている。そして、図５の平面視において、金属層４の角部４ｂが緩衝層２３の角部２３ｂより外方に突出した状態とされ配置されており、該金属層４の角部４ｂ近傍の下面は、緩衝層２３の上面に接合されていない。このような第１変形例においても、前述の実施形態と同様の効果を奏功する。   FIG. 5 shows a first modification of the present embodiment, and the outer shape of the buffer layer 23 in the surface direction is larger and wider than the ceramic insulating substrate 2, and the end portion 23 a of the buffer layer 23 is formed. Further, the ceramic insulating substrate 2 is disposed so as to protrude outward from the end 2a of the ceramic insulating substrate 2 by a dimension D. Further, the four corners 23b of the buffer layer 23 are notched in a substantially concave arc shape that is recessed inward. In the plan view of FIG. 5, the corner 4 b of the metal layer 4 is disposed so as to protrude outward from the corner 23 b of the buffer layer 23, and the lower surface of the metal layer 4 near the corner 4 b is The upper surface of the buffer layer 23 is not bonded. In such a first modified example, the same effect as that of the above-described embodiment is achieved.

また、図６に示すものは、本実施形態の第２変形例であり、緩衝層３３の面方向の外形は、セラミック絶縁基板２よりも大きく幅広に形成されており、緩衝層３３の端部３３ａが、セラミック絶縁基板２の端部２ａよりも外方に寸法Ｄだけ突出して配置されている。また、緩衝層３３の４つの角部３３ｂは、角を斜めに落としたようにして形成された面取り断面形状とされている。詳しくは、これら角部３３ｂは、夫々の角部３３ｂに隣り合う二辺の端部３３ａに傾斜して交わる一辺を備えた切り欠き形状とされている。また角部３３ｂの前記一辺の両端に配置される頂点の形成する角度は、例えば夫々１３５°とされている。そして、図６の平面視において、金属層４の角部４ｂが、緩衝層３３の角部３３ｂより外方に突出した状態とされ配置されており、該金属層４の角部４ｂ近傍の下面は、緩衝層３３の上面に接合されていない。このような第２変形例においても、前述の実施形態と同様の効果を奏功する。   FIG. 6 shows a second modification of the present embodiment, in which the outer shape of the buffer layer 33 in the surface direction is larger and wider than the ceramic insulating substrate 2. 33a is disposed to protrude outwardly from the end 2a of the ceramic insulating substrate 2 by a dimension D. Further, the four corner portions 33b of the buffer layer 33 have a chamfered cross-sectional shape formed by dropping the corners obliquely. Specifically, these corner portions 33b are formed in a cutout shape having one side that inclines and intersects with two end portions 33a adjacent to each corner portion 33b. In addition, the angles formed by the apexes arranged at both ends of the one side of the corner 33b are, for example, 135 °. 6, the corner 4b of the metal layer 4 is disposed so as to protrude outward from the corner 33b of the buffer layer 33, and the lower surface of the metal layer 4 near the corner 4b. Is not bonded to the upper surface of the buffer layer 33. Even in the second modified example, the same effect as in the above-described embodiment is achieved.

また本実施形態では、セラミック絶縁基板２と回路層３又は金属層４とは、ろう材により接合されていることとして説明したが、それ以外の方法により接合されていても構わない。
また本実施形態では、セラミック絶縁基板２は、ＡｌＮやＳｉ３Ｎ４からなるとして説明したが、これらに限定されるものではない。
また、回路層３及び金属層４も、Ａｌに限定されるものではない。
また、ヒートシンク１２は、本実施形態の水冷式に限らずに、空冷式や他の液冷式のものであっても構わない。 In the present embodiment, the ceramic insulating substrate 2 and the circuit layer 3 or the metal layer 4 have been described as being bonded by a brazing material, but may be bonded by other methods.
In the present embodiment, the ceramic insulating substrate 2 is described as being made of AlN or Si 3 N 4 , but is not limited thereto.
Further, the circuit layer 3 and the metal layer 4 are not limited to Al.
The heat sink 12 is not limited to the water-cooled type of the present embodiment, and may be an air-cooled type or other liquid-cooled type.

本発明の一実施形態に係るヒートシンク付パワーモジュールの概略構成を示す断面図である。It is sectional drawing which shows schematic structure of the power module with a heat sink which concerns on one Embodiment of this invention. 本発明の一実施形態に係るヒートシンク付パワーモジュールの緩衝層の形状を示す概略平面図である。It is a schematic plan view which shows the shape of the buffer layer of the power module with a heat sink which concerns on one Embodiment of this invention. 図２におけるＡ−Ａ矢視を示す断面図である。It is sectional drawing which shows the AA arrow in FIG. 図２におけるＢ−Ｂ矢視を示す断面図である。It is sectional drawing which shows the BB arrow in FIG. 本発明の一実施形態に係るヒートシンク付パワーモジュールの緩衝層の第１変形例を示す概略平面図である。It is a schematic plan view which shows the 1st modification of the buffer layer of the power module with a heat sink which concerns on one Embodiment of this invention. 本発明の一実施形態に係るヒートシンク付パワーモジュールの緩衝層の第２変形例を示す概略平面図である。It is a schematic plan view which shows the 2nd modification of the buffer layer of the power module with a heat sink which concerns on one Embodiment of this invention.

符号の説明Explanation of symbols

２ セラミック絶縁基板（絶縁基板）
３ 回路層
４ 金属層
１０ ヒートシンク付パワーモジュール
１１ 電子部品
１２ ヒートシンク
１３，２３，３３ 緩衝層
１３ｂ，２３ｂ，３３ｂ 緩衝層の角部
２０ ヒートシンク付パワーモジュール用基板
３０ パワーモジュール基板 2 Ceramic insulation substrate (insulation substrate)
3 circuit layer 4 metal layer 10 power module with heat sink 11 electronic component 12 heat sink 13, 23, 33 buffer layer 13b, 23b, 33b corner of buffer layer 20 power module substrate with heat sink 30 power module substrate

Claims (3)

絶縁基板の一方の面に回路層が形成されるとともに他方の面に金属層が形成されたパワーモジュール基板と、前記金属層側に接合されて前記パワーモジュール基板を冷却するヒートシンクとを備えたヒートシンク付パワーモジュール用基板であって、
前記金属層と前記ヒートシンクとの間に、中実の金属板からなる緩衝層が配設され、
前記緩衝層は、４つの角部が切り欠かれた矩形平板状をなしていることを特徴とするヒートシンク付パワーモジュール用基板。 A heat sink comprising: a power module substrate having a circuit layer formed on one surface of the insulating substrate and a metal layer formed on the other surface; and a heat sink bonded to the metal layer side to cool the power module substrate. A power module substrate with
A buffer layer made of a solid metal plate is disposed between the metal layer and the heat sink,
The power buffer substrate with a heat sink, wherein the buffer layer has a rectangular flat plate shape with four corners cut out. 請求項１に記載のヒートシンク付パワーモジュール用基板であって、
前記緩衝層は、前記絶縁基板よりも外形が幅広に形成されていることを特徴とするヒートシンク付パワーモジュール用基板。 A power module substrate with a heat sink according to claim 1,
The power module substrate with a heat sink, wherein the buffer layer has a wider outer shape than the insulating substrate. 請求項１又は請求項２に記載のヒートシンク付パワーモジュール用基板と、該ヒートシンク付パワーモジュール用基板の前記回路層上に搭載された電子部品と、を備えることを特徴とするヒートシンク付パワーモジュール。   A power module with a heat sink according to claim 1 or 2, and an electronic component mounted on the circuit layer of the power module substrate with a heat sink.
JP2008067663A 2008-03-17 2008-03-17 Power module substrate with heat sink and power module with heat sink Active JP5163199B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008067663A JP5163199B2 (en) 2008-03-17 2008-03-17 Power module substrate with heat sink and power module with heat sink

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008067663A JP5163199B2 (en) 2008-03-17 2008-03-17 Power module substrate with heat sink and power module with heat sink

Publications (2)

Publication Number Publication Date
JP2009224571A true JP2009224571A (en) 2009-10-01
JP5163199B2 JP5163199B2 (en) 2013-03-13

Family

ID=41241044

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008067663A Active JP5163199B2 (en) 2008-03-17 2008-03-17 Power module substrate with heat sink and power module with heat sink

Country Status (1)

Country Link
JP (1) JP5163199B2 (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011114157A (en) * 2009-11-26 2011-06-09 Mitsubishi Electric Corp Power converter
JP2014060318A (en) * 2012-09-19 2014-04-03 Kyocera Corp Package for housing semiconductor element and semiconductor device
WO2014061588A1 (en) 2012-10-16 2014-04-24 三菱マテリアル株式会社 Substrate for power module with heat sink, power module with heat sink, and method for producing substrate for power module with heat sink
WO2014103965A1 (en) 2012-12-27 2014-07-03 三菱マテリアル株式会社 Substrate for power module, substrate for power module having metal member, power module having metal member, method for manufacturing substrate for power module, method for manufacturing substrate for power module having metal member
US10011093B2 (en) 2012-09-21 2018-07-03 Mitsubishi Materials Corporation Bonding structure of aluminum member and copper member
WO2020096040A1 (en) 2018-11-08 2020-05-14 三菱マテリアル株式会社 Bonded body, insulated circuit board with heat sink, and heat sink
CN111656519A (en) * 2018-01-25 2020-09-11 三菱电机株式会社 Circuit device and power conversion device
CN117253866A (en) * 2023-11-20 2023-12-19 深圳平创半导体有限公司 Three-dimensional packaging structure and method of power module and vehicle electric drive device

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04192341A (en) * 1990-11-24 1992-07-10 Hitachi Ltd Semiconductor device
JP2004063655A (en) * 2002-07-26 2004-02-26 Toyota Industries Corp Heat radiation system and method therefor, heat buffering member, semiconductor module, heat spreader, and substrate
JP2004134746A (en) * 2002-08-13 2004-04-30 Fuji Electric Device Technology Co Ltd Semiconductor device
JP2004253522A (en) * 2003-02-19 2004-09-09 Fujitsu Ltd Structure for cooling electronic component and semiconductor module
JP2005011862A (en) * 2003-06-17 2005-01-13 Mitsubishi Electric Corp Semiconductor device
JP2008294283A (en) * 2007-05-25 2008-12-04 Showa Denko Kk Semiconductor device
JP2008294284A (en) * 2007-05-25 2008-12-04 Toyota Industries Corp Semiconductor device

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04192341A (en) * 1990-11-24 1992-07-10 Hitachi Ltd Semiconductor device
JP2004063655A (en) * 2002-07-26 2004-02-26 Toyota Industries Corp Heat radiation system and method therefor, heat buffering member, semiconductor module, heat spreader, and substrate
JP2004134746A (en) * 2002-08-13 2004-04-30 Fuji Electric Device Technology Co Ltd Semiconductor device
JP2004253522A (en) * 2003-02-19 2004-09-09 Fujitsu Ltd Structure for cooling electronic component and semiconductor module
JP2005011862A (en) * 2003-06-17 2005-01-13 Mitsubishi Electric Corp Semiconductor device
JP2008294283A (en) * 2007-05-25 2008-12-04 Showa Denko Kk Semiconductor device
JP2008294284A (en) * 2007-05-25 2008-12-04 Toyota Industries Corp Semiconductor device

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011114157A (en) * 2009-11-26 2011-06-09 Mitsubishi Electric Corp Power converter
JP2014060318A (en) * 2012-09-19 2014-04-03 Kyocera Corp Package for housing semiconductor element and semiconductor device
US10011093B2 (en) 2012-09-21 2018-07-03 Mitsubishi Materials Corporation Bonding structure of aluminum member and copper member
US9968012B2 (en) 2012-10-16 2018-05-08 Mitsubishi Materials Corporation Heat-sink-attached power module substrate, heat-sink-attached power module, and method for producing heat-sink-attached power module substrate
WO2014061588A1 (en) 2012-10-16 2014-04-24 三菱マテリアル株式会社 Substrate for power module with heat sink, power module with heat sink, and method for producing substrate for power module with heat sink
CN104718616A (en) * 2012-10-16 2015-06-17 三菱综合材料株式会社 Substrate for power module with heat sink, power module with heat sink, and method for producing substrate for power module with heat sink
KR20150067177A (en) 2012-10-16 2015-06-17 미쓰비시 마테리알 가부시키가이샤 Substrate for power module with heat sink, power module with heat sink, and method for producing substrate for power module with heat sink
WO2014103965A1 (en) 2012-12-27 2014-07-03 三菱マテリアル株式会社 Substrate for power module, substrate for power module having metal member, power module having metal member, method for manufacturing substrate for power module, method for manufacturing substrate for power module having metal member
US9693449B2 (en) 2012-12-27 2017-06-27 Mitsubishi Materials Corporation Power module substrate, power module substrate with metal part, power module with metal part, method for producing power module substrate, and method for producing power module substrate with metal part
KR20150099757A (en) 2012-12-27 2015-09-01 미쓰비시 마테리알 가부시키가이샤 Substrate for power module, substrate for power module having metal member, power module having metal member, method for manufacturing substrate for power module, method for manufacturing substrate for power module having metal member
CN111656519A (en) * 2018-01-25 2020-09-11 三菱电机株式会社 Circuit device and power conversion device
WO2020096040A1 (en) 2018-11-08 2020-05-14 三菱マテリアル株式会社 Bonded body, insulated circuit board with heat sink, and heat sink
KR20210090613A (en) 2018-11-08 2021-07-20 미쓰비시 마테리알 가부시키가이샤 A bonded body, an insulated circuit board with a heat sink attached thereto, and a heat sink
CN117253866A (en) * 2023-11-20 2023-12-19 深圳平创半导体有限公司 Three-dimensional packaging structure and method of power module and vehicle electric drive device
CN117253866B (en) * 2023-11-20 2024-03-01 深圳平创半导体有限公司 Three-dimensional packaging structure and method of power module and vehicle electric drive device

Also Published As

Publication number Publication date
JP5163199B2 (en) 2013-03-13

Similar Documents

Publication Publication Date Title
JP5163199B2 (en) Power module substrate with heat sink and power module with heat sink
JP6199397B2 (en) Semiconductor device and manufacturing method thereof
CN101312183B (en) Semiconductor device
WO2015064232A1 (en) Semiconductor module
JP2010171279A (en) Heat radiator
JP2008503895A (en) Thermoelectric module
JP2008294280A (en) Semiconductor device
JP2007335663A (en) Semiconductor module
US8446727B2 (en) Electronic component
JP2007067258A (en) Cooler and power module
JP2008294279A (en) Semiconductor device
JP5050633B2 (en) Power module substrate with heat sink and power module
JP2004022914A (en) Insulated circuit board, cooling structure therefor, power semiconductor device, and cooling structure therefor
JPWO2016158020A1 (en) Semiconductor module
JP2007141932A (en) Power module base
JP2002289750A (en) Multi-chip module and its radiation structure
JP2008124187A (en) Base for power module
JP2011091152A (en) Power module
JP2008294281A (en) Semiconductor device and manufacturing method therefor
JP2008124187A6 (en) Power module base
JP2008294282A (en) Semiconductor device and method of manufacturing semiconductor device
JP2013165117A (en) Semiconductor device
KR101365501B1 (en) Semiconductor device
JP6316219B2 (en) Power semiconductor module
JP2005116578A (en) Heat dissipation structure

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20100929

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20110519

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20120828

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20121022

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20121120

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20121203

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20151228

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Ref document number: 5163199

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150