JP2009202822A - Control device - Google Patents

Control device Download PDF

Info

Publication number
JP2009202822A
JP2009202822A JP2008049597A JP2008049597A JP2009202822A JP 2009202822 A JP2009202822 A JP 2009202822A JP 2008049597 A JP2008049597 A JP 2008049597A JP 2008049597 A JP2008049597 A JP 2008049597A JP 2009202822 A JP2009202822 A JP 2009202822A
Authority
JP
Japan
Prior art keywords
power supply
circuit
cpu
power
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2008049597A
Other languages
Japanese (ja)
Other versions
JP5231047B2 (en
Inventor
Masayoshi Takeda
真宜 武田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yazaki Corp
Original Assignee
Yazaki Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yazaki Corp filed Critical Yazaki Corp
Priority to JP2008049597A priority Critical patent/JP5231047B2/en
Publication of JP2009202822A publication Critical patent/JP2009202822A/en
Application granted granted Critical
Publication of JP5231047B2 publication Critical patent/JP5231047B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Power Sources (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a control device capable of reducing the power consumption. <P>SOLUTION: A power supply control circuit 1 includes a CAN-I/F circuit 2 in which a CAN communication signal is input from an external apparatus, a time-counting circuit 3 for counting the re-starting time of a CPU 6, and a drive control circuit 4 for controlling the drive of a power supply IC 7. The CAN-I/F circuit 2 inputs a wake-up detection signal in the drive control circuit 4 when the CAN communication signal is input from the external apparatus, and inputs the CAN communication signal in the started CPU 6. The time-counting circuit 3 counts the wake-up time designated by the CPU 6, and inputs the power supply-ON signal in the drive control circuit 4 when the wake-up time is elapsed, and inputs the re-starting signal in the started CPU 6. The drive control circuit 4 inputs the starting signal when the wake-up detection signal is input from the CAN-I/F circuit 2, or when the power supply ON signal is input from the time-counting circuit 3, and the drive stop signal when the power supply OFF signal is input from the CPU 6 in the power supply IC 7, respectively. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、車両用の制御装置に係り、特に非動作時の消費電力量を更に削減することのできる制御装置に関する。   The present invention relates to a control device for a vehicle, and more particularly to a control device that can further reduce power consumption during non-operation.

ECU(電子制御ユニット)等の制御装置では、処理すべきイベントの発生しない非動作時には、スリープモードに移行して電力消費量の削減を図っている。例えば、下記の特許文献1に記載のマイクロコンピュータは、所定ビットの送信データを内部割込発生回路からウオッチドッグタイマにシリアルに送信する処理を、送信データの送信完了から所定時間が経過する度に繰り返す。スリープモード中には、送信データの送信後に内部割込が発生し、マイクロコンピュータがウエイクアップする。内部割込発生回路がウオッチドッグタイマに送信する送信データのビット数をスリープモード時には増やすことにより、内部割込の発生間隔を延長し、マイクロコンピュータの消費電力量を削減することができる。
特開平10−39960号公報
In a control device such as an ECU (electronic control unit), when an event to be processed does not occur, the control device shifts to a sleep mode to reduce power consumption. For example, the microcomputer described in Patent Document 1 below performs a process of serially transmitting transmission data of a predetermined bit from an internal interrupt generation circuit to a watchdog timer every time a predetermined time elapses after transmission data transmission is completed. repeat. During the sleep mode, an internal interrupt occurs after transmission data is transmitted, and the microcomputer wakes up. By increasing the number of bits of transmission data that the internal interrupt generation circuit transmits to the watchdog timer in the sleep mode, the internal interrupt generation interval can be extended and the power consumption of the microcomputer can be reduced.
Japanese Patent Laid-Open No. 10-39960

しかしながら、上記特許文献1に記載のマイクロコンピュータには、車載バッテリの電源供給能力が維持されている間は電力供給が行われており、高速,大容量のCPUを用いるとスリープモードでも多くの電力を必要とし、非動作時におけるマイクロコンピュータの消費電力量のさらなる削減が求められている。特に、CPU等の制御部の多数搭載される傾向にある車両では、バッテリ容量の制限もあることから、消費電力量の削減が、強く求められている。   However, the microcomputer described in Patent Document 1 is supplied with power while the power supply capability of the in-vehicle battery is maintained. If a high-speed, large-capacity CPU is used, much power is supplied even in the sleep mode. Therefore, there is a demand for further reduction in the power consumption of the microcomputer when it is not in operation. In particular, in vehicles that tend to be equipped with a large number of control units such as CPUs, there is a strong demand for reduction in power consumption because of the limited battery capacity.

本発明は、上記した点に鑑み、消費電力量を削減することのできるECU等の制御装置を提供することを目的とする。   An object of the present invention is to provide a control device such as an ECU that can reduce power consumption in view of the above points.

このような目的を達成するために、本発明の制御装置は、制御部の動作時に前記制御部に電源を供給する第1電源と、前記第1電源から前記制御部への電源供給を制御する電源供給制御手段と、前記第1電源とは別個に、前記電源供給制御手段へ電源を供給する第2電源とを備えた制御装置であって、前記電源供給制御手段が、前記制御部の動作終了後に、再起動時間を計時する計時回路を備え、該計時回路による再起動時間の計時完了により、前記第1電源から前記制御部に電源供給して、前記制御部に自身の動作異常の有無を判定させることを特徴とする。
また、本発明は、前記電源供給制御手段が、外部からの信号入力を受け付ける外部入力受付手段を備え、該外部入力受付手段にて外部から信号入力を受けて、前記第1電源から前記制御部に電源供給することを特徴とする。
In order to achieve such an object, the control device of the present invention controls a first power source that supplies power to the control unit during operation of the control unit, and power supply from the first power source to the control unit. A control apparatus comprising: a power supply control means; and a second power supply that supplies power to the power supply control means separately from the first power supply, wherein the power supply control means operates the controller. A timer circuit for measuring the restart time after completion, and when the restart time is measured by the timer circuit, power is supplied from the first power source to the control unit, and the control unit has its own operation abnormality. It is characterized by making it determine.
Further, according to the present invention, the power supply control unit includes an external input receiving unit that receives a signal input from the outside, and receives the signal input from the outside by the external input receiving unit, and the control unit from the first power source Power is supplied to

本発明によれば、制御部の動作終了後に計時回路による再起動時間の計時が完了する度に、電源回路による電源供給が行われ、制御部の非動作時には、制御部に対する電源供給を遮断することから、制御装置による消費電力量を削減することができる。   According to the present invention, power supply is performed by the power supply circuit every time the restart time is measured by the timing circuit after the operation of the control unit is completed, and the power supply to the control unit is shut off when the control unit is not operating. As a result, the amount of power consumed by the control device can be reduced.

以下、図面を参照して、本発明の最良の形態を説明する。
図1は、本実施形態の制御装置10の構成の概略を示すブロック図であり、本実施の形態では車両用の制御装置(以下ECUという。)を例として説明する。
Hereinafter, the best mode of the present invention will be described with reference to the drawings.
FIG. 1 is a block diagram showing an outline of the configuration of the control device 10 of the present embodiment. In the present embodiment, a vehicle control device (hereinafter referred to as an ECU) will be described as an example.

制御装置10は、車両電装品の動作を制御するためのものであり、CPU6を含む制御部への電源IC(電源回路)7からの電源供給を、電源供給制御回路1で制御する。なお、CPU6には、図示していないその他の回路が接続されている。電源供給制御回路1は、イグニッションスイッチ等の外部機器からCAN通信信号の入力されるCAN・I/F回路2と、CPU6の再起動時間を計時する計時回路3と、電源IC7の駆動を制御する駆動制御回路4とを備えて構成されている。電源IC7は、車載バッテリから供給された電源を、電源供給制御回路1の制御のもとにCPU6に供給する。   The control device 10 is for controlling the operation of the vehicle electrical component, and the power supply control circuit 1 controls the power supply from the power supply IC (power supply circuit) 7 to the control unit including the CPU 6. The CPU 6 is connected to other circuits not shown. The power supply control circuit 1 controls driving of a CAN / I / F circuit 2 to which a CAN communication signal is input from an external device such as an ignition switch, a clock circuit 3 for measuring a restart time of the CPU 6, and a power supply IC 7. And a drive control circuit 4. The power supply IC 7 supplies power supplied from the in-vehicle battery to the CPU 6 under the control of the power supply control circuit 1.

CAN・I/F回路2は、ウエイクアップ検出信号を出力する機能を備えたCANトランシーバから構成されており、ウエイクアップ検出信号を駆動制御回路4の入力端子に、CAN通信信号をCPU6のCAN端子に、それぞれ出力する。また、CAN・I/F回路2は、イグニッションスイッチ等の外部機器と通信線で接続されており、外部機器からCAN通信信号が入力されると、このCAN通信信号をCPU6に入力して内部割込を発生させる。また、電源IC7からの電源供給が遮断されてCPU6の駆動が停止している場合には、電源供給制御回路4にウエイクアップ検出信号を入力すると共に、起動したCPU6にCAN通信信号を入力して内部割込を発生させる。   The CAN / I / F circuit 2 includes a CAN transceiver having a function of outputting a wakeup detection signal. The wakeup detection signal is input to the input terminal of the drive control circuit 4, and the CAN communication signal is input to the CAN terminal of the CPU 6. Respectively. The CAN / I / F circuit 2 is connected to an external device such as an ignition switch through a communication line. When a CAN communication signal is input from the external device, the CAN communication signal is input to the CPU 6 to be internally allocated. Generate. When the power supply from the power supply IC 7 is cut off and the drive of the CPU 6 is stopped, a wakeup detection signal is input to the power supply control circuit 4 and a CAN communication signal is input to the activated CPU 6. Generate an internal interrupt.

計時回路3は、RTC(Real time clock)から構成されており、駆動制御回路4の入力端子及びCPU6のI/O端子に接続されている。計時回路3は、CPU6の指示によりウエイクアップ時間を計時し、ウエイクアップ時間が経過すると電源オン信号を駆動制御回路4に入力し、起動したCPU6に再起動時信号を入力して内部割込を発生させる。   The timer circuit 3 is composed of an RTC (Real time clock), and is connected to an input terminal of the drive control circuit 4 and an I / O terminal of the CPU 6. The time measuring circuit 3 measures the wake-up time according to an instruction from the CPU 6, and when the wake-up time elapses, inputs a power-on signal to the drive control circuit 4, and inputs a restart time signal to the activated CPU 6 to generate an internal interrupt. generate.

駆動制御回路4は、3つの入力端子と1つの出力端子とを備えたOR回路から構成されており、入力端子のそれぞれがCAN・I/F回路2,計時回路3,及びCPU6のI/O端子に接続され、出力端子が電源IC7に接続されている。駆動制御回路4は、CPU6から電源オフ信号が入力されていないか、CAN・I/F回路2からウエイクアップ検出信号が、又は、計時回路3から電源オン信号が入力されると電源IC7に起動信号を出力する。CAN・I/F回路2,計時回路3,及び駆動制御回路4は、定電圧電源5から電源供給を受けて駆動する。定電圧電源5は、車載バッテリから供給された電源を、電源供給制御回路1に分配する。従って、スリープモードで電源IC7の出力が遮断されても、電源供給制御回路1への電源供給は行われている。   The drive control circuit 4 is composed of an OR circuit having three input terminals and one output terminal, and each of the input terminals is a CAN / I / F circuit 2, a clock circuit 3, and an I / O of the CPU 6. The output terminal is connected to the power supply IC 7. The drive control circuit 4 is activated by the power supply IC 7 when no power-off signal is input from the CPU 6, a wake-up detection signal is input from the CAN / I / F circuit 2, or a power-on signal is input from the timing circuit 3. Output a signal. The CAN / I / F circuit 2, the timing circuit 3, and the drive control circuit 4 are driven by receiving power from the constant voltage power supply 5. The constant voltage power supply 5 distributes the power supplied from the in-vehicle battery to the power supply control circuit 1. Therefore, even if the output of the power supply IC 7 is interrupted in the sleep mode, the power supply to the power supply control circuit 1 is performed.

このようにして構成される制御装置10の動作を説明する。
まず、CPU6が駆動停止時に行うシステム終了処理について、図2のフローチャートを用いて説明する。この処理では、CPU6は、動作終了時であるか否か、つまり、実行中であった車載機器の制御に必要な各処理が終了し、又は、その終了から所定時間CAN・I/F回路2を介してCAN通信信号の入力がない等の、所定の動作終了条件が満たされたか否かを判別する(ステップS1)。この判別が“YES”だと、CPU6は、再起動時に必要なデータの記憶部8への退避が完了したか否かを判別する(ステップS2)。データ退避が完了してステップS2の判別が“YES”になると、CPU6は、計時回路3にウエイクアップ時間をセットする(ステップS3)。つまり、ウエイクアップ時間の経過後に電源オン信号を出力することを指示する制御信号を、計時回路3に入力する。計時回路3は、この制御信号の入力後、又は、入力された制御信号が指示する計時タイミングで、ウエイクアップ時間の計時を開始する。
The operation of the control device 10 configured as described above will be described.
First, the system termination process performed by the CPU 6 when driving is stopped will be described with reference to the flowchart of FIG. In this process, the CPU 6 determines whether or not it is the end of the operation, that is, each process necessary for controlling the in-vehicle device being executed ends, or a predetermined time CAN / I / F circuit 2 from the end. It is determined whether or not a predetermined operation end condition such as no CAN communication signal input is satisfied (step S1). If this determination is “YES”, the CPU 6 determines whether or not saving of data necessary for restarting to the storage unit 8 has been completed (step S2). When the data saving is completed and the determination in step S2 is “YES”, the CPU 6 sets a wake-up time in the timing circuit 3 (step S3). That is, a control signal instructing to output a power-on signal after the wake-up time has elapsed is input to the timer circuit 3. The time measuring circuit 3 starts measuring the wake-up time after the input of this control signal or at the time measured by the input control signal.

次に、CPU6は、駆動制御回路4に電源オフ信号(論理値=0)を入力し(ステップS4)、処理を終了する。電源オフ信号を入力された駆動制御回路4は、電源IC7に駆動停止信号(論理値=0)を入力し、電源IC7によるCPU6への電源供給を停止する。この場合、駆動制御回路4の他の2つの入力は論理値=0が入力されているとする。これにより、CPU6の動作が停止して、CPU6の消費電力が“0”となる。CPU6の動作停止中にも電源供給制御回路1の各回路には、定電圧電源5からの電源供給が継続されており、CAN・I/F回路2によるCAN通信信号の入力受付、及び、計時回路3による計時が行われている。   Next, the CPU 6 inputs a power-off signal (logical value = 0) to the drive control circuit 4 (step S4), and ends the process. The drive control circuit 4 to which the power-off signal is input inputs a drive stop signal (logical value = 0) to the power supply IC 7 and stops the power supply to the CPU 6 by the power supply IC 7. In this case, it is assumed that logic value = 0 is input to the other two inputs of the drive control circuit 4. As a result, the operation of the CPU 6 stops and the power consumption of the CPU 6 becomes “0”. Even when the operation of the CPU 6 is stopped, power supply from the constant voltage power supply 5 is continued to each circuit of the power supply control circuit 1, the CAN communication signal input acceptance by the CAN / I / F circuit 2, and timing Time is measured by the circuit 3.

次に、上述のようにして動作を停止したCPU6を起動させる電源供給制御回路1の動作について説明する。計時回路3による計時時間がウエイクアップ時間に達すると、計時回路3は、駆動制御回路4に電源オン信号(論理値=1)を入力する。電源オン信号を入力された駆動制御回路4は、電源IC7に起動信号(論理値=1)を入力し、電源IC7を起動させる。起動した電源IC7からは、CPU6に電源供給が行われ、CPU6が起動する。起動したCPU6は、計時回路3から再起動時信号の入力を受けてCPU6やECUの構成回路や外部機器の異常を判断する等の所定の処理を行った後、又は、この所定の処理の後に動作終了条件が満たされると、再び、上述したシステム終了処理を行う。   Next, the operation of the power supply control circuit 1 that activates the CPU 6 that has stopped operating as described above will be described. When the time measured by the time measuring circuit 3 reaches the wake-up time, the time measuring circuit 3 inputs a power-on signal (logical value = 1) to the drive control circuit 4. The drive control circuit 4 to which the power-on signal is input inputs a start signal (logical value = 1) to the power supply IC 7 and starts the power supply IC 7. The activated power supply IC 7 supplies power to the CPU 6, and the CPU 6 is activated. The activated CPU 6 receives a restart signal from the timing circuit 3 and performs a predetermined process such as determining an abnormality in the configuration circuit of the CPU 6 or the ECU or an external device, or after the predetermined process. When the operation termination condition is satisfied, the above-described system termination process is performed again.

また、外部機器からCAN通信信号が入力されると、CAN・I/F回路2は、駆動制御回路4にウエイクアップ検出信号(論理値=1)を入力する。ウエイクアップ検出信号を入力された駆動制御回路4は、電源IC7を起動させて、CPU6に電源供給する。電源供給を受けて起動したCPU6は、CAN・I/F回路2からCAN通信信号の入力を受けて車載機器の制御等の必要な処理を行う。   When a CAN communication signal is input from an external device, the CAN • I / F circuit 2 inputs a wakeup detection signal (logical value = 1) to the drive control circuit 4. The drive control circuit 4 to which the wakeup detection signal is input activates the power supply IC 7 and supplies power to the CPU 6. The CPU 6 activated upon receiving power supply receives a CAN communication signal from the CAN / I / F circuit 2 and performs necessary processing such as control of the in-vehicle device.

本実施形態によれば、CPU6に電源供給する電源IC7の駆動が、CPU6の動作終了時に停止して、CPU6への電源供給が遮断され、CPU6の消費電力が“0”になるので、CPU6の消費電力量を削減することができる。しかも、CPU6の再起動に用いられるCAN・I/F回路2及びRTCからなる計時回路3の消費電力量が、スリープモード時のCPU6の消費電力量に比べてはるかに小さいことから、ECUとしての消費電力量を削減することもできる。   According to the present embodiment, the driving of the power supply IC 7 that supplies power to the CPU 6 stops when the operation of the CPU 6 ends, the power supply to the CPU 6 is cut off, and the power consumption of the CPU 6 becomes “0”. Power consumption can be reduced. Moreover, since the power consumption of the clock circuit 3 including the CAN / I / F circuit 2 and the RTC used for restarting the CPU 6 is much smaller than the power consumption of the CPU 6 in the sleep mode, Power consumption can also be reduced.

また、本実施形態によれば、CAN通信信号の入力がなくても、計時回路3によるウエイクアップ時間の計時が行われる度にCPU6が再起動し、CPU6やECUの構成回路や外部機器の機能がチェックされることから、異常発生の確率を低く抑えることができ、また、CPU6やECUの構成回路や外部機器の異常を見逃さずに早期に発見することができる。   Further, according to the present embodiment, even if no CAN communication signal is input, the CPU 6 is restarted each time the wake-up time is measured by the timing circuit 3, and the functions of the constituent circuits of the CPU 6 and ECU and the functions of external devices Therefore, the probability of occurrence of an abnormality can be suppressed to a low level, and an abnormality can be detected at an early stage without overlooking the abnormality of the constituent circuits of the CPU 6 and ECU and external devices.

また、本実施形態によれば、CAN通信信号がCAN・I/F回路2に入力されるとCPU6が起動するので、ウエイクアップ時間の経過による再起動の際にCAN通信信号の入力を確認する必要がなく、計時回路3により計時されるウエイクアップ時間を、CPU6やECUの構成回路や外部機器の機能チェックに必要な時間に設定することができる。従って、ウエイクアップ時間の経過により行われる再起動の時間間隔を長くとり、CAN通信信号の未入力時におけるCPU6や電源IC7の起動回数を少なく抑えて、消費電力量を削減することができる。   Further, according to the present embodiment, when the CAN communication signal is input to the CAN / I / F circuit 2, the CPU 6 is started, so that the input of the CAN communication signal is confirmed at the time of restart due to the wake-up time. There is no need, and the wake-up time measured by the time measuring circuit 3 can be set to a time required for checking the functions of the constituent circuits of the CPU 6 and ECU and external devices. Accordingly, it is possible to reduce the power consumption by increasing the time interval between restarts performed after the wake-up time has elapsed, and suppressing the number of startups of the CPU 6 and the power supply IC 7 when no CAN communication signal is input.

上記実施形態では、計時回路3は、日時等の時刻情報を取得するための計時回路を併用しても、この計時回路とは別個に備えられていてもよい。上記実施形態では、ウエイクアップ時間の経過によるCPU6の再起動時に、計時回路3からCPU6に再起動時信号を入力して内部割込を発生させた場合について説明したが、ウエイクアップ時間の経過によるCPU6の再起動時には、電源IC7からの電源供給によるCPU6の電源リセット機能を利用して、内部割込を発生させない構成としてもよい。つまり、CPU6の再起動時に常に働く異常診断機能により、CPU6やECUの構成回路や外部機器の異常を判断するようにしてもよい。   In the above embodiment, the timing circuit 3 may be used together with a timing circuit for acquiring time information such as date and time, or may be provided separately from this timing circuit. In the above embodiment, a case has been described in which a restart signal is input from the timing circuit 3 to the CPU 6 when the CPU 6 is restarted due to the wake-up time, but an internal interrupt is generated. When the CPU 6 is restarted, an internal interrupt may not be generated by using the power reset function of the CPU 6 by supplying power from the power IC 7. In other words, an abnormality diagnosis function that always works when the CPU 6 is restarted may be used to determine an abnormality in the constituent circuits of the CPU 6 or the ECU or an external device.

上記実施形態では、電源供給制御回路1が定電圧電源5から常時電源供給を受けている場合について説明したが、電源ICの駆動停止時のみに定電圧電源5から電源供給を受ける構成としてもよい。また、上記実施形態では、電源供給制御回路1がECUに備えられている場合について説明したが、ECUと別体に構成されていてもよい。また、本発明は、車両電装品の動作を制御するECUの制御部に対する電源供給だけでなく、他のマイクロコンピュータ等の制御装置が備える制御部に対する電源供給にも適用することができる。   In the above embodiment, the case where the power supply control circuit 1 is constantly supplied with power from the constant voltage power supply 5 has been described. However, the power supply control circuit 1 may be configured to receive power supply from the constant voltage power supply 5 only when driving of the power supply IC is stopped. . Moreover, although the case where the power supply control circuit 1 is provided in the ECU has been described in the above embodiment, it may be configured separately from the ECU. Further, the present invention can be applied not only to power supply to the control unit of the ECU that controls the operation of the vehicle electrical component, but also to power supply to the control unit provided in another control device such as a microcomputer.

本発明の一実施形態の制御装置の構成の概略を示すブロック図である。It is a block diagram which shows the outline of a structure of the control apparatus of one Embodiment of this invention. CPUが駆動停止時に行うシステム終了処理を示すフローチャートである。It is a flowchart which shows the system completion | finish process which CPU performs at the time of a drive stop.

符号の説明Explanation of symbols

1 電源供給制御回路
2 CAN・I/F回路
3 計時回路
4 駆動制御回路
5 定電圧電源
6 CPU
7 電源IC(電源回路)
10 ECU(制御装置)
1 Power Supply Control Circuit 2 CAN / I / F Circuit 3 Timekeeping Circuit 4 Drive Control Circuit 5 Constant Voltage Power Supply 6 CPU
7 Power supply IC (Power supply circuit)
10 ECU (control device)

Claims (2)

制御部の動作時に前記制御部に電源を供給する第1電源と、
前記第1電源から前記制御部への電源供給を制御する電源供給制御手段と、
前記第1電源とは別個に、前記電源供給制御手段へ電源を供給する第2電源とを備えた制御装置であって、
前記電源供給制御手段は、前記制御部の動作終了後に、再起動時間を計時する計時回路を備え、
該計時回路による再起動時間の計時完了により、前記第1電源から前記制御部に電源供給して、前記制御部に自身の動作異常の有無を判定させることを特徴とする制御装置。
A first power source for supplying power to the control unit during operation of the control unit;
Power supply control means for controlling power supply from the first power source to the control unit;
A control device comprising a second power supply for supplying power to the power supply control means separately from the first power supply,
The power supply control means includes a timing circuit that times the restart time after the operation of the control unit is completed,
A control device characterized in that upon completion of the restart time measurement by the timer circuit, power is supplied from the first power source to the control unit, and the control unit is made to determine whether or not there is an abnormal operation.
前記電源供給制御手段は、外部からの信号入力を受け付ける外部入力受付手段を備え、
該外部入力受付手段にて外部から信号入力を受けて、前記第1電源から前記制御部に電源供給することを特徴とする請求項1に記載の制御装置。
The power supply control means includes an external input receiving means for receiving a signal input from the outside,
The control apparatus according to claim 1, wherein the external input receiving unit receives a signal input from the outside and supplies power to the control unit from the first power supply.
JP2008049597A 2008-02-29 2008-02-29 Control device Expired - Fee Related JP5231047B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008049597A JP5231047B2 (en) 2008-02-29 2008-02-29 Control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008049597A JP5231047B2 (en) 2008-02-29 2008-02-29 Control device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2013058280A Division JP5465799B2 (en) 2013-03-21 2013-03-21 Control device

Publications (2)

Publication Number Publication Date
JP2009202822A true JP2009202822A (en) 2009-09-10
JP5231047B2 JP5231047B2 (en) 2013-07-10

Family

ID=41145502

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008049597A Expired - Fee Related JP5231047B2 (en) 2008-02-29 2008-02-29 Control device

Country Status (1)

Country Link
JP (1) JP5231047B2 (en)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011213337A (en) * 2010-03-18 2011-10-27 Autonetworks Technologies Ltd On-vehicle ecu
JP2011230685A (en) * 2010-04-28 2011-11-17 Denso Corp Electronic control device for vehicle
KR20120018648A (en) * 2010-08-23 2012-03-05 현대모비스 주식회사 A electronic unit of vehicle connected to can bus and method for waking-up the electronic unit of vehicle
JP2012051422A (en) * 2010-08-31 2012-03-15 Denso Corp Electronic control apparatus
JP2012153213A (en) * 2011-01-25 2012-08-16 Denso Corp Electronic control apparatus
JP2014054911A (en) * 2012-09-12 2014-03-27 Denso Corp Electronic controller
CN109690278A (en) * 2016-09-09 2019-04-26 本田技研工业株式会社 Vehicle data read-out device and vehicle data reading method
CN112783678A (en) * 2019-11-11 2021-05-11 上海博泰悦臻电子设备制造有限公司 Vehicle-mounted terminal power-off processing method and system and vehicle-mounted terminal
JP2021166076A (en) * 2020-11-30 2021-10-14 ベイジン バイドゥ ネットコム サイエンス テクノロジー カンパニー リミテッドBeijing Baidu Netcom Science Technology Co., Ltd. Sleep control method of on-vehicle computing platform, device, apparatus and readable storage medium
WO2022075006A1 (en) * 2020-10-07 2022-04-14 日立Astemo株式会社 Electronic control device and method for daiagnosing wake-up circuit
WO2022244332A1 (en) * 2021-05-21 2022-11-24 日立Astemo株式会社 Electronic module

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001063492A (en) * 1999-08-27 2001-03-13 Nec Corp Electronic control device for vehicle safety control device
JP2003139874A (en) * 2001-10-30 2003-05-14 Denso Corp Electronic control apparatus
JP2003205798A (en) * 2002-01-11 2003-07-22 Toyota Motor Corp Electronic controller

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001063492A (en) * 1999-08-27 2001-03-13 Nec Corp Electronic control device for vehicle safety control device
JP2003139874A (en) * 2001-10-30 2003-05-14 Denso Corp Electronic control apparatus
JP2003205798A (en) * 2002-01-11 2003-07-22 Toyota Motor Corp Electronic controller

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011213337A (en) * 2010-03-18 2011-10-27 Autonetworks Technologies Ltd On-vehicle ecu
JP2011230685A (en) * 2010-04-28 2011-11-17 Denso Corp Electronic control device for vehicle
US8583323B2 (en) 2010-04-28 2013-11-12 Denso Corporation Vehicle-use electronic control device
KR20120018648A (en) * 2010-08-23 2012-03-05 현대모비스 주식회사 A electronic unit of vehicle connected to can bus and method for waking-up the electronic unit of vehicle
KR101650838B1 (en) 2010-08-23 2016-09-05 현대모비스 주식회사 A electronic unit of vehicle connected to can bus and method for waking-up the electronic unit of vehicle
JP2012051422A (en) * 2010-08-31 2012-03-15 Denso Corp Electronic control apparatus
JP2012153213A (en) * 2011-01-25 2012-08-16 Denso Corp Electronic control apparatus
JP2014054911A (en) * 2012-09-12 2014-03-27 Denso Corp Electronic controller
CN109690278A (en) * 2016-09-09 2019-04-26 本田技研工业株式会社 Vehicle data read-out device and vehicle data reading method
CN109690278B (en) * 2016-09-09 2020-11-20 本田技研工业株式会社 Vehicle data reading device and vehicle data reading method
CN112783678A (en) * 2019-11-11 2021-05-11 上海博泰悦臻电子设备制造有限公司 Vehicle-mounted terminal power-off processing method and system and vehicle-mounted terminal
WO2022075006A1 (en) * 2020-10-07 2022-04-14 日立Astemo株式会社 Electronic control device and method for daiagnosing wake-up circuit
JP7482245B2 (en) 2020-10-07 2024-05-13 日立Astemo株式会社 Electronic control device and wake-up circuit diagnostic method
JP2021166076A (en) * 2020-11-30 2021-10-14 ベイジン バイドゥ ネットコム サイエンス テクノロジー カンパニー リミテッドBeijing Baidu Netcom Science Technology Co., Ltd. Sleep control method of on-vehicle computing platform, device, apparatus and readable storage medium
JP7192047B2 (en) 2020-11-30 2022-12-19 ベイジン バイドゥ ネットコム サイエンス テクノロジー カンパニー リミテッド Dormant control method, device, device and readable storage medium for in-vehicle computing platform
WO2022244332A1 (en) * 2021-05-21 2022-11-24 日立Astemo株式会社 Electronic module

Also Published As

Publication number Publication date
JP5231047B2 (en) 2013-07-10

Similar Documents

Publication Publication Date Title
JP5231047B2 (en) Control device
JP4535170B2 (en) Microcomputer system
US8046615B2 (en) Microcomputer system with reduced power consumption
EP1717664B1 (en) Computer circuit
JP2004197585A (en) Electronic control device for automobile
JP2010180776A (en) Power source control device
JP5465799B2 (en) Control device
JP2002312073A (en) Power saving integrated circuit and control method of power saving integrated circuit
US9889762B2 (en) Control system for charging vehicle battery in response to an unstable state
JP2007030593A (en) Electronic control system
JP2008107914A (en) Microcomputer, program and electronic control device for vehicle
JP5676902B2 (en) Information processing apparatus and information processing apparatus control method
JP5324340B2 (en) Microcomputer
JP2017045125A (en) Electronic control device
JP6468148B2 (en) Electronic control unit
US9483105B2 (en) Communication system and electronic control unit
JP3711849B2 (en) Microcomputer
JP2002202830A (en) Microcomputer
CN116466999B (en) Method, device, equipment and medium for waking up SOC chip
JP7378445B2 (en) Electronic control unit, information processing method, and program
JP2010067030A (en) Navigation apparatus
US11863721B2 (en) Image forming apparatus for supplying power to a first controller based on detection of an abnormality in a second controller
JP2021126995A (en) Electronic control device for vehicle and control method for electronic control device for vehicle
JP5101044B2 (en) measuring device
JP6250091B2 (en) Information processing apparatus and information processing apparatus control method

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20101227

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20120913

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20121009

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20121207

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20130219

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20130321

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20160329

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Ref document number: 5231047

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees