JP2009193397A - Printer controller, printer and composite machine - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a technique for protecting data which are stored in a memory and are important in security in a printer provided with the memory capable of being accessed through a CPU and through a DMA. <P>SOLUTION: The printer controller includes: the memory having a protective area for storing the data of a protection object; a memory control means for controlling access to the memory; a first access request means for requesting the access to the memory through the CPU; and a second access request means for requesting the access to the memory through the DMA. The memory control means permits the access to the protective area when receiving the request of the access by the first access request means, and inhibits the access to the protective area when receiving the request of the access by the second access request means. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a printer controller, a printer, and a multifunction peripheral.

Patent Document 1 describes a printer having a memory accessible via a CPU and DMA. Such a printer is designed so that it can be connected to an external device, an expansion board or the like, and has an advantage of high function expandability. Some devices connected to the printer for function expansion can execute various processes by using a memory provided in the printer via DMA.
JP-A-10-136186

In such a printer having a memory accessible via the CPU and DMA, the expandability of the function is high, but there is a high possibility that the memory is illegally accessed and the security strength is low.

SUMMARY OF THE INVENTION An object of the present invention is to provide a technology for protecting data important in security stored in a memory having a memory accessible via a CPU and via a DMA.

In order to solve the above problems, a printer controller of the present invention includes a memory having a protection area for storing data to be protected, memory control means for controlling access to the memory, and access to the memory from an external device. An access to the memory is requested via a predetermined device including the input / output interface, a first access request means for requesting access to the memory via the CPU, and the input / output interface. Second access request means for requesting access to the memory via the DMA, and when the memory control means accepts an access request by the first access request means, Access to the protected area is permitted and access by the second access request means Upon receiving the request, it prohibits access to the protected area.

According to the printer controller of the present invention, in a printer provided with a memory accessible via a CPU and via a DMA, data important for security stored in the memory can be protected.

  Hereinafter, an example of an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram for explaining an outline of a hardware configuration of a printing system to which an embodiment of the present invention is applied.

As shown in the figure, the printing system includes a multifunction peripheral 100 having a memory 302 and a memory 30.
2 and an external device 200 that can access the device 2. In the present embodiment, the multifunction peripheral 100 has a printing function and a scanner function. The external device 200 includes various devices connected to the network (for example, a mail server, a data server, a host PC, a scanner device, a FAX device, etc.) and a function expansion board (for example, an additional network board, an additional US).
B board, additional card reader board, etc.). However, the configuration of the printing system is not limited to this.

The multifunction machine 100 includes a CPU (Central Processing Unit) 30 that executes various programs.
1, a memory 302 that temporarily stores data and programs, an access control ASIC 303 that controls access to the memory 302, a toner cartridge, a photosensitive drum, a laser beam irradiation mechanism, a paper feed mechanism, and a print medium supply A print engine 304 including a paper supply / discharge mechanism that performs a paper discharge process, a scanner device 305 that reads a document or the like as scanner data, and an external IO controller 30 for controlling data transmission / reception (input / output) with the external device 200.
6 are provided.

The CPU 301 controls the entire multifunction device 100. The CPU 301 is connected to the access control ASIC 303 by a bus dedicated to the CPU. The CPU 301 is, for example, the memory 3
Various programs compressed and stored in 02 can be developed on the memory 302 via the access control ASIC 303 to execute various processes. Here, the various processes executed by the CPU 301 include, for example, a security process (network authentication process, etc.). Further, the CPU 301 can use the memory 302 as a work memory at the time of calculation via the access control ASIC 303. Further, the CPU 301 is connected to the external device 2.
Various processes can also be executed by receiving an instruction from 00 (host PC, etc.). Further, the CPU 301 can set values of registers (an area designation register 331 and an operation mode register 332 described later) provided in the memory controller 330. In addition, C
The PU 301 receives a notification of unauthorized access to the memory 302 detected by the memory controller 330.

The memory 302 is a storage medium capable of reading and writing data. For example, a RAM (Random A
ccess Memory). The memory 302 stores only a protected area 131 that stores only data important for security (hereinafter referred to as “protected data”) and data that is not important for security (hereinafter referred to as “non-protected data”). Unprotected area 1
33. However, a part of the non-protected area 133 may be a temporary protected area 132 that can also store protected data. Here, the protection data includes a password used for authentication processing, information unique to the multifunction peripheral 100, data used for communication with the external device 200, and the like. The unprotected data includes data generated by the external device 200, print data, image data formed by the scanner device 305, and the like.

The access control ASIC 303 is an ASIC for controlling access to the memory 302.
It is. For example, the access to the memory 302 at the time of protected data processing and the access to the memory 302 at the time of non-protected data processing are controlled. Specifically, the access control ASIC 30
3 performs control of access to the memory 302 via the CPU 301 and access to the memory 302 not via the CPU 301 (DMA (Direct Memory Access)).

Such an access control ASIC (Application Specific Integrated Circuit) 30
3 includes, for example, a CPU interface 311, an image processing circuit 312, a video data control circuit 313, a scanner data conversion circuit 314, an IO interface 315, and a DM
An A arbitration circuit 320 and a memory controller 330 are provided. Data exchange between a device other than the CPU interface 311 (image processing circuit 312, video data control circuit 313, scanner data conversion circuit 314, IO interface 315) and the memory controller 330 is performed via the DMA arbitration circuit 320. Done (via DMA).

The CPU interface 311 transmits / receives data to / from the CPU 301. For example, C
The PU interface 311 supplies a control signal for controlling the memory 302 supplied from the CPU 301 to the memory controller 330. CPU interface 311
Mediates the exchange of data between the CPU 301 and the memory controller 330.

The image processing circuit 312 performs image processing such as generating print data from image data. The video data control circuit 313 exchanges video data with the print engine 304. A scanner data conversion circuit 314 exchanges scanner data with the scanner device 305. The IO interface 315 exchanges data with the external IO controller 306.

The DMA arbitration circuit 320 is a device other than the CPU interface 311 (the image processing circuit 31).
2. Arbitrates access to the memory 302 from the video data control circuit 313, the scanner data conversion circuit 314, and the IO interface 315). For example, CPU interface 3
When there is simultaneous input from a plurality of devices other than 11, the order of output to the memory controller 330 is arbitrated.

A memory 302 is connected to the memory controller 330. Memory controller 330
Performs data exchange (for example, read processing and write processing) with the memory 302 based on instructions (control signals) from the respective devices (the CPU interface 311 to the IO interface 315). For example, during a write process, the memory controller 330 stores data received from the CPU interface 311 or the DMA arbitration circuit 320 in the memory 302. Here, the memory controller 330 accepts data input from the CPU 301 from the port A (via the CPU) and accepts data input from the DMA arbitration circuit 320 from the port B (via DMA). In the read process, the memory controller 330 reads data from the designated area on the memory 302 and transmits the data to the CPU interface 311 or the DMA arbitration circuit 320. Here, the memory controller 330 is the CPU 3
When accessing the memory 302 from 01, data is output from the port A, and when accessing the memory 302 from the DMA arbitration circuit 320, data is output from the port B.

FIG. 2 is a block diagram for explaining the outline of the hardware configuration of the memory controller 330.

As shown in the figure, the memory controller 330 includes a region designation register 331, an operation mode register 332, an address comparator 333, an access enable / disable determination circuit 334, an access control circuit 335, and a memory direct control circuit 336. ing.

As shown in FIG. 3, the area designation register 331 includes at least a protection area designation register 3311 that designates the protection area 131 of the memory 302. As a result, the address comparator 333, which will be described later, when an access to the memory 302 is requested via DMA,
The requested address is compared with the value held in the protection area designation register 3311.
It can be determined whether or not the access request is made to the protection area 131.
Such a protection area designation register 3311 includes a register that holds the start address of the protection area 131 and a register that holds the size of the protection area 131.

The area designation register 331 may include a temporary protection area designation register 3312 that designates the temporary protection area 132 of the memory 302 and a non-protection area designation register 3313 that designates the non-protection area 133 of the memory 302. Similar to the protection area designation register 3311, the temporary protection area designation register 3312 includes a register that holds the head address of the temporary protection area 132 and a register that holds the size of the temporary protection area 132. Further, the non-protection area designation register 3313 is also a register that holds the start address of the non-protection area 133,
And a register for holding the size of the non-protected area 133.

As illustrated in FIG. 4, the operation mode register 332 includes at least a function-on determination register 3321 for determining whether or not a function that restricts access to the memory 302 is on (valid). The function-on determination register 3321 is a value that designates whether to permit (permit setting) or prohibit (prohibition setting) access via DMA to the protection area 131 on the memory 302 designated by the protection area designation register 3311. Hold.

Further, the operation mode register 332 may include an operation mode determination register 3322 for determining the set operation mode when there are a plurality of operation modes (for example, the simple operation mode and the application operation mode). Good. Here, the simple operation mode is a mode in which the memory 302 is divided into two areas, a protection area 131 and a non-protection area 132, and the application operation mode is a protection area 131 and a temporary protection area 132. In this mode, the non-protected area 133 is divided into three areas.

When the operation mode determination register 3322 is provided, the operation mode register 332 includes a permission condition determination register 3323 for temporarily permitting access via the DMA to the temporary protection area 132 when the application operation mode is set. . Permission condition judgment register 3
323 designates whether access via the DMA to the temporary protection area 132 on the memory 302 designated by the temporary protection area designation register 3312 is temporarily permitted (temporary permission setting) or prohibited (prohibition setting). Hold the value to be.

The address comparator 333 identifies which area (protected area 131, temporary protected area 132, and unprotected area 133) on the memory 302 designated by the area designation register 331 the access destination via DMA corresponds to. . Specifically, the address indicating the access destination included in the access request made via the port B is compared with the value stored in the area designation register 331 for each register (3311-1313). And each area (protection area 131)
, For each temporary protection area 132 and non-protection area 133), a signal indicating whether or not it corresponds to the requested access destination is output to the access permission determination circuit 334.

The access permission determination circuit 334 determines whether or not to permit access to the memory 302 requested via the DMA from the signal supplied from the address comparator 333 and the value acquired from the operation mode register 332.

The access control circuit 335 controls permission / prohibition of access to the memory 302 (the protection area 131 or the temporary protection area 132) via the DMA according to the determination of the access permission determination circuit 334.

The memory direct control circuit 336 directly controls the memory 302. For example, the memory direct control circuit 336 issues various instructions such as active, read, and write to the memory 302.

Next, a characteristic operation of the multifunction peripheral 100 in the printing system having the above configuration will be described. 5 and 6 are flowcharts illustrating the access control processing performed by the multifunction peripheral 100. FIG. 5 shows access control processing in the simple operation mode, and FIG. 6 shows access control processing in the applied operation mode.

  First, the access control process in the simple operation mode shown in FIG. 5 will be described.

The memory controller 330 of the multi-function device 100 stands by until an access request to the memory 302 is received (step S101; No). Here, the access request to the memory 302 includes address information for designating an area on the memory 302. The access request is issued when, for example, the CPU 301 executes various programs, when the image data generated by the image processing circuit 312 is converted into print data, or when the external device 200 stores the memory 3
Occurs when the data stored in 02 is processed.

When access to the memory 302 is requested (step S101; Yes), the memory controller 330 receives the request from the port A (step S102; A).
The input signal is supplied to the memory direct control circuit 336, and the process proceeds to step S108.

When the memory direct control circuit 336 receives the access request, the memory direct control circuit 336 secures an area on the memory 302 specified by the address information included in the access request (step S108).
).

After securing the specified area of the memory 302, the memory direct control circuit 336 causes the CPU 301 to
For example, the read process or the write process is executed on the reserved area of the memory 302 in accordance with the command signal supplied from.

While performing these processes, the memory direct control circuit 336 determines that the timing for releasing the area of the memory 302 secured in step S108 has come (step S109; Yes).
), The process proceeds to step S110. The timing at which the memory 302 is released may be any timing, for example, when a series of processes such as a read process or a write process is completed, or when an instruction to interrupt the process being executed is supplied from the CPU 301 or the like. .

Subsequently, the memory direct control circuit 336 performs processing for releasing the area on the memory 302 secured in step S108 (step S110). Specifically, the memory direct control circuit 33
6 issues a command to release the area on the secured memory 302.

After the release process in step S110, the memory controller 330 ends the access control process.

Next, returning to step S102, a case where an access request to the memory 302 is input to the port B will be described. When an access request to the memory 302 is input to the port B (step S102; B), the memory controller 330 supplies the input signal to the access control circuit 335 and address information included in the access request. Is supplied to the address comparator 333.

Here, the address comparator 333 supplied with the address information compares the supplied address information with the address information stored in the area designation register 331. In particular,
The address comparator 333 receives data corresponding to the supplied address information as a protected area designation register 3311, a temporary protection area designation register 3312, and a non-protection area designation register 3313.
Which register is included.

Subsequently, the address comparator 333 supplies an output signal corresponding to the comparison result to the access permission determination circuit 334. Specifically, the address comparator 333 receives data corresponding to the supplied address information as a protection area designation register 3311 and a temporary protection area designation register 33.
12, a signal indicating which register of the non-protection area designation register 3313 is included,
The data is supplied to the access permission determination circuit 334. Thereby, the access permission determination circuit 334
Whether the area on the memory 302 requested to access via DMA corresponds to the protected area 131, the temporary protected area 132, or the unprotected area 133,
Can be specified.

The access enable / disable determining circuit 334 determines the memory 302 requested in step S101 from the signal supplied from the address comparator 333 and the value acquired from the operation mode register 332.
Decide whether to allow access to.

Specifically, the access permission determination circuit 334 first acquires data from the function ON determination register 3321 of the operation mode register 332, and determines whether or not the access restriction function is ON (step S103).

Here, when it is determined that the access restriction function is off (step S103; No),
The access permission determination circuit 334 determines that the access to the memory 302 requested in step S101 is permitted regardless of the content of the signal supplied from the address comparator 333. At this time, the access permission determination circuit 334 supplies a signal permitting access to the memory 302 to the access control circuit 335. When the access permission signal is supplied from the access permission determination circuit 334, the access control circuit 335 supplies the signal input from the port B to the memory direct control circuit 336, and the process proceeds to step S108. The subsequent processes in steps S108 to S110 are the same as the processes described above.

On the other hand, when it is determined in step S103 that the access restriction function is on (step S103; Yes), the access permission determination circuit 334 moves the process to step S104.

Subsequently, the access permission determination circuit 334 acquires data from the operation mode determination register 3322 of the operation mode register 332, and determines whether or not it is the simple operation mode (step S).
104).

Here, when it is determined that the mode is not the simple operation mode (step S104; No), the access permission determination circuit 334 shifts the processing to the access control processing in the applied operation mode illustrated in FIG. The access control process in the applied operation mode will be described later.

On the other hand, when it is determined in step S104 that the operation mode is the simple operation mode (step S104).
104; Yes), the access permission determination circuit 334 moves the process to step S105.

The access permission determination circuit 334 determines that the access destination area requested in step S101 is
It is determined whether or not it corresponds to the protection area 131 (step S105). Specifically, the access permission determination circuit 334 makes a determination based on the output signal supplied from the address comparator 333 first.

If it is determined that the protected area 131 does not correspond (step S105; No), the access permission determination circuit 334 determines that the access to the memory 302 requested in step S101 is permitted. At this time, the access permission determination circuit 334 supplies a signal permitting access to the memory 302 to the access control circuit 335. Access control circuit 3
35, when an access permission signal is supplied from the access permission determination circuit 334, the signal input from the port B is supplied to the memory direct control circuit 336, and the process proceeds to step S108. The subsequent steps S108 to S110 are similar to the above-described processing (steps S108 to S110).

On the other hand, when it is determined in step S105 that the protection area 131 is applicable (step S105; Yes), the access permission determination circuit 334 determines to prohibit the access to the memory 302 requested in step S101 (step S106). ). At this time,
The access enable / disable determining circuit 334 supplies a signal for prohibiting access to the memory 302 to the access control circuit 335. When the access prohibition signal is supplied from the access permission determination circuit 334, the access control circuit 335 does not supply the memory direct control circuit 336 inputted from the port B.

Subsequently, the access permission determination circuit 334 reads the memory 302 requested in step S101.
CPU 301 is notified that the access to is “illegal access” (step S1).
07). Specifically, the access permission determination circuit 334 supplies an interrupt signal indicating that an unauthorized access to the memory 302 has occurred to the CPU 301.

  Thereafter, the memory controller 330 ends the access control process.

By performing the above access control processing by the memory controller 330 included in the multifunction peripheral 100, access to the memory 302 via the port B can be restricted. When processing data important for security, the memory 302 is accessed via the port A, and when processing data not important for security, the memory 302 is accessed via the port B. You will be able to protect your data.

Further, this printing system does not require a special memory or the like for storing only data important for security, and does not cost.

  Next, access control processing in the applied operation mode shown in FIG. 6 will be described.

In step S104 of the access control process in the simple operation mode shown in FIG. 5, when the access permission determination circuit 334 determines that it is not in the simple operation mode (step S10).
4; No), the access control process in the applied operation mode starts.

First, the access permission determination circuit 334 determines whether the access destination area requested in step S101 corresponds to the protection area 131 (step S201). In particular,
The access enable / disable determining circuit 334 first makes a determination based on the output signal supplied from the address comparator 333.

Here, the access permission determination circuit 334 determines that it corresponds to the protection area 131 (
In step S201; Yes, it is determined to prohibit access to the memory 302 requested in step S101 (step S202). Specific processing is the same as the processing performed in step S106.

Subsequently, the access permission determination circuit 334 reads the memory 302 requested in step S101.
CPU 301 is notified that the access to is “illegal access” (step S2).
03). Specific processing is the same as the processing performed in step S107.

  Thereafter, the memory controller 330 ends the access control process.

On the other hand, in step S201, the access permission determination circuit 334 determines whether the access is determined in step S101.
If it is determined that the requested access destination area does not correspond to the protected area 131 (step S201; No), the process proceeds to step S204.

Next, the access permission determination circuit 334 determines whether or not the access destination area requested in step S101 corresponds to the temporary protection area 132 (step S204). Specifically, the access permission determination circuit 334 makes a determination based on the output signal supplied from the address comparator 333 first.

Here, when it is determined that the access permission determination circuit 334 does not correspond to the temporary protection area 132 (step S204; No), the access permission determination circuit 334 determines to permit the access to the memory 302 requested in step S101. At this time, the access permission determination circuit 334 receives the memory 30.
2 is supplied to the access control circuit 335. When the access permission signal is supplied from the access permission determination circuit 334, the access control circuit 335 supplies the signal input from the port B to the memory direct control circuit 336, and the process proceeds to step S20.
Move to 6. The subsequent processes in steps S206 to S208 are the same as the processes described above (steps S108 to S110).

On the other hand, if it is determined in step S204 that it corresponds to the temporary protection area 132 (step S204; Yes), the access permission determination circuit 334 moves the process to step S205.

Next, the access permission determination circuit 334 determines whether or not the access to the memory 302 requested in step S101 satisfies a predetermined condition for permitting (step S205). Specifically, the access permission determination circuit 334 acquires data from the permission condition determination register 3323 of the operation mode register 332 and determines whether or not a predetermined condition is satisfied.

Here, if it is determined that the predetermined condition for permitting access is not satisfied (step S205; No), the access permission determination circuit 334 determines to prohibit the access to the memory 302 requested in step S101. (Step S202). Specific processing is the same as the processing performed in step S106.

Subsequently, the access permission determination circuit 334 reads the memory 302 requested in step S101.
CPU 301 is notified that the access to is “illegal access” (step S2).
03). Specific processing is the same as the processing performed in step S107.

  Thereafter, the memory controller 330 ends the access control process.

On the other hand, if the access permission determination circuit 334 determines in step S205 that the predetermined condition for permitting access is satisfied (step S205; Yes), the memory 302 requested in step S101 (temporary protection area 132). Decide to allow access to. At this time, the access permission determination circuit 334 supplies a signal permitting access to the memory 302 to the access control circuit 335. When the access permission signal is supplied from the access permission determination circuit 334, the access control circuit 335 supplies the signal input from the port B to the memory direct control circuit 336, and the process proceeds to step S206. Subsequent steps S206 to S208 are the same as those described above (steps S108 to S108).
110).

As described above, the memory controller 330 provided in the multi-function peripheral 100 performs the access control process in the application operation mode, thereby restricting access to the memory 302 in various ways compared to the access control process in the simple operation mode. Will be able to. For example, it is possible to protect data processed via the port B under a predetermined condition for permitting access (a time zone in which access is temporarily permitted, etc.).

  In addition, this invention is not limited to the said embodiment, A various deformation | transformation and application are possible.

In the embodiment described above, the access control process is performed after presetting to either the simple operation mode or the application operation mode. However, for example, switching between the simple operation mode and the application operation mode may be performed at a predetermined timing during the execution of the access control process. In this case, for example, when the capacity of the protection area 131 of the memory 302 becomes insufficient, the value of the operation mode determination register 3322 may be switched from the simple operation mode to the value of the applied operation mode. Further, when it is desired to improve the security strength, the value of the operation mode determination register 3322 may be switched from the applied operation mode to the value of the simple operation mode.

In the above embodiment, the temporary protection area 132 is operated when operating in the application operation mode.
Access via DMA can be temporarily permitted. In order to perform this permission, it is necessary to change the value of the permission condition determination register 3323 (a value corresponding to the temporary permission setting). The timing for changing the value of the permission condition determination register 3323 is arbitrary. For example, when the protection area 131 of the memory 302 runs out of capacity, the value of the permission condition determination register 3323 corresponds to the temporary permission setting. You may make it switch to a value. Further, when the encrypted protection data obtained by encrypting the protection data is copied to the temporary protection area 132, the value of the permission condition determination register 3323 may be switched to a value corresponding to the temporary permission setting. Further, even if the device is other than the CPU 301, there is a request for access to the memory 302 via the DMA from a highly reliable device (for example, the image processing circuit 312, the scanner device 305, and the regular (manufactured genuine) external device 200). In this case, the value of the permission condition determination register 3323 may be switched to a value corresponding to the temporary permission setting.

Further, in the above embodiment, the setting for turning on the function for restricting access via DMA is performed in advance before the access control process. However, for example, the access restriction function via DMA may be switched on and off at a predetermined timing during the execution of the access control process.

It is a hardware block diagram of the printing system which concerns on embodiment of this invention. It is a hardware block diagram of a memory controller. It is explanatory drawing for demonstrating an area | region designation register. It is explanatory drawing for demonstrating an operation mode register. It is a flowchart for demonstrating the access control process by simple operation mode. It is a flowchart for demonstrating the access control process by an application operation mode.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 ... MFP, 131 ... Protection area, 132 ... Temporary protection area, 133 ...
Unprotected area, 200 ... external device, 301 ... CPU, 302 ... memory, 303
... Access control ASIC, 304 ... Print engine, 305 ... Scanner device,
306 ... External IO controller, 311 ... CPU interface, 312 ...
Image processing circuit, 313 ... Video data control circuit, 314 ... Scanner data conversion circuit, 315 ... IO interface, 320 ... DMA arbitration circuit, 330 ... Memory controller, 331 ... Area designation Register, 332... Operation mode register, 3
33 ... Address comparator, 334 ... Access permission determination circuit, 335 ... Access control circuit, 336 ... Memory direct control circuit, 3311 ... Protection area designation register, 3
312 ... Temporary protection area designation register 3313 ... Non-protection area designation register 33
21... Function ON determination register, 3322... Operation mode determination register, 3323.
..Enable condition judgment register.

Claims (6)

A printer controller,
A memory having a protection area for storing data to be protected;
Memory control means for controlling access to the memory;
An input / output interface that accepts an access request to the memory from an external device;
When access to the memory is requested via the first access request means for requesting access to the memory via the CPU and a predetermined device including the input / output interface, Second access requesting means for requesting access to the memory,
The memory control means includes
When an access request by the first access request means is accepted, access to the protection area is permitted, and when an access request by the second access request means is accepted, access to the protection area is prohibited. To
A printer controller characterized by that. The printer controller according to claim 1,
The memory control means includes
A first connection port and a second connection port, respectively,
When an access request is received via the first connection port, the access is determined by the first access request means, and when an access request is received via the second connection port, It is determined that the access is made by the second access request means.
A printer controller characterized by that. The printer controller according to claim 1 or 2,
The memory has a temporary protection area for temporarily protecting data to be protected, separately from the protection area,
The memory control means includes
When receiving an access request by the second access request means, it is determined whether or not temporary access is permitted;
When temporary access is permitted, access to the temporary protection area is permitted; otherwise, access to the protection area and the temporary protection area is prohibited.
A printer controller characterized by that. The printer controller according to claim 3, wherein
The memory control means includes
It has a register that stores a value that determines whether to allow temporary access,
Obtaining a value stored in the register to determine whether or not temporary access is permitted;
A printer controller characterized by that. A printer controller according to any one of claims 1 to 4,
A print engine for printing the print data generated in the printer controller;
A printer comprising: A printer controller according to any one of claims 1 to 4,
A scanner device for inputting scanner data generated by reading a document to the printer controller;
A print engine for printing the print data generated in the printer controller;
A multi-function machine comprising:

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