JP2009152387A - Method of manufacturing electronic device, electronic device substrate for transfer, and display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing an electronic device, which can secure high performance of the electronic device, can reduce cost and can improve productivity. <P>SOLUTION: A sacrificial layer 12 of MgO etc., is formed on a first substrate 11 and patterned, and a support layer 13 of SiO<SB>2</SB>etc., is formed. On the sacrificial layer 12, the electronic device 14 such as a TFT and a capacitor is formed with a support layer 13 interposed, and covered with a protective layer 15 of SiN<SB>x</SB>etc. The protective layer 15 and support layer 13 are partially removed to expose part of the sacrificial layer 12, which in turn is etched away. The electronic device 14 on the first substrate 11 is brought into contact with an adhesive layer 22 on a surface of a second substrate 21 and the first substrate 11 is separated to transfer the electronic device 14 to the second substrate 21. The electronic device 14 can be selectively transferred by a method of removing only the sacrificial layer 12 of the electronic device 14 to be transferred. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an electronic device manufacturing method using a transfer technique, an electronic device substrate for transfer, and a display device.

  In recent years, the development of the area called printable electronics has been remarkable. The purpose is to make expensive electronic parts that have been produced using semiconductor manufacturing technology cheaper by manufacturing them by printing or nanoimprinting, and by replacing the substrate with a film to make flexible devices. Such as providing. Therefore, development of materials and printing technologies such as organic semiconductors and nano metal inks has been actively conducted. While the cost is reduced and the process temperature is lowered, the trade-off is that reliability and performance are sacrificed.

  On the other hand, the manufacture of an active matrix substrate using a transfer technique has been undertaken since the late 1990s. For example, in Patent Document 1, an etching stopper layer is formed on a glass substrate, a TFT (Thin Film Transistor) element is formed, the TFT element is covered with a relay substrate, and the glass substrate is protected from the etching solution. A method is described in which the substrate is completely etched away. The final product is made by selectively transferring from a relay substrate to another substrate.

  In the method described in Patent Document 1, it is necessary to use a strong etching solution such as hydrofluoric acid and ammonium fluoride mixed solution in order to etch a glass substrate having a thickness of about 1 mm, and an etching stopper layer is provided. However, the TFT element may be damaged by the etching solution. Therefore, it is a problem to protect the TFT element from a strong etching solution. For example, as described in Patent Document 2, it is necessary to improve the material and structure of the etching stopper layer. In addition, a decrease in throughput due to an increase in etching time is also a problem.

  In Patent Document 3, a hydrogenated amorphous silicon layer or the like is formed on a glass substrate, and a TFT element is formed thereon. The TFT element is fixed to the transfer substrate with an adhesive, irradiated with laser light from the back side, heated, and the TFT element is peeled off from the glass substrate by increasing the pressure of separated hydrogen.

  However, in the method described in Patent Document 3, it is necessary to hold the hydrogenated amorphous silicon layer to the end in the manufacturing process of the TFT element, and there are significant process restrictions. In addition, there are problems such as degradation of characteristics of the TFT element due to laser light irradiation when separating the TFT element, an increase in equipment investment due to the use of a laser, throughput, and substrate size restrictions.

  Furthermore, Patent Document 4 and Patent Document 5 describe a technique for taking out a fine chip from the surface of a single crystal semiconductor substrate for the purpose of printing a fine semiconductor chip. In these technologies, a fine chip is roughly a semiconductor itself.

  In Patent Document 4, the surface of the substrate is covered with an etching stopper layer, and the back surface of the chip is etched by selective etching utilizing the crystal orientation, thereby reducing the connection area between the substrate and the chip.

Patent Document 5 states that a fine semiconductor chip called a semiconductor element is taken out from a single crystal wafer. It also describes taking out an optical element chip using a GaAs single crystal similar to that. As a method for controlling the connection area between the substrate and the chip, as in Patent Document 4, a method using anisotropic etching of a single crystal, a method using isotropic etching, and silicon (Si) can be said. For example, a method of etching an SiO ₂ layer using an SOI wafer is mentioned.
Japanese Patent No. 3447619 JP 2006-245067 A Japanese Patent No. 3809710 US Patent Application Publication No. 2007/0032089 International Publication No. 2005/122285 Pamphlet

  However, in either method of Patent Document 4 or Patent Document 5, since it is necessary to control the etching amount when forming a connection portion between a fine semiconductor chip and a single crystal substrate, there is no problem with a small wafer. When the area becomes large, there is a concern that uneven etching occurs and the yield decreases.

  Further, since the target is a single crystal, the substrate size is limited. For example, with silicon (Si), a 300 mm wafer is currently the largest.

  Further, these techniques do not take into account the stress in the semiconductor chip. This is considered to be because when a single crystal substrate is used, the stress generated when the chip is formed is originally small and does not cause a problem. Further, it is considered that even if there is a stress, it can be reduced by annealing.

  The present invention has been made in view of such a problem, and an object of the present invention is to provide an electronic device manufacturing method and a transfer electron capable of ensuring high performance of an electronic device and reducing costs and improving productivity. It is to provide a device substrate and a display device.

An electronic device manufacturing method according to the present invention includes the following steps (A) to (E).
(A) A step of forming a sacrificial layer made of at least one of an alkali metal oxide and an alkaline earth metal oxide on a part of the first substrate (B) a step of forming a support layer covering at least the sacrificial layer ( C) Step of forming an electronic device with a support layer on the sacrificial layer (D) Step of exposing a portion of the sacrificial layer by removing a portion of the support layer (E) Step of removing the sacrificial layer

  The electronic device substrate for transfer according to the present invention is obtained by forming an electronic device on a first substrate, the electronic device is formed on a support layer, and the support layer is separated from the surface of the first substrate. The main body is formed and has an electronic device formed on the upper surface, and a support formed between the main body and the surface of the first substrate.

  A display device according to the present invention comprises an electronic device and a display element on a second substrate, wherein a support layer is formed on one surface of the electronic device, and a protective layer is formed on the other surface. Wiring is connected to the electronic device through a contact hole provided in the protective layer.

  In the electronic device substrate for transfer according to the present invention, the electronic device on the main body is held in a state of being separated from the surface of the first substrate by the support. Therefore, the sacrificial layer is removed by etching as necessary, whereby the electronic device on the main body is held in a state of being floated by the support. By adjusting the connection area between the support and the first substrate, the support is broken with a very small force, the main body and the electronic device are separated from the first substrate, and the electronic device can be easily transferred. It becomes possible. Therefore, a powerful etching solution that can damage the electronic device, a high-cost laser irradiation apparatus, and the like are unnecessary, and cost reduction and productivity improvement can be achieved.

  In the display device of the present invention, since the wiring is connected to the electronic device through the contact hole provided in the support layer or the protective layer, the isolated electronic devices scattered on the second substrate are connected by the wiring. The

  According to the method for manufacturing an electronic device of the present invention, since at least one of an alkali metal oxide and an alkaline earth metal oxide is used as the sacrificial layer, high-speed etching is possible and 300 ° C. or higher is possible. High temperature processes are acceptable. Therefore, it is possible to form an electronic device having the same high performance and reliability as in the past by using various semiconductor deposition techniques such as vacuum deposition, sputtering or CVD and photolithography. . In addition, since the electronic device is formed on the sacrificial layer with the support layer in between, it is possible to eliminate the possibility of being damaged by etching when the sacrificial layer is removed. Therefore, if the display device is configured using the electronic device obtained by this manufacturing method, the restriction on the material of the second substrate can be reduced without sacrificing the high performance and reliability of the electronic device, A display device using a flexible second substrate can also be realized.

  According to the electronic device substrate for transfer of the present invention, the electronic device on the main body is held in a state of being separated from the surface of the first substrate by the support, so that the support is broken with a very small force. The main body and the electronic device can be separated from the first substrate. Therefore, it is possible to easily transfer the electronic device, and it is possible to reduce costs and improve productivity.

  According to the display device of the present invention, since the wiring is connected to the electronic device through the contact hole provided in the support layer or the protective layer, the electronic device transferred by the manufacturing method of the present invention is connected by the wiring. Thus, an active matrix driving circuit can be configured. Therefore, it is possible to simplify the process on the second substrate while using a high-performance electronic device, and it is possible to obtain effects such as an improvement in yield, productivity, and cost reduction. The restriction on the material of the second substrate is reduced, and a flexible second substrate can be used. Further, by leaving the support layer, the stress distribution in the layer of the electronic device configured in a complicated manner can be relaxed, and the reliability can be further improved.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(First embodiment)
FIG. 1 shows a schematic flow of a method for manufacturing an electronic device according to a first embodiment of the present invention, and FIGS. 2 to 4 show this manufacturing method in the order of steps. First, as shown in FIG. 2A, a sacrificial layer 12 made of at least one of an alkali metal oxide and an alkaline earth metal oxide is formed on the first substrate 11 (step S101).

  The first substrate 11 has a thickness of 0.3 mm to 5.0 mm, for example, and is preferably made of a material suitable for forming an electronic device, such as glass, synthetic quartz, sapphire, silicon, and ceramics.

  The sacrificial layer 12 has, for example, a thickness of 10 nm to 100,000 nm, and is, for example, an alkali metal oxide, carbonate, sulfate or hydroxide, or an alkaline earth metal oxide, carbonate, sulfate or water. It is comprised with the oxide.

Specifically, as the alkali metal oxide, carbonate, sulfate or hydroxide, for example, lithium oxide (Li ₂ O), lithium carbonate (Li ₂ CO ₃ ), sodium acid (sodium carbonate) (Na ₂ CO ₃ ), sodium percarbonate (Na ₂ CO ₄ ), sodium dithionite (sodium dithionite) (Na ₂ S ₂ O ₄ ), sodium sulfite (Na ₂ SO ₃ ), sodium bisulfite (NaHSO ₃₎ ), Sodium sulfate (sodium nitrate) (Na ₂ SO ₄ ), sodium thiosulfate (hypo) (Na ₂ S ₂ O ₃ ), sodium nitrite (NaNO ₂ ), sodium nitrate (NaNO ₃ ), potassium nitrate (KNO ₃ ), potassium nitrite (KNO _2), potassium sulfite (K ₂ SO _3), potassium sulfate (K ₂ SO _4), potassium carbonate (K ₂ CO _3), potassium bicarbonate KHCO _3), include potassium carbonate (K ₂ CO _4).

Examples of the alkaline earth metal oxide, carbonate, sulfate or hydroxide include beryllium oxide (BeO), magnesium sulfate (MgSO ₄ ), magnesium oxide (MgO), magnesium carbonate (MgCO ₃ ), and calcium sulfate. (CaSO ₄ ), calcium carbonate (CaCO ₃ ), calcium oxide (CaO), calcium hydroxide (Ca (OH) ₂ ), strontium oxide (SrO), strontium titanate (SrTiO ₃ ), strontium chromate (SrCrO ₄ ) , Strontium ore (SrCO ₃ , strontium carbonate), celestite (SrSO ₄ , strontium sulfate), strontium nitrate (Sr (NO ₃ ) ₂ ), barium peroxide (BaO ₂ ), barium oxide (BaO), barium hydroxide (Ba (OH) _2), barium titanate ( ATiO _3), barium sulfate (BaSO _4), barium carbonate (BaCO _3), barium acetate _{(Ba (CH 3 COO) 2} ), barium chromate (BaCrO ₄₎ is.

  Next, as shown in FIG. 2B, a resist film (not shown) is formed on the sacrificial layer 12, and after the resist film is patterned into a predetermined shape by photolithography (step S102), the resist film is masked. By etching, the sacrificial layer 12 is partially removed and patterned into a predetermined shape (step S103). As a result, the sacrificial layer 12 is formed on a part of the first substrate 11 (a region where electronic devices are to be formed).

  Subsequently, as shown in FIG. 2C, the support layer 13 is formed on the entire surface of the first substrate 11 (step S104). The support layer 13 is formed on the side surface of the sacrificial layer 12 while the portion formed on the upper surface of the sacrificial layer 12 has rigidity and thickness that does not deform with respect to the stress distribution in the layer of the electronic device 14 described later. It is desirable that the portion to be formed can be easily broken in a transfer process described later. The support layer 13 also has a function as a protective film for preventing damage to the electronic device when the sacrificial layer 12 described later is etched. The support layer 13 is a solution for etching the sacrificial layer 12 made of the above-described material. On the other hand, it is preferably made of an insoluble material or a material having an etching rate of about 1/5 (1/5) or less. The support layer 13 does not necessarily have to be formed on the entire surface of the first substrate 11, and may be formed so as to cover at least the sacrificial layer 12.

Such a support layer 13 has a thickness of 10 nm to 100,000 nm, for example, and is made of oxide, nitride, metal, or resin. Examples of the oxide include SiO ₂ , Al ₂ O ₃ , ZnO, NiO, SnO ₂ , TiO ₂ , VO ₂ , and In ₂ O ₃ . Examples of the nitride include SiN _x , GaN, InN, TiN, BN, AlN, and ZrN. Examples of the metal include Au, Ag, Pt, Cu, Cr, Ni, Al, Fe, and Ta. Further, an Al—Nd alloy to which impurities are added, AlSi, or the like may be used. Examples of the resin include acrylic resin, epoxy resin, and polyimide resin.

  After that, as shown in FIG. 2D, the electronic device 14 is formed on the sacrificial layer 12 with the support layer 13 therebetween (step S105). Although the detailed configuration of the electronic device 14 is omitted in FIGS. 2 to 4, desired functions such as TFT, capacitor, resistor, wiring, transparent electrode, EL (Electro Luminescence) element, color filter, optical element, etc. Any electronic device may be used.

After forming the electronic device 14, as shown in FIG. 2E, the protective layer 15 is formed on the electronic device 14 (step S106). For example, the protective layer 15 has a thickness of 10 nm to 100,000 nm and is made of an oxide, a nitride, or a resin. Examples of the oxide include SiO ₂ , Al ₂ O ₃ , ZnO, NiO, SnO ₂ , TiO ₂ , VO ₂ , and In ₂ O ₃ . Examples of the nitride include SiN _x , GaN, InN, TiN, BN, AlN, and ZrN. Examples of the resin include acrylic resin, epoxy resin, and polyimide resin.

  After forming the protective layer 15, a resist film (not shown) is formed on the protective layer 15, and the resist film is patterned into a predetermined shape by photolithography (step S107), and dry etching or wet using the resist film as a mask. As shown in FIG. 3, the protective layer 15 and the support layer 13 are partially removed by etching to expose a part of the sacrificial layer 12 (step S108).

  After exposing a part of the sacrificial layer 12, as shown in FIG. 4, the sacrificial layer 12 is removed by etching (step S109). Thereby, the electronic device substrate 10 for transfer is formed.

  In the transfer electronic device substrate 10, the support layer 13 has support bodies 13B on both sides of the main body portion 13A. An electronic device 14 is formed on the upper surface of the main body 13A. A gap is formed between the main body 13A and the surface of the first substrate 11 by removing the sacrificial layer 12, and the main body 13A and the electronic device 14 thereabove are hollowed by the support 13B. Is held in a floating state.

  FIG. 5 is a photograph showing how the sacrificial layer 12 under the resist film is etched. The sacrificial layer 12 has a thickness of 200 nm, a material of MgO, and 2% aqua regia as an etchant. As can be seen from FIG. 5, the etching is started in 10 seconds, and the etching is almost completed in 30 seconds. The sacrificial layer 12 made of MgO can be etched at high speed, and the etching time of the sacrificial layer 12 is shortened. It turns out that it is effective for improvement.

6 to 8 show the process from before the etching of the sacrificial layer 12 to the transfer process described later in order of processes together with photographs of experimental results. In this experiment, the first substrate 11 is glass, the sacrificial layer 12 is MgO, the support layer 13 is 50 nm thick SiO ₂ , the electronic device 14 is a 50 nm thick chromium (Cr) deposited film, and the protective film 15 is 200 nm thick. SiO ₂ was used. FIGS. 6A to 6C show a state in which the patterning of the protective layer 15 and the support layer 13 is completed. The photographs in FIGS. 7B and 7C show a state in which the etching of the sacrificial layer 12 has been completed. Since the sacrificial layer 12 has been removed, it interferes with the support 13B of the thin support layer 13. There are streaks.

  After removing the sacrificial layer 12, a second substrate 21 is prepared as shown in FIG. 7A, and an adhesive layer 22 is formed on the surface of the second substrate 21 (step S201). Various substrates such as silicon (Si), synthetic quartz, glass, metal, resin film, and paper can be selected as the second substrate 21. This is because the transfer process is mainly mechanical and is not restricted by heat or light.

  The adhesive layer 22 is for improving the close contact between the second substrate 21 and the electronic device 14, and is formed, for example, by applying an ultraviolet curable resin or a thermosetting resin to the surface of the second substrate 21. The adhesive layer 22 may be formed by depositing an elastic resin such as silicone rubber, butadiene rubber, or ABS resin. In this case, it is desirable that any resin has a Young's modulus of 10 GPa or less.

  Subsequently, as shown in FIG. 7A, the electronic device 14 on the first substrate 11 is brought into close contact with the adhesive layer 22 provided on the surface of the second substrate 21. When the first substrate 11 is separated, the electronic device 14 is transferred to the second substrate 21 as shown in FIG. 8A (step S301). 8B and 8C show the state after transfer. Since the electronic device 14 on the main body 13A is held in a hollow state by the support 13B, the support 13B can be broken with a very small force, and the main body 13A and the electronic device 14 are It can be separated from the first substrate 11 and easily transferred to the second substrate 21.

6 to 8 show the experimental results when the chromium film is formed as the electronic device 14, but the above-described case also occurs when the other electronic device 14 shown in FIGS. 9 to 11 is formed, for example. A manufacturing method is applicable. FIG. 9 shows an example of a TFT in which a gate electrode 111, a gate insulating film 112, a hydrogenated amorphous silicon layer 113, an n + amorphous silicon layer 114, and a source / drain electrode 115 are sequentially formed on the support layer 13. For example, the gate electrode 111 has a thickness of 200 nm and is made of chromium (Cr). For example, the gate insulating film 112 has a thickness of 300 nm and is made of silicon nitride (SiN _x ). The hydrogenated amorphous silicon layer 113 has a thickness of, for example, 300 nm and is composed of hydrogenated amorphous silicon (a-Si: H). For example, the n + amorphous silicon layer 114 has a thickness of 50 nm and is made of n + amorphous silicon (n + a-Si: H). For example, the source / drain electrode 115 has a thickness of 200 nm and is made of chromium (Cr).

FIG. 10 shows an example of a capacitor in which an electrode 121, an insulating film 122, and an electrode 123 are formed in this order on the support layer 13. For example, the electrode 121 has a thickness of 200 nm and is made of chromium (Cr). For example, the insulating film 122 has a thickness of 200 nm and is made of silicon dioxide (SiO ₂ ). For example, the electrode 123 has a thickness of 200 nm and is made of chromium (Cr).

FIG. 11 shows an example of an EL element (inorganic EL element) in which a transparent electrode 131, an insulating film 132, an EL layer 133, an insulating film 134, and an electrode 135 are sequentially formed on the support layer 13. For example, the transparent electrode 131 has a thickness of 400 nm and is made of ITO. For example, the insulating film 132 has a thickness of 100 nm and is made of silicon dioxide (SiO ₂ ). For example, the EL layer 133 has a thickness of 1 μm and is made of ZnS: Mn. For example, the insulating film 134 has a thickness of 5 μm and is made of SiN _x . For example, the electrode 135 has a thickness of 500 nm and is made of chromium (Cr).

  After transferring the electronic device 14 to the second substrate 21, processing as shown in FIGS. 12 to 14 may be performed in order to fix the electronic device 14 to the second substrate 21 more firmly (step S302). . 12 to 14 show the case where the TFT shown in FIG. 9 is formed as the electronic device 14.

(Fixing method 1)
For example, as shown in FIG. 12 (A), the surface of the electronic device 14 or the protective layer 15 and the surface of the adhesive layer 22 are modified with silanol groups (SiOH), followed by heating and dehydration at about 120 ° C. after transfer. Thus, as shown in FIG. 12B, Si—O—Si bonds are formed and fixed. At this time, a film (not shown) made of an oxide such as SiO ₂ is formed on the surface of the electronic device 14 or the protective layer 15 and modified with a hydroxyl group by O ₂ plasma treatment, UV-O ₃ treatment, or ozone water treatment. May be.

(Fixing method 2)
As shown in FIG. 13 (A), the surface of the electronic device 14 or the protective layer 15 and the surface of the adhesive layer 22 have different characteristics, but have a functional group that is chemically bonded by contact. A ring agent is deposited. As shown in FIG. 13B, the electronic device 14 or the protective layer 15 that has been subjected to the respective treatments and the adhesive layer 22 are brought into close contact with each other and heated to promote chemical bonding.

Examples of combinations of silane coupling agents include the following.
1. Silane coupling agent having isocyanate group and silane coupling agent having amino group Example) Example of silane coupling agent having isocyanate group 3-Isocyanatepropyltriethoxysilane 3-Isocyanatepropyltrichlorosilane Example) Silane cup having amino group Examples of ring agents N-2 (aminoethyl) 3-aminopropylmethyldimethoxysilane N-2 (aminoethyl) 3-aminopropyltrimethoxysilane 3-aminopropyltrimethoxysilane

2. Example of Silane Coupling Agent Having Epoxy Group and Silane Coupling Agent Having Amino Group) Example of Silane Coupling Agent Having Epoxy Group 2- (3,4 Epoxycyclohexyl) ethyltrimethoxysilane 3-Glycidoxypropyltrimethoxy Silane 3-glycidoxypropyltriethoxysilane Example) Examples of silane coupling agents having amino groups N-2 (aminoethyl) 3-aminopropylmethyldimethoxysilane N-2 (aminoethyl) 3-aminopropyltrimethoxysilane 3-aminopropyltrimethoxysilane

(Fixing method 3)
As shown in FIG. 14A, a metal film 15A such as a specific metal such as Au, Ag, Cu, Pd, or Pt is formed on the surface of the protective layer 15, and the following functional groups are formed on the surface of the adhesive layer 22. A silane coupling agent having As shown in FIG. 14B, the electronic device 14 or the protective layer 15 subjected to the respective treatments and the adhesive layer 22 are brought into close contact with each other and heated to promote chemical bonding.

1. Example of mercapto group) 3-mercaptopropylmethyldimethoxysilane 3-mercaptopropyltrimethoxysilane2. 2. Amino group example) N-2 (aminoethyl) 3-aminopropylmethyldimethoxysilane N-2 (aminoethyl) 3-aminopropyltrimethoxysilane 3-aminopropyltrimethoxysilane Phenyl group example) Phenyltriethoxysilane

  As described above, in the electronic device manufacturing method of the present embodiment, at least one of an alkali metal oxide and an alkaline earth metal oxide is used as the sacrificial layer 12, so that high-speed etching is possible. Also, a high temperature process of 300 ° C. or higher is acceptable. Therefore, it is possible to form the electronic device 14 having the same high performance and reliability as in the past by using various semiconductor film forming methods such as vacuum deposition, sputtering or CVD and general semiconductor manufacturing techniques including photolithography. it can. In addition, since the electronic device 14 is formed on the sacrificial layer 12 with the support layer 13 in between, it is possible to eliminate the possibility of being damaged by etching when the sacrificial layer 12 is removed.

  In addition, in the electronic device substrate 10 for transfer according to the present embodiment, the electronic device 14 on the main body 13A is held with a gap from the surface of the first substrate 11 by the support 13B. The support 13B can be broken by force, and the main body 13A and the electronic device 14 can be separated from the first substrate 11. Therefore, the electronic device 14 can be easily transferred, and cost can be reduced and productivity can be improved.

(Second Embodiment)
FIG. 15 shows a schematic flow of the electronic device manufacturing method according to the second embodiment of the present invention, and FIG. 16 shows this manufacturing method in the order of steps. In the present embodiment, a part of the plurality of electronic devices 14 is selectively transferred to the second substrate 21.

  First, as shown in FIG. 16A, the steps shown in FIGS. 2A to 2E and FIG. 3 are performed on the first substrate 11 in the same manner as in the first embodiment. The sacrificial layer 12, the support layer 13, the electronic device 14, and the protective layer 15 are formed, and the protective layer 15 and a part of the support layer 13 are removed to expose a part of the sacrificial layer 12 (steps S101 to S108).

  After exposing a part of the sacrificial layer 12, a resist film (not shown) is formed, and this resist film is patterned into a predetermined shape by photolithography (step S401), and only the electronic device 14 to be transferred to the second substrate 21 is formed. The other electronic device 14 is covered with a resist film. After that, as shown in FIG. 16B, the sacrificial layer 12 of the electronic device 14 to be transferred to the second substrate 21 is removed by etching using this resist film as a mask (step S402).

  After removing the sacrificial layer 12 of the electronic device 14 to be transferred, a second substrate 21 is prepared in the same manner as in the first embodiment by the process shown in FIG. An adhesive layer 22 is formed on the surface (step S201).

  Subsequently, the electronic device 14 on the first substrate 11 is brought into close contact with the adhesive layer 22 provided on the surface of the second substrate 21. When the first substrate 11 is separated, as shown in FIG. 16C, only the electronic device 14 from which the sacrificial layer 12 is removed is selectively transferred to the second substrate 21 (step S403). At that time, the electronic device 14 may be fixed by the steps shown in FIGS. 12 to 14 in the same manner as in the first embodiment (step S302).

  The electronic device 14 remaining on the first substrate 11 can be repeatedly subjected to selective transfer in the same manner. In addition, when all the electronic devices 14 are extracted from the first substrate 11, unnecessary materials can be removed by etching and the first substrate 11 can be reused. The first substrate 11 can be used repeatedly for the number of times represented by Equation 1.

(Equation 1)
Number of repeated uses N of the first substrate 11 =
(Number of electronic devices 14 on the first substrate 11) / (Number of electronic devices 14 necessary for the second substrate 21)

  Such selective transfer can be applied, for example, as shown in FIG. That is, first, as shown in FIG. 17A, FIG. 17B, and FIG. 17C, three separate first substrates 11A, 11B, and 11C are provided with TFTs and capacitors Cs as electronic devices 14. The light receiving elements PD are respectively formed. Next, as shown in FIG. 17D, the TFT is transferred from the first substrate 11A to the second substrate 21 in the first selective transfer step. Subsequently, as shown in FIG. 17E, the capacitor Cs is additionally transferred from the first substrate 11B to the second substrate 21 in the second selective transfer step. After that, as shown in FIG. 17F, the light receiving element PD is additionally transferred from the first substrate 11C to the second substrate 21 in the third selective transfer step. After selectively transferring the light receiving element PD, as shown in FIG. 17G, a wiring W is formed between the transferred TFT, capacitor Cs, and light receiving element PD. The wiring process will be described later.

  In this application example, since the TFT, the capacitor Cs, and the light receiving element PD are manufactured on the separate first substrates 11A to 11C, it is possible to increase the functionality of each element. Usually, since these are manufactured on the same substrate, some layers need to be shared from the viewpoint of the manufacturing process, and therefore it may be necessary to design out of the most desirable performance when viewed as individual devices. Because there is. The first substrates 11A to 11C can be diversified such as synthetic quartz and silicon (Si) wafers. The selection range of the second substrate 21 is expanded as in the first embodiment. In addition, since the electronic devices 14 can be arranged on the first substrate 11 with high density, the material removed by etching or the like can be used effectively, and high productivity can be achieved. Is no longer necessary.

  Furthermore, by repeatedly transferring the electronic device 14 to the second substrate 21 that is larger than the first substrate 11, it is possible to manufacture a large substrate. The transfer device and the wiring formation process must be adapted to a large substrate, but there is an advantage that the TFT manufacturing process for the large substrate is unnecessary and the initial capital investment can be greatly suppressed.

  As described above, in this embodiment, the sacrificial layer 12 of the electronic device 14 to be transferred to the second substrate 21 is removed, and only the electronic device 14 is selectively transferred to the second substrate 21. A part of the plurality of electronic devices 14 arranged at high density on one substrate 11 can be easily selectively transferred.

(Other methods of selective transfer)
As a selective transfer method, as described above, there is also a method of patterning the adhesive layer 22 on the second substrate 21 in addition to removing the sacrificial layer 12 of the electronic device 14 to be transferred (selective etching of the sacrificial layer 12). is there. Hereinafter, those methods will be described as modified examples 1 to 3.

(Modification 1: Selective curing of the adhesive layer 22 made of an ultraviolet curable resin)
This is a method when the adhesive layer 22 is made of an ultraviolet curable resin. When the ultraviolet curable resin is irradiated with light, the resin in the portion is polymerized to increase the hardness and lose adhesiveness. Utilizing this feature, as shown in FIG. 18A, the region 22A (the region where the electronic device 14 is transferred) of the adhesive layer 22 is not irradiated with ultraviolet light, and the region 22B (the electronic device 14 is not transferred). Only the region) is selectively irradiated with ultraviolet rays to lose the adhesive property of the ultraviolet curable resin. After that, the electronic device 14 on the first substrate 11 is brought into close contact with the adhesive layer 22 on the second substrate 21 in the same manner as in the first embodiment. After that, when the first substrate 11 is separated, as shown in FIGS. 18B and 18C, the electronic device 14 is transferred only to the region 22A of the adhesive layer 22 where the ultraviolet rays are not irradiated. In this case, the adhesive layer 22 can be easily selectively irradiated with ultraviolet rays by subjecting the photomask to proximity exposure. The thickness of the ultraviolet curable resin is preferably about 0.1 μm to 100 μm.

(Modification 2: Formation of irregularities in the adhesive layer 22)
As shown in FIG. 19A, an ultraviolet curable resin or a thermosetting resin is formed on the second substrate 21 by, for example, spin coating or slit coating, and an adhesive layer 22 is formed. Form. The protrusion 22C is aligned so as to overlap the electronic device 14 to be transferred on the first substrate 11, and the electronic device 14 on the first substrate 11 is placed on the protrusion 22C of the adhesive layer 22 on the second substrate 21. Adhere closely. After that, when the first substrate 11 is separated, as shown in FIGS. 19B and 19C, the electronic device 14 is transferred to the convex portion 22C. In this process, ultraviolet rays may be irradiated or overheated as necessary. The thickness of the resin is preferably about 0.1 μm to 100 μm. The height of the convex portion 22C is preferably 500 nm or more, for example.

  In addition, the convex part 22C of the adhesion layer 22 may be formed by a replica method in addition to the embossing method, or may be formed by direct processing. In the replica method, irregularities that are reversed to a desired shape are formed on a glass substrate or the like having a high degree of flatness with a photoresist, the above-described resin is poured onto the substrate, and the resin is heated and cured. This is a copy method. In the direct processing method, the above-described resin is applied to the second substrate 21 with a desired thickness, and after heat-curing, the surface is oxidized and hydrophilized with oxygen plasma, and a photoresist is applied. And unnecessary resin is removed by dry etching using this resist as a mask.

(Modification 3: Transcription inhibition film)
First, as shown in FIG. 20, an adhesive layer 22 made of an elastic resin such as PDMS (polydimethylsiloxane), which is a kind of silicone rubber, is formed on a second substrate 21 made of, for example, a PES (polyethersulphone) film. . The thickness of the resin is preferably about 1 μm to 10000 μm.

  Next, as shown in FIG. 20, a transfer inhibition film 23 is formed on the adhesive layer 22 in a region where the electronic device 14 is not transferred, for example, by a method such as printing or photolithography.

For example, the transfer inhibition film 23 preferably has a Young's modulus of 10 PGa or more, a thickness of 1 nm to 1 mm, and thinner than the thickness of the electronic device 14 to be transferred. Even if the transfer-inhibiting film 23 is a thin film, it is difficult to make the adhesive layer 22 adhere to the electronic device 14 by covering the surface of the adhesive layer 22 with the transfer-inhibiting film 23, so that the transfer can be inhibited. It is. As a constituent material of the transfer inhibition film 23, in addition to SiO ₂ and SiN _x , metals such as Au, Ag, Cu, Ni, Cr, Ti, and Al, fluorine resins such as PTFE (polytetrafluoroethylene), polyimide, photo A resist etc. are mentioned.

  Subsequently, as shown in FIG. 21, the region 22A of the adhesive layer 22 that is not covered with the transfer inhibition film 23 is aligned so as to overlap the electronic device 14 to be transferred on the first substrate 11, and The electronic device 14 on the first substrate 11 is brought into close contact with the region 22A of the adhesive layer 22 on the two substrates 21. If necessary, pressure may be applied by a roller 25 on the stage 24 as shown in FIG. The applied pressure can be, for example, about 0.1 MPa.

  After that, when the first substrate 11 is separated, as shown in FIGS. 22B and 22C, the electronic device 14 is transferred to the region 22A of the adhesive layer 22 that is not covered with the transfer inhibition film 23. The

  The transfer inhibition film 23 may be a single layer, but as shown in FIG. 23, it may have a laminated structure of a first transfer inhibition film 23A and a second transcription inhibition film 23B. The first transfer inhibition film 23A enhances the adhesiveness with the adhesive layer 22, and is made of a metal such as Au, Ag, Cu, Ni, Cr, Ti, and Al. The second transfer inhibition film 23B is preferably made of, for example, a fluororesin such as PTFE. This is because the transfer can be made more difficult and the yield can be increased.

  In the first to third modifications, the case where the sacrificial layer 12 of all the electronic devices 14 is removed as in the first embodiment is described. However, the first to third modifications and the second embodiment are described. In combination, after removing only the sacrificial layer 12 of the electronic device 14 to be transferred, the selective transfer may be performed by any one of the first to third modifications.

(Conditions for the shape of the support layer 13)
In the electronic device manufacturing method described in the first and second embodiments and the first to third modifications, the conditions of the shape of the support layer 13 for easily transferring the electronic device 14 are as follows. It is.

  As shown in FIG. 24, the electronic device 14 is supported by the support 13 </ b> B and floats on the first substrate 11. At this time, the support 13 </ b> B is preferably formed with an inclination a of about 90 ° to 150 ° with respect to the electronic device 14. Thereby, compared with the case where the support 13B is horizontal or nearly horizontal, stress is concentrated on the bent portion at the time of transfer of the electronic device 14, and it can be preferentially broken.

  In addition, the width of the support 13B is desirably 1: 1 or less than the width of the electronic device 14. This is because high effects can be obtained in terms of productivity by arranging the electronic devices 14 at a higher density.

  Furthermore, as the transfer conditions, the adhesion stress between the electronic device 14 and the second substrate 21 is σ (D2), the adhesion area is A (D2), the breaking stress of the material of the support 13B is σ (sus), and the support Assuming that the width of 13B is w (sus), the thickness of the support 13B is t (sus), and the number of the supports 13B per electronic device 14 is n, it is desirable that Formula 2 holds.

(Equation 2)
σ (D2) × A (D2)> σ (sus) × w (sus) × t (sus) × n

(Third embodiment)
FIG. 25 shows a schematic flow of a manufacturing method of an electronic device according to the third embodiment of the present invention, and FIG. 26 shows this manufacturing method in the order of steps. In the present embodiment, the electronic device 14 is selectively transferred to the relay substrate 31 and then transferred from the relay substrate 31 to the second substrate 21.

  First, as shown in FIG. 26 (A), the first substrate 11 is formed on the first substrate 11 by the steps shown in FIGS. 2 (A) to 2 (E) and FIG. The sacrificial layer 12, the support layer 13, the electronic device 14, and the protective layer 15 are formed, and the protective layer 15 and a part of the support layer 13 are removed to expose a part of the sacrificial layer 12 (steps S101 to S108).

  Next, similarly to the second embodiment, a resist film (not shown) is formed, this resist film is patterned into a predetermined shape by photolithography (step S401), and only the electronic device 14 to be transferred to the second substrate 21 is formed. The other electronic device 14 is covered with a resist film. Subsequently, as shown in FIG. 26B, the sacrificial layer 12 of the electronic device 14 to be transferred to the second substrate 21 is removed by etching using the resist film as a mask (step S402).

  After that, as shown in FIG. 26C, a relay substrate 31 made of glass or a resin film is prepared, and an adhesive layer 32 is formed on the surface of the relay substrate 31. The adhesive layer 32 may be formed by depositing a silicone rubber (for example, PDMS), or may be formed by depositing an adhesive whose adhesive strength is reduced by ultraviolet irradiation.

  After forming the adhesive layer 32 on the relay substrate 31, the electronic device 14 on the first substrate 11 is brought into close contact with the adhesive layer 32 of the relay substrate 31 as shown in FIG. After that, when the first substrate 11 is separated, only the electronic device 14 from which the sacrificial layer 12 is removed is selectively transferred to the relay substrate 31 (step S501).

  After selectively transferring the electronic device 14 to the relay substrate 31, the second substrate 21 is prepared in the same manner as in the first embodiment by the process shown in FIG. 7A. An adhesive layer 22 is formed on the surface (step S201).

  Subsequently, the electronic device 14 on the first substrate 11 is brought into close contact with the adhesive layer 22 provided on the surface of the second substrate 21. Thereafter, when the first substrate 11 is separated, the electronic device 14 is transferred from the relay substrate 31 to the second substrate 21 as shown in FIG. 26D (step S301). If the adhesive layer 32 of the relay substrate 31 is made of silicone rubber, the electronic device 14 is temporarily transferred to the second substrate 21 because it is temporarily bonded to the relay substrate 31. In addition, if the adhesive layer 32 of the relay substrate 31 is made of a resin whose adhesive strength is reduced by ultraviolet rays, it is necessary to transfer while irradiating the ultraviolet rays. At that time, the electronic device 14 may be fixed in the same manner as in the first embodiment by the steps shown in FIGS. 12 to 14 (step S302).

  The electronic device 14 remaining on the first substrate 11 can be repeatedly selectively transferred in the same manner as in the second embodiment.

  As described above, in this embodiment, since the electronic device 14 is transferred to the relay substrate 31 and then transferred to the second substrate 21, the positional relationship between the front and back of the electronic device 14 transferred to the second substrate 21 is determined. The state before the transfer on the first substrate 11 can be made the same. Therefore, as will be described later, the contact hole can be formed before transfer or before the sacrificial layer 12 is etched, and the productivity can be further improved.

  In the present embodiment, the electronic device 14 is selectively transferred to the relay substrate 31 and then transferred to the second substrate 21. However, after all the electronic devices 14 are transferred to the relay substrate 31, the electronic device 14 is transferred from the relay substrate 31. You may make it selectively transfer to the 2nd board | substrate 21. FIG.

(Modification 4)
FIG. 27 shows a schematic flow of a manufacturing method of an electronic device according to the fourth modification of the present invention, and FIGS. 28 and 29 show this manufacturing method in the order of steps. In this modified example, when the electronic device 14 is selectively transferred to the adhesive layer 32 on the relay substrate 31, a convex portion 32 </ b> C similar to the convex portion 22 </ b> C of the adhesive layer 22 of the modified example 2 is formed on the adhesive layer 32. It is a thing. Except for this, the fourth modification is the same as the third embodiment, and the effect of the fourth modification is the same as that of the third embodiment.

  First, as shown in FIG. 28A, the steps shown in FIGS. 2A to 2E and FIG. 3 are performed on the first substrate 11 in the same manner as in the first embodiment. The sacrificial layer 12, the support layer 13, the electronic device 14, and the protective layer 15 are formed, and the protective layer 15 and a part of the support layer 13 are removed to expose a part of the sacrificial layer 12 (steps S101 to S108).

  Next, as shown in FIG. 28B, the sacrificial layer 12 is removed by etching in the same manner as in the first embodiment by the process shown in FIG. 4 (step S109).

  Subsequently, the adhesive layer 32 having the convex portions 32 </ b> C is formed on the relay substrate 31. The convex portion 32C may be formed by a replica method or may be formed by direct processing. In the replica method, irregularities reversed to a desired shape are formed on a glass substrate having a high flatness by using a photoresist, and silicone rubber such as PDMS is poured onto the glass substrate, followed by heat curing, and then on the relay substrate 31. It is a method to copy to. In the direct processing method, a silicone rubber such as PDMS is applied on the relay substrate 31 with a desired thickness, and after heat curing, the surface is oxidized and hydrophilized with oxygen plasma, and a photoresist is applied. In this method, unnecessary silicone rubber is removed by dry etching using a resist as a mask after forming a pattern.

  After that, when the electronic device 14 on the first substrate 11 is brought into close contact with the convex portion 32C of the adhesive layer 32 of the relay substrate 31 and the first substrate 11 is separated, as shown in FIG. Only the electronic device 14 that is in contact with is selectively transferred to the relay substrate 31 (step S501).

  After selectively transferring the electronic device 14 to the relay substrate 31, the second substrate 21 is prepared in the same manner as in the first embodiment by the process shown in FIG. 7A. An adhesive layer 22 is formed on the surface (step S201).

  Subsequently, as illustrated in FIG. 29A, the electronic device 14 on the relay substrate 31 is brought into close contact with the adhesive layer 22 provided on the surface of the second substrate 21. After that, when the relay substrate 31 is separated, the electronic device 14 is transferred from the relay substrate 31 to the second substrate 21 as shown in FIG. 29B (step S301). Since the adhesive layer 32 of the relay substrate 31 is made of silicone rubber, the electronic device 14 is easily transferred to the second substrate 21. At that time, the electronic device 14 may be fixed in the same manner as in the first embodiment by the steps shown in FIGS. 12 to 14 (step S302).

  In addition, although this modification demonstrated the case where the adhesion layer 32 was comprised with silicone rubber, you may comprise the adhesion layer 32 with resin which the adhering force falls with an ultraviolet-ray.

(Fourth embodiment)
30 and 31 show a schematic flow of a manufacturing method of an electronic device according to the fourth embodiment of the present invention, and FIGS. 32 to 38 show this manufacturing method in the order of steps. is there. In the present embodiment, a case where an amorphous silicon thin film transistor (a-Si: H / TFT) is formed as the electronic device 14 and wiring is performed after the electronic device 14 is transferred will be described.

  First, as shown in FIG. 32A, the sacrificial layer 12 is formed on the first substrate 11 as in the first embodiment (step S101). As the first substrate 11, for example, glass for liquid crystal display (for example, # 1737 glass manufactured by Corning, Inc., thickness 0.7 mm) is used. As the sacrificial layer 12, amorphous magnesium oxide (MgO) is formed to a thickness of 200 nm, for example, by vapor deposition.

  Next, as shown in FIG. 32B, in the same manner as in the first embodiment, the sacrificial layer 12 is patterned into a predetermined shape by etching, and a part of the first substrate 11 (to form an electronic device) The sacrificial layer 12 is formed in the region (step S102, step S103). As an etching solution, for example, a mixed solution of nitric acid: 5%, hydrogen chloride: 20%, and water: 75% is used.

Subsequently, as shown in FIG. 32C, the support layer 13 is formed in the same manner as in the first embodiment (step S104). As the support layer 13, SiO ₂ is deposited to a thickness of 100 nm, for example, by plasma CVD.

  After that, an a-Si: H / TFT is formed as the electronic device 14 with the support layer 13 interposed between the sacrificial layer 12 (step S105, step S601 to step S613).

  That is, first, a gate electrode layer (not shown) made of, for example, chromium (Cr) is formed on the support layer 13 by sputtering, for example, with a thickness of 200 nm (step S601). Next, a resist film (not shown) is formed on the gate electrode layer, the resist film is patterned into a predetermined shape by photolithography (step S602), and then the gate is formed by wet etching using the resist film as a mask. The electrode layer is formed into a predetermined shape (step S603). Thus, the gate electrode 41 is formed as shown in FIG.

Next, as shown in FIG. 32E, an insulating film 42 made of, for example, SiN _x is formed to a thickness of 300 nm as a gate insulating film by, eg, plasma CVD (step S604).

Subsequently, as shown in FIG. 33A, a hydrogenated amorphous silicon layer 43 is formed to a thickness of 200 nm by, for example, plasma CVD (step S605), and further, for example, made of SiN _x by plasma CVD. The etching stopper layer 44 is formed with a thickness of 50 nm (step S606).

  After that, as shown in FIG. 33B, a resist film (not shown) is formed on the etching stopper layer 44, and after patterning the resist film into a predetermined shape by photolithography (step S607), phosphoric acid is used. The etching stopper layer 44 is formed into a predetermined shape by wet etching (step S608). Similarly, the hydrogenated amorphous silicon layer 43 and the insulating film 42 are patterned into a predetermined shape by photolithography and etching. Etching is performed by dry etching, for example.

  After patterning the insulating film 42, as shown in FIG. 33C, an amorphous silicon layer (n + a-Si: H) 45 doped with impurities is formed to a thickness of 50 nm by, for example, plasma CVD (step S609). ).

  Subsequently, as shown in FIG. 33C, a source / drain electrode layer 46A made of chromium (Cr) is formed with a thickness of 200 nm by, for example, sputtering (step S610). After that, a resist film (not shown) is formed on the source / drain electrode layer 46A, the resist film is patterned into a predetermined shape by photolithography (step S611), and wet etching is performed using this resist film as a mask. Thus, the source / drain electrode layer 46A is formed into a predetermined shape (step S612). Thus, source / drain electrodes 46 are formed as shown in FIG.

  Subsequently, as shown in FIG. 34B, the n + a-Si layer 45 is formed into a predetermined shape by dry etching using the source / drain electrode 46 as a mask (step S613). Thus, the electronic device 14 is formed.

  After forming the electronic device 14, as shown in FIG. 34C, the protective layer 15 is formed on the electronic device 14 in the same manner as in the first embodiment (step S106).

  After forming the protective layer 15, as shown in FIG. 35, a part of the protective layer 15 and the support layer 13 are removed to expose a part of the sacrificial layer 12 as in the first embodiment. (Step S107, Step S108).

  After exposing a part of the sacrificial layer 12, as shown in FIG. 36, the sacrificial layer 12 is removed by etching (step S109). As an etchant, for example, a mixed solution of nitric acid: 10%, hydrogen chloride: 20%, water: 70% is used.

  After removing the sacrificial layer 12, the second substrate 21 is prepared by the process shown in FIG. 20 in the same manner as in the third modification, and the adhesive layer 22 is formed on the surface of the second substrate 21 (step S201). . For example, a PES film (“Sumilite (registered trademark)” FS-1300 manufactured by Sumitomo Bakelite Co., Ltd.) is used as the second substrate 21. The adhesive layer 22 is formed by forming a film of PDMS (“SYLGARD 184” manufactured by Toray Dow Corning) with a thickness of 100 μm and curing at 65 ° C. for 12 hours using, for example, a die coater.

  Next, similarly to the third modification, the transfer inhibiting film 23 is formed on the adhesive layer 22 in the region where the electronic device 14 is not transferred, by the process shown in FIG. The transfer inhibition film 23 is formed by depositing chromium (Cr) with a thickness of 20 nm by, for example, vapor deposition and patterning by photolithography.

  Subsequently, in the same manner as in the third modification, the region 22A of the adhesive layer 22 that is not covered with the transfer inhibition film 23 overlaps the electronic device 14 to be transferred on the first substrate 11 by the process illustrated in FIG. Align and adhere closely. For alignment, for example, a contact aligner is used. At the same time as the formation of the transfer inhibition film 23 and other chromium (Cr) films, alignment marks for alignment are formed on the first substrate 11 and the second substrate 21 respectively. Use to align.

  After that, the superimposed first substrate 11 and second substrate 21 are removed from the aligner, and are pressed by the roller 25 on the stage 24 in the same manner as in the third modification by the process shown in FIG. The applied pressure is, for example, about 0.1 MPa.

  Subsequently, when the first substrate 11 is separated, the region not covered with the transfer inhibition film 23 of the adhesive layer 22 is formed by the steps shown in FIGS. 22B and 22C as in the third modification. The electronic device 14 is selectively transferred (step S403). At that time, the electronic device 14 may be fixed by the steps shown in FIGS. 12 to 14 in the same manner as in the first embodiment (step S302).

  After that, as shown in FIG. 37A, a resist film 51 is formed on the electronic device 14 that is mounted in isolation on the second substrate 21, and the resist film 51 is patterned into a predetermined shape by photolithography. (Step S303), as shown in FIGS. 37B and 38A, using the resist film 51 as a mask, contact holes 13C are provided in the support layer 13 by wet etching using, for example, ammonium fluoride. Then, the resist film 51 is peeled off (step S304). The contact hole 13C is formed on the source / drain electrode 46 and the gate electrode 41 as shown in FIG.

  Subsequently, a chromium (Cr) film (not shown) is formed as a wiring layer on the entire surface of the second substrate 21 by a film forming method such as sputtering or vapor deposition (step S305). This chromium film is also formed so as to overlap with the portion where the transfer inhibiting film 23 is formed. The constituent material of the wiring layer may be Al, Cu, Ti or an alloy containing them in addition to chromium.

  Thereafter, a resist film (not shown) is formed on the chromium film, the resist film is patterned into a predetermined shape by photolithography (step S306), and the chromium film and the transfer inhibition film 23 are formed by wet etching using the resist film as a mask. As shown in FIG. 39, the gate electrode 41 and the gate wiring X1 are connected through the contact hole 13C formed on the gate electrode 41 of the electronic device 14 (step S307).

  After forming the gate wiring X1, for example, a photosensitive resin is applied to the entire surface of the second substrate 21, exposed, and baked, thereby forming an interlayer insulating film 52 as shown in FIG. At that time, a through hole is provided in the interlayer insulating film 52 so as to expose the contact hole 13 </ b> C to the source / drain electrode 46.

  After the interlayer insulating film 52 is formed, as shown in FIG. 40A, the drain electrode is connected through the contact hole 13C formed on the drain electrode 46 of the electronic device 14 in the same manner as the gate wiring X1. 46 and the drain wiring Y1 are connected (steps S305 to S307) so that the electronic device 14 can be operated by a matrix of the gate wiring X1 and the drain wiring Y1.

  After forming the drain wiring Y1, as shown in FIG. 40B, the transparent electrode 53 made of, for example, ITO and the source electrode 46 are formed through the contact hole 13C formed on the source electrode 46 of the electronic device 14. Connect. Thereby, a TFT substrate for an active matrix liquid crystal display device is completed.

  As described above, in the present embodiment, after the electronic device 14 is transferred to the second substrate 21, the support layer 13 is provided with the contact hole 13C, and the gate wiring X1 and the drain wiring Y1 are connected to the electronic device 14 through the contact hole 13C. Since the high-performance electronic device 14 is used, the process on the second substrate 21 can be simplified, and effects such as improvement in yield and productivity, and cost reduction can be obtained. Can do. The restriction on the material of the second substrate 21 is reduced, and the flexible second substrate 21 can be used. Further, by leaving the support layer 13, the stress distribution in the layer of the electronic device 14 configured in a complicated manner can be relaxed, and the reliability can be further improved.

(Fifth embodiment)
41 to 43 show a method of manufacturing an electronic device according to the fifth embodiment of the present invention in the order of steps. In this embodiment, a capacitor is formed simultaneously with the amorphous silicon thin film transistor (a-Si: H / TFT) as the electronic device 14.

  First, as shown in FIG. 41A, the sacrificial layer 12 is formed on the first substrate 11 by the process shown in FIG. 32A in the same manner as in the fourth embodiment (step S101). .

  Next, as shown in FIG. 41B, the sacrificial layer 12 is patterned into a predetermined shape by etching in the same manner as in the fourth embodiment by the process shown in FIG. A sacrificial layer 12 is formed on a part of the substrate 11 (a region where electronic devices are to be formed) (steps S102 and S103).

  Subsequently, as shown in FIG. 41C, the support layer 13 is formed in the same manner as in the fourth embodiment by the process shown in FIG. 32C (step S104).

  After that, an a-Si: H / TFT (step S105, step S601 to step S613) and a capacitor are formed as the electronic device 14 with the support layer 13 interposed therebetween on the sacrificial layer 12.

  That is, first, by the process shown in FIG. 32D, the electrode layer (for forming the gate electrode of the TFT and the common electrode of the capacitor) is formed on the support layer 13 in the same manner as in the fourth embodiment. (Not shown) is formed (step S601). Next, a resist film (not shown) is formed on the electrode layer, the resist film is patterned into a predetermined shape by photolithography (step S602), and then the electrode layer is formed by wet etching using the resist film as a mask. Is formed into a predetermined shape (step S603). Thereby, as shown in FIG. 41D, the gate electrode 41 of the TFT and the common electrode 61 of the capacitor are formed.

  Next, as shown in FIG. 41E, the insulating film 42 is formed in the same manner as in the fourth embodiment by the process shown in FIG. 32E (step S604).

  Subsequently, as shown in FIG. 42A, the hydrogenated amorphous silicon layer 43 is formed in the same manner as in the fourth embodiment by the process shown in FIG. 33A (step S605). Further, an etching stopper layer 44 is formed (step S606).

  Thereafter, as shown in FIG. 42B, a resist film (not shown) is formed on the etching stopper layer 44 in the same manner as in the fourth embodiment by the process shown in FIG. Then, after patterning the resist film into a predetermined shape by photolithography (step S607), the etching stopper layer 44 is formed into a predetermined shape by wet etching (step S608). Similarly, the hydrogenated amorphous silicon layer 43 and the insulating film 42 are patterned into a predetermined shape by photolithography and etching.

  After patterning the insulating film 42, as shown in FIG. 42C, an amorphous silicon layer (n + a) doped with impurities is formed in the same manner as in the fourth embodiment by the process shown in FIG. -Si: H) 45 is formed (step S609).

  Subsequently, similarly as shown in FIG. 42C, the source / drain electrode layer 46A is formed in the same manner as in the fourth embodiment by the process shown in FIG. 33C (step S610). . After that, a resist film (not shown) is formed on the source / drain electrode layer 46A, the resist film is patterned into a predetermined shape by photolithography (step S611), and as shown in FIG. 43 (A). Further, in the same manner as in the fourth embodiment, the source / drain electrode layer 46A is formed into a predetermined shape by wet etching using this resist film as a mask by the process shown in FIG. / Drain electrode 46 is formed (step S612). At this time, the capacitor is configured by deforming the source electrode to face the common electrode 61.

  Subsequently, as shown in FIG. 43B, n + a− is performed by dry etching using the source / drain electrode 46 as a mask in the same manner as in the fourth embodiment by the process shown in FIG. The Si layer 45 is formed into a predetermined shape (step S613). As described above, the TFT portion and the capacitor portion Cs are formed as the electronic device 14.

  After forming the electronic device 14, as shown in FIG. 43C, the protective layer 15 is formed on the electronic device 14 in the same manner as in the fourth embodiment by the process shown in FIG. Is formed (step S106).

  The electronic device 14 can be transferred to the second substrate 21 in the same manner as in the fourth embodiment, and the gate wiring X1, the capacitor wiring X2, and the drain wiring Y1 can be connected. Can be configured. In the wiring formation process, the capacitor wiring X2 is connected simultaneously with the connection process of the gate wiring X1.

  As described above, in the present embodiment, the TFT portion and the capacitor portion Cs can be formed simultaneously as the electronic device 14.

  In the present embodiment, the gate insulating film of the TFT portion and the insulating film of the capacitor portion Cs are the common insulating film 42, but they may be formed to a thickness suitable for each.

(Sixth embodiment)
44 to 46 show an electronic device manufacturing method according to the sixth embodiment of the present invention in the order of steps. In the present embodiment, an amorphous silicon thin film transistor (a-Si: H / TFT) and a capacitor are formed as the electronic device 14, and a crossing portion IS, which is an overlapping portion of TFT wiring, is built in the electronic device 14. Thus, the wiring process after transfer can be simplified.

  First, as shown in FIG. 44A, the sacrificial layer 12 is formed on the first substrate 11 by the process shown in FIG. 41A as in the fifth embodiment (step S101). .

  Next, as shown in FIG. 44B, the sacrificial layer 12 is patterned into a predetermined shape by etching in the same manner as in the fifth embodiment by the process shown in FIG. A sacrificial layer 12 is formed on a part of the substrate 11 (a region where electronic devices are to be formed) (steps S102 and S103).

  Subsequently, as shown in FIG. 44C, the support layer 13 is formed in the same manner as in the fifth embodiment by the process shown in FIG. 41C (step S104).

  After that, an a-Si: H / TFT (step S105, step S601 to step S613) and a capacitor are formed as the electronic device 14 with the support layer 13 interposed therebetween on the sacrificial layer 12.

  That is, first, an electrode layer (for forming a gate electrode of a TFT and a common electrode of a capacitor) is formed on the support layer 13 in the same manner as in the fifth embodiment by the process shown in FIG. (Not shown) is formed (step S601).

  Next, a resist film (not shown) is formed on the electrode layer, the resist film is patterned into a predetermined shape by photolithography (step S602), and then the electrode layer is formed by wet etching using the resist film as a mask. Is formed into a predetermined shape (step S603). As a result, as shown in FIG. 45, the gate electrode 41 of the TFT and the common electrode 61 of the capacitor are formed. At this time, the gate electrode 41 is extended to form a part of the gate wiring X1, and the common electrode 61 is extended to form a part of the capacitor wiring X2. This is because it is possible to provide at least one contact hole TH with at least one place, a total of four places, or a later-described wiring W (see FIG. 49) at the outermost part of the gate wiring X1 and the capacitor wiring X2. is there.

  Next, as shown in FIG. 46A, the insulating film 42 is formed by the process shown in FIG. 41E in the same manner as in the fifth embodiment (step S604).

  Subsequently, as shown in FIG. 46B, the hydrogenated amorphous silicon layer 43 is formed in the same manner as in the fifth embodiment by the process shown in FIG. 42A (step S605). Further, an etching stopper layer 44 is formed (step S606).

  Thereafter, as shown in FIG. 46C, a resist film (not shown) is formed on the etching stopper layer 44 in the same manner as in the fifth embodiment by the process shown in FIG. Then, after patterning the resist film into a predetermined shape by photolithography (step S607), the etching stopper layer 44 is formed into a predetermined shape by wet etching (step S608). Similarly, the hydrogenated amorphous silicon layer 43 and the insulating film 42 are patterned into a predetermined shape by photolithography and etching.

  After patterning the insulating film 42, as shown in FIG. 46D, an amorphous silicon layer (n + a) doped with impurities is formed by the process shown in FIG. 43C, as in the fifth embodiment. -Si: H) 45 is formed (step S609).

  Subsequently, as shown in FIG. 46D, the source / drain electrode layer 46A is formed in the same manner as in the fifth embodiment by the process shown in FIG. 43C (step S610). .

  After that, a resist film (not shown) is formed on the source / drain electrode layer 46A, the resist film is patterned into a predetermined shape by photolithography (step S611), and as shown in FIG. 47 (A). 43A, the source / drain electrode layer 46A is formed into a predetermined shape by wet etching using this resist film as a mask in the same manner as in the fifth embodiment (step A). S612), the source / drain electrode 46 is formed. At this time, the capacitor is formed by extending the source electrode and facing the common electrode 61, and the drain electrode is extended to form a part of the drain wiring Y2 (not shown in FIG. 47A). (See FIG. 48). The drain wiring Y2 intersects with the gate wiring X1 and the capacitor wiring X2, and further extends beyond them. This is because the drain wiring Y2 can be provided with at least one contact hole TH at least one position outside the gate wiring X1 and the capacitor wiring X2 in total, and two or more contact holes TH described later (see FIG. 49). It is to make it. In addition, the gate wiring X1 and the capacitor wiring X2 are also provided with at least one contact hole TH in each end, for a total of four or more contact holes TH.

  Subsequently, as shown in FIG. 47B, n + a is performed by dry etching using the source / drain electrode 46 as a mask by the process shown in FIG. 43B, as in the fifth embodiment. -The Si layer 45 is formed into a predetermined shape (step S613). As described above, as the electronic device 14, the intersection portion IS of the gate wiring X1, the drain wiring Y1, and the capacitor wiring X2 is formed together with the TFT portion and the capacitor portion Cs.

  After forming the electronic device 14, as shown in FIG. 47C, the protective layer 15 is formed on the electronic device 14 in the same manner as in the fifth embodiment by the process shown in FIG. Is formed (step S106).

  After forming the protective layer 15, as shown in FIG. 48, the protective layer 15 and a part of the support layer 13 are removed and sacrificed by the process shown in FIG. 35 in the same manner as in the fourth embodiment. A part of the layer 12 is exposed (step S107, step S108).

  After exposing a part of the sacrificial layer 12, the sacrificial layer 12 is removed by etching in the same manner as in the fourth embodiment by the process shown in FIG. 36 (step S109).

  After removing the sacrificial layer 12, the electronic device 14 is transferred to the second substrate 21 in the same manner as in the fourth embodiment and the third modification (steps S201, S403, and S302). Thereafter, contact holes TH are formed in the support layer 13 in the same manner as in the fourth embodiment by the steps shown in FIGS. 37 and 38 (steps S303 and S304). As shown in FIG. 48, a total of six contact holes TH are provided at both ends of each of the gate wiring X1, the capacitor wiring X2, and the drain wiring Y1.

  After forming the contact hole TH in the support layer 13, a chromium (Cr) film (not shown) is formed as a wiring layer on the entire surface of the second substrate 21 in the same manner as in the fourth embodiment (step S305).

  Thereafter, a resist film (not shown) is formed on the chromium film, the resist film is patterned into a predetermined shape by photolithography (step S306), and the chromium film and the transfer inhibition film 23 are formed by wet etching using the resist film as a mask. As shown in FIG. 49, the gate wiring X1, the drain wiring Y1, and the capacitor wiring X2 can be connected by the wiring W in one step to form an active matrix TFT substrate.

  As described above, in this embodiment, the electronic device 14 incorporates the intersection portion IS of the gate wiring X1, the drain wiring Y1, and the capacitor wiring X2 together with the TFT portion and the capacitor portion Cs. The wiring X1, the drain wiring Y1, and the capacitor wiring X2 can be connected by the wiring W in one step. Therefore, the wiring process in the 2nd board | substrate 21 can be reduced, and cost and reliability can be improved.

  In this embodiment, the gate insulating film in the TFT portion, the insulating film in the capacitor portion Cs, the gate wiring X1 in the intersection IS, and the insulating film between the capacitor wiring X2 and the drain wiring Y1 are used as the common insulating film 42. However, it may be formed in a thickness suitable for each.

(Seventh embodiment)
FIG. 50 shows a schematic flow of the electronic device manufacturing method according to the seventh embodiment of the present invention, and FIGS. 51 and 52 show this manufacturing method in the order of steps. The present embodiment relates to a case where the electronic device 14 is once selectively transferred to the relay substrate 31 and then transferred from the relay substrate 31 to the second substrate 21 as in the third embodiment or the fourth modification. After the electronic device 14 is transferred to the second substrate 21, a contact hole 15C is provided in the protective layer 15, and the wiring W is connected to the electronic device 14 through the contact hole 15C. In the following description, a case where the transfer of the electronic device 14 to the relay substrate 31 and the second substrate 21 is performed in the same manner as in the fourth modification will be described.

  First, as shown in FIG. 51 (A), the sacrificial layer 12, the support layer 13, the electronic device 14, and the protective layer 15 are formed on the first substrate 11 in the same manner as in the fourth modification. A part of the support layer 13 is removed to expose a part of the sacrificial layer 12 (steps S101 to S108).

  Next, as shown in FIG. 51B, the sacrificial layer 12 is removed by etching in the same manner as in the fourth modification (step S109).

  Subsequently, as shown in FIG. 51C, in the same manner as in the fourth modification, the adhesive layer 32 having the convex portions 32C is formed on the relay substrate 31, and the electrons on the first substrate 11 are formed on the convex portions 32C. The device 14 is brought into close contact, and the first substrate 11 is separated. Thereby, only the electronic device 14 which contacted the convex part 32C is selectively transferred to the relay substrate 31 (step S501).

  After that, the second substrate 21 is prepared by the process shown in FIG. 7A as in the first embodiment, and the adhesive layer 22 is formed on the surface of the second substrate 21 (step S201). ).

  After the adhesive layer 22 is formed on the second substrate 21, as shown in FIG. 52A, the electronic device 14 on the relay substrate 31 is brought into close contact with the adhesive layer 22 in the same manner as in the fourth modification. After that, when the relay substrate 31 is separated, the electronic device 14 is transferred from the relay substrate 31 to the second substrate 21 as shown in FIG. 52B (step S301). At that time, the electronic device 14 may be fixed in the same manner as in the first embodiment by the steps shown in FIGS. 12 to 14 (step S302).

  The electronic device 14 transferred through the relay substrate 31 in this way has the same positional relationship on the second substrate 21 as that before transfer on the first substrate 11. Therefore, as illustrated in FIG. 52C, the contact hole 15 </ b> C can be provided in the protective layer 15.

  Specifically, a resist film (not shown) is formed on the second substrate 21 to which the electronic device 14 is transferred, and the resist film is patterned into a predetermined shape by photolithography (Step S303). Contact hole 15C is provided in protective layer 15 by dry etching or wet etching of protective layer 15 using 51 as a mask (step S304).

  Subsequently, a chromium (Cr) film (not shown) is formed as a wiring layer on the entire surface of the second substrate 21 by a film forming method such as sputtering or vapor deposition (step S305). The constituent material of the wiring layer may be Al, Cu, Ti or an alloy containing them in addition to chromium.

  After that, a resist film (not shown) is formed on the chromium film, the resist film is patterned into a predetermined shape by photolithography (step S306), and the chromium film is patterned by dry etching or wet etching using the resist film as a mask. Then, as shown in FIG. 52D, the wiring W is formed (step S307).

  As described above, in the present embodiment, after the electronic device 14 is transferred to the second substrate 21 through the relay substrate 31, the contact hole 15C is provided in the protective layer 15, and the wiring W is connected to the electronic device 14 through the contact hole 15C. As in the third embodiment or the modified example 4, the positional relationship between the front and back of the electronic device 14 transferred to the second substrate 21 is the state before transfer on the first substrate 11. In the same manner as in the fourth embodiment, the process on the second substrate 21 can be simplified, and effects such as yield and productivity improvement and cost reduction can be obtained.

  In the above description, the specific configuration of the electronic device 14 is omitted, but the configuration or type of the electronic device 14 is not particularly limited. For example, a TFT may be formed as in the fourth embodiment. The TFT and the capacitor Cs may be formed as in the fifth embodiment, or the intersection IS may be formed together with the TFT and the capacitor Cs as in the sixth embodiment.

(Eighth embodiment)
FIG. 53 shows a schematic flow of a manufacturing method of an electronic device according to the eighth embodiment of the present invention, and FIGS. 54 and 55 show this manufacturing method in the order of steps. The present embodiment relates to a case where the electronic device 14 is once selectively transferred to the relay substrate 31 and then transferred from the relay substrate 31 to the second substrate 21 as in the third embodiment or the fourth modification. After providing the contact hole 15C in the protective layer 15, the electronic device 14 is transferred to the second substrate 21, and the wiring W is connected to the electronic device 14 through the contact hole 15C. In the following description, a case where the transfer of the electronic device 14 to the relay substrate 31 and the second substrate 21 is performed in the same manner as in the fourth modification will be described.

  First, as shown in FIG. 54 (A), the sacrificial layer 12, the support layer 13, the electronic device 14, and the protective layer 15 are formed on the first substrate 11 in the same manner as in the fourth modification, A part of the support layer 13 is removed to expose a part of the sacrificial layer 12 (steps S101 to S108).

  Next, as shown in FIG. 54B, the sacrificial layer 12 is removed by etching in the same manner as in the fourth modification (step S109).

  Subsequently, as shown in FIG. 54C, a resist film (not shown) is formed on the protective layer 15, and the resist film is patterned into a predetermined shape by photolithography (step S303). The protective layer 15 is dry-etched or wet-etched using the film as a mask to provide a contact hole 15C in the protective layer 15 (step S304).

  Subsequently, as shown in FIG. 54D, the adhesive layer 32 having the convex portions 32C is formed on the relay substrate 31 in the same manner as in the fourth modification, and the electrons on the first substrate 11 are formed on the convex portions 32C. The device 14 is brought into close contact, and the first substrate 11 is separated. Thereby, only the electronic device 14 which contacted the convex part 32C is selectively transferred to the relay substrate 31 (step S501).

  After that, the second substrate 21 is prepared by the process shown in FIG. 7A as in the first embodiment, and the adhesive layer 22 is formed on the surface of the second substrate 21 (step S201). ).

  After the adhesive layer 22 is formed on the second substrate 21, as shown in FIG. 55A, the electronic device 14 on the relay substrate 31 is brought into close contact with the adhesive layer 22 in the same manner as in the fourth modification. After that, when the relay substrate 31 is separated, the electronic device 14 is transferred from the relay substrate 31 to the second substrate 21 as shown in FIG. 55B (step S301). At that time, the electronic device 14 may be fixed in the same manner as in the first embodiment by the steps shown in FIGS. 12 to 14 (step S302).

  The electronic device 14 transferred through the relay substrate 31 in this way has the same positional relationship on the second substrate 21 as that before transfer on the first substrate 11 and is protected. A contact hole 15 </ b> C is provided in the layer 15.

  Subsequently, a chromium (Cr) film (not shown) is formed as a wiring layer on the entire surface of the second substrate 21 by a film forming method such as sputtering or vapor deposition (step S305). The constituent material of the wiring layer may be Al, Cu, Ti or an alloy containing them in addition to chromium.

  After that, a resist film (not shown) is formed on the chromium film, the resist film is patterned into a predetermined shape by photolithography (step S306), and the chromium film is patterned by dry etching or wet etching using the resist film as a mask. Then, as shown in FIG. 55C, the wiring W is formed (step S307).

  As described above, in this embodiment, after the contact hole 15C is provided in the protective layer 15, the electronic device 14 is transferred to the second substrate 21 through the relay substrate 31, and the wiring W is connected to the electronic device 14 through the contact hole 15C. As in the third embodiment or the modified example 4, the positional relationship between the front and back of the electronic device 14 transferred to the second substrate 21 is the state before transfer on the first substrate 11. In addition, the process on the second substrate 21 can be further simplified, and effects such as improvement in yield and productivity, and cost reduction can be obtained.

  The contact hole 15C may be formed before the sacrificial layer 12 is removed by etching. In that case, it is necessary to use a metal electrode material resistant to the etching solution of the sacrificial layer 12.

(Liquid crystal display device)
FIG. 56 illustrates a cross-sectional configuration of a liquid crystal display device configured using an active matrix TFT substrate including the electronic device 14 of the sixth embodiment. This liquid crystal display device is used, for example, as a liquid crystal television, and has a configuration in which a second substrate 21 that is an active matrix TFT substrate and a counter substrate 71 made of glass are arranged to face each other. The periphery of the second substrate 21 and the counter substrate 71 is sealed with a sealant 81, and a liquid crystal layer 82 made of liquid crystal is provided inside. Polarizing plates 83 are provided outside the second substrate 21 and the counter substrate 71, respectively.

  The electronic device 14 according to the sixth embodiment is transferred to the adhesive layer 22 on the surface of the second substrate 21 by the method described in the seventh or eighth embodiment. The electronic device 14 is connected to a wiring W, and a transparent electrode 53 is formed thereon with an interlayer insulating film 52 similar to that in the fourth embodiment interposed therebetween. An alignment film 54 is formed on the surface of the transparent electrode 53.

  On the counter substrate 71, a light shielding film 72 as a black matrix, red, green and blue color filters 73, an overcoat layer 74, a transparent electrode 75 made of ITO, and an alignment film 76 are formed in this order. The transparent electrode 53, the liquid crystal layer 82, and the transparent electrode 75 constitute a liquid crystal display element.

(Ninth embodiment)
FIG. 57 shows a configuration of the transfer electronic device substrate 10 according to the ninth embodiment of the present invention. The transfer electronic device substrate 10 has the same configuration as that of the first embodiment except that the support layer 13 includes a first support layer 13D and a second support layer 13E. Accordingly, the corresponding components will be described with the same reference numerals.

  The first substrate 11, the sacrificial layer 12, the electronic device 14, and the protective layer 15 are the same as those in the first embodiment.

  Similar to the support layer 13 of the first embodiment, the first support layer 13D includes support bodies 13B on both sides of the main body portion 13A. A second support layer 13E and an electronic device 14 are formed on the upper surface of the main body 13A. A gap is formed between the main body portion 13A and the surface of the first substrate 11 by removing the sacrificial layer 12, and the main body portion 13A, the second support layer 13E, and the electronic device 14 thereon are provided. The substrate 13B is held in a hollow state.

  The first support layer 13D desirably has a thickness that allows the support 13B to be easily broken in the transfer process. The second support layer 13E has a total thickness of the main body portion 13A of the first support layer 13D and the thickness of the second support layer 13E with respect to the stress distribution in the layer of the electronic device 14. It is desirable to set the rigidity and thickness so as not to deform. The constituent materials of the first support layer 13D and the second support layer 13E are the same as the constituent materials of the support layer 13 of the first embodiment.

  Such a transfer electronic device substrate 10 can be manufactured, for example, as follows.

  First, similarly to the first embodiment, the sacrificial layer 12, the first support layer 13D, the second support layer 13E, the electronic device 14, and the protective layer 15 are formed on the first substrate 11 (step S101). -Step S106).

  Next, in the same manner as in the first embodiment, a part of the protective layer 15, the second support layer 13E, and the first support layer 13D is removed to expose a part of the sacrificial layer 12 (Step S107, S108). At that time, the second support layer 13E is left only on the upper surface of the sacrificial layer 12, and the first support layer 13D is continuously formed with respect to the electronic device 14 on the second support layer 13E and the surface of the first substrate 11. To a typical shape.

  Subsequently, the sacrificial layer 12 is removed by etching as in the first embodiment (step S109). Thus, the transfer device substrate 10 shown in FIG. 57 is completed.

  In the present embodiment, since the support layer 13 includes the first support layer 13D and the second support layer 13E, by adjusting the thicknesses of the first support layer 13D and the second support layer 13E. The support 13B can be easily broken in the transfer process, and the main body portion 13A and the second support layer 13E of the first support layer 13D are resistant to the stress distribution in the layer of the electronic device 14. It can be made to have rigidity and thickness that do not deform.

  While the present invention has been described with reference to the embodiment, the present invention is not limited to the above embodiment, and various modifications can be made. For example, the material and thickness of each layer, the film formation method, and the film formation conditions described in the above embodiment are not limited, and other materials and thicknesses may be used. It is good also as conditions.

  In the above-described embodiment, the configuration of the electronic device 14 such as a TFT and a capacitor has been specifically described. However, it is not necessary to include all layers, and other layers may be further included.

  Furthermore, the present invention can be applied to a display device using other display elements such as an inorganic electroluminescence element or an electrodeposition type or electrochromic type display element in addition to a liquid crystal display element.

  In addition, as the electronic device 14 to be transferred, in addition to those described in the above embodiment, a diode, a solar power generation element, an imaging device, an IC such as an RFID tag having a large scale circuit, an optical device, A sound wave device such as a microphone may be mentioned, but not limited thereto.

  Furthermore, in the above embodiment, the sacrificial layer 12 is removed as the transfer device substrate 10, and a gap is provided between the lower surface of the main body 13 </ b> A and the surface of the first substrate 11. However, the sacrificial layer 12 may be provided in the distribution or transportation stage, and the sacrificial layer 12 may be removed before transfer.

  In addition, the electronic device 14 on the transfer device substrate 10 may be not only the electronic device 14 manufactured in the first embodiment but also the electronic device 14 manufactured in the second to sixth embodiments.

It is a figure showing the flow of the manufacturing method of the electronic device which concerns on the 1st Embodiment of this invention. It is sectional drawing showing the manufacturing method shown in FIG. 1 in process order. FIG. 3 is a cross-sectional view illustrating a process following FIG. 2. FIG. 4 is a cross-sectional view illustrating a process following FIG. 3. It is the photograph showing the mode of etching of the sacrificial layer which consists of MgO. It is sectional drawing of the 1st board | substrate before sacrificial layer removal, a photograph, and the photograph which expanded the part. It is sectional drawing of the 1st board | substrate before completion of transcription | transfer after a sacrificial layer removal, a photograph, and the photograph which expanded the one part. It is sectional drawing of the 2nd board | substrate after transcription | transfer, a photograph, and the photograph which expanded the part. It is sectional drawing showing the other example of an electronic device. It is sectional drawing showing the further another example of an electronic device. It is sectional drawing showing the further another example of an electronic device. It is a figure for demonstrating an example of the fixing method to the 2nd board | substrate of an electronic device. It is a figure for demonstrating the other example of the fixing method to the 2nd board | substrate of an electronic device. It is a figure for demonstrating the further another example of the fixing method to the 2nd board | substrate of an electronic device. It is a figure showing the flow of the manufacturing method of the electronic device which concerns on the 2nd Embodiment of this invention. It is sectional drawing showing the manufacturing method shown in FIG. 15 in order of a process. It is a figure for demonstrating the application example of the manufacturing method shown in FIG. It is sectional drawing showing the modification 1 in process order. It is sectional drawing showing the modification 2 in process order. It is sectional drawing showing the modification 3 in process order. FIG. 21 is a cross-sectional diagram illustrating a process following the process in FIG. 20. FIG. 22 is a cross-sectional diagram illustrating a process following the process in FIG. 21. FIG. 23 is a cross-sectional diagram illustrating a process following the process in FIG. 22. It is sectional drawing for demonstrating the structure of a support body. It is a figure showing the flow of the manufacturing method of the electronic device which concerns on the 3rd Embodiment of this invention. FIG. 26 is a cross-sectional view illustrating the manufacturing method illustrated in FIG. 25 in the order of steps. It is a figure showing the flow of the manufacturing method of the modification 4. It is sectional drawing showing the modification 4 in process order. FIG. 29 is a cross-sectional diagram illustrating a process following the process in FIG. 28. It is a figure showing the flow of the manufacturing method of the electronic device which concerns on the 4th Embodiment of this invention. It is a figure showing the flow of the electronic device formation process shown in FIG. FIG. 32 is a cross-sectional view illustrating the manufacturing method illustrated in FIGS. 30 and 31 in order of steps. FIG. 33 is a cross-sectional diagram illustrating a process following the process in FIG. 32. FIG. 34 is a cross-sectional diagram illustrating a process following the process in FIG. 33. FIG. 35 is a cross-sectional diagram illustrating a process following the process in FIG. 34. FIG. 36 is a cross-sectional diagram illustrating a process following the process in FIG. 35. FIG. 37 is a cross-sectional diagram illustrating a process following the process in FIG. 36. FIG. 38 is a top view corresponding to FIG. 37B and an enlarged top view showing a part thereof. FIG. 39 is a top view illustrating a process following the processes in FIGS. 37 and 38. FIG. 40 is a top view illustrating a process following the process in FIG. 39. It is sectional drawing showing the manufacturing method of the electronic device which concerns on the 5th Embodiment of this invention in order of a process. FIG. 42 is a cross-sectional diagram illustrating a process following the process in FIG. 41. FIG. 43 is a cross-sectional diagram illustrating a process following the process in FIG. 42. It is sectional drawing showing the manufacturing method of the electronic device which concerns on the 6th Embodiment of this invention in process order. FIG. 45 is a cross-sectional diagram illustrating a process following the process in FIG. 44. FIG. 46 is a cross-sectional diagram illustrating a process following the process in FIG. 45. FIG. 47 is a cross-sectional diagram illustrating a process following the process in FIG. 46. FIG. 48 is a cross-sectional view and a top view illustrating a process following the process in FIG. 47. FIG. 49 is a top view illustrating a process following the process in FIG. 48. It is a figure showing the flow of the manufacturing method of the electronic device which concerns on the 7th Embodiment of this invention. It is sectional drawing showing the manufacturing method shown in FIG. 50 to process order. FIG. 52 is a cross-sectional diagram illustrating a process following the process in FIG. 51. It is a figure showing the flow of the manufacturing method of the electronic device which concerns on the 8th Embodiment of this invention. FIG. 54 is a cross-sectional view illustrating the manufacturing method illustrated in FIG. 53 in order of steps. FIG. 55 is a cross-sectional diagram illustrating a process following the process in FIG. 54. It is sectional drawing showing the structure of the liquid crystal display device to which this invention is applied. It is sectional drawing showing the modification of FIG.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... Electronic device board | substrate for transfer, 11 ... 1st board | substrate, 12 ... Sacrificial layer, 13 ... Support layer, 13A ... Main-body part, 13B ... Support body, 13C ... Contact hole, 14 ... Electronic device, 15 ... Protective layer, 21 2nd substrate 22, 32 ... Adhesive layer, 23 ... Transfer inhibiting film, 31 ... Relay substrate, 41 ... Gate electrode, 42 ... Insulating film (gate insulating film), 52 ... Interlayer insulating film, 53 ... Transparent electrode, 61 ... Common electrode

Claims (22)

Forming a sacrificial layer made of at least one of an alkali metal oxide and an alkaline earth metal oxide on a part of the first substrate;
Forming a support layer covering at least the sacrificial layer;
Forming an electronic device on the sacrificial layer with the support layer in between;
Exposing a portion of the sacrificial layer by removing a portion of the support layer;
And a step of removing the sacrificial layer. After the step of removing the sacrificial layer, the method includes the step of transferring the electronic device to the second substrate by bringing the electronic device into close contact with an adhesive layer provided on the surface of the second substrate. The manufacturing method of the electronic device of Claim 1. The method of manufacturing an electronic device according to claim 2, wherein a plurality of the electronic devices are formed, and a part of the plurality of electronic devices is selectively transferred to the second substrate. The method for manufacturing an electronic device according to claim 3, wherein in the step of removing the sacrificial layer, a sacrificial layer of a device to be transferred to the second substrate is removed. 4. The electronic device according to claim 3, wherein the adhesive layer is made of an ultraviolet curable resin, and the adhesiveness of the adhesive layer is lost by irradiating ultraviolet light to a region other than the region to which the electronic device is transferred. Production method. The method for manufacturing an electronic device according to claim 3, wherein unevenness is formed on the adhesive layer, and the electronic device is transferred to a convex portion of the adhesive layer. The method for manufacturing an electronic device according to claim 3, wherein a transfer inhibition film is formed in a region on the adhesive layer where the electronic device is not transferred. Transferring the electronic device to the second substrate;
Transferring the electronic device from the first substrate to the relay substrate by bringing the electronic device into close contact with the relay substrate having an adhesive layer on the surface;
4. The method according to claim 2, further comprising: transferring the electronic device from the relay substrate to the second substrate by bringing the electronic device into close contact with a second substrate having an adhesive layer on a surface thereof. Electronic device manufacturing method. The method of manufacturing an electronic device according to claim 8, wherein a plurality of the electronic devices are formed, and a part of the plurality of electronic devices is selectively transferred to the relay substrate. The method for manufacturing an electronic device according to claim 9, wherein in the step of removing the sacrificial layer, a sacrificial layer of a device to be transferred to the relay substrate is removed. The method for manufacturing an electronic device according to claim 9, wherein unevenness is formed on the adhesive layer of the relay substrate, and the electronic device is transferred to a convex portion of the adhesive layer. 12. The method according to claim 2, further comprising: providing a contact hole in the support layer after transferring the electronic device to the second substrate, and connecting a wiring to the electronic device through the contact hole. The manufacturing method of the electronic device of any one of Claims 1. In the step of forming an electronic device on the support layer, a protective layer is formed on the electronic device,
12. The method according to claim 8, further comprising: a step of providing a contact hole in the protective layer after transferring the electronic device to the second substrate, and connecting a wiring to the electronic device through the contact hole. The manufacturing method of the electronic device of any one of Claims 1. In the step of forming an electronic device on the support layer, a protective layer is formed on the electronic device, a contact hole is provided in the protective layer,
The electronic device according to any one of claims 8 to 11, further comprising a step of connecting a wiring to the electronic device through the contact hole after the electronic device is transferred to the second substrate. Manufacturing method. The method of manufacturing an electronic device according to claim 12, wherein an intersection of the wiring is formed in the step of forming the electronic device. Forming a first support layer and a second support layer covering at least the sacrificial layer in the step of forming the support layer;
In the step of removing a part of the support layer to expose a part of the sacrificial layer, the second support layer is left only on the upper surface of the sacrificial layer, and the first support layer is The method of manufacturing an electronic device according to claim 1, wherein the electronic device is formed in a continuous shape with respect to the electronic device on the support layer and the surface of the first substrate. An electronic device substrate for transfer in which an electronic device is formed on a first substrate,
The electronic device is formed on a support layer;
The support layer is
A main body formed away from the surface of the first substrate and having the electronic device formed on the upper surface;
An electronic device substrate for transfer, comprising: a support body formed between the main body and the surface of the first substrate. A plurality of the electronic devices;
The sacrificial layer that can be removed by etching is provided between the lower surface of the main body and the surface of the first substrate for at least one of the plurality of electronic devices. Electronic device substrate for transfer. The electronic device substrate for transfer according to claim 18, wherein a gap is provided between a lower surface of the main body portion and a surface of the first substrate except for the sacrificial layer among the plurality of electronic devices. . The electronic device substrate for transfer according to any one of claims 17 to 20, wherein the electronic device includes an intersection of wirings. A display device comprising an electronic device and a display element on a second substrate,
A support layer is formed on one surface of the electronic device, and a protective layer is formed on the other surface;
A display device, wherein a wiring is connected to the electronic device through a contact hole provided in the support layer or the protective layer. In the electronic device, a sacrificial layer made of at least one of an alkali metal oxide and an alkaline earth metal oxide is formed on a part of the first substrate, and a support layer covering at least the sacrificial layer is formed. An electronic device is formed on the sacrificial layer with the support layer in between, a part of the support layer is removed to expose a part of the sacrificial layer, and after the sacrificial layer is removed, the second The display device according to claim 21, wherein the display device is formed by transferring to a substrate.

Images