JP2009055065A - Electrooptical device, and electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To propose a panel structure of an electrooptical device which achieves correct tone display. <P>SOLUTION: The electrooptical device includes a pixel electrode 27, a common electrode, and an electrooptical element driven by electric power supplied via the pixel electrode 27 and common electrode. The pixel electrode 27 is provided with a connection region to which connection wiring for electrically connecting the pixel electrode 27 to power supply potential, and an arrangement region where a functional layer in which at least a part region of regions other than the connection region constitutes the electrooptical element is arranged. This type of configuration can uniform the film thickness of an emission layer on the pixel electrode 27 and can effectively suppress generation of uneven brightness. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an electro-optical device having a panel structure excellent in light extraction efficiency.

FIG. 7 is an explanatory diagram of a pixel layout of an active matrix organic EL display adopting a bottom emission structure. In the figure, a pixel 10 is used for supplying a forward bias current (drive current) to the light emitting unit OLED by receiving power from the light emitting unit OLED made of organic EL elements that emit light in RGB three primary colors and the power supply line _Vdd . and driving transistors Tr1, a switching transistor Tr2 and Tr3 to be turned on / off controlled by the write control line V _sel, the switching transistor Tr4 is turned on / off controlled by the light emission control line V _gp, supplied via the data line I _dat A holding capacitor C that holds a voltage corresponding to the data signal is provided. The gate terminals of the switching transistors Tr2 and Tr3 are both connected to the write control line _Vsel , and the source terminal of the switching transistor Tr2 is connected to the drain terminal of the switching transistor Tr3.

  Each of these elements is stacked in a plurality of layers by a thin film manufacturing process, and a bank layer (not shown) for partitioning the light emitting unit OLED formed in each pixel is stacked on the uppermost layer of the vice layer. ing. A bank opening h1 is formed in the bank layer so as to open on the transparent pixel electrode (anode) 38, and a hydrophilic control film formed under the bank layer is opened in the opening h1. . The substantially circular hydrophilic control film opening h2 is filled with a light emitting layer formed by an ink jet method or the like to form a light emitting unit OLED. Although not shown in the figure, a cathode as a common electrode of each pixel is formed on the upper layer of the bank layer. In this specification, for convenience of explanation, regarding the relative positional relationship of individual layers stacked on a substrate, a cathode side layer is referred to as an upper layer, and a substrate side layer is referred to as a lower layer (embodiments of the present invention described later) The same applies to the above).

In the above configuration, at the time of writing the data signal to the pixel, the switching transistors Tr2 and Tr3 are both opened by the selection signal supplied from the write control line _Vsel , and the data signal corresponding to the light emission gradation is stored in the storage capacitor C. Is written to. The switching transistor Tr4 is opened by a selection signal supplied from the light emission control line _Vgp during light emission, and supplies the drive current output from the drive transistor Tr1 to the light emitting unit OLED by the voltage held in the holding capacitor C. In the figure, assuming that a cathode is formed on the front side of the paper surface and a transparent substrate is disposed on the back side, in the bottom emission structure, it is necessary to emit light from the transparent substrate side. It is necessary to design the pixel layout so that transistors, power supply wirings, storage capacitors, and the like are not arranged below the OLED.

  For this reason, in the example shown in the figure, the side surface shape of the storage capacitor C composed of two metal layers is patterned into a polygonal shape in accordance with the shape of the peripheral portion of the substantially circular light emitting unit OLED, and the film thickness of the device layer It is designed so that the projected portions of the storage capacitor C and the light emitting unit OLED on the projection plane orthogonal to the direction do not overlap. Further, a contact hole is opened at a corner position h3 of the transparent pixel electrode 38, and a contact between the source metal of the switching transistor Tr4 and the transparent pixel electrode 38 is secured at a position where the light emitting portion OLED is not formed.

  In addition to the prior art shown in the figure, Japanese Patent Application Laid-Open No. 11-24606 (Patent Document 1) discloses a display device aimed at improving low power consumption and luminous efficiency by optimizing the wiring layout. Has been.

Japanese Patent Laid-Open No. 11-24606

However, when the source metal of the switching transistor Tr4 and the transparent pixel electrode 38 are made conductive, if the two are made conductive through a contact hole opened in the lower layer of the transparent pixel electrode 38, a step is likely to occur in the transparent pixel electrode 38 at the contact portion. Further, since the thickness of the light emitting layer formed on the upper layer becomes non-uniform, the current distribution in the light emitting layer is biased, and uneven brightness tends to occur. Further, since the data line I _dat is a signal line for transmitting an analog current signal that bears the light emission gradation, if the data line I _dat is laid at a position where parasitic capacitance is easily formed with the storage capacitor C, the data to the storage capacitor C is stored. Insufficient signal writing occurs, making accurate gradation display difficult.

  Accordingly, an object of the present invention is to provide a panel substrate and an electro-optical device having a panel structure for realizing accurate gradation display. More specifically, an object of the present invention is to provide a panel substrate and an electro-optical device having a panel structure that can make the thickness of the functional layer constituting the electro-optical element as uniform as possible. It is another object of the present invention to provide an electro-optical device having a panel structure in which unnecessary parasitic capacitance is hardly formed on a data line. Another object of the present invention is to provide a panel substrate and an electro-optical device having a panel structure suitable for a large display.

  In order to solve the above problems, an electro-optical device according to the present invention includes a pixel electrode, a common electrode, and an electro-optical element driven by power supplied through the pixel electrode and the common electrode. The pixel electrode is provided with a connection region to which a connection wiring for electrically connecting the pixel electrode and a power supply potential is connected, and at least a part of the region other than the connection region is electro-optic. An arrangement region is provided in which functional layers constituting the element are arranged.

  The step where the connection wiring is electrically connected to the pixel electrode is likely to have a step due to the influence of a contact hole or the like. However, by forming an electro-optic element on the pixel electrode arrangement region, the thickness of the functional layer is made uniform. Can be. Thereby, luminance unevenness due to non-uniform film thickness can be reduced.

  In particular, in the bottom emission structure, since light is emitted from the pixel electrode side toward the lower layer, other electronic elements and wiring cannot be freely laid out below the pixel electrode, and the area of the pixel electrode is structurally small. Easy to be. When forming an electro-optical element on such a pixel electrode, it is preferable to form the electro-optical element in a region other than the connection region of the pixel electrode.

  On the other hand, in the top emission structure, since light is emitted from the common electrode side toward the upper layer direction, other electronic elements and wirings can be freely laid out below the pixel electrode, and the area of the pixel electrode can be increased. In addition, by adopting the configuration of the present invention, the aperture ratio can be increased and the thickness of the functional layer constituting the electro-optic element can be made uniform, so that a high-definition display can be realized.

  Here, the “pixel region” refers to a region in which one or more electronic elements for forming a pixel that is a basic unit of light emitting display are formed, and is a single light emitting element as in passive matrix driving. When a pixel is configured, a region including the light-emitting element corresponds to the pixel region, and when one pixel is configured with a light-emitting element and an active element as in an active matrix display, the light-emitting element and the active element are active. A region including an element corresponds to a pixel region. In the case where the electronic elements constituting the pixel are formed in different layers, the electronic element forming region in each layer is included.

  An “electro-optical element” is an electronic element that changes the optical state of light by electrical action. In addition to a self-luminous element such as an electroluminescent element, a light deflection state such as a liquid crystal element. The electronic element which displays a gradation by changing is included. The “pixel electrode” refers to an individual electrode formed in each pixel region, and the “common electrode” refers to an electrode common to a plurality of pixel regions. The “functional layer” refers to a device layer for realizing the function (electro-optical effect) of the electro-optical element, and includes a case where it is formed in one or more layers. For example, in the case of an electroluminescent element, it includes at least a light emitting layer, and further includes device layers such as a hole transport layer and an electron transport layer as necessary. In the present specification, the simple description of “element” means “electronic element” unless otherwise specified.

  Preferably, the pixel electrode is a reflective electrode, and the common electrode is a light transmissive electrode. With this configuration, a so-called top emission structure in which emitted light is extracted from the common electrode side can be realized. With the top emission structure, the layout of the electronic elements in the pixel region can be freely designed, so that the aperture ratio can be increased. Here, the “reflective electrode” is an electrode for reflecting at least a part of the light emitted from the electro-optic element and emitting the light to the common electrode side. The “light transmissive electrode” is a light transmissive electrode that transmits at least part of the light emitted from the electro-optic element, and has a transmittance that satisfies the performance required for a display. Is desirable. Examples of such an electrode include not only an electrode made of a light transmissive material such as indium tin oxide alloy (ITO) but also a translucent metal electrode that has been thin-film-treated to the extent that it has a desired light transmittance. There may be.

  Preferably, the electro-optical element is a light emitting element including a light emitting layer. According to such a light emitting element, the light emission gradation can be electrically controlled. In particular, in the case of a current-driven light-emitting element, it is necessary to make the current distribution in the light-emitting layer uniform in order to suppress luminance unevenness. By forming the light-emitting element in a region other than the connection region, light emission The layer thickness can be made uniform.

  Preferably, the pixel electrode region further includes a bank layer formed so as to separate adjacent pixel electrodes and covering the connection region, and the region of the pixel electrode in which the bank layer is not formed includes the functional layer. Is the arrangement area where the By providing the connection region at a position covered by the bank layer, the occupation area of the electro-optical element is ensured as large as possible, and the dead space can be effectively used while increasing the aperture ratio. In particular, in the case of a bottom emission structure, the size of the pixel electrode is likely to be limited. Therefore, the connection region is preferably near the outer edge of the pixel electrode. According to the top emission structure, the aperture ratio can be further increased.

  Preferably, a flattened film that has been flattened is included as a base layer of the pixel electrode. By forming the pixel electrode on the planarization film, the unevenness of the pixel electrode can be reduced, and the thickness of the functional layer of the electro-optic element stacked on top of it can be made uniform. Display is possible. In addition, by reducing the unevenness of the pixel electrode, disconnection from the connection wiring in the connection region can be effectively reduced. In particular, in the case of the top emission structure, the material of the thin film laminated under the pixel electrode is not limited. convenient.

  Preferably, an active element that supplies a drive current to the electro-optical element and a storage capacitor that holds a control voltage for driving the active element are formed, and the storage capacitor is formed flat via an insulating layer The capacitor is composed of two metal layers, the planarizing film is formed on the storage capacitor, and the connection wiring and the pixel electrode are connected to each other through a contact hole opened in the planarizing film. Conduction is conducted in the connection region.

  By forming the storage capacitor from two metal layers, it is possible to improve the flatness of the planarization film formed on the upper layer of the storage capacitor, and by using the step of the storage capacitor, the connection wiring and the pixel Convenient for making electrode contact. In particular, in the top emission structure, a storage capacitor, a planarization film, and the like can be laid out freely below the pixel electrode. Therefore, the flatness of the pixel electrode can be improved by devising the layout position of the storage capacitor.

  Preferably, the pixel electrode and the arrangement region have different shapes. With this configuration, the connection region can be provided in a region on the pixel electrode where the opening of the bank layer is not formed.

  Preferably, the pixel electrode is formed in a rectangular shape, and the arrangement region is formed in an oval shape. By making the arrangement region into an oval shape, the dead space of the rectangular pixel electrode can be effectively used, and the aperture ratio can be increased. Further, by making the opening of the bank layer into an oval shape, the light emitting layer can be uniformly filled with a liquid material, and the current distribution in the light emitting layer can be made uniform.

  Preferably, the pixel electrode occupies 60% or more of the pixel area. In the top emission structure, the size of the pixel electrode can be designed to be approximately the same as the size of the pixel region, so that the aperture ratio can be increased.

  Preferably, an active element that supplies a drive current to the electro-optic element, a storage capacitor that holds a control voltage of the active element, and a data line that transmits an analog current signal for storing the control voltage in the storage capacitor In addition, the layout position of the data line is determined so that most of the projected portion of the data line on the projection plane orthogonal to the film thickness direction of the functional layer does not overlap with the projected portion of the pixel electrode with respect to the projection plane. By defining the layout position of the data line in this way, the parasitic capacitance between the data line and the pixel electrode is reduced as much as possible, and insufficient writing of the data signal to the storage capacitor is suppressed, thereby realizing an accurate light emission gradation. it can.

  Preferably, the data line is laid out so that a projection position of the center line of the data line on the projection plane exists between projection positions of adjacent pixel electrodes on the projection plane. By laying out in this way, the parasitic capacitance formed between the pixel electrode and the data line can be reduced as much as possible.

  Preferably, the electro-optic element is an electroluminescence element having the pixel electrode as an anode and the common electrode as a cathode. By using an electroluminescence element, a current-driven light-emitting element that emits light by current drive can be obtained.

  The panel substrate of the present invention is a panel substrate having a plurality of pixel electrodes, and each of the plurality of pixel electrodes is connected to a connection wiring for electrically connecting each pixel electrode to a power supply potential. And an insulating layer that separates the plurality of pixel electrodes from each other, and each pixel electrode includes an opening region in which the insulating layer is not disposed. ing.

  A portion where the connection wiring is electrically connected to the pixel electrode is likely to have a step due to an influence of a contact hole or the like, but a region covered with an insulating layer among regions on the pixel electrode does not contribute to electro-optical display. By providing a connection region for electrically connecting the connection wiring and the pixel electrode in the region, it is possible to ensure flatness of a region where the insulating layer is not covered (region contributing to electro-optical display).

  In order to realize a top emission structure electro-optical device using the panel substrate of the present invention, it is desirable that the pixel electrode is formed of a reflective electrode. Further, it is desirable that the shape of the pixel electrode and the shape of the region where the insulating layer is not formed are different from each other. For example, the former shape is rectangular and the latter shape is oval. Is desirable. With such a shape, it is possible to provide the connection region using the dead space of the pixel electrode.

  The panel substrate of the present invention further includes an active element that supplies a drive current to the electro-optic element, and a storage capacitor that holds a control voltage for driving the active element, and the storage capacitor is an insulating layer. The planarizing film is formed on an upper layer of the storage capacitor, and is formed through a contact hole opened in the planarizing film. The connection wiring and the pixel electrode may be electrically connected in the connection region.

  By forming the storage capacitor from two metal layers, it is possible to improve the flatness of the planarization film formed on the upper layer of the storage capacitor, and by using the step of the storage capacitor, the connection wiring and the pixel Convenient for making electrode contact. In particular, in the top emission structure, a storage capacitor, a planarization film, and the like can be laid out freely below the pixel electrode. Therefore, the flatness of the pixel electrode can be improved by devising the layout position of the storage capacitor.

  In the panel substrate of the present invention, an active element that supplies a drive current to the electro-optic element, a storage capacitor that holds a control voltage of the active element, and a storage voltage for storing the control voltage in the storage capacitor Including a data line for transmitting an analog current signal, and the projection part of the data line onto the projection plane orthogonal to the film thickness direction of the functional layer does not overlap the projection part of the pixel electrode with respect to the projection plane. Determine the layout position of the data lines. By defining the layout position of the data line in this way, the parasitic capacitance between the data line and the pixel electrode is reduced as much as possible, and insufficient writing of the data signal to the storage capacitor is suppressed, thereby realizing an accurate light emission gradation. it can.

  Preferably, the data line is laid out so that a projection position of the center line of the data line on the projection plane exists between projection positions of adjacent pixel electrodes on the projection plane. By laying out in this way, the parasitic capacitance formed between the pixel electrode and the data line can be reduced as much as possible.

  The electro-optical device of the present invention is an electro-optical device on which the panel substrate of the present invention is mounted, and has a structure in which a functional layer is disposed on the opening region of the pixel electrode. Since the connection region is not formed in the opening region, the flatness of the opening region can be ensured, and further, the thickness of the functional layer and the emission luminance can be made uniform.

  The electronic apparatus of the present invention includes the electro-optical device of the present invention. The electronic device is not particularly limited as long as it includes a display device. For example, a mobile phone, a video camera, a personal computer, a head mounted display, a projector, a fax device, a digital camera, a portable TV, a DSP device, a PDA, It can be applied to electronic notebooks.

  Hereinafter, this embodiment will be described with reference to the drawings.

  FIG. 1 is an overall configuration diagram of an active matrix organic EL display panel 100 of the present embodiment. As shown in the figure, the display panel 100 scans on a substrate 20 connected to a display region 11 including a plurality of pixels 10 arranged in a matrix of M rows and N columns and a group of pixels 10 arranged in the row direction. The scanning line driver 12 outputs a scanning signal to a line, and the data line driver 13 supplies a data signal to a data line connected to a group of pixels 10 arranged in the column direction. Each pixel 10 is formed with an organic EL element that emits light in RGB three primary colors. A transparent cathode 31 as a common electrode is formed on the entire surface of the display area 11 and is connected to an external circuit through a cathode extraction electrode 36. The transparent cathode 31 is a light-transmitting conductive electrode, and a material is used so that light emitted from the organic EL element can be transmitted. As such a material, in addition to a light-transmitting conductive material such as ITO, a conductive translucent metal layer obtained by thin-film treatment of a metal thin film such as calcium, lithium, or aluminum can be used. By using the conductive semi-transparent metal layer, the area resistance of the cathode is reduced, and the current distribution in the pixel region 11 is made uniform, whereby uneven emission of the organic EL element can be prevented. The material used for the transparent cathode 31 is preferably a material that can inject as many electrons as possible into the organic EL element, that is, a material having a low work function.

  In this specification, an area where the pixel 10 is formed is referred to as a “pixel area”. The meaning of the “pixel region” is as described above. In the case of the active matrix driving method using a transistor as in the present embodiment, various electronic elements (organic EL elements) for forming one pixel are used. , A drive transistor, a switching transistor, and a storage capacitor) corresponds to a “pixel region”.

FIG. 3 is a plan view for explaining the layout of each element in the pixel 10. The pixel 10 is supplied with power from a light emitting unit OLED composed of organic EL elements, a holding capacitor C that holds a voltage corresponding to a current signal supplied via a data line I _dat , and a power supply line V _dd. Te and the driving transistor Tr1 for supplying a drive current to the light-emitting portion OLED, a switching transistor Tr2 and Tr3 to be turned on / off controlled by the write control line V _sel, a switching transistor which is turned on / off controlled by the light emission control line V _gp Tr4 is comprised. Each of these elements is laminated in a plurality of layers on the substrate 20 by a thin film manufacturing process to form a device layer. For convenience of explanation, although not shown in the figure, a bank layer for partitioning the light emitting unit OLED formed in each pixel 10 is laminated on the upper layer of the device layer. The bank layer refers to a partition member for partitioning so as to separate the light emitting units OLED formed in each pixel 10 and is made of an insulating material. The bank layer covers the vicinity of the outer edge of the pixel electrode 27 (a region including a contact hole h3 to be described later), and a bank opening h1 having an oval shape is formed so that a part of the pixel electrode 27 is exposed on the surface. Has been. Further, in the opening h1, a hydrophilic control film formed in the lower layer of the bank layer is opened in an oval shape to form an opening h2. The opening h2 is filled with a hole transport layer and a light emitting layer (not shown in the drawing) formed by an ink jet method or the like, and constitutes a light emitting unit OLED. Although not shown in the figure, a transparent cathode having light transmittance is formed on the upper layer of the bank layer. Since the functional layer (device layer) constituting the organic EL element is formed in the region of the pixel electrode 27 exposed on the surface in the opening h1, the region may be referred to as an arrangement region in this specification.

  In the figure, it is assumed that a transparent cathode is formed on the front side of the paper surface and a substrate is disposed on the back side of the paper surface. In the top emission structure, since it is configured to emit light from the transparent cathode side, there is no influence of light irradiation even if a transistor, a scanning line, a power supply wiring, etc. are arranged under the light emitting unit OLED, A large occupied area of the light emitting unit OLED can be secured, and the aperture ratio can be increased. In addition, since there are few restrictions on the layout and planar shape of each element, it is possible to increase the degree of freedom in designing the pixel layout as compared with the bottom emission structure. For this reason, in this embodiment, the area occupied by the pixel electrode 27 is designed to be slightly smaller than the area occupied by the pixel 10 so that the reflective electrode 27 occupies most of the pixel 10. In order to obtain a high aperture ratio while ensuring a reliable electrical connection in the connection region between the source metal of the switching transistor Tr4 and the pixel electrode 27, the connection region is provided at a position covered by the bank layer, and the reflective pixel electrode The occupied area of 27 preferably occupies 60% or more of the occupied area of the pixel 10, more preferably 70% or more, and even more preferably 80% or more.

As shown in the figure, when the size of the pixel electrode 27 is made as large as possible to fit within the pixel 10, the laying position of the data line I _dat becomes a problem. Under the pixel electrode 27 laying position of the data line I _dat, i.e., the projection most of the projection portion of the data line I _dat of the projection plane perpendicular to the thickness direction of the device layer to the projection surface of the pixel electrode 27 If the layout overlaps with the portion, a parasitic capacitance is generated between the data line I _dat and the pixel electrode 27 via the interlayer insulating film, and there is insufficient data writing when data is written to the storage capacitor C. Cause. If insufficient data writing occurs, accurate gradation display cannot be performed, and the display performance of the display deteriorates. In order to solve this, if a desired voltage is charged to the storage capacitor C including the parasitic capacitance, the power load of the data line driver 13 increases. As the display becomes larger, the parasitic capacitance also increases, so the load on the data line driver 13 increases further, making it difficult to realize a large display. In view of such circumstances, in this embodiment, the laying position of the data line I _{dat is} a position where parasitic capacitance is difficult to form as much as possible, for example, as shown in FIG. In this gap, the projection of the data line I _dat onto the projection plane of the pixel electrode 27 is projected on the projection plane, which is laid in parallel with the long side of the electrode 27 and orthogonal to the film thickness direction of the device layer. Lay out so as not to overlap. That is, it is desirable that the layout is such that the projection position of the center line of the data line I _{dat on} the projection plane exists between the projection positions of the adjacent pixel electrodes 27 on the projection plane. Thereby, while increasing the aperture ratio of the display, the generation of the parasitic capacitance between the data line I _dat and the pixel electrode 27 is reduced as much as possible, and a large display can be realized. In particular, in the top emission structure, since the pixel electrode 27 can be formed in a region that occupies most of the pixel region, the layout position of the data line I _dat is preferably near the boundary between adjacent pixel regions. In particular, it is desirable to lay out the projection portion of the data line I _{dat on} the projection plane so as not to completely overlap the projection portion of the pixel electrode 27 onto the projection plane. However, in the positional relationship with other elements and wirings. Since it may be difficult to lay out so as not to overlap completely, even if there is some overlap, there is no problem if the influence of parasitic capacitance is negligible.

  In the present invention, the planarizing film serving as the base of the pixel electrode 27 is provided with a contact hole h3 for conducting the source metal of the switching transistor Tr4 and the pixel electrode 27 in a region other than the arrangement region. Open in. When the contact hole h3 is opened in the lower layer of the arrangement region, a step is generated in the pixel electrode 27 in the contact portion, and the film thickness of the light emitting layer laminated on the upper layer becomes non-uniform. Distribution is not uniform. Since the uneven current distribution appears as uneven brightness, the display performance of the display deteriorates. Therefore, the position where the contact hole h3 is opened is preferably a position where it can be electrically connected to the pixel electrode 27 other than the arrangement region, for example, the vicinity of the outer edge of the pixel electrode 27 as shown in FIG. It is desirable to select Since various functional layers constituting the light emitting unit OLED are not stacked in the region covered with the bank layer, it is possible to prevent a step in the light emitting unit OLED as much as possible by providing a connection region in the region.

  When the planar shape of the light emitting unit OLED and the planar shape of the pixel electrode 27 are different from each other, for example, when the former is an oval and the latter is a rectangular shape, the corner position of the pixel electrode 27 is a region where the light emitting unit OLED is not formed, It becomes a dead space. By providing the opening position of the contact hole h3 on the dead space, the dead space can be effectively used, and the thickness of the light emitting layer formed on the pixel electrode 27 can be made uniform. Can be obtained. In this specification, the region of the pixel electrode 27 corresponding to the opening position of the contact hole h3 is referred to as a connection region. When the shape of the pixel electrode 27 is a rectangle (rectangle), a rectangular corner or the like is preferable as the connection region.

FIG. 2 is a diagram showing the main circuit configuration of a pixel, which employs a circuit configuration called a current programming method. In the figure, the drive transistor Tr1 is a p-channel FET, and the switching transistors Tr2 to Tr4 are n-channel FETs. The source terminal of the driving transistor Tr1 while connected to the power supply line V _dd, the holding capacitor C is formed between the gate terminal and the power supply line V _dd. The source terminal of the switching transistor Tr4 is connected to the anode of the light emitting unit OLED, while the drain terminal is connected to the drain terminal of the drive transistor Tr1. The gate terminal is connected to the light emission control line V _gp . The drain terminal of the switching transistor Tr2 is connected to the storage capacitor C and the gate terminal of the drive transistor Tr1, and the source terminal thereof is connected to the drain terminal of the switching transistor Tr3 and the drain terminal of the switching transistor Tr4. The gate terminals of the switching transistors Tr2 and Tr3 are both connected to the write control line _Vsel , and the data signal supplied from the current source 37 via the data line _Idat can be written to the storage capacitor C.

In the above circuit configuration, in order to cause the light emitting unit OLED to emit light, the write control line V _{sel is set} to the selected state and the light emission control line V _{gp is set} to the non-selected state in the programming period as a preparation for the light emitting operation. Thus, the switching transistors Tr2 and Tr3 are opened, and the switching transistor Tr4 is closed. During this period, a data signal corresponding to the light emission gradation is written in the storage capacitor C. In the subsequent light emission period, the write control line V _sel is not selected, while the light emission control line V _gp is selected, thereby closing the switching transistors Tr2 and Tr3 and opening the switching transistor Tr4. And At the same time, the supply of the data signal from the constant current source 37 is cut off. Then, the voltage stored in the storage capacitor C is applied between the gate and source of the drive transistor, and the drive current I _d corresponding to the data signal is supplied to the light emitting unit OLED.

  Note that the gate terminal of the switching transistor Tr2 is configured as a multi-gate type, and is designed so that charges accumulated in the storage capacitor C do not leak through the switching transistor Tr2. If a leak current occurs, the gate / source voltage of the drive transistor Tr1 cannot be adjusted accurately, and thus the luminance of the light emitting unit OLED varies. However, the above configuration makes it possible to reduce the leak current. In addition, with the multi-gate structure, it is possible to reduce the variation of the holding voltage in the holding capacitor C as much as possible without changing the occupied area of the transistor.

FIG. 4 is a cross-sectional structural view of the light emitting unit OLED, and corresponds to a cross-sectional view taken along line AA in FIG. As shown in the figure, on the substrate 20, a base protective film 21, a gate insulating film 22, a data line I _dat , a gate metal 23, a first interlayer insulating film 24, a source metal 25, a second interlayer insulating film 26, A source metal 35, a planarization film 37, a hydrophilic control film 32, a pixel electrode 27, a bank layer 30, a hole transport layer 33, a light emitting layer 34, and a transparent cathode 31 are stacked. The light emitting unit OLED is an organic EL element including a pixel electrode 27, a hole transport layer 33, a light emitting layer 34, and a cathode 31. The pixel electrode 27 has a two-layer laminated structure including a reflective electrode 28 and an anode 29, and reflects light emitted from the light emitting unit OLED by the reflective electrode 28 and emits light from the cathode 31 side. Yes. As the reflective electrode 28, for example, aluminum is suitable. The anode 29 is not limited to a light transmissive material such as ITO, but may be a non-light transmissive material such as tin oxide (NESA), gold, silver, platinum, or copper. Each of the gate metal 23 and the source metal 25 is connected to the gate terminal and the source terminal of the drive transistor Tr1. The source metal 35 is connected to the source terminal of the switching transistor Tr4.

In the present embodiment, the structure of the light emitting unit OLED is exemplified by a layer structure of transparent cathode / light emitting layer / hole transport layer / reflective pixel electrode, but is not limited thereto, and the transparent cathode / light emitting layer / reflective pixel electrode, The layer structure may be transparent cathode / electron transport layer / light emitting layer / reflective pixel electrode, transparent cathode / electron transport layer / light emitting layer / hole transport layer / reflective pixel electrode, or the like. That is, the hole transport layer and the electron transport layer are not necessarily essential, and these functional layers can be arbitrarily added. As the hole transport layer, a triphenylamine derivative (TPD), a hydrazine derivative, an arylamine derivative, or the like can be used. As the electron transporting layer, an aluminum chelate complex (Alq ₃ ), a distyryl biphenyl derivative (DPVBi), an oxadiazole derivative, a bistyrylanthracene derivative, a benzoxazole thiophene derivative, a perylene, a thiazole, or the like can be used. The light emitting layer is not limited to an organic material, and may be an inorganic material.

Since the top emission structure is not configured to emit light through the substrate 20, the substrate 20 is not limited to a transparent substrate but can be a non-transparent substrate. As the transparent substrate, soda lime glass, low expansion glass, quartz and the like are suitable, and as the non-transparent substrate, silicon carbide (SiC), alumina (Al ₂ O ₃ ), aluminum nitride (AlN) and the like are suitable. . The base protective film 21 is formed on the substrate 20 so that mobile ions such as sodium ions contained in the glass substrate are mixed in the semiconductor layer and do not adversely affect impurity control of the semiconductor layer. An insulating material such as a silicon film (SiO _x : 0 <x ≦ 2) or a silicon nitride film (Si ₃ N _x : 0 <x ≦ 4) can be used. The base protective film 21 is formed on a substrate 20 cleaned with an organic solvent such as pure water or alcohol, by CVD such as atmospheric pressure chemical vapor deposition, low pressure chemical vapor deposition, plasma chemical vapor deposition, or sputtering. The film is formed using various film forming techniques such as a method.

The gate insulating film 22 is formed of, for example, a silicon dioxide film using tetraethylorthosilicate (TEOS) as a raw material. The gate metal 23 can be obtained, for example, by depositing a conductive material such as tantalum, tungsten, or chromium by sputtering or the like and then patterning it into a predetermined shape. The data line I _dat located in the same layer as the gate metal 23 is subjected to patterning processing in the same film formation process as the gate metal 23 film formation process. The first interlayer insulating film 24 is obtained by forming an insulating film such as a silicon oxide film or a silicon nitride film using a sputtering method or the like. As the source metal 25, for example, aluminum, tantalum, molybdenum, titanium, tungsten, or the like can be used, and these conductive materials can be formed by sputtering or the like and then patterned according to the electrode shape. The second interlayer insulating film 26 is obtained by forming an insulating film such as a silicon oxide film or a silicon nitride film using a sputtering method or the like. As the source metal 35, for example, aluminum, tantalum, molybdenum, titanium, tungsten, or the like can be used. After these conductive materials are formed by a sputtering method or the like, they are obtained by patterning in accordance with the electrode shape. The flattening film 37 is a thin film for adjusting the reflective surface 27 formed on the upper layer thereof to be as uneven as possible by flattening the film surface, so that luminance unevenness of the light emitting unit OLED does not occur. An insulating film flattened by a flattening process is used.

  Each pixel 10 is formed with an oval opening h1 (see FIG. 3) surrounded by a bank layer 30, and a thin film material solution containing a fluorescent substance is applied into the opening h1 by an ink jet method. Thus, the light emitting layer 34 is formed. In order to apply the thin film material solution by the ink jet method, it is necessary to apply the film thickness of the light emitting layer 34 so that the shape of the bank opening h1 is oval. When the shape of the bank opening h1 is patterned into a rectangular shape, the thin film material liquid can be applied sufficiently and uniformly to every corner due to the influence of the surface tension and viscosity of the thin film material liquid, the lyophilicity to the bank layer 30, and the like. Although difficult, by patterning the shape of the bank opening h1 into an oval shape, it is possible to uniformly apply to every corner and to increase the aperture ratio as much as possible. The bank layer 30 is preferably made of a material that is less lyophilic with respect to the thin film material solution than the hydrophilic control film 32 described later. By adjusting the lyophilicity of the bank layer 30 with respect to the thin film material solution containing the fluorescent material to a low level, when the thin film material solution is applied in the bank opening h1 by an inkjet method or the like, The thin film material liquid can be drawn into the bank opening h1, the film thickness of the thin film material liquid can be made as uniform as possible, and the thin film material liquid protruding from the bank opening h1 is adjacent to each other between pixels. The possibility of connection can be reduced as much as possible. As a material of the bank layer 30, for example, silicon oxide, silicon nitride, polyimide, or the like can be used.

  A hydrophilic control film 32 is formed below the bank layer 30, and an opening h2 (see FIG. 3) slightly smaller than the inner diameter of the bank opening h1 is formed. The hydrophilic control film 32 is made of a material that is lyophilic with respect to a thin film material liquid containing a fluorescent substance, such as a metal such as aluminum or tantalum, silicon oxide, silicon nitride, amorphous silicon, polysilicon, polyimide, or fluorine bond. It is preferably composed of an inorganic compound or an organic compound composed of either an organic compound or a photoresist. What material should be selected as the hydrophilic control film 32 may be determined according to the lyophilicity of the thin film material liquid. For example, if the thin film material liquid is a liquid containing a large number of polar molecules, a material having a polar group is preferable, and if the thin film material liquid is a liquid containing a small number of polar molecules, a material having a nonpolar group is preferable. . In addition, when the surface tension of the solvent contained in the thin film material liquid is smaller than that of water, even if the bank layer 30 is water repellent, it exhibits lyophilicity with respect to the thin film material liquid. Also in relation to the surface tension, the lyophilicity of the bank layer 30 can be adjusted. That is, what material is used as the material of the bank layer 30 is determined by the relationship with the thin film material solution. By adjusting the hydrophilic control film 32 to be lyophilic with respect to the thin film material liquid, the thin film material liquid can be uniformly applied to every corner in the bank opening h1.

The pixel electrode 27 is exposed on the surface of the opening h2 of the hydrophilic control film 32, and the hole transport layer 33 and the light emitting layer 34 are formed thereon. As the hole transport layer 33, for example, using a metal mask, N, N′-diphenyl-N, N′-bis- (3-methylphenyl)-(1,1′-biphenyl) -4,4 ′ is used. -Obtained by depositing a diamine in a predetermined film thickness. As the light emitting layer 34, for example, using an inkjet head (micro droplet ejection device), a solution containing tris (8-quinolinol) aluminum (Alq ₃ ) is ejected into the bank opening h 1 to evaporate the solvent component. To form a film. As the transparent cathode 31, a conductive material such as calcium that has been processed into a thin film to the extent that light can be transmitted, or a light-transmitting conductive material such as ITO is formed using a metal mask, and desired by photolithography or the like. It is obtained by patterning into a shape.

FIG. 5 is a cross-sectional structure diagram of a contact portion between the pixel electrode 27 and the source metal 35, and corresponds to a BB cross-sectional view in FIG. As shown in the figure, on the substrate 20, a base protective film 21, a gate insulating film 22, a data line I _dat , a gate metal 23, a first interlayer insulating film 24, a source metal 25, and a second interlayer insulating film 26. The source metal 35, the planarization film 37, the pixel electrode 27, the hydrophilic control film 32, the bank layer 30, and the transparent cathode 31 are laminated. A storage capacitor C is formed by the gate metal 23 and the source metal 25 that are arranged opposite to each other with the first interlayer insulating film 24 interposed therebetween. Since the gate metal 23 and the source metal 25 are excellent in flatness, the second interlayer insulating film 26 serving as a base layer of the source metal 35 can be formed flat. For this reason, the flatness of the contact hole h3 opened on the planarizing film 37 and its peripheral portion is improved, and a stable contact between the source metal 35 and the pixel electrode 27 can be secured. Further, since the step is formed by the storage capacitor C, it is convenient for the contact between the source metal 35 and the pixel electrode 27. In particular, in the top emission structure, the layout of the electronic elements in the lower layer of the pixel electrode 27 can be freely performed. Therefore, the pixel electrode 27 and the source metal of the switching transistor Tr4 in the connection region can be simply devised. Conduction can be performed reliably.

As described above, according to this embodiment, the contact position between the source metal 35 of the switching transistor Tr4 and the pixel electrode 27 is laid out on the dead space of the pixel electrode 27, so that the film thickness of the light emitting layer 34 is made uniform. A display that can be adjusted and has excellent display performance can be provided. Further, by adopting the top emission structure, the aperture ratio is increased, and most of the projected portion of the data line I _dat on the projection plane orthogonal to the film thickness direction of the device layer is formed on the projection plane of the pixel electrode 27. Since the layout is made so as not to overlap with the projected portion, the parasitic capacitance generated between the data line I _dat and the pixel electrode 27 can be reduced as much as possible, and the display can be enlarged.

  FIG. 6 is a diagram illustrating an example of an electronic apparatus to which the electro-optical device of the invention can be applied. FIG. 6A shows an application example to a mobile phone. The mobile phone 230 includes an antenna unit 231, an audio output unit 232, an audio input unit 233, an operation unit 234, and the organic EL display panel 100 of the present invention. Yes. Thus, the organic EL display panel 100 of the present invention can be used as the display unit of the mobile phone 230. FIG. 2B shows an application example to a video camera. The video camera 240 includes an image receiving unit 241, an operation unit 242, an audio input unit 243, and the organic EL display panel 100 of the present invention. Thus, the organic EL display panel 100 of the present invention can be used as a finder or a display unit. FIG. 2C shows an application example to a portable personal computer. The computer 250 includes a camera unit 251, an operation unit 252, and the organic EL display panel 100 of the present invention. Thus, the organic EL display panel 100 of the present invention can be used as a display device.

  FIG. 4D shows an application example to a head mounted display. The head mounted display 260 includes a band 261, an optical system storage unit 262, and the organic EL display panel 100 of the present invention. Thus, the organic EL display panel 100 of the present invention can be used as an image display source. FIG. 6E shows an application example to a rear type projector. The projector 270 includes a housing 271, a light source 272, a composite optical system 273, a mirror 274, a mirror 275, a screen 276, and the organic EL display panel of the present invention. 100. FIG. 5F shows an application example to a front type projector. The projector 280 includes an optical system 281 and the organic EL display panel 100 of the present invention in a housing 282, and can display an image on a screen 283. . Thus, the organic EL display panel 100 of the present invention can be used as an image display source.

It is a whole block diagram of the organic EL display panel of this embodiment. It is a main circuit block diagram of the pixel of this embodiment. It is a layout diagram of each element in the pixel region in the present embodiment. FIG. 4 is a sectional view taken along line AA in FIG. 3. FIG. 4 is a sectional view taken along line BB in FIG. 3. It is a figure which shows the application example of the display apparatus of this embodiment. It is a layout diagram of each element in a conventional pixel region.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Pixel 11 ... Display area 12 ... Scan line driver 13 ... Data line driver 20 ... Substrate 21 ... Underlayer 22 ... Gate insulating film 23 ... Gate metal 24 ... First interlayer insulating film 25 ... Source metal 26 ... Second interlayer Insulating film 27 ... Pixel electrode 28 ... Reflective pixel electrode 29 ... Anode 30 ... Bank layer 31 ... Transparent cathode 32 ... Hydrophilic control film 33 ... Hole transport layer 34 ... Light emitting layer OLED ... Light emitting portion Tr1 ... Driving transistor Tr2, Tr3 Tr4 ... Switching transistor C ... Holding capacitor _Idat ... Data line _Vdd ... Power supply line _Vsel ... Write control line _Vgp ... Light emission control line

Claims (15)

A pixel electrode, a common electrode, and an electro-optic element driven by electric power supplied through the pixel electrode and the common electrode,
The pixel electrode is provided with a connection region to which a connection wiring for electrically connecting the pixel electrode and a power supply potential is connected,
An electro-optical device, wherein an arrangement region in which a functional layer constituting an electro-optic element is arranged is provided in at least a part of the region other than the connection region.   The electro-optical device according to claim 1, wherein the pixel electrode is a reflective electrode, and the common electrode is a light transmissive electrode.   The electro-optical device according to claim 1, wherein the electro-optical element is a light-emitting element including a light-emitting layer. A bank layer formed to separate adjacent pixel electrodes and to cover the connection region;
4. The electro-optical device according to claim 1, wherein the area of the pixel electrode in which the bank layer is not formed is the arrangement area in which the functional layer is arranged. 5.   5. The electro-optical device according to claim 1, comprising a planarized film that is planarized as a base layer of the pixel electrode. An active element for supplying a driving current to the electro-optic element;
A holding capacitor for holding a control voltage for driving the active element,
The storage capacitor is composed of a capacitor element composed of two metal layers formed flat through an insulating layer,
The planarizing film is formed on the storage capacitor, and
The electro-optical device according to claim 5, wherein the connection wiring and the pixel electrode are electrically connected in the connection region through a contact hole opened in the planarization film.   The electro-optical device according to claim 1, wherein the pixel electrode and the arrangement region have different shapes.   The electro-optical device according to claim 7, wherein the pixel electrode is formed in a rectangular shape, and the arrangement region is formed in an oval shape.   The electro-optical device according to any one of claims 1 to 8, wherein the area occupied by the pixel electrode occupies 60% or more of the area occupied by the pixel region. An active element for supplying a driving current to the electro-optic element;
A holding capacitor for holding a control voltage of the active element;
Including a data line for transmitting an analog current signal for storing a control voltage in the storage capacitor;
The layout position of the data line is determined so that most of the projected portion of the data line on the projection plane orthogonal to the thickness direction of the functional layer does not overlap the projected portion of the pixel electrode with respect to the projection plane. The electro-optical device according to claim 1.   The electro-optical device according to claim 10, wherein a projection position of the center line of the data line on the projection plane is between projection positions of adjacent pixel electrodes on the projection plane. The electro-optical device according to claim 1, wherein the electro-optical element is an electroluminescence element having the pixel electrode as an anode and the common electrode as a cathode. A panel substrate having a plurality of pixel electrodes,
Each of the plurality of pixel electrodes is provided with a connection region connected to a connection wiring for electrically connecting each pixel electrode to a power supply potential, and the plurality of pixel electrodes are provided on the connection region. Insulating layers separated from each other are arranged,
A panel substrate, wherein each pixel electrode is provided with an opening region in which the insulating layer is not disposed.   14. The electro-optical device having the panel substrate according to claim 13 mounted thereon, wherein a functional layer is disposed on the opening region of the pixel electrode.   An electronic apparatus comprising the electro-optical device according to claim 1.

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