JP2009038570A - Code type transmitter and code type receiver - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a communication system utilizing status information that is expressed with shift time of code pulse stream for realizing high-speed transmission with a simplified structure. <P>SOLUTION: The code type transmitter 1 includes at least a data code pulse train generating means 30 for converting an input data into shift time of code pulse train and generating the data code pulse train in which the chip width is widened or narrowed. The code type receiver 200 used facing to such transmitter 1 includes at least a detecting means 210 for outputting a detection signal by receiving a transmitting signal, a synchronous means 220 for seizing or holding synchronization, a localizable signal detecting means 240 for separating the code pulse train in which data is converted to shift time from the detected signal and for detecting the data code pulse train from which noise is removed by model detection, a shift time detecting means 250 for detecting shift time of the code pulse train, and a data calculating means 260 for calculating data from the shift time of the detected code pulse train. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

   The present invention relates to a code-type transmitter and a code-type receiver using a pulse train representing a code sequence as a signal.

  In conventional signal processing techniques using code sequences, localized pulses are generated from code pulse sequences by correlation function calculation or pulse compression by matched filters (matched filters) to achieve good communication quality. A method of improving the S / N ratio by detecting a pulse has been used. The S / N ratio is proportional to the integration time in the method of detecting the localized pulse by calculating the correlation function, and the signal power and noise in the method of detecting the localized pulse using the matched filter. A code sequence having a large code length has been used for improvement in any method, expressed as a ratio to density.

  In addition, the transmission side spreads and transmits the data pulse with the code pulse sequence, the reception side multiplies the received signal with the code pulse sequence of the same code sequence used on the transmission side, and separates the data pulse by despreading. The DS-SS spread spectrum method to detect is used. In this method, the improvement rate of the S / N ratio is expressed by the data pulse width / the chip width of the code pulse train for narrowband noise, while the DS-SS method does not function effectively for wideband noise.

  In addition, a code transmission device and a code type reception device that continuously perform despreading and correlation function processing to improve the S / N ratio are used (see Patent Document 1). In this transmission method, on the transmitting side, a basic pulse train is generated by spreading a data-coded pulse train representing a code sequence in which data is mapped at a shift time with a high-speed code pulse train representing the order, and multiplexing is performed for multiplexing. A basic pulse train is generated, and a signal generated based on the multiplexed basic pulse train signal is transmitted as a transmission signal. On the other hand, the reception side receives a despread and a correlation function or a matching filter on the basic pulse train obtained from the received signal. Localization is performed to improve the S / N ratio to detect a localized pulse, and data is calculated using the value of the shift time.

  The improvement rate of the S / N ratio has a feature that it is proportional to the product of the spreading rate, which is the ratio of the chip rate of the sequential pulse train to the tip rate of the data coded code pulse sequence, and the code length of the data coded code pulse sequence. The diffusion or correlation function can be set larger than the method using it alone.

  In this method, the information amount per pulse of the binarized multiplexed signal is set to be greater than the information amount per transmission pulse of the signal of the linear modulation method such as multi-level QAM. It is possible to ensure a high transmission rate and to set a significantly large improvement rate of the S / N ratio for noise other than internal interference noise. Similarly to the localized pulse detection method using a correlation function or a matched filter, an error correction code can be used together to reduce data transmission errors, and a canceller can be provided.

  In addition, this method can carry a large amount of information. That is, since the data transport speed of multiplexed signals according to this method is proportional to the degree of multiplicity, the amount of information transport per unit time and unit frequency that can be achieved with the existing technology is such that the previous transmission speed has an amplitude. Compared to the linear modulation transmission system proportional to the logarithm, Tc is the chip width of the sequential pulse train, and when the multiplicity is 214, it is about 700 / Tc (bit / sec). If Tc is 1 μsec, this value is calculated as 700 Mbit / sec. Furthermore, the theoretical speed limit is larger than this.

  High speed is also achieved for transmission using a binary conversion pulse train and a secondary code pulse train. For example, when the multiplicity is 220, it is possible to increase the maximum 110 times and about 15 times with the existing technology as compared with the DMT method, and the upper limit when the multiplicity increases is the calculation accuracy (rounding error) of the processing device. ).

  This method is also used for RFIC tags. Further, it is also used in a storage device. For example, when a binary conversion pulse train having a multiplicity of 220 is stored, the average storage capacity per memory cell is about 2,200 bits / cell.

  The code pulse train uses the feature that the autocorrelation function has an improvement ratio of S / N ratio proportional to the code length, and data such as distance and moving body velocity measuring devices, image measuring devices using ultrasonic waves and electromagnetic waves, etc. It has been used for devices other than communications. In distance measurement in outer space or the like, improvement in the S / N ratio of 70 dB or more has been performed using a long code sequence of millions of digits or more.

Refer to the following Patent Document 1 and Non-Patent Documents 1 to 13 for the related art described above.
Code-type transmission device and code-type reception device, Tadashi Asahina, Japanese Patent Application 2006-45772 Spread Spectrum Communication and its Applications, Motomaru Marubayashi et al., IEICE Modulation and demodulation of digital wireless communication, written by Yoichi Saito, IEICE Research on transceiver circuit for Ultra-Wideband wireless communication, Takahide Terada et al., 2004/4/8 1st Silicon Analog RF Study Group Next-generation wireless communication technology UWB, Nicholas Cravott, EDN Japan 2003.1 Spread spectrum communication, Yukiji Yamauchi, Tokyo Denki University Press Digital broadcasting technology and service, edited by Kei Yamada, Corona Publishing, pages 146-161) Digital wireless transmission technology, Seiichi Sampei, Pearson Education Publishing. IEEE802.11, IEEE standard IEEE802.11a, IEEE standard IEEE802.11b, IEEE standard IEEE802.15 TG3a, IEEE standard Ubiquitous Technology IC Tag, Mitsuo Usami, etc., Ohmsha

  In data transmission using a conventional code sequence, it is difficult to achieve sufficient speed while ensuring the required accuracy by removing noise remaining in the signal frequency band of the code pulse train signal in a strong noise environment, There is also a problem that the transmission distance is limited. For this reason, mobile phones and data communication using code sequences, GPS (Global Positioning System), RFIC tags, etc. are limited to use in an environment where the S / N ratio is good and the localized pulse of the code pulse train can be detected. In addition, there is a problem that the transmission distance is limited and the transmission is limited to a relatively low speed.

  Further, the data described in Patent Document 1 is converted into a code pulse train shift time to generate a data coded code pulse train, and this pulse train is ordered by an order pulse train composed of a high-speed code pulse train to generate and multiplex a basic pulse train, A signal based on a multiplexed basic pulse train is transmitted as a transmission signal, and a data coded code pulse train is detected by despreading and localizing the multiplexed basic pulse train obtained from the transmission signal on the receiving side, and data is obtained from the shift time. In the transmission method for calculating the SNR, the improvement rate of the S / N ratio for narrowband noise is proportional to the product of the spreading factor and the code length, whereas for wideband noise, it is proportional to the code length. . For this reason, in an environment where noise exists in a communication channel or device, the effect of noise cannot be sufficiently removed even if the effect of error correction coding / decoding is included, and the transmission speed is limited. there were.

  In addition, as the multiplicity increases, there is a problem that the amount of calculation for detecting the pulse train is increased and complicated, and high-speed processing is difficult, and the efficiency with which a pulse train signal can be detected at high speed with a simple configuration. It has been desirable to provide a good method and apparatus.

  In-band residual noise is a major factor in image quality degradation of image measurement devices such as ultrasonic diagnostic imaging devices and radars using code pulse trains, and noise removal technology that can perform high-speed processing with a simple configuration is desired. I came.

  In addition, since a code sequence having a large code length is used for distance measurement in outer space, a long measurement time is required.

    The present invention has been proposed to solve these problems, and it is an object of the present invention to provide a code-type transmitting apparatus and code-type receiving apparatus using a canceller based on model detection for detecting a code pulse train. .

  In the present invention, data is converted into code pulse train shift time on the transmission side and transmitted, and on the reception side, noise is removed using a canceller based on a signal model whose chip width is widened and / or reduced. A code pulse train is detected, and data is calculated from the shift time.

  By using a canceller based on model detection, noise inside and outside the frequency band, including internal interference noise and thermal noise, can be removed in a short time with a simple configuration, and a code pulse train signal can be detected with a high S / N ratio. High-speed transmission is possible.

A canceller based on model detection is also used to detect a code pulse train signal having a constant shift time, and can acquire amplitude information with a high S / N ratio without making a determination by maintaining synchronization.
Whether the shift time is constant or changes, the detected code pulse train signal can be subjected to processing such as correlation function processing.

  In data transmission, the transmitting side generates a signal for acquiring or maintaining synchronization at the receiving side, generates an order pulse train at a timing based on this signal, and uses this order pulse train to determine the data according to the order. A data-coded pulse train having a shift time is generated, ordered to generate a basic pulse train, multiplexed to generate a multiplexed basic pulse train, and based on a transmission signal generating pulse train using the multiplexed basic pulse train signal A transmission signal is generated with a signal and transmitted.

  The code pulse train signal referred to in the present invention refers to a signal generated based on a pulse train representing a code sequence or a code sequence.

  For the basic pulse train, a data-coded pulse sequence having a constant chip width is spread with a code pulse train representing the order of a constant chip width, or a data-coded code pulse sequence configured using a different chip width is arranged in a sequence in which the chip width is constant. However, the present invention is not limited to this. Further, the basic pulse train may be configured to include a data-coded pulse sequence having a plurality of cycles that are converted into data by the same data within the cycle.

  The chips referred to in the present invention are classified into a fixed chip having a fixed width and a time-varying chip in which the chip width changes. A fixed chip is a pulse having a basic width constituting a code pulse train, and a code pulse train having a code length of N is composed of N chips. A code pulse train having a time-varying chip as a constituent pulse is a time-varying chip code pulse train, and a time-varying chip code sequence representing a code sequence having a code length of N has N chips and has a period Tv.

  The number of chips of the product basic pulse train is the number of chips of the ordered pulse train that has been multiplied. Further, the multiplexed basic pulse train has the same number of chips as the basic pulse train, and each chip has an amplitude value determined by multiplexing the basic pulse train.

The transition time of the chip is the start time and end time of the chip.
The reciprocal of the fixed chip width is the chip speed. Further, the hopping time interval in frequency hopping includes one or a plurality of fixed width chips or time variable width chips.

  The transmission signal generation pulse train may be configured by using error correction encoded data and / or error correction encoded pulse train. Furthermore, the transmission signal generation pulse train may be configured to have a frame and perform packet transmission.

  The signal based on the transmission signal generation pulse train includes at least a multiplexed basic pulse train, an impulse train generated based on the multiplexed basic pulse train, and a bit stream generated by converting a chip of the multiplexed basic pulse train into a binary number. Binary conversion pulse trains, secondary encoded pulse trains, impulse trains generated based on the pulse trains of these bit streams, modulated signals modulated by these signals, and OFDM modulated using these pulse trains The signal and the hopping signal in which the frequency of hopping by these pulse trains is modulated are included, and the transmission device and the reception device are configured to use any one of them.

  The secondary encoded pulse train referred to in the present invention is a code pulse train formed by multiplying a pulse obtained by bit-converting the chip amplitude of a multiplexed basic pulse train and a code pulse train having this pulse width as a cycle.

  The receiving side is used opposite to the transmitting side, detects a data-coded pulse train signal using a canceller based on model detection, and calculates data using the value of the shift time. If the transmission signal is a signal generated using error-corrected encoded data, a basic pulse train or a multiplexed basic pulse train, the receiving side performs error correction decoding and calculates source data.

  The present invention uses a model detection type canceller to remove in-band and out-of-band noise and to detect a data-coded pulse train with a high S / N ratio.

  The signal including the data conversion code pulse train is a signal including the data conversion code pulse train and the modulated signal modulated by the data conversion code pulse train, but is not limited thereto.

  The localized signal referred to in the present invention is a signal representing a correlation function calculated from a data-coded pulse sequence obtained from a received signal and a local signal or a signal compressed by a matched filter.

  The model detection referred to in the present invention means that a data model code pulse train having a chip width converted and / or a chip width converted by a chip width and a signal model representing noise are set, and these parameters are set at least in the frequency domain. To calculate the data coded code pulse train, or to replace the data coded code pulse train and the signal model representing the noise with the localized pulse represented by using the code pulse train converted in chip width. Set the model to represent and the model to represent the localized noise, calculate the parameters using at least the frequency domain to determine the localized pulse, or the signal with the chip width retained or its localization A model obtained by performing Fourier transform on the time axis using a sin function or / and a cos function in which a transformation including a stretching or / and shrinking transformation is performed on the time axis. Alternatively, instead of Fourier transform, use a model in which FFT transformation is applied to the signal with the chip width retained or its localized pulse and localized noise, and transformation including expansion or / and reduction transformation on the time axis. And detecting a signal.

  The determination at the time of determination is performed with respect to the amplitude value of the chip or the localized pulse or the ratio of the amplitude value, the polarity and the arrangement thereof. For example, the correlation function between the model of the signal whose parameter is calculated and the local pulse train Or by performing pulse compression with a matched filter and determining the number of peaks, amplitude, polarity, and arrangement thereof, but is not limited to this, and a code pulse train can be characterized Anything is acceptable.

  By using a canceller based on model detection, noise is removed, and amplitude information and phase information of a signal representing a code sequence with high SNR are acquired. However, for a signal representing a code sequence with a constant shift time in which synchronization is maintained, the amplitude value can be calculated without performing phase determination. See the description of FIG. 15A for model detection.

  In the present invention, a method for detecting a signal representing a code sequence by performing model detection is called a model detection method.

  When the model detection method is applied to a chip and a noise of a code pulse train signal, the target code pulse train signal is multiplied by a single code pulse train signal, a pulse and a code pulse train having a period of the pulse width. Coded pulse train signal, basic pulse train separated from multiplexed basic pulse train reproduced from binary converted pulse obtained by detecting secondary encoded pulse train signal, secondary encoded pulse train signal A code pulse train signal detected by despreading a code pulse train spread by a spread code pulse train including a code pulse train signal obtained by decoding an error correction encoded pulse train, or a single or multiplexed basic pulse train Code pulse train signal reproduced and separated from the impulse train generated based on Code pulse train signal regenerated from pulse train, code pulse train signal demodulated and detected from modulated signal modulated by signal based on code pulse train, code regenerated from modulated signal modulated by impulse train based on code pulse train This includes, but is not limited to, a pulse train signal, a code pulse train signal detected from a hopping signal, a code pulse train signal read out from a storage medium or a storage device, and the like. And a composite code pulse train such as a code pulse train obtained by sequentially localizing each code pulse train.

  The value of the sampling point including the data coded code pulse train obtained from the multiplexed basic pulse train of the present invention is composed of the amplitude value of the code pulse train signal and the noise value superimposed thereon.

  Noise is a component other than a signal superimposed on a signal and includes internal noise and external noise, and can have a signal frequency band component and a band component, respectively. Internal noise is internal interference noise due to other orders in the multiplexed basic pulse train signal, thermal noise generated in the device, etc. External noise is interference noise from other devices, thermal noise generated in the communication path, noise due to diffuse reflection, etc. Including, but not limited to.

  The localization of the present invention is classified into localization by a correlation function and localization by a matched filter.

  Localization by a correlation function calculates a correlation function between a signal model and a local signal, and generates a signal characterized by the code sequence on the parameter axis (τ axis) representing the deviation of the correlation function. That is. A localized signal obtained by localizing a signal model with a correlation function includes a signal component representing a correlation function between a signal model representing a code sequence and a local signal, and a noise model superimposed on the local signal and a local signal. And a noise component representing a correlation function. In the high-order product code pulse train signal, at least the time and the shift time of the code pulse train are included as variables.

  On the other hand, localization by a matched filter is to input a code pulse sequence to a matched filter configured using the same code sequence and generate a pulse characterized by the code sequence on a variable axis. These variables include, but are not limited to, time and code pulse train shift time. In any case, a code pulse train having a period length is used for localization.

  For the code sequence of the present invention, a code sequence that can generate one or a plurality of localized pulses in each period is used, and it is particularly preferable to use an M-sequence code (maximum length sequence), The sequence is not limited to this, and any sequence can be used as long as it can be detected by a model. Examples include a Gold code sequence and a KAZAMI (bulk) code sequence.

  The transmission signal of the present invention is an impulse train generated based on a transmission signal generation pulse train, a modulated signal thereof, a pulse train composed of a transmission signal generation pulse train, a modulated signal, a modulated signal, and a transmission signal generation pulse train 1 A modulated signal having a secondary modulated signal, a secondary modulated signal modulated by a primary modulated signal modulated by a transmission signal generation pulse train, and an orthogonal frequency division multiplexing in which a subcarrier is modulated by a transmission signal generation pulse train It is either a signal or a hopping modulated signal whose carrier frequency to be hopped by a primary modulated signal modulated by a transmission signal generation pulse train is modulated, but is not limited thereto.

  In the primary modulation used in the present invention, a method for transmitting amplitude information such as any linear modulation method or FM modulation method is used for transmission of amplitude information such as a multiplexed basic pulse train and its impulse. . Examples of the linear modulation method include APSK and AM, but are not limited thereto. On the other hand, binary pulse trains such as PSK, FSK, ASK, AM, and FM including BPSK are transmitted for modulation of a bit stream using a binary conversion pulse train obtained by bit-converting a chip of a multiplexed basic pulse train into a binary number. Any modulation scheme is used.

  The synchronization signal referred to in the present invention is a signal that carries synchronization information. If synchronization is captured or maintained from the data signal at the receiving end, the data signal is considered a synchronization signal.

  On the other hand, the data signal is a signal that carries data information, and includes at least an impulse train that carries data, a pulse train, and a modulated signal modulated by any of these. An impulse is a solitary wave with an average value of zero and represents an isolated modulated wave with a mean value of zero that is modulated by a short-time solitary wave with multiple peaks or a single rectangular pulse with a short-time width. However, it is not limited to these.

  The order pulse train referred to in the present invention is a code pulse train in which the type of code sequence is associated with the order, or has a shift time that changes in ascending or descending order, or has a shift time that changes in a predetermined order. The shift time is a code pulse train associated with the order.

  When the sequential pulse train is composed of a code sequence different from that of the data coded code pulse train, the multiplexed basic pulse train in which the code length of the data coded code pulse train is N and the ratio of the chip width of the data coded code pulse train to the chip width of the sequential pulse train is K One set of ordering is performed using a code sequence having a code length of KN, and a new type is assigned each time the increase in multiplicity exceeds KN. That is, the required number of types of code sequences is 1+ [m / (KN)] using a Gaussian symbol when the multiplicity is m. The time-varying chip width data-coded pulse sequence is assigned a new sequence pulse sequence every time the multiplicity exceeds KNTv / T using a code sequence having a code length of KNTv / T, and is ordered using the sequence pulse sequence. .

  On the other hand, the order pulse trains for ordering p sets of multiplexed basic pulse trains having a code length of N and a chip width ratio of K arranged on the time axis are different from each other in the code length of KN. A necessary number of code pulse trains are allocated, or the same code sequence set is repeatedly allocated, or a code pulse train having a code length of pKN is assigned 1+ [m / (pKN)]. The time-varying chip width data-coded code pulse sequence is assigned a new sequence pulse sequence every time the multiplicity exceeds KNTv / T using a code sequence having a code length of KNTv / T. .

  The basic pulse train of the present invention is a product basic pulse train including a data-sequenced basic pulse train obtained by converting the sequential pulse train into data or a pulse train obtained by multiplying the data-coded code pulse train by the sequential pulse train.

  The data ordering basic pulse train may have a constant chip width or a different chip width. On the other hand, the product basic pulse train is a fixed chip pulse train formed by diffusing a data-coded pulse train having a constant chip width with an order pulse train having a constant chip width, or a product basic pulse train of a fixed chip. Either a time-varying chip pulse train having a time-varying chip width with an expanded or reduced chip width, or a pulse train in which a data-coded code pulse train having a time-varying chip width is spread with a sequential pulse train of a fixed chip width, or fixed. The pulse width is a pulse sequence obtained by spreading the data-coded pulse sequence having a chip width with a time-varying chip sequence pulse sequence having different chip widths, but is not limited thereto.

  The basic pulse train may include adjustment pulses that have a positive or negative polarity and are determined in order. By using the basic pulse train, data transmission is performed by the data-coded code pulse train according to the order indicated by the sequential pulse train, and an increase in the number of types of code sequences is suppressed. Further, in the case of a single basic pulse train or a multiplexed signal with a light interference configuration, the data amount may be set to be represented by the amplitude value of the adjustment pulse and the shift time of the data coding code pulse train. By using the adjustment pulse, the localization pulse has a polarity determined by the adjustment pulse.

  In particular, when a multiplexed product basic pulse train is used, the receiving side detects the transmission signal generation pulse train from the received transmission signal detection signal, multiplies the sequential pulse train, performs filtering, and then filters. Model detection is performed on the signal including the waved data-coded pulse sequence to obtain the shift time, and data is calculated using this shift time. By multiplying the detected transmission signal generation pulse train by the order pulse train, the data encoding code pulse train is separated and the noise including the internal interference noise is diffused, and the chip width of the data encoding code pulse train vs. the chip of the order pulse train The signal energy-to-noise energy ratio is improved by the ratio of width, and furthermore, wideband noise such as narrowband noise and thermal noise including in-band interference noise is removed by model detection, and a code sequence with a good S / N ratio is obtained. The signal to be represented is detected, and the data can be transmitted with high accuracy using the shift time.

  The data of the present invention is source data or source data subjected to error correction coding. The error correction-encoded source data is converted into N-ary m digits after error correction, or error-corrected after being converted into N-ary m digits. The error-corrected source data is decoded from the shift time of the modeled data-coded code pulse train. The basic pulse train may be a pulse train that has been error correction encoded with respect to the chip, and similarly, the multiplexed basic pulse train may be error correction encoded with respect to the chip. It is preferable that after the error correction encoded basic pulse train and the error correction encoded multiplexed basic pulse train are decoded on the receiving side, the data encoding code pulse train is separated.

  The synchronization signal is a signal that carries synchronization information such as a timing pulse train for synchronization, a timing pulse train, or a code pulse train that is a pulse train representing a code sequence. On the other hand, in the case where synchronization is captured or held from a pulse train constituting the data signal, the data signal is used as the synchronization signal.

  A data signal, which is a transmission signal carrying data information, is a bit stream obtained by converting a basic pulse train, a multiplexed basic pulse train, a chip of a multiplexed basic pulse train into bits, or a bit converted and encoded. A pulse train for generating a transmission signal composed of a pulse train of a stream, an impulse train generated based on the pulse train for generating a transmission signal, a modulated signal modulated by any one of these signals, or a modulated modulated signal. It is not limited. The basic pulse train included in the data signal is composed of a data-coded pulse train of a fixed chip or a time-varying chip.

  The order of the present invention is indicated by an ordered pulse train. The basic pulse train is a pulse train corresponding to the order and including the data coded code pulse train, and if the data coded code pulse train is a data coded sequential pulse train composed of sequential pulse trains, the data digitized sequential pulse train or this is multiplied by the adjustment pulse. If the sequence pulse train and the data-coded pulse sequence are different from each other, the data-ordered basic pulse train is composed of the data-coded code pulse sequence and the sequence pulse train multiplied by this. . The product basic pulse train may be multiplied by another pulse or a pulse train, and for example, an adjustment pulse can be multiplied.

  The product basic pulse train is preferably constructed by multiplying a code pulse train having a small absolute value of the cross-correlation value. In addition, in a device used in an asynchronous multiple-access environment, the partial pulse train is not limited to the partial correlation value. It is preferable to use a code pulse train having a small correlation value or partial cross-correlation value, but the present invention is not limited to this.

  The modulation of the primary carrier by the basic pulse train may be performed by modulating the primary carrier with a data coded code pulse train or a pulse train obtained by multiplying the data coded code pulse train and the adjustment pulse, and then multiplying this signal by a sequential pulse train, or 1 Although the next carrier wave is modulated by the basic pulse train, the present invention is not limited to this. The same applies when the carrier wave is modulated with a basic pulse train. That is, a pulse train formed by multiplying at least the data coded code pulse train and the sequential pulse train included in the signal forms a basic pulse train regardless of the order of the products. The transmission signal may be a signal for transmitting a synchronization signal.

  The noise of the present invention includes, but is not limited to, broadband noise such as interference noise and thermal noise, and block noise that is a disturbance that affects the detection signal in a piecewise manner. Interference noise is classified into internal interference noise and external interference noise. Internal interference noise is noise generated from other basic pulse trains when a data-coded pulse train is detected separately from a multiplexed basic pulse train and when a localized pulse is detected. On the other hand, the external interference noise includes interference noise generated by a device other than the oppositely used code-type transmission device used simultaneously in a multiple access environment.

  The present invention has the following effects.

  By detecting the model, the data code pulse train can be detected with a high S / N ratio by removing the signal frequency in-band noise and out-of-band noise caused by internal interference noise, thermal noise, external interference noise, etc. superimposed on the code pulse train signal. It becomes possible to do.

With a simple configuration, it is possible to detect the shift time of a code pulse train in which data is mapped from a multiplexed basic pulse train signal with a large multiplicity in a short time, which enables cost reduction and large capacity high-speed data transmission, large capacity High-speed playback of stored data is facilitated.
By performing model detection, the secondary encoded pulse train of the multiplexed basic pulse train is detected with a high S / N ratio using a simple configuration, and the binary converted pulse that is the modulated signal is obtained to obtain the multiplexed basic pulse train. Therefore, it is easy to achieve a transmission rate represented by (mlog2N) / (TcKNlog2m) (bits / second) with high reliability. In other words, the transmission energy is binary level compared to the multi-level QAM method that distributes the energy to multi-levels by transmitting a transmission signal using a secondary encoded pulse train and detecting the detected model. Since the signal power is large and the S / N ratio is increased, the pulses in a noisy environment can be detected with a high S / N ratio by model detection. Here, Tc is the chip time width of the fixed chip basic pulse train.

As a result, an error rate such as a bit error rate (BER) can be reduced with a simple configuration and a large transmission capacity can be maintained to reduce transmission power of the transmission device, power saving processing of the transmission / reception device and / or communication. The distance can be extended.
Further, in distance measurement, a code sequence having a relatively small number of digits can be detected with a good S / N ratio by model detection, so that distance measurement with high accuracy is possible.
In addition, the model detection makes it easy to use weak measurement signals, weak remote sensing signals, OCT (Optical Coherence Tomography) signals, biological image signals such as MRI signals and CT signals, and signals using code sequences such as biopsy signals. This makes it possible to detect with a high S / N ratio, contributing to high accuracy and high quality as well as cost reduction of the apparatus.

With a simple configuration, high-speed processing and improved signal-to-noise ratio make it easy to detect weak signals. Effective use of radio resources, optical resources, and other communication resources through joint use of electromagnetic waves and short-wavelength light, and new use of such resources. Can contribute to the expansion of the use of ultrasonic waves, magnetic fields, controllable radiation, etc.
Simple configuration for signal detection of amplitude and phase information of signals representing code sequences in communication devices, storage devices, RFID tags and reader / writers, storage media playback devices, image measurement / processing devices, radar, distance measurement devices, etc. This makes it possible to improve the cost performance of the device and save power, which can contribute to diversification and expansion of applications.
A good S / N ratio at the time of signal detection of an image measuring / processing device, radar, distance measuring device, etc. can be achieved with a simple configuration, which can contribute to improvement in image quality, accuracy, miniaturization, and cost performance.
In addition, as a result of the improvement of the S / N ratio, it is possible to reduce the radiation exposure amount of the diagnostic apparatus or the like.
Furthermore, data can be acquired from a multiplexed basic pulse train having a large multiplicity with a simple configuration by model detection, and the number of devices that can be used in a multiple access environment can be increased.
Further, the influence of noise is reduced, and the margin of the S / N ratio at the time of detection of the code pulse train signal is increased, so that the transmission distance is expanded.

The S / N ratio improvement rate GN for narrowband noise by detecting the model of the data-coded pulse train is GN = (S / N ratio improvement rate K by despreading) × (S / N ratio improvement rate by model detection) GM), and the S / N ratio GW for broadband noise is GW = GM. Furthermore, if the signal whose code shift time of the data-coded code train is detected by localization is detected, the narrowband signal is multiplied by the S / N ratio improvement rate GL by localization, and GN = K / GM / GL and synergistic effect of despreading, model detection and localization detection, while GW = GM / GL for wideband signal, synergistic effect of model detection and localization detection Is obtained. For example, if K = 9, GM = 10 ^ 3 and GL = 7, GN is about 48 dB and GW is about 38 dB. Model detection can increase the value of GM by performing iterative processing or performing multistage serial connection processing. As a result of using a model detection to achieve a high S / N ratio with a simple configuration, compared to conventional ADSL, a transmission device using multilevel QAM, a device using a code pulse train signal, etc., It is easy to expand the communication distance or communication range of wireless communication using radio waves, ultrasonic waves, etc., and the configuration of the apparatus is simplified and the communication cost can be reduced.
As is well known to those skilled in the art, it is preferable to evaluate the influence of noise on the reproducibility of a signal representing a code sequence obtained by sampling. The separated data-coded pulse train signal is localized, and the localized pulse variance calculated from this localized signal is used to (localized pulse peak energy value) vs. (localized signal variance). The method for evaluating (value) is an example of a preferred method for evaluating a localized pulse.

  The product multiplexed basic pulse train is a pulse train obtained by multiplexing a basic pulse train obtained by multiplying the data-coded pulse train by at least the sequential pulse train.

  Further, it is possible to reproduce a pulse of a large multiplicity binary conversion pulse train stored in a storage medium with a simple configuration, and a storage cell represented by (mlog2N) / (KNlog2m) (bit / cell) Since a storage rate (bit / cell) representing the amount of stored information per unit can be easily achieved, the capacity can be increased using a large value of m. For example, the amount of stored information per unit cell is approximately 50 (bits / cell) when m = 2 14, K = 9, and N = 7, and can be easily reproduced with a simple configuration according to the present invention.

  In the present invention, the transmission side sets the shift time of the code pulse train according to the data in accordance with the order to generate a data coded code pulse train that is a data coded pulse train, and a transmission that is a pulse train using this data coded code pulse train A transmission signal is generated based on the signal generation pulse train and transmitted. The data conversion code pulse train is composed of a chip including a chip having a fixed chip width or a chip having a time varying chip width. In a signal in which a transmission signal is generated based on a product basic pulse train, the sequential pulse train is composed of a chip having a fixed chip width or a chip having a time-varying chip width.

  The receiving side performs model detection on the detection signal of the transmission signal to detect a data-coded pulse train, and calculates data using the shift time. When the transmission signal is a signal generated based on the product multiplexed basic pulse sequence, the multiplexed basic pulse sequence is detected and despread to separate the data encoded code pulse sequence, and the separated data encoded code pulse sequence A model detection is performed on the signal of, and a data-coded pulse train is detected. The detection of the shift time is performed by localizing the detected data code pulse train and using the localized pulse or detecting the phase component due to the delay of the code pulse train, but is not limited thereto.

  For ease of explanation, it is assumed in the following that the adjustment pulse multiplied by the basic pulse train is set to +1.

  The transmission signal is an impulse, a pulse, or a modulated signal of an impulse or a pulse, a signal generated based on a multiplexed basic pulse sequence or a binary converted pulse sequence converted to a binary number and a secondary code The modulated signal may be a primary modulated signal or a signal including a primary modulated signal and a secondary modulated signal. The primary modulation is a modulated signal of a primary carrier by a data-coded code pulse train or a basic pulse train, but is not limited to this. As is well known to those skilled in the art, when band limiting is performed on a rectangular pulse that is a chip, the amplitude of the pulse is represented at the sampling point that is the center of the pulse, and the amplitude is zero at least at other sampling points. The filter is preferably configured to be free of ISI (Inter Signal Interference). The modulated signal is preferably generated by modulating the carrier wave with a band-limited signal so as to be ISI-free. Further, such a filter may be configured by a route roll-off filter provided on each of the transmission side and the reception side, but is not limited to this (for example, see pages 131 to 137 of Non-Patent Document 6). See).

  The primary modulated signal based on the basic pulse train may be generated by modulating the primary carrier wave with the basic pulse train, or may be generated by modulating with the data-coded code pulse train and modulating the modulated signal with the sequential pulse train.

  In the transmission of a synchronization signal and a data signal that are modulated signals, the receiving side converts the modulated signal such as a primary modulation carrier wave and / or a secondary modulation carrier wave directly or to an intermediate frequency to obtain synchronization and synchronization. A signal for holding or / and calculating data is detected.

Any of these modulation schemes may use linear modulation schemes such as amplitude modulation and quadrature modulation, but is not limited thereto. Since these modulations are pulse modulation by a chip or modulation by a signal based on a chip, it is preferable to detect a code pulse train using model detection using the number of chips of a period instead of performing determination for each chip. In addition, it is preferable to use the amplitude value, polarity and arrangement of the pulse train for the determination. Alternatively, instead of determining the amplitude value, polarity, and arrangement of the pulse train, the number, amplitude, polarity, and arrangement of localized pulse trains of the correlation function of the model detected signal may be determined.
The calculation of data is performed using a model detection of a data-coded pulse train for each rank detected from the detection signal and using the shift time of this code pulse train.

  On both the transmitting and receiving sides, all processing is performed using at least the analog quantity acquired by sampling, or using the analog quantity and the digital quantity, or converting the analog quantity into a digital quantity and using the digital quantity Do it.

  Furthermore, both the case where the transmission signal is an unmodulated signal and the case where it is a modulated signal are included in the transmission signal generation pulse train including the process leading to the generation of the transmission signal and the multiplexed synchronization pulse train and the multiplexed basic pulse train. The process leading to the model detection of the data-coded pulse sequence is repeated by the number of times equal to the multiplicity while maintaining the order, or the entire process or a part thereof is performed by parallel processing to reduce the processing time. You can shorten it.

  Hereinafter, although some embodiments of the code-type transmitting apparatus and code-type receiving apparatus according to the present invention are shown, the present invention is not limited to these.

  FIG. 1 is a diagram showing an embodiment of a code-type transmission apparatus according to the present invention that constitutes a transmission side. The code-type transmitting apparatus 1 converts the data into the shift time of the code pulse sequence according to the order and multiplexes to generate a transmission signal generation pulse sequence, generates a transmission signal based on this pulse sequence, and transmits it. Means 10, error correction coding means 20, data coded pulse train generation means 30, sequential pulse train generation means 50, control means 60 that controls the timing and operation of each means that operates according to the clock and constitutes code type transmission apparatus 1, transmission A signal generation unit 70, a synchronization signal generation unit 80, a transmission unit 90, and a communication unit 100 are provided. Each of the above means may be arbitrarily modified and configured for both hardware and software without departing from the spirit of the present invention, or the software may be replaced with the corresponding hardware, or the hardware may be replaced with the corresponding software. You can replace it.

  Each means of the code type transmitting apparatus 1 is controlled by the control means 60. Further, the control means 60 adjusts the relationship among parameters such as code length, chip rate, multiplicity, sampling rate and the like based on a request signal from the receiving side in order to achieve a required transmission rate, The transmission power on the transmission side is controlled so that a good S / N ratio (signal band noise ratio) can be obtained. The transmission / reception of the control signal for this purpose is performed via the communication means 100.

  In the present invention, in order to achieve a required transmission rate, the bit error rate (BER) with respect to the S0 / N0 ratio expressed by bit energy (S0) to noise power density (N0) is evaluated on the receiving side. Accordingly, the relationship among the code length, the chip speed, the multiplicity, the sampling speed, etc. is adjusted within a range in which the value of the S0 / N0 ratio on the transmission side is allowed. Alternatively, instead of S0 / N0, evaluation may be performed by (localized pulse energy) pair (localized pulse dispersion) at the peak time of the localized pulse. The localized pulse variance is a variance of a signal in which the data-coded pulse train is localized. The evaluation criteria are not limited to these.

  In order to simplify the explanation, if the sampling rate is set to be constant, the chip rate is determined by setting the code length and multiplicity based on one of the evaluation criteria, or the code length And the chip speed are set to determine the multiplicity, or the code length is set to determine the chip speed and the multiplicity, and / or the sampling speed, the code length, the chip speed, and the multiplicity are determined. The required transmission rate is determined by setting in several combinations. For example, the code length may be set constant, other parameters may be set constant and combinations may be determined to determine their values to obtain the required transmission rate. In addition, when other limiting factors are added, the setting is made including them.

  In a modulation method in which a carrier wave having an in-phase component I and a quadrature component Q is amplitude-modulated with a data signal composed of a multiplexed basic pulse train, both components are complex with multiplicity mI and multiplicity mQ along the time axis of the data signal, respectively. If modulated with a multiplexed basic pulse train, the amount of information per chip is ((mI + mQ) / N) log2N (bits / chip). That is, the value obtained by dividing log + N by the value obtained by dividing mI + mQ by N. In this case, the transmission rate is (mI + mQ) log2N / (KNTc) (bits / second). In addition, when a time-varying chip pulse train is used, the average transmission rate is T / Tv times.

  From this, the transmission rate (bits / second) is calculated by determining the chip rate as a function of the transmission frequency bandwidth. mI and mQ may be equal, in which case (2mI / N) log2N (bit / chip) information amount per chip is transmitted.

  In addition, in transmission on a transmission path with non-uniform transmission path characteristics, it is preferable to equalize signals with respect to the transmission characteristics and determine parameters in order to achieve good transmission quality. Here, signal equalization is to compensate the amplitude and phase of the received signal in accordance with the transmission path characteristics.

  In the OFDM system using FFT on the receiving side, equalization is performed using a synchronization signal, or a signal for equalization is transmitted from the transmitting side, and this signal is detected on the receiving side and equalized. You can go. Furthermore, not only in OFDM transmission, but in a communication system composed of a mobile station and a base station, in the uplink, the base station forms a receiving side, detects the received signal, performs equalization, and transmits from the transmitting side mobile station. On the other hand, in the downlink, the base station forms the transmitting side, detects the response signal from the receiving side mobile station, and adjusts the transmission signal.

  In an FDM (Frequency Division Multiplexing) transmission system composed of bands obtained by dividing a transmission frequency band, the transmission rate can be determined by setting the multiplexing degree of the multiplexed basic pulse train, the cycle of the data coded code pulse train, and the chip speed thereof. The transmission rate of this transmission method is obtained by setting the transmission rate assigned to each band and adding them in the transmission frequency band. In particular, if the period of the data-coded pulse sequence and the chip speed are equal in all bands, the information amount per chip is a value obtained by adding the information amounts per chip in all narrow bands. The transmission rate can be controlled by measuring the transmission conditions including the transmission path characteristics and the transmission environment using the signal, and adjusting these parameters on the transmission side based on this result. Furthermore, the same applies to the case where a data-coded pulse sequence having a common time-varying chip width is used in all bands.

  In this way, since the chip speed can be controlled for each narrow band, in the transmission on a transmission path with a non-uniform transfer function, the transmission output (energy per bit) is controlled for each band in order to achieve good transmission quality. Is preferred.

  For example, the bit error rate (BER) with respect to the S0 / N0 ratio represented by the bit energy (S0) to noise power density (N0) is used as an evaluation criterion, and these parameters are within the allowable range of the S0 / N0 ratio. Set the value. Alternatively, instead of S0 / N0, the bit error rate for (localized pulse energy) pair (localized pulse dispersion) at the peak of the localized pulse may be used as an evaluation criterion. In more detail, the chip speed is determined by specifying the code length and the multiplicity, the multiplicity is determined by specifying the code length and the chip speed, or the chip is specified by specifying the code length. Settings such as code length, chip rate and multiplicity, or some combination thereof, such as determining speed and multiplicity, are made to achieve the required transmission rate. When other limiting factors or determining factors are added, the setting is made including them.

  Further, the control means 60 is configured to control the transmission signal by a control signal from the receiving side. The code-type transmission device 1 generates a synchronization signal by the synchronization signal generation unit 80 according to the control signal and transmits the synchronization signal by the transmission unit 90.

  In the present invention, an encoded control signal generated by modulating a code pulse sequence or an ordered pulse sequence with a binary control pulse, or a multiplexed signal thereof, or a control pulse is converted into a shift time in the transmitted control signal. The received control signal can be detected by performing model detection on the receiving side using an ordered control signal obtained by spreading the received code pulse sequence with a high-speed code pulse sequence or an ordered pulse sequence. The method is not limited to these.

  The synchronization signal is a timing impulse train, a timing pulse train transmitted in parallel with the data signal, or a pulse train generated prior to the data signal in a device, system, IC or the like in which the transmission side and the reception side are close to each other. It is composed of a code pulse train or the like, or consists of a modulated signal modulated by any of these signals, and is input directly to the receiving side using a cable, radio wave, light, etc., and the receiving side detects this synchronization pulse Thus, synchronization may be captured or maintained.

  On the other hand, in the long-distance communication or the like, the synchronization signal may be configured and transmitted based on a code pulse train that is pre-arranged or juxtaposed with the data signal in both wireless communication and wired communication. Further, the synchronization signal based on the code pulse train may be a modulated signal modulated by a single code pulse train, a multiplexed basic pulse train, a multiplexed code pulse train, or a signal based on either of them. When a synchronization signal composed of multiplexed pulse trains is constructed using a quadratic product code pulse train, a non-time-varying variable using this shift time as a variable in a time-varying code pulse train whose shift time increases or decreases at a constant rate. In order to facilitate detection along the stream, it is preferable that the code pulse train is multiplied and multiplexed to be used as a second-order product multiplexed code pulse train.

  In addition, in the multicarrier scheme or OFDM scheme in which the transmission frequency band is divided, a timing pulse train common to all bands is transmitted in a scattered pilot channel or a specific divided band, or a data signal is transmitted in each divided band. A synchronization signal based on a code pulse train may be transmitted in advance or in parallel (refer to page 154 of Non-Patent Document 6 for the scattered pilot channel).

  The synchronization signal composed of the code pulse train and the modulated sync signal using the code pulse train are set so that the localized pulse appears at an integer multiple of the period of the data coded code pulse train. A code pulse train configured to be detected in the pulse train stream of the detection signal is preferable in that it enables rapid synchronization acquisition or holding.

  In the ultra-wideband transmission method, a timing impulse sequence or a timing pulse sequence may be transmitted in series or in parallel with an impulse sequence for transmitting data, and in a method of dividing and transmitting a frequency band such as ultra-wideband transmission by OFDM, Send a timing impulse train, a timing pulse train or their modulated signals in a band in series or in parallel to a data impulse train, or send a timing train of the corresponding band in a scattered pilot channel, or in a specific band A timing impulse train common to all bands may be transmitted, but is not limited thereto.

  In particular, in order to transmit a synchronization signal in the form of a code pulse train from the transmission side to the reception side, the synchronization signal is arranged in series in the basic pulse train or the multiplexed basic pulse train, or transmitted in parallel. Alternatively, the synchronization signal is arranged in series and the synchronization signal is arranged in parallel with the data signal. The transmission signal for synchronization is composed of a synchronization code pulse train or a multiplexed synchronization code pulse train, or is modulated with any one of these pulse trains, or is subjected to secondary modulation using a primary modulated signal. You may comprise.

  As with the data signal, the code sequence used for the synchronization signal is a binary or multi-level code sequence that can generate localized pulses such as an M-sequence code, a Gold code sequence, a KAZAMI code sequence, or a JPL sequence, It consists of a concatenated series, a Geffe series, a majority logic synthesis series, and the like. In addition, a synchronization signal that is a synchronization code pulse train arranged in series or a synchronization code pulse train arranged in parallel is a single code synchronization pulse train composed of a pulse train representing a single code sequence, or a shift time increases or decreases at a constant rate. A multiplexed synchronization pulse train obtained by multiplexing a pulse train obtained by multiplying a time-varying code pulse train representing a code sequence by a non-time-varying code pulse train having a shift time as a variable, or synchronization modulated by any one of these synchronization pulse trains It may consist of a pulse train modulated signal.

  The multiplexed synchronization pulse train may be configured by using different code sequences for the time-varying code pulse train and the non-time-varying code pulse train. Similarly, a higher-order multiplexed synchronization pulse train may be configured and used.

  On the receiving side, the synchronization may be maintained by controlling the frequency and phase of the local oscillator for the synchronization code pulse train so as to follow the synchronization signal.

  If the single-synchronized pulse train signal is an analog signal, it is localized using a detection circuit or a transversal matched filter composed of a CCD (Charge Coupled Device) having a localized pulse detection coefficient based on the model detection method. Detection pulse, or A / D conversion of analog signal for synchronization, and digital processing using localization pulse detection coefficient based on model detection method or digitalization of localization processing To detect the localized pulse and acquire synchronization. On the other hand, if the synchronization signal is a modulated signal, the detection of the localized pulse is performed with a SAW (Surface Acoustic Waveform) matched filter by directly or frequency converting the detected signal, or with a post-demodulation CCD matched filter. It is preferable to perform localized pulse detection using a model detection method by digital processing after A / D conversion or a digital matched filter.

  On the other hand, for easy processing, the multiplexed synchronization pulse train has a code length of the code sequence represented by the multiplied non-time-varying pulse train equal to the code length of the code sequence represented by the time-varying pulse train, It is preferable to set it to be less than that and particularly to be a fraction of an integer.

  The detected localized pulse is a pulse determined by a non-time-varying pulse train, and the set of pulses included in the period constitutes a pulse train representing a code sequence represented by the non-time-varying pulse train. A localized pulse is detected from a pulse train based on a model detection method using a code pulse train or a model of a localized pulse, or localized using a matched filter configured by a CCD, or A / A D-converted digital pulse sequence or a detection method using a localized pulse model or a digital matched filter is used to detect a localized pulse, and synchronization is captured using this localized pulse.

  The modulated multiplexed synchronization pulse train signal modulated by the multiplexed synchronization pulse train obtained by multiplexing the synchronization pulse train is localized as an analog signal by the SAW matched filter, and the localized pulse train is a matched filter or model constituted by a CCD or the like. A localized pulse is detected using a constant based on a constant coefficient for detection, and synchronization is captured using this localized pulse. Alternatively, the SAW matched filter output may be A / D converted, and the synchronization may be acquired by detecting the localized pulse using a digital filter configured by hardware or software. Alternatively, the detection signal may be A / D converted, and the synchronization may be captured by detecting localized pulses by a model detection method or a matched filter by digital processing.

  If Tsn is the chip width of the time-varying pulse train constituting the synchronization pulse train, Tk is the chip width of the data-coded code pulse train having a code length of N, and Tc is the chip width of the sequential pulse train, Tk is the chip width Tsn of the sync signal and Setting Tc to be an integral multiple of Tc and Tc being an integral multiple of Tsn simplifies the process and is suitable for reducing the cost of the receiving apparatus. The sampling rate of the CCD and the sampling rate of the A / D conversion circuit are preferably 2 times or more and an integer multiple of 1 / Tsn for maintaining synchronization. That is, the code length Nsn of the code represented by the synchronization code pulse sequence is set to an integer multiple of the code length N of the data encoding code pulse sequence, and the number of synchronization localized pulses per period T of the data encoding code pulse sequence is an integer number. It is preferable to set the respective code lengths and chip speeds so that As is well known to those skilled in the art, integer multiples include 1 unless otherwise specified. Note that the multiplexed synchronization pulse train may be configured by multiplying a pulse train representing a code sequence of three or more code pulse trains in a higher order and multiplexing.

  In the present invention, code pulse trains are used for the synchronization signal, the data coded code pulse train, and the sequential pulse train, and it is preferable that there is an integer relationship at least between these code lengths and chip speeds. Absent.

  Regardless of whether it is a signal consisting of a pulse train, a modulated signal, or a hopping signal, a code that can be localized signals such as an M sequence, Gold code sequence, KAZAMI (bulk) code sequence, etc. A series is used. In addition, as a sequence sequence for a sequence pulse sequence, linear complexity such as an M sequence, a Gold code sequence, a linear feedback shift register sequence (LFSR sequence) such as a KAZAMI (bulk) code sequence, a GMW sequence, a Bent sequence, and a complete linear complexity sequence Large sequences, sequences including non-linear operations, polyphase periodic sequences, multi-value sequences, and the like may be used. However, the present invention is not limited to these, and any code sequence that can be spread may be used. Regarding the code sequence, pages 52 to 93 of Non-Patent Document 1 can be referred to.

  An M-sequence code represented by a primitive polynomial in a Galois field GF (2) modulo 2 has a large code length that is an integer multiple of a small code length between sequences where the order of the primitive polynomial is a multiple relationship. In addition, since the autocorrelation function has only one pulse in the period and it is easy to detect a localized pulse, an M-sequence satisfying these relationships simplifies processing and is suitable for use. Also, a Gold code sequence and a KAZAMI code sequence having a similar relationship between code lengths can be used for a synchronization signal, an order pulse sequence, and a data-coded code pulse sequence.

  In the multiplexed product basic pulse train, among the M-sequence codes having the above relationship, a sequence with a small code length is used as a code sequence representing data, and a sequence with a large code length is used as a code sequence representing an order. It is preferable to construct a basic pulse sequence using the Gold code sequence and the KAZAMI (bulk) code sequence having the above relationship between the code lengths together with the M sequence, which increases the types of code sequences and simplifies the processing.

  Furthermore, in order to set the order of the size necessary to enable use in a large multiplicity, multiple access environment, etc., a data-coded code pulse train is generated with an M-sequence having a small code length that is easy to detect a model. It is effective to configure the sequential pulse train with an M sequence, a Gold code sequence, a KAZAMI code sequence, or the like. In addition, the period of the sequential pulse train is set to pKN (p is an integer), and p sets of data-coded pulse trains arranged in series on the time axis are ordered to generate a long-period basic pulse train. Multiplexed basic pulse trains may be generated by multiplexing. In order to generate a multiplexed basic pulse train having a larger multiplicity, ordering is performed using a plurality of sequential pulse trains. If a frame is formed by adding a header, a control signal, etc. to the multiplexed basic pulse train configured in this way, the transmission speed can be improved, which is suitable for increasing the capacity. When packet transmission is performed, the multiplexed basic pulse train generated as described above may be converted into a binary number to generate a data slot of the frame, and the frame may be configured with the header and the control signal. However, it is not limited to this.

  Under a multiple access environment, synchronization acquisition or maintenance is accomplished by transmitting data using timing signals common to all devices, or by using asynchronous synchronization signals between devices. The synchronization signal configured using the code pulse train may be configured by a code pulse train having a code length or a multiplexed code pulse train capable of setting the identification of the apparatus and the order in the signal. When the synchronization signal is composed of a single code pulse train, the number of code sequences necessary for identifying the device is used to detect the localized pulse to acquire or maintain the synchronization, or the device identification and The synchronization acquisition and holding may be performed independently, and the synchronization may be acquired and held by a localized pulse using a code sequence that is common or unique to all apparatuses, but is not limited thereto.

  On the other hand, when a multiplexed code pulse train is used as a synchronization signal, at least the number of code sequences necessary for identifying the device and setting the order of the multiplexed pulse train is used or required for setting the order. The synchronization signal is composed of a number of code sequences having a code length that can identify a device.

  Alternatively, a time-varying code pulse sequence having a common delay time starting from 0 and a shift time as a synchronizing pulse sequence using a code sequence, and a lead time multiplied by the shift time of the time-varying pulse sequence as a variable It consists of a multiplexed pulse train that is composed of a non-time-varying pulse train of a code sequence different from that of a time-varying pulse train, and the type of code sequence of the time-varying pulse train and / or non-time-varying pulse train corresponds to the device. You may comprise so that it may attach. The code length of the time-varying pulse train is preferably greater than or equal to the code length of the non-time-varying pulse train. By configuring the multiplexed pulse train as described above, the model-detected pulse train is localized and synchronous acquisition is performed using the localized pulse, and the time required for acquisition is shortened.

  The synchronization holding is established by a method such as controlling the phase of the local function oscillation circuit using the synchronization signal included in the detection signal by the synchronization means on the reception side, and may be performed as an analog process, or A / D conversion may be performed by digital processing. The multiplexed synchronous pulse train is formed by multiplexing a pulse train composed of a time-varying pulse train having a shift time changing at a constant rate and a non-time-varying pulse train that is multiplied by this and using the shift time of the time-varying pulse train as a variable. In addition, the multiplexed synchronization pulse train modulated signal is generated by modulating with the multiplexed synchronization pulse train. Alternatively, a single code synchronization pulse train modulated signal or a multiplexed synchronization pulse train modulated signal may be used as a primary modulated signal, and secondary modulation may be performed with a high frequency carrier wave or a code pulse train. The procedure for acquiring or holding synchronization from the primary modulated signal detected by demodulating the secondary modulated signal is the same as that for the single-code synchronized pulse train modulated signal or the multiplexed synchronized pulse train modulated signal.

  In the frequency band division method in which the transmission frequency band is divided and data transmission is performed, the transmission side uses a clock with a stable frequency, and a synchronization signal is arranged in series or parallel with the data signal or in parallel with the data signal. Modulate and transmit. The synchronization signal arranged in series with the data signal for synchronization acquisition and synchronization synchronization includes transmission of the synchronization signal through the pilot channel.

  In the present invention, also in the OFDM system and the DMT system, as in other systems, the receiving side performs synchronization acquisition or synchronization maintenance from the synchronization signal included in the detection signal. However, since the synchronization information is carried by the period of the synchronization pulse train by these modulation methods and the data information is carried by the cycle of the data-coded code pulse train, the synchronization signal and the data signal use signals of the respective cycle lengths. Detected.

  Therefore, the transmission of the synchronization signal is performed by serial-parallel conversion (S / P conversion) of the synchronization signal in units of chips on the transmission side, and assigned to a narrow band of a number equal to the number of chips of the cycle length or an integer multiple thereof, using IDFT The transmission signal is generated and transmitted, and on the receiving side, the synchronization signal chip included in the detection signal of the transmission signal is detected, parallel-serial conversion (P / S conversion) is performed, and the synchronization signal is reconstructed. The synchronization may be acquired directly from the reconstructed synchronization signal or by model detection and localization to detect the pulse. In order to detect the pulse of the synchronous pulse signal from the detection signal, the detection signal may be analyzed by frequency analysis using FFT. Further, the synchronization signal may be a signal multiplexed in parallel with the data signal.

  Alternatively, the transmission side multiplexes all the bands using a subcarrier modulated along the time axis with a stream of pulse trains of the period length of the synchronization signal for each divided narrow band, and generates a transmission signal with the multiplexed signal Then, on the receiving side, the synchronization signal reconstructed from the detection signal of the transmission signal is localized for each narrow band to acquire synchronization. The chip of the synchronization signal assigned to the subcarrier is synchronized with all narrowband chips, and the OFDM condition is satisfied for the chip at the same time, so the transmission side generates and transmits a transmission signal using IDFT. On the receiving side, the detection of the chip at the same time of the synchronization signal carried by each subcarrier from the detection signal is performed using FFT, and this procedure is repeated a number of times equal to the number of chips of the code length of the synchronization signal, and each narrowband is repeated. The synchronization signals assigned to are simultaneously reconstructed in parallel (in parallel), and the synchronization is captured or held in the same manner as in the case of an equi-synchronization pulse train in which model detection is performed from the reconstructed synchronization signals.

  In both the parallel transmission method and the stream transmission method, if the detection signal is divided into a plurality of bands using a band filter and analyzed by FFT, an A / D converter with a small number of quantization levels (number of bits) can be used. The configuration and processing of the apparatus are simplified and the cost is reduced.

  Alternatively, a narrowband to which a synchronization signal having an integer multiple of the period of the data signal is allocated and a narrowband to which the data signal is allocated are juxtaposed along the time axis in a synchronization signal having a period length or a stream of data signal pulse trains. The subcarrier may be modulated while maintaining chip synchronization, multiplexed and transmitted, and the transmission of the synchronization signal and the transmission of the data signal may be performed in parallel. Alternatively, instead of using a narrow band to which a synchronization signal is assigned, each narrow band may have a signal obtained by multiplexing a signal based on a multiplexed basic pulse train and a signal based on a synchronization code pulse train.

  Generation of a transmission signal on the transmission side is generated by modulating a carrier wave with complex data composed of a set of synchronized chips of multiplexed pulse trains assigned to each narrow band and orthogonally modulating the modulated signal. Preferably, modulation is performed using IDFT with complex data, and the output is orthogonally modulated and multiplexed to generate a transmission signal, which simplifies processing. On the receiving side, each synchronization signal or data signal pulse carried by each subcarrier is detected for each chip using FFT from the detection signal, and this procedure is repeated to reconstruct the assigned synchronization signal and data signal. Then, model detection is performed, and synchronization is acquired or held using this detection signal, and a data-coded pulse train is model-detected from the data signal to obtain a shift time to calculate source data. In addition, if the data has been error correction encoded, the source data is calculated by performing decoding and restoration. The procedure for acquiring or holding the synchronization using the reconstructed synchronization signal is the same as the procedure for acquiring or holding the synchronization using the synchronization pulse train signal. Further, the procedure for calculating data by detecting the data-coded pulse sequence from the reconstructed data signal and the procedure for decoding the source data are the same as those for the data signal comprising the code pulse sequence.

  The modulated signal by the synchronization signal in OFDM may be directly or may be obtained by detecting the localized pulse based on the model detection by detecting the localized pulse with the SAW matched filter after frequency conversion to the intermediate frequency. Alternatively, demodulation may be performed for A / D conversion, or A / D conversion may be performed for demodulation and model detection to detect localized pulses.

  The synchronization holding is performed in the same procedure as the synchronization acquisition of the single-code synchronization pulse train signal or the multiplexed synchronization pulse train signal using the reconstructed synchronization signal.

  The OFDM transmission signal preferably has a guard interval. As a result, if the synchronization signal is detected by removing the guard interval on the receiving side, the distortion of the detected waveform can be reduced.

  Synchronization acquisition and holding in the method of performing data transmission by dividing the transmission frequency band into narrow bands is performed by transmitting a transmission signal generated by modulating each subcarrier with a synchronization signal on the transmission side, and transmitting the transmission signal on the reception side. Detected and performed in each narrow band using the synchronization signal included in the detection signal, or performed at a fixed period for each narrow band, or performed on behalf of other narrow bands in any narrow band Good. In particular, in an OFDM system including a pilot channel, a pilot channel subcarrier is modulated and transmitted by a synchronization signal using a code sequence on the transmission side, and a synchronization signal modulated on the reception side is detected, and its localized pulse is detected. Therefore, it is preferable to acquire or maintain the synchronization of the channel or the synchronization of the channel and the other channel with good data transmission efficiency. The pilot channel makes a round of each channel at a constant period, and is a narrow band used for transmission of synchronization signals and identification of transmission path characteristics, and is usually used for transmission of data signals. Transmitted in series. Instead of a pilot channel, a scattered pilot channel may be used for identifying transmission path characteristics. Further, the synchronization signal of the pilot channel may be constituted by a code pulse train, and the model may be detected on the receiving side to detect this pulse train, and the localization pulse may be detected to acquire or synchronize the synchronization.

  Alternatively, a modulated signal that is generated based on a transmission signal generation pulse train including at least a data signal and is transmitted as an impulse train or a pulse train, or is linearly modulated or nonlinearly modulated to a constant amplitude by the impulse train or the pulse train. You may send as The transmission signal generation pulse train may further include a synchronization pulse train.

  It is preferable that a transmission signal composed of a modulated signal based on a data conversion order basic pulse train or a multiplexed basic pulse train thereof is model-detected by demodulating the detection signal. Alternatively, the basic pulse train is detected by multiplying the carrier wave of the detection signal and the data-coded pulse sequence of the basic pulse train is detected as a model, or the frequency of the detection signal is converted to an intermediate frequency and the intermediate frequency carrier wave is detected by this detection signal. The data-coded pulse train may be model-detected by multiplying by.

  On the other hand, in the modulated signal modulated by the transmission signal generation pulse train composed of the product fundamental pulse train or the multiplexed product fundamental pulse train, the detection signal is demodulated, and the demodulated signal is multiplied by the sequential pulse train, and data is detected by model detection. An encoded code pulse train is detected, the pulse train is localized, and a shift time is detected. When the demodulated signal is A / D converted and stored, the transmission signal generation pulse train is reproduced, the sequential pulse train is multiplied by this pulse train, and then model detection is performed. Alternatively, it detects a modulated signal of a pulse train composed of a data coded code pulse train modulated by multiplying a detection signal with a sequential pulse train or a data coded code pulse train multiplied by an adjustment pulse, and detects a model from the modulated signal. Based on the data, a data encoding code pulse train is detected and a shift time is output. Alternatively, the detection signal having the intermediate frequency may be generated by performing frequency conversion of the detection signal, and the shift time may be calculated by detecting the model of the data-coded pulse train by the same processing. Alternatively, in addition to multiplying the sequential pulse train, the detection signal is multiplied by the carrier wave and the model detection is performed on the pulse train composed of the data coded code pulse train or the data coded code pulse train multiplied by the adjustment pulse and converted into data. The code pulse train may be detected, and the shift time may be calculated from this pulse train. Instead of the carrier wave, an intermediate frequency carrier wave may be multiplied. Some or all of these processes may be performed using analog computation, digital computation, or analog computation and digital computation.

  When the transmission signal generation pulse train is a binary conversion pulse train representing a chip of a multiplexed basic pulse train converted into a binary number, the multiplexed basic pulse train is regenerated from the demodulated detection signal, and this regenerated multiplexed The basic pulse train is multiplied by the sequential pulse train, model detection is performed, and then localized pulse detection is performed. However, the present invention is not limited to this.

  The synchronization signal includes a timing impulse modulated signal modulated by a timing impulse, or a modulated signal modulated by an impulse train based on a code pulse train or a code pulse train. The timing impulse modulated signal is detected at the receiving end and used to capture or maintain synchronization. The detection signal is directly or model detected, and localized pulses are detected to capture or maintain synchronization. The synchronization signal of the modulated signal modulated by the code pulse train or the impulse train based on the code pulse train is localized by detecting the code pulse train as a model, and captures or holds the synchronization based on the localized pulse. The transmission signal may be a secondary modulated signal in which these modulations are primary modulations.

  A transmission signal including a primary modulated signal based on a synchronization signal or a data signal is subjected to model detection by demodulating the primary modulated signal detected by frequency conversion (demodulation) of the secondary modulated signal on the receiving side, and a matched filter Alternatively, it is localized using a correlation function, or A / D conversion is performed on the primary modulated signal and the model is detected by digital computation, and the primary modulated signal is localized using a SAW matched filter. Localization and localization pulse detection are performed. The synchronization holding is performed by demodulating the primary modulated synchronization signal, detecting the model, and using a synchronization holding circuit. In any primary modulation, since transmission of the synchronization signal requires time of the period length of the synchronization pulse train, localization and synchronization acquisition and holding are performed on a period basis.

  In the present invention, the primary modulation and the secondary modulation may be performed in the reverse order.

  In the present invention, the synchronization signal and the data signal may be transmitted using a hopping carrier wave whose frequency hops. The hopping of the present invention is performed corresponding to a chip of a synchronization code pulse train, a chip of a basic pulse train, or a chip of a multiplexed basic pulse train. As known to those skilled in the art, hopping is classified according to speed into low-speed hopping that hops once for a plurality of chips, constant-speed hopping that hops once for one chip, and high-speed hopping that hops multiple times. .

  In the case of high-speed hopping, a plurality of hopping chips having a chip width TH with respect to the chip width Tk of the data code pulse train are included, and detection values for NTk / TH times of hopping are included for N equivalents.

  The transmission side generates a transmission signal by modulating a carrier wave that hops a frequency band divided into a plurality of bands with a chip amplitude value of a transmission signal generation pulse train associated with a hopping pattern along a time axis. To send. Alternatively, the frequency of the carrier modulated by the primary modulated signal generated by modulating the primary carrier with a synchronization signal or data signal consisting of a code pulse train hops between the divided bands with a constant hopping pattern, The primary modulated signal is spread over the frequency band. Similar to the non-hopping modulation, any of linear modulation including APSK or constant amplitude nonlinear modulation is used for this modulation.

  Further, in the present invention, instead of performing linear modulation with the chip amplitude value of the transmission signal generation pulse train, the amplitude value of the chip is converted into a binary number and subjected to primary modulation with a binary conversion pulse train to perform primary modulation. A signal may be generated and a hopping carrier wave may be modulated with the modulated signal. Alternatively, instead of the binary conversion pulse train, a primary modulated signal is generated by primary modulation with a secondary encoded pulse train, a hopping carrier wave is modulated with this modulated signal, and model detection is performed on the receiving side. The pulse of the value conversion pulse train may be detected to regenerate the transmission signal generation pulse train.

  At least in the range where the chip speed of the data signal and the carrier wave frequency and the carrier wave frequency hopping speed are stable, the transmission side transmits the synchronization signal in series with the data signal, and the reception side is included in the detection signal. Detect a localized pulse of a pre-synchronized signal. Next, the data-coded pulse train may be model-detected from the detection signal, then the localized pulse may be detected, and the shift time based on the localized pulse of the synchronization signal may be calculated to calculate the data. In addition, a data signal corresponding to a plurality of cycles of the data-coded pulse sequence may be transmitted following the synchronization pulse train signal within a stable frequency range.

  In synchronization acquisition in the frequency hopping method, the transmission side hops the frequency of the carrier wave modulated with the code pulse sequence for synchronization with a fixed hopping pattern and spreads it over the frequency band, and the transmission side detects the transmission signal according to the hopping pattern. Then, the synchronization signal is restored using the signal obtained by demodulating the detection signal, model detection is performed, and the synchronization localized pulse is detected by the matched filter. Alternatively, the transmission side hops the carrier wave modulated by the primary modulated signal modulated by the code pulse sequence for synchronization using the code sequence and transmits it, and the detection side detects the primary signal from the detection signal detected according to the hopping pattern. The modulated signal is recovered and the SAW matched filter is used to detect localized pulses and capture synchronization.

  In the frequency hopping method, synchronization is maintained by spreading a synchronization signal composed of a synchronization holding pulse train on the transmission side in the transmission frequency band, and repeatedly transmitting it every period of the hopping pattern period length or an integral multiple thereof. Is performed by restoring the synchronization signal from the detection signal detected according to the hopping pattern and detecting the model and controlling the phase of the local oscillator, or the transmission side is modulated with the synchronization signal instead of the synchronization signal. The modulated signal is transmitted, and the receiving side restores the primary modulated signal and performs model detection on this to acquire the synchronization signal and control the phase of the local oscillator to maintain the synchronization, or the period of the hopping pattern Instead of a method of repeatedly transmitting a synchronization signal every time that is an integral multiple of the length, a synchronization signal having a period of a length included in a hopping symbol is used as a data signal symbol. And it transmits the location to detect a synchronization signal and a model detected for each hopping chip at the receiver performs the synchronization holding by use of this is not limited thereto.

  The synchronization holding may be performed by configuring the reception side to have a holding circuit including an envelope detection circuit, a hopping synthesizer, and a VCO, detecting a detection signal according to a hopping pattern, and controlling the VCO with the output. Further, model detection may be performed on the detection signal in order to improve the SNR of the synchronization signal.

  The input means 10 obtains data such as sound information including sound as source data, image information and / or other physical information as a digital quantity and supplies it to the error correction coding means 20, such as a microphone. Acoustic sensors, optical sensors such as CCD, infrared sensors, far-infrared sensors, radiation sensors, magnetic sensors, electromagnetic wave sensors, etc. According to the control signal of the control means 60, the timing with the synchronization signal is maintained, and data acquisition and output to the error correction coding means 20 are performed. Alternatively, the input means 10 may receive data comprising a digital quantity and output a signal to the error correction coding means 20 in accordance with a control signal from the control means 60, or read data stored as a digital quantity. The error correction coding means 20 may be supplied.

  The error correction encoding means 20 encodes data so that error correction is possible in accordance with the control signal of the control means 60, and outputs the data to the data encoding code pulse train generation means 30. The data pulse input by the input means The stream is converted into parallel data, and the data is encoded for error correction. As the error correction code, a turbo code, a BCH code, a convolutional code, a Reed-Solomon code, an interleave, or the like may be used alone or in combination, but is not limited thereto.

  In transmission in a noisy environment, turbo encoding is performed, and the product is multiplied by a code pulse train having the pulse width as a cycle to convert it into an encoded pulse train, and this encoded pulse train is used as a transmission signal generation pulse train to transmit a transmission signal. May be generated, and a model of the transmission signal is detected on the receiving side to detect a pulse of the turbo code that has been multiplied, and turbo decoding may be performed using this pulse.

  The error correction coding means 20 may be configured to perform error correction coding on a basic pulse train or a multiplexed basic pulse train on a set of chips instead of performing error correction coding on data. Alternatively, it may be configured to have first error correction encoding means for error correction encoding data and second error correction encoding means for error correction encoding the basic pulse train or the multiplexed basic pulse train with respect to the chip. .

  To explain in detail the basic pulse sequence error-correction-encoded with respect to the chip set, the transmission side assumes that the monovalent function representing the error correction code is a ([t / Tc]), and the s-th sequential pulse sequence is Xr (a ([T / Tc]) Tc−sTc), a basic pulse train using this sequence pulse train is multiplexed, and a transmission signal is generated and transmitted using the multiplexed basic pulse train. On the other hand, the receiving side is configured to multiply the detection signal by the sequential pulse train Xr (a ([t / Tc]) Tc-sTc) to detect the data coded pulse train. Here, [] is a Gaussian symbol, and [t / Tc] represents the maximum integer not exceeding t / Tc. Moreover, a ([t / Tc]) represents the code value at time t of the error correction code pulse train determined by [t / Tc]. In order to simplify the explanation, as an example, a ([t / Tc]) may represent a code sequence that randomly changes with 0 ≦ a ([t / Tc]) <KN.

Therefore, in the case of a quadratic product basic pulse train, the r-th basic pulse train Bar (t) is

It is represented by

  That is, the time function Bar (t) representing the quadratic product basic pulse train includes the adjustment pulse d (rTc), the data coded pulse train XK (t−ζr), and the sequential pulse train Xr (a ([t / Tc]) Tc−. rTc) is a time-varying function constructed by multiplication.

If the order pulse train representing the r-th has a shift time b (r) Tc that changes in accordance with the determined order, the shift time becomes b (r) Tc instead of rTc, and the order pulse train becomes Xr (a ([t / Tc]) Tc−b (r) Tc), and therefore, the rth basic pulse train Babr (t) having a random shift time is

It becomes. b (r) Tc includes rTc.

When a ([t / Tc]) represents a code sequence, an error is corrected by detecting a localized pulse from a data-coded code pulse sequence on the receiving side, so that the equations (1) and (2) a ([t / Tc]) includes a function representing a code sequence. In particular, if a ([t / Tc]) is [t / Tc], the sequential pulse train is a function of time with a shift time of b (r) Tc.

It is expressed as

  Further, in the equations (1) and (2), instead of the shift time ζr representing data, a randomly changing monovalent function representing data is set to z (r), and the shift time of the data coded pulse train is encoded with respect to the data. May be used.

   As described above, the multiplexed basic pulse train composed of the basic pulse train in which the order pulse train represented by the shift time changing according to the code sequence included in the present invention is multiplied on the fixed-chip data coded pulse train has been described. The invention includes a time-varying chip-multiplexed basic pulse train consisting of a basic pulse train using a time-varying chip data-coded pulse sequence whose chip width changes.

  FIG. 2 shows an example of the error correction coding means 20 when the orthogonal modulation method is used. The data acquired by the input means 10 is converted into a parallel signal by a serial-parallel conversion (S / P conversion) unit 21, error-correction-encoded by an encoding unit 22, and error-correction-encoded I channel data and Q channel Data is output.

  In the pulse transmission method and the transmission method using a single carrier wave, encoded data for a single channel is output. On the other hand, in the orthogonal modulation method, the frequency band division method and the frequency hopping method using the orthogonal carrier or the orthogonal subcarrier, the data is error-corrected in each band and the I channel data and the Q channel data are output. It is preferable to perform error correction coding in a band and output I channel data and Q channel data in each narrow band.

  The data encoding code pulse train generating means 30 generates a data encoding code pulse train having a shift time associated with data that is a source data or data that has been subjected to error correction coding in accordance with the order, with a pulse length of N. . This pulse train is generated by setting the shift time of the sequential pulse train in a timely manner according to the data, or by generating the shift time of a pulse train representing a code sequence different from the sequential pulse train according to the data. Is done.

  In the data conversion, the data is converted into m-digit N-ary data, and the shift time of the encoded pulse train is set to a time corresponding to the N-ary data according to the order, and the shift time of one code pulse train per N-ary data Is preferably performed in association with each other because of high conversion efficiency. Alternatively, the source data may be converted into N-ary data and error correction coding may be performed as N-ary data, and a data-coded pulse sequence may be generated using this data. This data-coded pulse train may be a time-varying pulse train, or may be composed of a non-time-varying pulse train with the shift time of the sequential pulse train as a variable.

  When the generated data encoding code pulse train has a different chip width, the chip width of the fixed-width pulse train generated in this way is widened or reduced by a predetermined method, and the data encoding code having a time-varying chip width is obtained. A pulse train is generated. The chip width of the time-varying chip is preferably set to an integral multiple of the fixed chip width or 1 / integer, but is not limited to this.

  The process of generating the time-varying chip width data-coded code pulse train is not limited to the process described above, and a time-varying chip code sequence having a chip width that is widened or reduced may be converted into data.

  Hereinafter, in order to simplify the description, a case where a fixed chip quadratic product basic pulse train having an order pulse train associated with a shift time in which the order increases in ascending order will be described in detail.

  Assuming that the quadratic product basic pulse train is Br (t), Br (t) is expressed by the following equation (4) using the sequential pulse train and the data-coded pulse train.

   In the equation (4), Xr (t−rTc) represents an order pulse train that is a function of time, and the order is set by the shift time rTc. XK (t-ζr) represents a data-coded pulse train that is a function of time, and ζr is a shift time, and thereby represents data from 0 to N−1 having a rank r. The multiplied basic pulse train may be a pulse train obtained by multiplying pulses and pulse trains in a higher order. As an example, the high-order basic pulse train may be configured using a pulse train including a plurality of time-varying data-coded pulse sequences and an ordered pulse train.

In the basic pulse train in which the data-coded pulse sequence has a time-varying chip and the sequential pulse train is composed of a fixed-chip code pulse train, equation (4) is replaced with Xv (t-dr)) instead of XK (t-ζr). make use of

It is expressed.

  The time-varying chip data-coded pulse train Xv (t-dr) is a pulse train having a cycle Tv and the same number of chips as the fixed-chip data coded code pulse train and a shift time dr. In addition, it is preferable to set Xv (t-dr) so as to have a constant time-varying chip arrangement in each cycle, but the configuration is not limited to this.

Further, a data signal s (t: m) composed of a multiplexed basic pulse train in which the basic pulse train represented by the equation (5) is multiplexed m times is expressed as follows:

It is expressed.

  The expression (6) represents a multiplexed basic pulse train having a multiplicity of m, in which the basic pulse train has a data-coded code pulse train of time-varying chips, its cycle is Tv, and the number of chips is the data-coded pulse train XK (t-ζr). Is equal to the number of chips KN of the sequential pulse train Xr (t−rTc) included in the period T, and the amplitude and chip width of the chip change according to time according to the equation (6). A multiplexed basic pulse train composed of basic pulse trains with a multiplicity of 1 represents a basic pulse train.

  The amount of information carried by the time-varying chip-multiplexed basic pulse train having a period including the basic pulse train converted from the fixed-chip data-coded pulse train to the time-varying chip data-coded pulse train is the information carried by the fixed-chip multiplexed basic pulse train. On the other hand, the transmission rate is determined by the period Tv instead of the period T of the fixed chip multiplexed basic pulse train. In order to facilitate understanding, the amount of information carried by the fixed chip multiplexed basic pulse train will be described in detail below.

  The shift time of the data-coded pulse sequence is one of N points included in the range from 0 to (N-1) Tk, where N is the code length and Tk is the chip width. One period of the code pulse train can represent N numbers. A data signal with a multiplicity of m, in which m basic pulse trains including m ordered data-coded pulse trains with a code length of N are multiplexed, is a number whose number of digits is m modulo N according to the order indicated by the sequential pulse train And a data-coded pulse train having a rank of v is set so that the number represents the vth digit and the number is indicated by the shift time. Good. The amount of information per chip of the data signal is obtained by dividing the logarithm of 2 in this number by N, and is (m / N) log2N (bit / chip), and the chip speed of the sequential pulse train is 1 / With Tc, a transmission rate of m / (TcKN) log2N (bits / second) is achieved. That is, the transmission rate is mlog2N divided by TcKN, and may be expressed as mlog2N / (TcKN). Since the chip speed is proportional to the transmission bandwidth, this transmission speed is proportional to the transmission bandwidth.

  This transmission rate is larger than 1 / (Tc) log2m, which is a transmission rate in the case of pulse transmission for transmitting a pulse having an amplitude m when the multiplicity m is increased, and increases monotonously. Become fast. Further, for narrowband noise, an S / N ratio equal to the chip speed ratio K is improved, and for narrowband noise and wideband noise, an improvement proportional to the code length of the data coded pulse train is made. Therefore, transmission quality is improved compared to pulse transmission. As a result, a high transmission rate and a large-scale channel capacity are achieved as compared with the pulse transmission method.

  Further, the multiplexed basic pulse trains may be grouped, and the number represented by the number of data coded code pulse trains included in each set and the shift time may correspond to the data. As an example, the transmission frequency band is divided into a plurality of narrow bands, and the complex modulated signals in each narrow band are each composed of an in-phase component (real component) I and a quadrature component (imaginary component) Q by multiplexed basic pulse trains. In this case, if the multiplicity of the I component of the complex multiplexed basic pulse train assigned to the nth narrow band is SnI and the multiplicity of the Q component is SnQ, the per-chip ((SnI + SnQ) / N) A log 2N (bit / chip) amount of information is conveyed, and if the chip speed is determined, the transmission speed can be obtained. This equation may be written as ((SnI + SnQ) log2N) / N. The amount of information carried in all bands is the sum of the amount of information carried in each narrow band, and the transmission rate is the sum of the transmission rates in each band.

  The data encoding code pulse train generation means 30 includes a data conversion section, a memory and a data conversion section, and converts data into a shift time of the code pulse train in accordance with the control signal of the control means. The data format is converted to an N-ary m-digit data format and assigned to m code pulse trains, and the respective shift times are set.

  The data-coded pulse sequence is a pulse train in which a code sequence of the number equal to the number of digits is generated corresponding to the rank as the code pulse sequence for the data-coded code pulse sequence, and the shift time is set according to the data. This is a pulse train in which the shift time of one code sequence is set according to the data. A data-coded pulse sequence composed of a single code sequence is multiplied by a code sequence representing the order in association with a shift time that changes in a predetermined order, and is ordered.

  Data conversion may be performed using a shift register having a required number of stages connected in a ring, or may be performed by storing a code pulse train in a memory and controlling the reading order, but is not limited thereto. More specifically, in a transmission system using pulse transmission and a single carrier wave, data is repeatedly generated by a number of times equal to the multiplicity m using one set of N-stage shift registers, or the number of N stages equal to the multiplicity is used. Data may be converted into data by parallel processing using a shift register to increase the speed, but is not limited thereto.

  On the other hand, in the quadrature modulation method using quadrature carriers, processing is simplified and speeded up by using two sets of N-stage shift registers corresponding to the I and Q channels. In order to further increase the speed, parallel processing may be performed using a number of shift registers equal to the number of digits. Furthermore, in the frequency band division method of dividing and transmitting the transmission band including OFDM, the number of shift registers may be increased or decreased for each divided band according to the transmission speed.

  FIG. 3 shows an example of a data coded code pulse train generating means 30 having a data converting unit 31s, a memory 34s, a data converting unit 32s, a code pulse train generating unit 33s, and a chip controller 35s. The data code pulse train generating means 30 is suitable for generating data code pulse trains for impulses, pulses and single carrier modulated signals, and frequency hopping, but the use is not limited to this. The data that has been subjected to error correction coding is converted into a data format of N-ary m digits by the data converter 31s and stored in the memory 34s. The data stored in the memory 34s is transferred to the data conversion unit 32s, the shift time of the code pulse sequence in the initial state generated by the code pulse sequence generation unit 33s for the data conversion code pulse sequence is set, and the data conversion code pulse sequence is generated. The chip width is converted by the chip controller 35s. In the data conversion code pulse train having a fixed chip width, the output of the data conversion unit 32 s is output to the transmission signal permutation means 70.

  Although FIG. 4 illustrates the data coded code pulse train generating means 30 used for orthogonal modulation, it may be used for parallel OFDM pulse transmission, parallel impulse OFDM transmission, frequency hopping transmission, and the like.

  The data subjected to error correction coding is converted into a data format of N-ary m digits by the data converter 31c and stored in the memory 34c. N represents the code length of the code sequence, N = 2n−1, m is the multiplicity of the basic pulse train, and n is an integer.

  The I-channel data stored in the memory 34c is sequentially read out in ascending or descending order of digits according to the control signal and transferred to the I-channel data converting unit 32c1, and the code pulse sequence generating unit 33c for the data encoding code pulse sequence A shift time of the generated code pulse train in the initial state is set, and an I-channel data coded code pulse train is generated. The Q channel data conversion code pulse train is also converted into data by the data conversion unit 32c2 using the Q channel data read from the memory. In the time-varying chip data conversion code pulse, the output of the I channel and the Q channel is input to the chip control unit 35c, and the chip width is converted.

  The OFDM type code transmitter 1 is classified into a stream modulation method and a parallel modulation method according to the modulation method. In the stream modulation scheme, a multiplexed basic pulse train of multiplicity m is assigned as complex data to J narrow bands, and each carrier is orthogonally modulated along the time axis with the multiplexed basic pulse train for I channel and Q channel. The J sets of complex multiplexed basic pulse trains form a stream synchronously, and each carrier wave is modulated synchronously on a chip (see FIG. 31 for this).

  On the other hand, in the parallel modulation method, two sets of multiplexed basic pulse trains are used as complex data, and each chip included in the period is allocated to J narrowband I channels and Q channels to modulate a carrier wave (about this) (See FIGS. 32A and 32B).

  In both of the serial method and the parallel method, these multiplexed basic pulse trains have data-coded pulse trains having a time-varying chip width.

  FIG. 5 exemplifies the data coded code pulse train generating means 30 using stream modulation in the OFDM system in which the frequency band is divided into J narrow bands. In this stream modulation, a carrier or subcarrier is modulated by a stream of pulse train or impulse train. In the present invention, the carrier is modulated by a chip representing a multiplexed basic pulse train that changes with time.

  The data code pulse train generating means 30 is suitable for speeding up the data conversion unit and is also used for parallel modulation OFDM, UWB (ultra-wideband) transmission, and the like.

  The input data is converted into a data format of N-ary m digits by the data converter 31b and stored in the memory 34b. The data stored in the memory 34b is input to one of the corresponding shift registers 32b11 to 32bJ2 of the data conversion unit 32b, and the shift time of the code pulse sequence generated by the code pulse sequence generation unit 33b for the data conversion code pulse sequence is set. Then, the chip width of each narrow band I channel and Q channel data-coded pulse train is changed by the chip controller 35b and output to the transmission signal generating means 70 in parallel. When used for UWB, a narrow band represents a divided band.

  In FIG. 5, shift registers for I and Q channels are provided for each narrow band, and data conversion processing is repeated a number of times equal to the multiplicity mj assigned to the jth narrow band I channel and Q channel. However, the present invention is not limited to this. Data conversion processing is performed in parallel using a number of shift registers equal to the multiplicity, or a single shift is performed in a narrow band if processing speed is allowed. A register may be provided to perform data conversion processing corresponding to the I channel and Q channel, or data conversion processing may be performed a number of times equal to the multiplicity m of the entire band with a single shift register.

The ordering of the code pulse train is performed by assigning an order to the required number of code pulse trains. In this case, the data-coded pulse train is a data-ordered pulse train generated by setting the shift time of the ordered pulse train, which is an ordered code pulse train, according to the data.

  Alternatively, a code pulse sequence that is composed of a code sequence different from the data-coded code pulse sequence and has a code length of a size necessary for setting the order of the data signal, and changes (increases or decreases) at a predetermined shift time. This is performed by multiplying the data sequence code pulse sequence by the sequence pulse sequence associated with the shift times. Alternatively, the ordered pulse train may be encoded with respect to the chip set. Any order pulse train uses one or a plurality of code sequences such as an M-sequence code, Gold code sequence, or KAZAMI code sequence having a small partial correlation value or cross-correlation value in order to reduce intra-device interference and inter-device interference. It is preferable to configure.

  In particular, since the sequential pulse train for multiplication is multiplied by the data coded code pulse train, the chip speed is set to be an integral multiple of the chip speed of the data coded code pulse train and the cycle is an integer multiple including the same multiple. It is preferable to use a code sequence having a small cross-correlation value for separating the data-coded pulse sequence on the receiving side. That is, the chip speed 1 / Tc of the sequential pulse train is set to be higher than the chip speed 1 / Tk of the data-coded pulse train, and the speed ratio K = Tk / Tc is set to be a large integer. On the side, it is preferable that narrow band noise is reduced when multiplying sequential pulse trains to separate data-coded pulse trains, and detection becomes easy. Tc represents the chip width of the sequential pulse train, while Tk is the chip width of the data coded code pulse train. In signal transmission with a narrow frequency band by the product processing, noise in the frequency band is spread (frequency conversion outside the band), so the S / N ratio is improved in proportion to the value of K.

  In particular, in transmission using a transmission path in which transmission is performed exclusively, the code length of the sequential pulse sequence included in the product basic pulse sequence is an integer multiple of the code length N of the data-coded code pulse sequence and the multiplicity of the entire band. However, the present invention is not limited to this. By setting in this way, the order pulse train can construct an order of a required size, and its cycle can be set to an integral multiple of the cycle of the data-coded pulse train. Thus, the basic pulse train is a spread signal obtained by spreading the data coded code pulse train with the sequential pulse train, and its spectrum is distributed around the discrete spectrum of the sequential pulse train.

  On the other hand, in a multiple access environment, the sequential pulse train assigns a number of data-ordered pulse trains that can be set to all transmitting devices to the device, or uses a product-specific sequential pulse train that is unique to the device, Alternatively, it is configured by using a sequential pulse train for product common to all apparatuses, and is used for setting the order in the apparatus and identifying between the apparatuses.

  FIG. 6A illustrates transmission signal generation means 70, sequential pulse train generation means 50, and control unit 60 for a single carrier modulated signal. The transmission signal generation means 70 generates a modulated signal of a multiplexed basic pulse train, and includes an ordering unit 702s, a multiplexing unit 703s, a signal control unit 713s, a primary modulation unit 701s, a filter 708s, a modulation unit 709s, A primary carrier generation unit 711s and a carrier generation unit 710s are provided.

  The data code pulse sequence generated by the data code pulse sequence generation unit 30 illustrated in FIG. 3 is multiplied by the order pulse sequence generated by the order pulse sequence generation unit 50 in the ordering unit 702s, and is ordered. Multiplexed in 703 s and then input to the signal controller. The signal control unit controls generation of modulated signals such as a preamble, a control signal, and a data signal. The output signal of the signal control unit 701 s modulates the primary carrier generated by the primary carrier generation unit 711 s and is filtered by the filter 708 s, and then modulates the carrier generated by the carrier generation unit 710 s by the modulation unit 709 s. A transmission signal is generated. These strokes are controlled by the control means 60.

  FIG. 6B illustrates transmission signal generation means 70, sequential pulse train generation means 50, and control means 60 that perform primary modulation with a bit stream of a binary conversion pulse train in which chips of a multiplexed basic pulse train are converted into binary numbers. The transmission signal generation means 70 includes an ordering unit 702t, a multiplexing unit 703t, a bit conversion unit 712t, a signal control unit 713t, a primary modulation unit 701t, a primary carrier generation unit 711t, a filter 708t, a modulation unit 709t, and a carrier generation unit 710t. It has. The data-coded pulse train is multiplied by the order pulse train generated by the order pulse train generating means 50 in the ordering unit 702t to become a basic pulse train. The basic pulse train is multiplexed by the multiplexing unit 703u, and the chip width of the multiplexed basic pulse sequence which is the output signal is converted by the chip control unit 716t, and converted into binary numbers by the bit conversion unit 712t to become a binary conversion pulse train. A bit stream consisting of a binary pulse train is generated. This signal is input to and controlled by the signal control unit 713t, and then the primary carrier wave generated by the primary carrier wave generation unit is modulated at 701t to generate a primary pulse modulated signal, which is filtered by the filter 708t and modulated. The unit 709t modulates the carrier wave generated by the carrier wave generation unit 710t to generate a transmission signal.

  FIG. 7A illustrates the transmission signal generation unit 70, the sequential pulse train generation unit 50, and the control unit 60 of the code-type transmission apparatus 1 using orthogonal modulation, and processing is performed according to the control signal of the control unit 60. An ordering unit 702a composed of an ordering circuit 702a1 corresponding to the I channel and an ordering circuit 702a2 corresponding to the Q channel for multiplying the order pulse train generated by the order pulse train generating means 50 on the I-channel data-coded code pulse train. A multiplexing unit 703a including an I-channel multiplexing circuit 703a1 and a Q-channel multiplexing circuit 703a2 for multiplexing the digitized data-coded pulse sequences, a signal control unit 713a including signal control circuits 713a1 and 713a2 for performing signal control, Modulation circuit 701a1 for modulating the I-channel carrier wave (component represented by cosωt) generated by the primary carrier wave generator 711a with the I-channel multiplexed basic pulse train and the Q-channel carrier wave (component represented by −sinωt) 1 including a modulation circuit 701a2 for modulating the signal with a multiplexed basic pulse train for Q channel Modulator 701a, filter 708a including I channel filter 708a1 and Q channel filter 708a2, I channel signal and Q channel signal output from filter 708a as inputs, and main carrier wave generated by main carrier wave generation unit 710a is orthogonally modulated And each operation is performed in synchronization with the clock of the control means.

  For primary modulation of a multilevel pulse train such as a multiplexed basic pulse train, a linear modulation scheme that generates a modulated signal having an amplitude value proportional to the pulse amplitude is used. Since these data-coded pulse sequences can be detected orthogonally by orthogonal carriers, the same rank may be assigned to the I channel and the Q channel, or different ranks may be assigned.

  The data-coded pulse train is input to the ordering circuits 702a1 and 702a2, and the order pulse train generated by the order pulse train generating circuit 50a of the order pulse train generating means 50 is multiplied to generate an ordered basic pulse train. This process is repeated for the multiplicity, and the multiplexed basic pulse train of the in-phase component I is generated by the multiplexing circuit 703a1 from the basic pulse train that is the output signal of the ordering circuit 702a1. Similarly, a multiplexed basic pulse train of orthogonal component Q is generated from the output signal of the ordering circuit 702a2 by the multiplexing circuit 703a2.

  A sequence is set to the multiplexed basic pulse trains of I channel and Q channel input to the signal control unit 713a by adding control signals and the like in the signal control circuits 713a1 and 713a2, respectively.

  The I component is input to the primary modulation circuit 701a1 and modulates the I-channel carrier wave generated by the primary carrier wave generator 711a. Similarly, the Q component is input to the modulation circuit 701a2 to modulate the Q channel primary carrier. These modulated signals are filtered by the filters 708a1 and 708a2, respectively, and then input to the quadrature modulation unit 709a, and the main carrier wave generated by the carrier wave generation unit 710a is quadrature modulated to generate a transmission signal.

  Instead of modulating the main carrier with the primary modulated signal, the primary modulation unit sets the frequency of the orthogonal primary carrier generated by the primary carrier generation unit 711a to the frequency of the carrier of the carrier generation unit 710a. Modulation by 701a and filtering by filter 708a may be used as the output of transmission signal generating means 70.

  FIG. 7B illustrates an orthogonal modulation transmission signal generation means 70 having a bit conversion unit, an order pulse train generation means 50 and a control means 60, and processing is performed according to the control signal of the control means 60. The transmission signal generation means 70 includes an ordering unit 702u, a multiplexing unit 703u, a bit conversion unit 712u, a signal control unit 713u, a primary modulation unit 701u, a primary carrier generation unit 711u, a filter 708u, an orthogonal modulation unit 709u, and a carrier generation. Part 710u. The ordering unit 702u and the multiplexing unit 703u operate in the same manner as 702a and 703a, respectively. The bit conversion unit 712u performs bit conversion on the multiplexed basic pulse train in accordance with the I channel and the Q channel, and the bit converted binary conversion pulse train forms a sequence together with the control signal and the like in the signal control unit 713u. The primary modulation unit 701u performs pulse modulation on the primary carrier wave generated by the primary carrier wave generation unit 711u with the binary conversion pulse train to generate a primary modulated signal. The I-channel and Q-channel primary modulated signals are respectively filtered by the filters 708u1 and 708u2, and the orthogonal modulation unit 709u modulates and multiplexes the orthogonal carriers generated by the carrier generation unit 710u, and outputs them.

  FIG. 8A shows one embodiment of the transmission signal generation means 70 in the OFDM system using stream modulation, and the sequential pulse train generation means 50 and the control means 60 are illustrated together with the transmission signal generation means 70. The multiplexed basic pulse train assigned to each narrow band is synchronized with all other narrow band multiplexed basic pulse trains, and transmitted in parallel in units of chips of the sequential pulse train (see FIG. 31 for this).

  In the pulse train stream modulation method, one or a plurality of basic pulse trains are allocated to each band while maintaining chip synchronization, and symbols associated with the chips of the basic pulse train or the plurality of basic pulse trains along the time axis are generated. A symbol is used to modulate the I and Q components of the subcarrier to generate a modulated signal and multiplex it. The subcarriers in each band are modulated and multiplexed in synchronization with symbols including amplitude values corresponding to chips at the same time in the multiplexed basic pulse sequence, which is an assigned basic pulse sequence or a plurality of basic pulse sequences. If the transmission signal I component and Q component corresponding to the multiplexed modulated signal are generated using IDFT, the configuration of the apparatus becomes simple, which is suitable for cost reduction.

  The transmission signal generation means 70 corresponds to the order generated by the order pulse train generation means 50 for the input signals from the I channel data conversion units 32b11 to 32bJ1 and the Q channel data conversion units 32b12 to 32bJ2 including the shift register. An ordering unit 702b including an I-channel ordering circuit 702b11 to 702bJ1 and a Q-channel ordering circuit 702b12 to 702bJ2 that multiply the pulse trains to generate a basic pulse train, and a narrowband multiplexing base by multiplexing the basic pulse trains A signal control unit 713b having a multiplexing unit 703b including an I-channel multiplexing circuit 703b11 to 703bJ1 and a Q-channel multiplexing circuit 703b12 to 703bJ2 that generates and outputs a pulse train, and a signal control circuit 713b11 to 713bJ2 that performs sequence generation , I channel data and Q Inverse discrete Fourier transform (IDFT) is performed using J sets of input signals consisting of channel data, and GI (guard interval) is inserted into the output signals of IDFT unit 704b and IDFT unit 704b that generate I channel and Q channel signals A DAC section 708b having a GI adding section 707b for performing conversion, a DAC 708b1 including DAC (Digital to Analogue Converter) circuits 708b11 and 708b12 for converting a signal into which the GI is inserted into an analog signal, and a filter 708b2 including filter circuits 708b21 and 708b22 , An orthogonal modulation unit 709b that orthogonally modulates the carrier wave generated by the carrier wave generation unit 710b with the I channel output signal and the Q channel output signal of the DAC unit 708b.

  The set of complex pulse trains, which is the j-th output of the data-coded pulse train generating means 30, is input to the corresponding I-channel ordering circuit 702bj1 and Q-channel ordering circuit 702bj2 of the transmission signal generating means 70, and the order. The basic pulse train is generated by multiplying the sequential pulse train generated by the pulse train generator 50. The ordering process of the j-th narrowband I channel is repeated by the ordering circuit 702bj1 a number of times equal to the multiplicity mj1 assigned to the channel, and each basic pulse train is input to the multiplexing circuit 703bj1. A multiplexed basic pulse train is generated. A multiplexed basic pulse train of the j-th Q channel is generated in the same manner, and the multiplicity has mj2. Usually, it is preferable to set mj1 and mj2 equal.

  The jth narrowband I-channel multiplexed basic pulse train and the Q-channel multiplexed basic pulse train are input to the signal control unit 713b and a sequence is set to form a pair corresponding to complex data and parallel to the IDFT 704b. Input in sync. These J pairs of complex multiplexed basic pulse trains input in parallel to the IDFT 704b are subjected to inverse discrete Fourier transform with respect to the order pulse train chips to generate I-channel and Q-channel components. These signals are inserted into the GI adding unit 707b and converted into analog signals by the DAC unit 708b, and then input to the quadrature modulation circuit 709b to modulate the carrier wave generated by the carrier wave generation circuit 710b. The I component and Q component of the modulated signal are multiplexed and output.

  The process from the inverse discrete Fourier transform by the IDFT 704b to the quadrature modulation by the quadrature modulation unit 709b is repeated a number of times equal to the number of chips of the sequential pulse train included in the period T. However, when OFDM is used on a transmission path in which multipath does not exist or can be ignored, the guard interval need not be used. Various communication systems using a coaxial line and an optical fiber communication path, such as a VDSL system and an ADSL system using a wired transmission path, can be configured to satisfy this condition.

  In FIG. 8B, the transmission signal generation means 70 illustrated in FIG. 8A has a bit conversion unit 712bb, which converts the multiplexed basic pulse train into a binary pulse instead of linearly modulating and transmitting it, and using IDFT. Pulse modulation is performed. The transmission signal generation means 70 includes an ordering unit 702bb, a multiplexing unit 703bb, a bit conversion unit 712bb, a signal control unit 713bb, an IDFT unit 704bb, a GI adding unit 797bb, a DAC unit 708bb, an orthogonal modulation unit 709bb, and a carrier wave generation unit 710bb. have.

  The multiplexed basic pulse trains of the I-th channel and the Q-channel of the jth band multiplexed by the multiplexing unit 703bb are converted into binary numbers by the bit conversion circuits 712bbj1 and 712bbj2, and a bit stream consisting of binary pulses is generated, The signal is input to the signal control circuits 713bbj1 and 713bbj2. The sequence-controlled output signals of the signal control circuits 713bbj1 and 713bbj2 form a complex pulse train and are input to the IDFT unit 704bb to be subjected to IDFT conversion. The process after GI giving section 797bb is the same as that of transmission signal generating means 70 in FIG. 8A, and an orthogonal modulated signal is output.

  FIG. 8C includes a code conversion unit 714cc that converts the pulse output from the signal control unit 713bb of FIG. 8B into a secondary encoded pulse train and outputs it to the IDFT unit. Other configurations and respective processing steps are the same as those in FIG. 8B.

  FIG. 9A shows an OFDM transmission signal generation unit 70, an order pulse train generation unit 50, and a control unit 60 using parallel modulation. In the parallel modulation method, the transmission side divides the transmission frequency band into the number of chips of the sequential pulse sequence included in the cycle T of the data-coded pulse sequence or an integral multiple thereof, and transmits the basic pulse sequence or the multiplexed basic pulse sequence. The amplitude value corresponding to the chip of the sequential pulse train of the signal generation pulse train is subjected to S / P conversion over the period T, is assigned to the transmission symbols of the divided bands, is modulated, and the modulated signals of all the divided bands are multiplexed. Although it is preferable to generate and transmit a transmission signal, the present invention is not limited to this, and a surplus narrow band may be allocated to transmission such as a synchronization signal or a composite signal. For example, a code pulse train for synchronization or control may be transmitted as a stream along the time axis using an excessive narrow band.

  On the other hand, the receiving side arranges the pulse values of each band acquired in symbol units along the time axis by P / S conversion, and reproduces the data signal. From this, the data-coded pulse train is separated and modeled and detected. Data is calculated using the shift time. The transmission side generates and transmits a transmission signal using IDFT, and the reception side detects the signal using a quadrature phase detector or the like, and performs FFT (Fast Fourier Transform) and parallel-serial conversion (P / By reproducing the data signal using S conversion, the configuration of the apparatus is simplified, which is suitable for cost reduction. The transmission data signal may be a pulse train subjected to error correction coding.

  The transmission signal generation means 70 includes an ordering unit 702c including ordering circuits 702c1 and 702c2, a multiplexing unit 703c including multiplexing circuits 703c1 and 703c2, a signal control unit 713c including signal control circuits 713c1 and 713c2, and an S / S A P conversion unit 714c, an IDFT unit 704c, a GI adding unit 707c, a DAC unit 708c including D / A circuits 708c11 and 708c12, and filters 708c21 and 708c22, an orthogonal modulation unit 709c, and a carrier wave generation unit 710c are included.

  The output signals of the I-channel and Q-channel of the data-coded pulse train generation means 30 are respectively input to the ordering units 702c1 and 702c2 of the transmission signal generation means 70, and the order pulse train generated by the ordering pulse train generation means 50 is multiplied. And are output to multiplexing sections 703c1 and 703c2 that generate multiplexed basic pulse trains having multiplexing degrees mi1 and mi2, respectively. mi1 and mi2 are multiplexing degrees of the multiplexed basic pulse trains of the I channel and Q channel transmitted i-th, respectively.

  This complex multiplexed basic pulse train is sequenced by the signal control unit 713c, and then one period T time is input to the S / P conversion unit 714c and converted in parallel with respect to each chip, and is converted into an input signal of the IDFT 704c. Discrete Fourier transform is performed, and the output signal is input to the GI adding unit 707c to be given GI. The I channel signal and the Q channel signal are converted into analog quantities by the DAC units 708c1 and 708c2, and input to the orthogonal modulation unit 709c to modulate the carrier wave generated by the carrier wave generation unit 710c, and the modulated signals are multiplexed. The This transmission signal generation process is sequentially performed until all of m basic pulse trains are transmitted mi1 + mi2.

  In the parallel system, chips for one cycle of the data-coded pulse train are assigned to each narrow band. Therefore, the code length of the code pulse train is selected, and the number of narrow bands, the bandwidth, and the multiplicity of the assigned basic pulse train are adjusted. It's okay.

  FIG. 9B illustrates transmission signal generation means 70 that generates a binary conversion pulse train by converting the multiplexed basic pulse train of the parallel modulation scheme shown in FIG. 9A into a binary number, and transmits the modulated signal. 702 cc, multiplexing unit 703 cc, bit conversion unit 712 cc, signal control unit 713 cc, S / P conversion unit 714 cc, IDFT unit 704 cc, GI addition unit 797 cc, DAC unit 708 cc, orthogonal modulation unit 709 cc, and carrier wave generation unit 710 cc is doing. The basic pulse train generated by ordering by the ordering unit 702cc is multiplexed by the multiplexing unit 703cc to generate multiplexed basic pulse trains of I channel and Q channel, and then converted into a binary pulse train by the bit converter 712cc, respectively. After being converted, the output signal is sequenced together with the control signal and the like by the signal control unit 713cc, input to the S / P conversion unit 714cc, converted into a complex parallel pulse train, and input to the IDFT unit 704cc. The output signal of the IDFT unit 704cc is orthogonally transformed in the same manner as in FIG. 9A to generate a transmission signal.

  Ultra-wideband (UWB) transmission using impulses is roughly classified into an impulse radio system and an OFDM system. In the impulse radio system, an impulse is generated and multiplexed in synchronization with the transition time for each chip of the basic pulse train, or an impulse is generated in synchronization with the transition time for each chip of the multiplexed basic pulse train to transmit a transmission signal. Generate. Alternatively, a basic pulse train generated in synchronization with the sequential pulse train by setting the start time of the sequential pulse train chips to be delayed by a predetermined time in accordance with a constant change in the rank at a predetermined rate of the chip width. An impulse is generated and multiplexed for each chip in synchronization with the transition time, or an impulse is generated for each chip delayed in the multiplexed basic pulse train in synchronization with the transition time, and a transmission signal is generated using the obtained impulse. May be generated. If the delay time set at a predetermined ratio of the chip width is 0, the generated transmission signal represents the transmission signal of the multiplexed basic pulse train. A basic pulse train with a multiplicity of 1 represents the basic pulse train, and in particular, the data conversion order basic pulse train represents a data conversion order pulse train.

  Further, when a binary conversion pulse train obtained by converting a chip of a multiplexed basic pulse train into a binary number is used as a transmission signal generation pulse train, an impulse is generated in synchronization with a transition portion of the binary conversion pulse train and transmitted. Generate a signal. On the other hand, in the OFDM ultra-wideband transmission, the same process as in the OFDM system can be used. That is, for the ultra-wideband transmission of OFDM using binary or multilevel pulses, IDFT is used on the transmitting side, FFT is used on the receiving side, and IDFT conversion is performed on these pulses as IDFT input signals on the transmitting side. Primary modulation is performed, and the modulated signal is demodulated by FFT on the receiving side. Further, an impulse (short pulse) is generated in synchronism with the transition part of these pulses on the transmitting side and used as an IDFT input signal, thereby performing primary modulation, and on the receiving side, demodulation is performed using FFT. Also good.

  As an example, in an impulse radio linear with respect to the amplitude of the multiplexed basic pulse train, if the rank changes in ascending order with respect to the reference rank, and the change in the start time is a delay, the multiplexed basic pulse train every time the rank increases by one. Each chip is set so as to be delayed by δ time, which is a predetermined ratio of the chip width, and an impulse having an amplitude corresponding to the chip transition amount is generated at δ intervals corresponding to the leading edge of the chip transition time. So that The same applies to the trailing edge. In general, the start time of the chip may be set to be delayed by δ hours every time the rank increases by r. In this case, an impulse having an amplitude corresponding to the transition amount corresponding to the leading edge of the transition time of the chip of the multiplexed basic pulse train having a multiplicity of r is δ time intervals, and the multiplicity of the transmission signal generation pulse train and the r (A) to (d) in FIG. 33A. The same applies to the trailing edge. Further, instead of delaying the start time of the chip for a predetermined time, setting the time to advance for a predetermined time does not depart from the spirit of the present invention.

  In UWB transmission using an impulse modulation system, a transmission signal based on an ultra-wideband signal which is the ultra-wideband impulse train or an impulse-modulated signal primarily modulated by the ultra-wideband impulse train by the transmission signal generation means 70. Is generated. In the case of OFDM UWB transmission using impulses, the transmission signal generation means modulates the subcarrier with the impulse train generated by the transmission signal generation pulse train assigned to the divided bands, and transmits the divided band transmission signals. Are generated and multiplexed to generate a transmission signal.

  The OFDM scheme is classified into a parallel modulation scheme and a stream modulation scheme according to a modulation method. In parallel modulation, an impulse sequence corresponding to the period of the data-coded pulse sequence generated based on the transmission signal generation pulse sequence is converted in parallel, or an impulse is generated from the transmission signal generation pulse sequence converted in parallel with respect to the chip. A transmission signal is generated and transmitted by modulating the subcarrier of the divided band.

  FIG. 9C illustrates transmission signal generation means 70 that generates and transmits a secondary code pulse train, and converts the output signal of the signal control unit 713dc of the transmission signal generation means 70 of FIG. It has a code conversion unit 715dc that generates a pulse train. The code conversion unit 715dc has an I-channel coding circuit 715dc1 and a Q-channel coding circuit 715dc2, and the respective output signals are S / P converted by the S / P conversion unit 714dc. Other configurations and processes of the transmission signal generation unit 70 are the same as those of the transmission signal generation unit 70 of FIG. 9B.

  FIG. 10A exemplifies transmission signal generation means 70 of δ delay r multiplex system that generates and transmits impulses based on a multiplexed basic pulse train of multiplicity r that is delayed at δ time intervals in ultra-wideband pulse transmission. Yes. By configuring the signal in this way, the impulse transmission energy can be set large, and the S / N ratio of the detection signal on the receiving side increases.

  The transmission signal generation means 70 includes an ordering unit 702d composed of ordering circuits 702d1 to 702dm, a signal control unit 713d, and an impulse generation unit 712d. The impulse generator 712d delays m basic pulse trains, and generates δ delay basic pulse trains in which r units having equal delay times are delayed by δ time intervals according to the order, δ delay circuits 712d11 to 712d1m, m δ delays R-multiplexing circuits 712d21 to 712d2pr for r-multiplexing basic pulse trains, which are r multiplexed pr pulses having a multiplicity of r by multiplexing r basic pulses in order, and r delayed by δ time intervals An impulse generation circuit 712d31 to 712d3pr that generates an impulse in synchronization with the transition part of the multiplexed basic pulse train, and a multiplexing unit 712d4 are included.

  The output signals of the shift registers 32 d 1 to 32 dm of the data conversion unit 32 d of the data conversion code pulse generation unit 30 are multiplied by the order pulse sequences generated by the order pulse sequence generation unit 50 by the ordering circuits 702 d 1 to 702 dm of the ordering unit 702 d. M basic pulse trains are generated and input to the signal controller 713d. In the signal control unit 713d, a sequence including a multiplexed basic pulse train and a control signal is generated and output to the impulse generation unit 712d.

  In the impulse control unit 712d, the delay times of the basic pulse trains of ranks 1 to r are set to 0 by the delay circuits 712d11 to 712d1r, respectively. The delay times of the basic pulse trains of rank r + 1 to 2r are set to δ hours by the delay circuits 712d1r + 1 to 712d12r, respectively. The same applies to the basic pulse trains of the order (pr−1) r + 1 to prr. The delay times are set to (pr−1) δ hours by the delay circuits 712d1 ((pr−1) r + 1) to 712d1pr, respectively. . Here, pr is pr = [m / r], and [m / r] is a Gaussian symbol and represents the maximum integer not exceeding m / r.

  In order to simplify the configuration and processing of the apparatus, it is preferable to select m so that m = rpr, where pr is an integer. In the case of performing quadrature modulation, it is preferable to set m = 2 rpr and assign pr basic pulse trains to the I and Q channels, respectively, but the division method is not limited to this.

  The output signals of the delay circuits 712d1 ((u−1) r + 1) to 712d1ur are respectively input to the corresponding r-multiplexing circuit 712d2u and r-multiplexed, and the output signals have r basic units each having equal delay time. This is a multiplexed basic pulse train composed of pulse trains. That is, the output signal of the u-th r-multiplexing circuit 712d2u becomes an r-multiplexed basic train pulse train having a multiplicity of r with a delay time of (u-1) δ with respect to the synchronization signal. Each r-multiplex basic pulse train is input to a corresponding circuit of the corresponding impulse generation circuit 712d31 to 712d3pr, and is converted into an impulse whose average value is zero and whose amplitude value is equal to the change amount of the transition part at the transition part of the chip. The This impulse is an isolated signal having a narrow pulse width and having a plurality of peaks and an average value of zero, and includes a modulated signal modulated with a narrow pulse width. These impulse trains are input to the multiplexing unit 712d4 to generate an impulse train and output to the output means 90. This impulse train may be a signal in which adjacent impulses are partially overlapped. In the case of including a separator for distinguishing chips, single or plural impulses corresponding to the leading edge and the trailing edge of the separator are respectively connected to the impulse string at the trailing edge of the multiplexed basic pulse string and immediately after the impulse string. It may be formed between the impulse train at the front edge of the chip. The separator may be composed of a pulse sharing at least one transition part with a chip for transmitting data.

  FIG. 10B illustrates transmission signal generation means 70 that generates a binary conversion pulse train by converting a multiplexed basic pulse train into a binary pulse, and generates an impulse at a transition portion of the binary conversion pulse train. 702db and impulse generation means 712db. Further, the impulse generator 712db includes a multiplexer 712db2, a bit converter 712db5, a signal controller 712db6, and an impulser 712db3.

  The basic pulse train generated by the ordering by the ordering circuits 702db1 to 702dbm is multiplexed by the multiplexing unit 712db2, and then the bit stream of the binary conversion pulse sequence converted into the binary pulse by the bit conversion unit 712db5 is generated, A sequence composed of binary pulses is generated together with a control signal and the like by inputting to the signal controller 712db6. This binary conversion pulse train is input to the impulse generator 712db3, and a transmission signal including an impulse corresponding to each transition unit is generated.

  FIG. 10C illustrates transmission signal generation means 70 having an impulse generation unit 712dc that generates an impulse at a transition part of a secondary code pulse sequence obtained by converting a binary conversion pulse sequence into a code pulse sequence, and the impulse generation unit 712dc of FIG. 10B. In place of the configuration, an impulse generation unit 712 ec including a multiplexing unit 712 ec 2, a bit conversion unit 712 ec 5, a signal control unit 712 ec 6, a code conversion unit 712 ec 7, and an impulse generation unit 712 ec 3 is provided. The process from the multiplexing unit 712 ec2 to the signal control unit 712 ec6 and the process of the impulse unit 712 ec3 are performed in the same manner as each process in FIG. 10B.

  FIG. 11A shows transmission signal generation means 70 in the case of performing stream modulation using OFDM for UWB. The transmission signal generation means 70 includes an ordering unit 702e, a signal control unit 713e that generates a sequence of signals, an impulse generation unit 712e that generates impulses for I-channel and Q-channel of each divided band, and an I-channel for each band Sub-carrier generating section 713e that generates sub-carriers for use and Q-channel, and primary modulation section 714e that includes modulation circuits 714e1 to 714eJ that generate modulated signals of band I-channel and Q-channel. A multiplexing unit 703e, a GI adding unit 707e that generates an I channel multiplexed signal and a Q channel multiplexed signal, a DAC unit 708e that converts a digital quantity into an analog quantity, an orthogonal modulation unit 709e, and a carrier wave generation unit 710e. Have. The GI attachment unit 707e is unnecessary when there is no disturbance in the transmission signal due to multipath or the like.

  The impulse generator 712e generates an I-channel and Q-channel impulse train of each divided band. In the UWB system using a carrier wave, it is preferable that the impulse is a modulated wave modulated by a single pulse having a short time width in both stream modulation and parallel modulation, but is not limited thereto. The impulse generation unit circuits 712e1j to 712e4j of the j-th divided band are configured using the δ delay unit 712d1, the r-multiplexing unit 712d2, the impulse forming unit 712d3, and the multiplexing unit 712d4 of the impulse generation unit 712d of FIG. 10A, respectively. Is done. Each unit and circuit may be arbitrarily changed and configured without departing from the gist of the present invention.

  The jjth subband impulse generator 712e is assigned mj1 I-channel basic pulse trains and mj2 Q-channel basic pulse trains. This pulse train is sequenced by the signal controller 713e and input to the impulse generator. The basic pulse train for the I channel is delayed by a δ time interval for every rj1 basic pulse trains in the I channel circuit of the delay circuit 712e1j, and then the multiplexed basic pulse train having a multiplicity of rj1 by the r-multiplexer circuit 712e2j. Become. This multiplexed basic pulse train is input to the impulse generation circuit 712e3j and converted into impulses at the leading edge transition portion of each chip, and is input to the impulse multiplexing circuit 712e4j to display pr number of leading edge transition portions at each chip. Generate an impulse train. This impulse train modulates the I-channel subcarrier having the frequency fj generated by the subcarrier generation section 713e by the primary modulation section 714ej to generate an I-channel primary modulated signal.

  The I-channel primary modulated signals of all bands are multiplexed by the multiplexing circuit 703e, and the primary modulated signals are output to the GI adding unit 707e. After the GI is added by the GI adding unit 707e, each is converted into an analog signal by the DAC unit 708e. Similarly, in parallel with the I channel, pr impulses representing the leading edge transition portion are generated using the Q channel basic pulse train, and an analog signal for the Q channel is obtained. The analog signals of the I channel and the Q channel are input to the quadrature modulation unit 709e, the carrier wave generated by the carrier wave generation circuit 710e is modulated, and the modulated signal is output to the sending unit 90. Next, the primary modulated signal at the trailing edge transition of the chip is generated in a similar manner.

  The above chip transmission process is performed for all NK chips included in the cycle.

  FIG. 11B illustrates a stream modulation OFDM UWB transmission signal generation means 70 that performs primary modulation using IDFT instead of the primary modulation section of FIG. 11A, and includes an ordering section 702eb and a signal control section. 713eb, an impulse generation unit 712eb, an IDFT unit 715eb, a multiplexing unit 703eb, a GI addition unit 707eb, a DAC unit 708eb, an orthogonal modulation unit 709eb, and a carrier wave generation unit 710eb. Further, the impulse generator 712eb generates the transition pulse having the pulse width δ in synchronization with the δ delay unit 712eb1, the r-multiplexer 712eb2, and the r-multiplexed pulse, and the output signals of the δ pulse unit 712eb3 and the δ pulse unit Includes a δ multiplexing unit 712eb4. The ordering unit 702eb, δ delay unit 7712eb1 and r-multiplexing unit 712eb2 are configured in the same manner as 702e, 712e1 and 712e2, respectively.

  Each output signal of the ordering unit 702eb is sequenced together with a control signal or the like by the signal control unit 713eb and input to the impulse generation unit 712eb. Assuming that the jth band is representative of the 1st to Jth bands, the output signals of the ordering unit 702eb are sequenced together with control signals and the like by the signal control unit 713eb and input to the impulse generation unit 712eb. Delayed by 712eb1j of δ delay unit 712eb1 in the same manner as 712e1j, then r-multiplexed by 712eb2j of r-multiplexer 712eb2 in the same manner as 712e2j, and r-multiplexed basic pulse sequences for I channel and Q channel Is output to the δ pulse circuit 712eb3j.

  The δ pulse circuit 712eb3j is synchronized with the leading edge of each chip of the I-channel r-multiplex basic pulse train generated by the r-multiplexer 712eb2j, the amplitude is equal to the transition amount of the chip, and the pulse width is δ. Pr transition pulses are generated. In parallel with the I channel, pr transition pulses of the leading edge for the Q channel are generated in the same manner. An I-channel transition pulse and a Q-channel transition pulse having a delay time equal to this form a complex pulse. A set of complex transition pulses having the same delay time is input to the IDFT unit 715eb in synchronization between the bands, and inverse Fourier transformed. Next, the output signal of the IDFT unit 715eb is input to the multiplexing unit 703eb, multiplexed according to the I channel and the Q channel, and output to the GI adding unit 707eb. From the GI assignment to the quadrature modulation, the same process as the transmission signal generation means 70 in FIG. 11A is performed.

  The process from the generation of the transition pulse at the leading edge by the impulse generator 712eb to the generation of the quadrature modulated signal by the quadrature modulation unit 709eb is performed for all pr pieces of the leading edge of the chip in the r-multiplex basic pulse train. Are sequentially performed in synchronism between the bands, and information on pr leading edges of the corresponding chip in each band is transmitted. Next, the chip information of the trailing edge of the chip is transmitted in the same manner. The above chip information transmission process is performed for all NK chips included in the period of the basic pulse train.

  In UWB transmission using OFDM, parallel modulation may be used instead of stream modulation.

  FIG. 11C illustrates a parallel modulation type transmission signal generation means 70 that performs primary modulation with IDFT and uses OFDM for UWB transmission, and includes an ordering unit 702ec, a signal control unit 713ec, an impulse generation unit 712ec, and an IDFT unit. 715ec, a multiplexing unit 703ec, a GI adding unit 707ec, a DAC unit 708ec, an orthogonal modulation unit 709ec, and a carrier wave generation unit 710ec.

  The basic pulse trains for I channel and Q channel ordered by the ordering unit of the transmission signal generating means 70 are input to the corresponding circuits of the signal control unit 713ec, respectively, and are sequenced together with the control signal etc., and the impulse generation unit 712ec Is output. It inputs into the impulse generation part 712ec. The impulse generator 712 ec includes a δ delay circuit 712 ec 1, an r-multiplexing circuit 712 ec 2, and a δ pulse circuit 712 ec 3 for I channel and Q channel.

  The I-channel δ delay circuits included in the δ delay circuits 712ec11 to 712ec1m delay the basic pulse trains by δ time intervals according to the order of r, and the r-multiplexing circuit 712ec2 has the multiplicity r of the delayed basic pulse trains. Multiplexed as a multiplexed basic pulse train to generate an r-multiplexed basic pulse train. The chips of r r-multiplexed basic pulse trains delayed by δ intervals are respectively input in parallel to the δ pulse circuit 712ec3, and the width of the leading edge of each chip is δ, and the transition of the chips of the r-multiplexed basic pulse train is made. It is converted into a transition pulse having a quantity as an amplitude, and is latched while the IDFT unit 715ec performs IDFT conversion in the output circuit. A similar process generates pr leading edge transition pulses of the Q channel in parallel with the I channel.

  These 2pr transition pulses form a pr set of complex transition pulses according to the order and become parallel input pulses of the IDFT unit 715ec, and are converted into a primary modulated signal. This primary modulated signal is input to the multiplexing unit 703ec in parallel and multiplexed to generate the I channel and Q channel multiplexed modulated signals, and the GI adding unit 707ec inserts the GI, and then the DAC. The unit 708 ec converts the signal into an analog signal. This analog signal is input to the quadrature modulation unit 709 ec, and the carrier wave generated by the carrier wave generation unit 710 ec is quadrature modulated to generate a transmission signal. Subsequently, the transmission signal of the trailing edge is generated in the same manner.

  The above steps are sequentially performed until all chips included in the cycle are transmitted, and a multiplexed basic pulse train for one cycle is transmitted. As described above, in the parallel method, pr transition pulses at the leading edge are assigned to each band for each chip of the multiplexed basic pulse train and are simultaneously transmitted in parallel with the same transmission clock. The edge transition pulse is transmitted at the next transmission clock. In this way, NK chip information included in the cycle is transmitted. Thus, the transmission rate is adjusted by any one of code length, number of divided bands, bandwidth, transmission clock frequency, or multiplicity of assigned basic pulse trains, or some combination thereof. is not. Note that the GI assigning unit 707ec may be omitted if the transmission line characteristics are good.

  In the OFDM scheme, the transmission path characteristics may be measured using a pilot channel for both narrowband transmission and UWB transmission. As is well known to those skilled in the art, particularly when a scattered pilot channel (SP channel) is used, the frequency characteristics of each SP channel are measured and the frequency characteristics between adjacent SP channels are interpolated and equalized. Good.

  In the frequency hopping method, the receiving side uses the detection signal obtained by detecting the transmission signal to restore the transmission signal generation pulse train, and uses the restored pulse train to generate the data encoding code pulse train in the same way as the frequency does not hop. Detect and localize and calculate data using the shift time indicated by the localized pulse. You may comprise so that a hopping carrier wave may be modulated and transmitted with an impulse. Each process in transmission and reception in this case is the same as frequency hopping.

  FIG. 12A illustrates the transmission signal generation means 70 of the frequency hopping code transmission device 1. The transmission signal generation means 70 includes an ordering unit 702L, a multiplexing unit 703L, a bit conversion unit 712L, a signal control unit 716L, a primary modulation unit 714L, and a synthesizer unit 715L. Furthermore, the synthesizer unit 715L includes a hopping pattern generation circuit 715L1, a synthesizer 715L2, and a band pass filter BPF 715L3.

  The output signal of the data-coded code pulse train generation means 30 is ordered by the ordering pulse train generated by the ordering pulse train generation means 50 by the ordering unit 702L, and multiplexed by the multiplexing unit 703L to generate a multiplexed basic pulse train. Is done. The multiplexed basic pulse train is converted to a binary number by the bit conversion unit 712L to become a binary conversion pulse train, and the bit stream is input to the signal control unit 716L and is sequenced together with the control signal and the like to become a sequenced signal. The sequenced signal is primarily modulated by the primary modulation unit 714L, and then input to the synthesizer unit 715L to modulate a hopping carrier wave whose frequency is hopped to generate a hopping modulated signal. The hopping carrier wave is a carrier wave whose frequency is randomly hopped for each chip in accordance with the hopping pattern that is synthesized by the synthesizer unit 715L2 and generated at the cycle T generated by the hopping pattern generation circuit 715L1.

  (B) of FIG. 12A illustrates the primary modulation unit 714L using the delayed APSK using the multiplexed basic pulse train as an input signal. The multiplication circuit 714L5 multiplies the multiplexed basic pulse train and a delay signal detected by the polarity detection circuit 714L1 from the output signal of the multiplication circuit 714L5 and delayed by the hopping period T by the delay circuit 714L2 to obtain a product signal. Is to be generated. For example, the polarity detection circuit 714L1 includes a zero-cross detection circuit. This product signal is PSK modulated by the primary modulation circuit 714L3 and filtered by the filter 714L4 to become a primary modulated signal. The transmission signal transmitted from the transmission side is received by the opposite reception side and data is calculated.

  Instead of using the bit conversion unit 712L, FIG. 12A (a) may be sequenced by the signal control unit 716L using a multiplexed basic pulse train to generate and transmit the primary modulation signal. In this case, the multiplication circuit 714L5 in (b) is configured by a linear multiplication circuit, and the primary modulation circuit 714L3 performs APSK modulation.

  FIG. 13 illustrates a code-type receiving device 200 that is used opposite to the code-type transmitting device 1 to receive a transmission signal, perform model detection to detect a data-coded pulse sequence, and calculate data using the shift time. is doing. The code type receiving apparatus 200 includes a detection unit 210, a synchronization unit 220, a communication unit 230, a localizable signal detection unit 240, a shift time detection unit 250, a data calculation unit 260, an output unit 270, and a control unit 280. Yes.

  Each of the above means may be arbitrarily configured, changed, deleted and added without departing from the spirit of the invention. Also, all or part of the hardware may be replaced with corresponding software, or all or part of the software may be replaced with corresponding hardware.

  The code-type receiving apparatus 200 that is used opposite to the code-type transmitting apparatus 1 that transmits a transmission signal that has been subjected to error correction coding is configured to have error correction decoding means for performing decoding. Alternatively, any provided means or some means are arranged to perform the decoding. The data-coded pulse sequence generated using the error-corrected coded data is detected by detecting the model of the data-coded pulse sequence on the receiving side, and the transmitted data is calculated by detecting the shift time. The data is decoded by the data calculation means to calculate the source data.

  The detection of the data-coded pulse train composed of the sequential pulse train using the source data or the error-corrected coded data is performed using a model detection circuit constructed using a memory such as a CCD, or A / Model detection may be performed by D conversion and digital processing.

  A basic pulse train having a data-ordered pulse train subjected to error correction coding is decoded, and then a model is detected to calculate data. In addition, when the data and the basic pulse train or the multiplexed basic pulse train is error-correction encoded, the basic pulse train or the multiplexed basic pulse train is decoded, and the data detection code pulse train is detected from this by the model detection and is associated with the data. Data is calculated.

  On the other hand, a transmission signal generated by a data signal composed of a pulse train including a data coded code pulse train using a pulse train representing a code sequence different from the sequential pulse train is stored in a ring memory with a detection signal stored on the receiving side. The data-coded pulse train is separated by multiplying the sequential pulse train, the model detection is performed on this signal as many times as necessary to detect the data-coded pulse train, and then the shift time is detected. If the data signal is a signal that has been error correction encoded with respect to the chip set, the data encoding code pulse train is separated from the signal obtained by decoding, and model detection is repeated the required number of times. The chip width of the basic pulse train included in this data signal is equal to the chip width of the sequential pulse train.

  The sequential pulse train used on the receiving side is generated by controlling the frequency of the local oscillation circuit so as to maintain synchronization. Alternatively, the detection signal is A / D converted and stored in a ring memory, and the data coded code pulse train is separated by multiplying the sequential pulse train by digital calculation, and the data coded code pulse train is detected from the separated signal by model detection. To get the shift time.

  The detection means 210 includes a detection unit including at least a sensor, and is transmitted using electromagnetic waves transmitted by wire or wirelessly, light ranging from infrared rays to ultraviolet rays, controllable radiation such as X-rays, magnetism, and ultrasonic waves. The synchronization signal and the data signal are detected and the detection signal is output, but the medium is not limited to these. When the transmission signal is a modulated signal, the detection unit 210 may detect the transmission signal and generate a detection signal obtained by converting the frequency.

  The detection signal, which is the output of the detection means 210, is input to the synchronization means 220, and synchronization is captured or / and held and the ID on the transmission side is decoded. The detection signal is input to the localizable signal detection means 240, and the data-coded pulse train is detected in accordance with the order while maintaining synchronization. In the multiplexed product basic pulse train, the chip speed of the sequential pulse train included in the basic pulse train is set to K times the chip speed of the data coding code pulse train, and the detection signal is multiplied by the sequential pulse train to generate the internal pulse The basic pulse train and the narrowband noise having different orders as interference noise are despread to remove out-of-band components and improve the S / N ratio by K times. The despread signal is subjected to model detection by the shift time detecting means 250 to detect a data coded pulse train. By model detection, narrow band noise such as internal interference noise, external interference noise, thermal noise, and broadband noise are removed, and a data-coded pulse train signal is detected, and its amplitude information and phase information are acquired.

  In addition, in the transmission signal using the code pulse train and the modulated signal modulated by the code pulse train, instead of determining the pulse value obtained from the detection signal for each chip, the cycle of the code pulse train is used. The model pulse detection is performed by separating the code pulse train from the equal detection signal, the obtained pulse train is determined to determine the code pulse train, the shift time is obtained, and the data is calculated based on the shift time. Alternatively, the shift time may be detected by calculating a localized pulse of the code pulse train signal detected as a model. For example, the correlation function between the code pulse train and the local signal is represented by the sampling point value yj, and this localized pulse is detected to obtain the shift time.

  When the transmission signal is a signal generated based on a transmission signal generation pulse train carrying data information, model detection is performed on the data conversion code pulse train, and the data conversion code pulse train or the localized pulse Detection is made. The transmission signal generation pulse train is composed of a basic pulse train or a multiplexed basic pulse train.

  A model detection corresponding to the type of code sequence is performed on the data sequence basic pulse sequence or a multiplexed data sequence basic pulse sequence obtained by multiplexing the pulse sequence, and the type of code sequence is determined and associated with data.

  On the other hand, a multiplexed product basic pulse train is multiplied by an ordered pulse train and filtered. From the filtered signal, a data-coded code pulse train is detected by model detection in the same manner as a data-ordered basic pulse train, and amplitude information is obtained. And phase information is obtained.

  Model detection of an analog multilevel pulse train signal is performed by an analog circuit such as a CCD, or is performed by digital processing using hardware or software after converting an analog amount into a digital amount (A / D conversion). On the other hand, a modulated signal modulated with a data signal composed of a code pulse train detects a primary modulated signal for a transmission signal including the primary modulated signal, demodulates this signal, and converts the demodulated signal to a CCD or the like. Use analog model detection circuit or A / D convert and detect model by digital processing, or detect detected modulated signal A / D convert and demodulate by digital processing and detect demodulated signal as digital quantity Although the method of processing etc. is used, it is not restricted to these.

  The shift time detected by the shift time detection means 250 is input to the data calculation means 260, and data is calculated from this shift time. If the data is source data that has been error-corrected, the data calculation means 260 performs error correction decoding of the data to calculate the source data. The output means 270 outputs any one of, but not limited to, an output to a display device, an output to a computer, an output to a database, or some combination thereof.

  The communication unit 230 is used for transmitting and receiving a control signal and the like using the subchannel with the communication unit 100 of the code-type transmission apparatus 1. Alternatively, the communication unit 230 may be configured to perform time-division communication using the same channel as the data signal and the synchronization signal. This control signal includes, but is not limited to, an output control signal transmitted from the receiving side to the transmitting side, a retransmission request signal, a transmission / reception start / end control signal, and the like. In wireless communication using radio waves, the sensor included in the detection unit of the communication unit 230 is an antenna, and the transmission antenna and the reception antenna may be shared. Further, the antenna of the detection unit 210 and the antenna of the communication unit 230 are connected. It may be configured to be shared. Such a configuration includes a high-frequency ID tag.

  14A to 14E illustrate the detection unit 210 and the synchronization unit 220 and communication unit 230 related thereto.

  14A shows detection means 210 for detecting a modulated signal of a single carrier, its synchronization means 220, and communication means 230, which is used opposite to code transmission apparatus 1 having data coded code pulse train generation means 30 in FIG. ing. The detection unit 210 includes a detection unit 211s, a filter 213s, and a frequency conversion unit 212s. In communication using radio waves, the detection unit 211s uses an antenna as a sensor. Further, this antenna may be shared with the detection / transmission unit 230 s of the communication unit 230. On the other hand, an optical sensor such as a photodiode is used for both wired communication and wireless communication in optical communication, and a buffer amplifier is used in wired transmission using a metal communication line.

  The signal detected by the detection unit 211s is filtered by the filter 213s and then input to the frequency conversion unit 212s to be converted into a primary modulation signal, and the synchronization is captured or held by the synchronization unit 220, and the frequency conversion is performed according to the synchronization signal. The frequency of the unit 212s is controlled.

  On the other hand, the detection unit 230 includes a detection / transmission unit 230s, a circulator 233s, a filter 235s1, a demodulation unit 236s, and a modulation unit 237s. The control signal from the transmission side detected by the detection / transmission unit 230s is isolated by the circulator 233s and proceeds to the filter 235s1, then demodulated by 236s and output to the control unit 280. On the other hand, the control signal generated on the receiving side is modulated by the modulation unit 237s, band-limited by the filter 235s2, then unidirectional in the output direction by the circulator 233s, and transmitted from the antenna which is the detection / transmission unit 230s. The circulator need not be used if the detection unit and the output unit of the detection / transmission unit 230s are separated.

  When an antenna is used for the detection unit, the antenna is shared with the detection / transmission unit of each communication unit 230 in FIGS. 14A to 14D and (a) and (c) of FIG. 14E. May be configured.

  The code type receiving apparatus 200 having the detecting unit 210 of FIG. 14B includes a OFDM type code type receiving apparatus 200 and a synchronization unit 220 that perform timing extraction by digital processing, and a localizable signal detection unit that uses digital demodulation processing. A code-type receiving apparatus 200 that detects an orthogonal modulation transmission signal, such as the code-type receiving apparatus 200 having 240, is included.

  The detection means 210 shown in FIG. 14B is used for a quadrature modulation signal obtained by modulating carrier waves having the same frequency and orthogonal to each other, and a detection unit 211a that detects a transmission signal and performs frequency conversion of the detection signal to generate an I component. A frequency conversion unit 212a including a frequency conversion circuit 212a1 that outputs a signal and 212a2 that outputs a Q-component signal, and a filter 213a including filter circuits 213a1 and 213a2 that filter the output signal are provided. The transmission signal is detected by the detection unit 211a and input to the frequency conversion unit 212a, and the I component and Q component of the primary modulated wave are detected.

  In the code type receiving apparatus 200 that performs block demodulation processing, the output signal of the filter 213a is A / D converted by the localizable signal detection means 240, and processing including noise removal processing is performed by digital processing to calculate data. The detecting means 210 is also used in the code type receiving apparatus 200 that performs analog processing.

  The detection means 210 shown in FIG. 14B is a code-type transmission apparatus 1 having the transmission signal generation means 70 of FIGS. 7A, 7B, 8A, 8B, 9A, 9B, 11A, 11B, and 11C. The detection means 210 of the code | symbol type receiving apparatus 200 used opposite is illustrated.

  FIG. 14C illustrates the detection means 210 of the code-type receiving apparatus 200 that is used opposite to the code-type transmitting apparatus 1 that uses OFDM for a multiband UWB with W bands. FIG. 11A and FIG. A transmission signal generated by any one of the transmission signal generation means 70 in FIG. 11B and FIG. 11C is detected.

  The detection unit 210 includes a detection unit 211i, a filter 213i including filter circuits 213i1 to 213iW, and a frequency conversion unit 212i including I channel frequency conversion circuits 212i11 to 212iW and Q channel frequency conversion circuits 212i12 to 212iW2. . Each of these frequency conversion circuits is configured in the same manner as the frequency conversion unit 212a shown in FIG. 14B.

  The u-th band signal is detected by filtering the output signal of the detector 211i by the filter 213iu. The output signal of the filter 213iu is frequency-converted by the frequency conversion circuit 212iu1, and an I-channel primary modulation impulse train is detected. Similarly, a Q-channel primary modulation impulse train is detected. In particular, when the number of bands W is 1, FIG. 14C shows detection means corresponding to the UWB of the orthogonal modulated signal generated by the transmission signal generation means 70 shown in FIG. 11A, FIG. 11B, or FIG. If all detection signals are configured to have an equal intermediate frequency, the configuration and processing of subsequent means are simplified, which is preferable.

  FIG. 14D shows the impulse radio UWB transmission detection means 210, which can be used as the detection means of the piconet device described in IEEE 802.15.3a, but is not limited to this, and Modifications, deletions, or additions may be made without departing from the spirit of the present invention. In the piconet, the basic timing of the piconet device is supplied as a beacon and detected by the synchronization means 220.

  The detection unit 210 includes an antenna 211g, a filter 213g, and an amplifier 215g. The antenna 211g may be shared with the antenna 230g of the communication unit 230. The impulse having an ultra-wideband frequency component detected by the antenna 211g is filtered out by the filter 213g and input to the amplifier circuit 215g to be amplified.

  FIG. 14E shows the detection means 210 of the frequency hopping code type reception apparatus 200 used opposite to the code type transmission apparatus having the transmission signal generation means 70 shown in FIG. 12, and includes a detection unit 211L, delay detection, and the like. A delay detection unit 214L including circuits 214L1 to 214LJ and an HP multiplexer (hopping multiplexer) 215L that operates in accordance with a hopping pattern are included. The detection unit 211L detects a hopping chip of a transmission signal according to a hopping code pulse sequence composed of N chips for hopping the frequency and having a period of T, and performs delay detection by any of the delay detection units 214L1 to 214LJ. . The output signal of the delay detection circuit 214L is held for a period T according to the hopping pattern, converted into a serial signal by the HP multiplexer 215L, and output to the localizable signal detection means 240. Instead of using the HP multiplexer 215L, the switching order of the multiplexers of the A / D converter of the localizable signal detection means 240 is matched with the hopping pattern, and the output signals of the delay detection circuits 214L1 to 214LJ of the delay detection unit 214L are directly A / D conversion may be performed.

  FIG. 14E illustrates the jth delay detection unit 214Lj of the detection unit 210 illustrated in FIG. The signal detected by the detection unit 211L is input to the multiplication circuit 214Lj3, the polarity is detected by the polarity detection circuit 214Lj2, and then delayed by the hopping cycle T time by the T delay circuit 214Lj1 and input to the multiplication circuit 214Lj3. A binary conversion pulse train obtained by multiplying the detection signal, filtered by the filter 214Lj4, and converted from the chip of the multiplexed basic pulse train is detected. In the case where the primary modulated signal is a quadrature modulated signal, the detected chip includes an I component chip and a Q component chip, so that the I and Q components follow different orders or different orders. The data-coded code pulse train is separated from the transmission signal detection signal including the pulse train, and the data is calculated.

  FIG. 14E illustrates the detection unit 210 using synchronous detection in the frequency hopping method. The transmission signal detected by the detection unit 211m is captured and held by the synchronization unit 220 and input to the synthesizer unit 217m. The synthesizer unit 217m includes an HP pattern generation circuit 217m1 that generates a hopping pattern, a synthesizer circuit 217m2 that synthesizes a carrier wave having a frequency according to the hopping pattern, a product circuit 217m3 that multiplies the detection unit output signal and the carrier wave, and a product circuit 217m3. A bandpass filter 217m4 for filtering the output signal. The output signal of the bandpass filter 217m4 is detected by the detector 219m.

  In frequency hopping transmission, the received signal of the binary pulse train, the multi-value pulse train, or the modulated signal thereof is re-converted into a multiplexed basic pulse train by the localizable signal detector 240. It is possible to configure the apparatus so that the data coding pulse train is constructed and model detection is performed.

  The synchronization means 220 detects the synchronization signal from the detected output signal, and captures or holds the synchronization. The synchronization signal may be transmitted in a time division manner in front of the data signal. In this case, the synchronization is acquired from the synchronization signal that repeats at a constant period, and the frequency of the clock local oscillator is controlled based on the synchronization signal. Alternatively, the synchronization signal is transmitted in parallel with the data signal to control the frequency of the clock local oscillator. Alternatively, the synchronization signal may be pre-positioned and juxtaposed to the data signal. The synchronization means 220 captures and holds these synchronizations by detecting a synchronization signal composed of either a timing pulse train, a code pulse train, or a multiplexed secondary or higher-order product code pulse train. It is. Also in UWB transmission, timing impulses may be transmitted in series or in parallel with an impulse train of data signals to capture and maintain synchronization. In particular, in UWB transmission using OFDM, a timing impulse common to each narrow band is transmitted in series with the data signal, or a timing impulse is transmitted in parallel with the data signal using a specific channel. May be detected.

  On the other hand, in the code-type receiving apparatus 200 that performs demodulation by digital processing, synchronization may be captured or held from a synchronization signal incorporated in a preamble, a synchronization signal juxtaposed to a data signal, or a data signal.

  The localizable signal detection means 240 performs model detection by separating a data-coded pulse train that is a localizable signal from the detection signal. When the detection signal is a multiplexed signal of the basic pulse train obtained by multiplying the sequential pulse train and the data coded code pulse train, the localizable signal detector 240 multiplies the ordered pulse train on the multiplexed basic pulse train according to a predetermined order. Then, the data coded code pulse train is separated, and this data coded code pulse train is detected using model detection by a canceller. Further, the model detection is repeated a required number of times using the model detected signal as an input signal.

  In the multiplexed basic pulse train, a process consisting of separation of the data coded code pulse train by the product of the number sequence pulse train equal to the multiplicity per cycle and the model detection thereof are repeatedly performed.

  If the localizable signal including the data coded code pulse train separated by multiplying the multiplexed basic pulse train by the sequential pulse train is a narrow-band data coded code pulse train, the S / N ratio is improved for despreading. The rate is K. Here, K is a spreading factor, and K = Tk / Tc. Further, it is preferable to define the spreading factor for the time-varying chip basic pulse train as Kv = Tk / Tv.

  For a high-speed hopping transmission signal that hops H times per Tk, the localizable signal detection means 240 detects the chip by separating the data-coded pulse train directly from the detection signal or by averaging the detection signal Tk / TH times. The model detection may be performed by separating the data-coded pulse sequences using the chips for the period obtained by the averaging. In addition, in the transmission signal composed of the time-varying chip code pulse train, an addition average is made corresponding to the chip width of each chip.

  A signal that can be localized is input to the shift time detecting means 250 to detect the shift time. The shift time may be detected by localizing the data-coded pulse sequence and detecting it as the delay time of the localized pulse, or calculating the phase of the frequency component of the data-coded pulse sequence and detecting it from this. It is not limited to these.

  FIG. 15A shows a localizable signal detecting unit 240 of an orthogonal modulation system, and the localizable signal detecting unit 240 includes a demodulator 245a including demodulator circuits 245a1 and 245a2, and A / D converter circuits 241a1 and 241a2. A / D converter 241a including ring memory, ring memory 242a including ring memories 242a1 and 242a2, and separation unit 243a. The separation unit 243a includes a multiplexed basic pulse train reproduction circuit 243a1 including separation circuits 243a11 and 243a12, an order pulse train generation circuit 243a3, a product circuit 243a2 including product circuits 243a21 and 243a22, and model detection circuits 243a41 and 243a42. And a canceller 243a4 including

  The I-channel and Q-channel primary modulation signals output from the detection unit 210 are input to the demodulation circuits 245a1 and 245a2 of the demodulation unit 245a, respectively, and are converted into digital quantities by the A / D conversion units 241a1 and 241a2 to be ring memory. Stored in 242a1 and 242a2. The I channel storage data read from the ring memory 242a1 is input to the multiplexed basic pulse train reproduction circuit 243a11 to reproduce the I channel multiplexed basic pulse train, and is input to the multiplication circuit 243a21 to be input to the sequential pulse train generation circuit 243a3. Are multiplied by the sequential pulse train in the initial state of the zero shift time generated in step (3), and then model detection is performed by the canceller 243a41 to detect the data coded code pulse train which is the first localizable signal.

  The canceller 243a41 includes a coefficient table in which a solution of simultaneous equations based on model detection is formulated and stored, and a Fourier coefficient calculation circuit that performs frequency analysis on the output signal of the product circuit, and the Fourier coefficient is calculated and noise is detected using the coefficient table. The removed data-coded pulse train is calculated. Alternatively, instead of using a coefficient table, a Fourier coefficient calculation circuit and a matrix operation circuit that solves simultaneous equations may be provided, and a Fourier transform may be calculated and a matrix operation may be performed to calculate a data-coded pulse sequence. However, the method of constructing the canceller and the procedure for calculating the data-coded code pulse train are not limited to these.

  Next, the ring memory 242a1 is shifted so that the data is at the reference position with respect to the second basic pulse train, and the second data-coded pulse train is separated and model detected in the same manner. Thereafter, up to [m / 2] th data-coded pulse trains are detected in the same manner. Here, the symbol [m / 2] represents the maximum integer not exceeding m / 2, and [] is a Gaussian symbol. Note that m is preferably set to an even number. [M / 2] Q channel data-coded pulse trains are detected in the same manner.

  Instead of the ring memory 242a, a memory 242a ′ for storing A / D converted data is used, the multiplexed basic pulse train reproducing unit 243a1 reproduces the multiplexed basic pulse train, and the order pulse train generating circuit 243a3 is increased in ascending order by one. And the product sequence 243a3 multiplies the I-channel data read from the memory 242a 'by the initial sequence pulse train, and the canceller 243a4 performs model detection to detect the first data. An encoded code pulse train can be detected and output to the shift time detecting means 250 to detect the shift time. Next, the state of the sequential pulse train generation circuit 243a3 is shifted by 1 to update the state, and the second data coded code pulse train is detected in the same manner. Similarly, it may be configured to detect up to [m / 2] th I-channel data-coded pulse trains. The Q channel data sign pulse train may be configured similarly. In any of the above cases, instead of shifting the state in ascending order, it is possible to detect each data-coded pulse sequence by shifting in descending order without departing from the gist of the present invention.

  The shift time detection unit 250 detects the localized pulse of the data-coded code pulse sequence obtained from each basic pulse sequence of the multiplexed basic pulse sequence, and outputs the determination result to the data calculation unit 260. Alternatively, the shift time may be detected by calculating the phase of the data-coded pulse train instead of detecting the localized pulse.

  The model detection of the present invention will be described in detail below.

When y (t) is a signal from which a code pulse train having a shift time ζr is separated, y (t) = x (t−ζr) + n (t)
It is expressed as When y (t) represents a despread signal, x (t-ζr) represents a separated data-coded pulse sequence having a rank of r.
Also, a signal converted so that the code pulse train of the signal y (t) has a time-varying chip is

 It shall be expressed as Here, dr is a delay time of the time-varying chip data code pulse sequence corresponding to ζr.

  Model detection according to the present invention is performed by modeling a signal including a code pulse train for each chip and determining parameters included in the model. In particular, the detection of the data encoding code pulse train is preferably performed by despreading the basic pulse train of the multiplexed basic pulse train and modeling the separated signal, but is not limited thereto. The case where the chip is the j-th and a signal representing a code sequence is calculated using the model will be described in detail below.

In order to facilitate understanding, as an example, it is assumed that the signal model corresponding to the j-th chip of rank r is fvj (t; aj), and that one constant aj corresponds to the chip. g (t), where vj-1≤t≤vj

 And other values of t are 0. Here, vj-1 and vj represent the time of the leading edge and the time of the trailing edge of the time-varying chip, respectively.

If the signal model represented by fvj (t; aj) is fv (t; a) and its period is Tv, then 0 ≦ t ≦ Tv,

   It can be expressed as. However, a represents a vector having aj as an element.

  If a configuration is made so that fvj (vj; aj) ≈yv (vj), aj is represented by yv (vj), and therefore aj (yv (vj)).

Therefore, if yv (t) is configured to be additive in equation (7), the time-varying chip model

  And can be approximated. Here, ≒ is a symbol representing approximation. Further, aj (xvj) and aj (nvj) represent the values of aj determined by xv (vj−dr) and nv (vj) at time vj, respectively. However, for the sake of simplicity, xvj = xv (vj−dr) and nvj = nv (vj) are used.

From equation (10), if aj (xvj) = sj and aj (nvj) = wj

  And a model approximating xv (t-dr) and nv (t) is obtained. Even if vj-1 is used instead of vj, the same logical expansion as described above can be performed.

Therefore, the periodic signal fv (t; a) is replaced with the equation (9),

 It is expressed as

  The left side of equation (12) is a function approximating a time-varying chip signal, while the term including the first Σ on the right side is the sum of chips expressed by a known function g (t) with sj as an unknown coefficient. It is a model of a data-coded pulse train constructed, and a term including the second Σ is a noise model composed of a sum of components represented by known functions having wj as an unknown coefficient in the corresponding section. Accordingly, a simultaneous equation having sj and wj as unknowns is set on the left side using the detection signal of the time-varying chip, and a data-coded pulse train is detected by calculating sj and wj as a solution of this equation. As an example, an exponential function can be used as g (t), but is not limited thereto.

  In order to set the required simultaneous equations, if the right side is a model of a signal in which the multiplexed basic pulse train is despread, and it is expanded into a Fourier series, a coefficient corresponding to the unknown and using the harmonic order as a parameter is determined. The equation is formulated. Therefore, a detection signal composed of a despread signal whose chip width is converted corresponding to the right side of the equation (12) is expanded by Fourier series, and the required signal is placed on the right side expressed by the corresponding harmonic order. Simultaneous equations are obtained. This simultaneous equation has a solution. The solution may be obtained by obtaining the Fourier coefficient of a despread signal having a time-varying chip for each rank and solving simultaneous equations, or by using the Fourier coefficient of a despread signal having a time-varying chip as a parameter. Although it may be formulated and calculated by calculating Fourier coefficients for each rank, the solution acquisition method is not limited to these.

  In the above, the basic pulse train is a data-coded code pulse train composed of pulse trains representing the same code sequence in which the same data is mapped in the period Tv. It may be configured to be included (see the description of FIGS. 30 and 33B for time-varying chips).

  In addition, model detection may be performed by replacing all or some of the functions of a circuit with software without departing from the spirit of the present invention.

  In the model detection of the present invention, a noise and pulse train model using FFT instead of using Fourier coefficients is constructed, and a signal including a despread signal or a free code pulse train is analyzed using FFT. The pulse train may be determined by calculating the model parameters using the result.

  The method for detecting the code pulse train using the signal model is not limited to the above.

In any model detection, the process of detecting the code pulse train can be repeated the required number of times by using the calculated code pulse train as an input. These processes from despreading to model detection are repeated for the multiplicity, and then the shift time is detected. The shift times of all data-coded pulse trains are output to the data calculation means 260 to calculate data. If the shift time cannot be detected, a re-detection processing request control signal may be transmitted to the localizable signal detection means 240. If the determination cannot be made even by the redetection process of the localizable signal detection unit 240, a retransmission request signal requesting retransmission from the transmission side is transmitted to the control unit 280. Alternatively, the retransmission request signal may be transmitted to the control unit 280 without making a redetection processing request to the localizable signal detection unit 240.
The code pulse train is calculated using any one of the methods described above and used as necessary.However, the calculation method is not limited to these, and may be any method using model detection. It's okay. In addition, examples of signals to which the present model detection is applied include a data-coded pulse train, a pulse train with a constant shift time, and a localized pulse, but are not limited thereto.

  The calculation of the code pulse train may be performed in a single model detection process according to the accuracy, or may be repeatedly performed a plurality of model detections using the detected value as an input. A signal representing a code sequence having a certain shift time is determined by this, and acquisition and synchronization of amplitude information reflecting actions such as resonance, absorption, reflection, and scattering as a pulse train or a processed signal such as a localized pulse Capture, retention, distance measurement, movement speed measurement, Doppler shift measurement, etc., but the application is not limited to these.

  When the shift time is unknown, the calculated pulse train is determined to determine the shift time. Since the code pulse train has the same absolute amplitude value and the polarity determined at the sampling point, the determination is performed by calculating a candidate signal value using a model determined for each shift time, and the amplitude value or the ratio of the amplitude values, This is done using a criterion consisting of a combination of polarity and sequence. Alternatively, the candidate signal values may be localized to evaluate the number of peaks, amplitude, polarity, and their arrangement.

  The determination method is not limited to these, and any parameter that can detect a code pulse train may be used, and a method of evaluating the norm of a code pulse train candidate value at a sampling point is also included.

  The processing for detecting the code pulse train is shortened if N sets of code pulse train model detection circuits determined by the shift time are used in parallel corresponding to the shift time.

  If the determination result is not accepted, it is preferable to determine the calculated value by increasing the number of iterations, or to repeat the process of calculation and determination.

  On the other hand, the amplitude value of the code pulse train is detected based on the equation (12) without making a determination on a signal representing a code sequence having a constant shift time. Further, it is preferable that the amplitude information of the processed signal such as the localized pulse is obtained using a constant coefficient determined based on these calculation formulas.

  FIG. 15B (a) illustrates a canceller 243a4RR1 using model detection, a Fourier coefficient calculation circuit 243a4RR11, a coefficient table 243a4RR12 storing coefficients obtained by formulating solutions of simultaneous equations using a signal model, and computation. The circuit 243a4RR13 is included. The data-coded pulse train separated by the product circuit is input to the Fourier coefficient calculation circuit 243a4RR11, and the Fourier coefficient is calculated and output to the arithmetic circuit 243a4RR13. The arithmetic circuit 243a4RR13 calculates the sj included in the equation (12) using the input Fourier coefficient and the coefficient representing the solution stored in the coefficient table 243a4RR12 to determine the data coded pulse train.

  This canceller is used as a canceller included in the localizable signal detection means 240 illustrated in FIGS. 15A to 23C.

  This canceller can also be used for a pulse train having a constant shift time.

  FIG. 15B (b) illustrates a canceller 243a4RR2 using model detection, a Fourier coefficient calculation circuit 243a4RR21, a coefficient table 243a4RR22 storing coefficients obtained by formulating simultaneous equations using a signal model, and a matrix operation circuit 243a4RR23. The data-coded pulse train separated by the multiplication circuit is input to the Fourier coefficient calculation circuit 243a4RR21, and the Fourier coefficient is calculated and output to the matrix operation circuit 243a4RR23. The matrix calculation circuit 243a4RR23 sets simultaneous equations using the input Fourier coefficients and coefficients for setting the simultaneous equations stored in the coefficient table 243a4RR22, performs matrix calculation, and calculates sj included in the equation (12). To determine a data encoding code pulse train.

  This canceller is used as a canceller included in the localizable signal detection means 240 illustrated in FIGS. 15A to 23C.

  This canceller can also be used for a pulse train having a constant shift time.

  FIG. 16 shows a code-type transmission apparatus 1 that uses the OFDM method for modulation by a stream including the data-coded code pulse train generation means 30 illustrated in FIG. 5 and the transmission signal generation means 70 illustrated in FIG. 8A, or FIG. Code-type transmission apparatus 1 using the OFDM method for modulation by the stream of binary conversion pulse train of the data conversion code pulse train generation means 30 of FIG. 8B and the multiplexed basic pulse train of FIG. 8B, or the data coding code pulse train generation means of FIG. 30 and the code-type transmission apparatus 1 using the OFDM method for modulation by the stream of the secondary code pulse train of the multiplexed basic pulse train of FIG. 8C, and the detection means 210, the synchronization means 220, the localizable signal detection means 240 The code type receiving apparatus 200 including the shift time detecting means 250 and the control means 280 is illustrated.

  The localizable signal detection means 240 is an ADC unit 241b that performs A / D conversion of the detection signal according to the channel, a memory 242b0, an FFT processing unit 248b, a ring memory unit 242b including the memories 242b1 to 242bJ, and a separation including the separation circuits 243b1 to 243bJ. Part 243b. Further, the FFT processing unit 248b includes a GI removal circuit 248b1, an FFT circuit 248b3, and an equalization circuit 248b3.

  Each of the ring memories 242b1 to 242bJ is configured using the ring memory unit 242a, and is configured using the canceller 243a4RR1 illustrated in the separation circuit 243b1 to 243bJ 15B (a) or the canceller 243a4RR2 illustrated in (b). is there.

The synchronization means 220 uses the output signal of the detection means 210 to capture and maintain synchronization. Alternatively, the synchronization is acquired using the output signal of the detection unit 210, the synchronization is held for each narrow band, and the timing is extracted using the data of the synchronization signal stored in the j-th narrow band ring memory unit 242bj. Then, the synchronization of the jth narrowband signal of the localizable signal detection means 240 may be performed.
Alternatively, for stored data with a stable frequency, instead of performing synchronization maintenance for each narrow band, the synchronization is maintained using a specific narrow band synchronization signal or data signal, and all narrow band synchronization is performed. You may hold by.

  Alternatively, instead of capturing the synchronization using the output signal of the signal detection unit 210, the synchronization signal is stored and stored in the ring memory unit 242bj, and the synchronization is captured and held for each narrow band. Alternatively, as a pilot channel, a synchronization signal periodically assigned to each narrow band may be detected, and the narrow band or the entire narrow band may be captured or held.

  The detection signal of the detection unit 210 is A / D converted according to the channel by the ADC unit 241b and stored in the memory 242b0. The stored data is input to the FFT processing unit 248b, the guard interval is removed by the GI removal circuit 248b1, the multi-level chip of the multiplexed basic pulse train demodulated by the fast Fourier transform in the FFT circuit 248b2 and assigned to each narrow band Is calculated, equalized by the equalization circuit 248b3, and stored in the corresponding I channel portion and Q channel portion of the corresponding ring memories 242b1 to 242bJ. In calculating the multi-value chip, it is preferable to measure and equalize the transmission path characteristics, and a method such as correcting the FFT output using a scattered pilot is performed. However, in the present invention, model detection is performed instead of determining individual chips. For equalization, reference can be made to pages 146 to 158 of Patent Document 6. The ring memory unit 242b may be configured using a memory, and the sequential pulse train generation circuit of the separation unit 243b may be configured to generate a pulse train having a shift time according to the order.

  This processing step is repeated a number of times equal to the number of chips KN of the sequential pulse train included in the cycle of the data-coded code pulse train, and one multiplexed basic pulse train assigned to each narrow band is detected. The output waveform of FFT is illustrated in FIG.

   The j-th narrowband complex data is stored in the ring memory unit 242bj and processed by the separation unit 243bj having a canceller based on model detection and the detection unit 250bj of the shift time detection unit 250 to remove interference noise. . The shift time detecting means 250 detects the shift time of the data coded code pulse sequence from each basic pulse train of the multiplexed basic pulse train for each narrow band, and outputs at least shift time information to the data calculating means 260.

  The data stored in the I channel portion of the j-th ring memory 242bj is read as a serial signal for one period and input to the I channel portion of the separation circuit 243bj, and the I channel data-coded pulse train is separated to detect the model. Is detected. The data-coded code pulse train is input to the corresponding detection circuit of the shift time detecting means 250, and its amplitude information and phase information are acquired.

  The separation circuit 243bj is configured to have the same configuration and function as the separation unit 243a in FIG. 15A. The Q channel configuration and process are the same.

  FIG. 17 shows an OFDM type code-type transmission apparatus 1 using parallel modulation including the data coded code pulse train generating means 30 of FIG. 5 and the transmission signal generating means 70 of FIG. 9A, or the data coded code pulse train generating means of FIG. 30 and the transmission signal generation means 70 of FIG. 9B are used oppositely to the OFDM type code type transmission apparatus 1 or the like by the parallel modulation using the binary conversion pulse train of the multiplexed basic pulse train as the parallel modulation signal, and the detection means 210 The code-type receiving apparatus 200 including the means 220, the localizable signal detecting means 240, the shift time detecting means 250, and the control means 280 is illustrated.

  The localizable signal detection unit 240 includes an ADC unit 241c, a memory 242c1, an FFT processing unit 248c, a ring memory 242c2, and a separation unit 243c. Further, the FFT processing unit 248c includes a GI removal circuit 248c1, an FFT circuit 248c2, an equalization circuit 248c4, and a P / S conversion unit 248c3. The separation unit 243c is configured in the same manner as the 243a.

  The synchronization means 220 detects the synchronization signal transmitted by the pilot signal of the scattered pilot channel periodically inserted in each narrowband data signal, and performs synchronization acquisition and holding, but is not limited thereto. The detection of the synchronization signal may be performed directly using the detection signal of the detection unit 210 prior to the processing of the localizable signal detection unit 240, or is it performed in the process of the localizable signal detection unit 240? Alternatively, synchronization acquisition may be performed prior to the processing of the localizable signal detection means 240, and synchronization may be maintained during the processing.

The detection signal for one period of the data-coded pulse sequence in which synchronization is maintained is converted into a digital quantity by the A / D conversion unit 241c and stored in the memory 242c1. The read data stored in the memory 242c1 is subjected to GI removal by the GI removal unit 248c1 of the FFT processing unit 248c, fast Fourier transformed by the FFT circuit 248c2, and multi-valued of the multiplexed basic pulse sequence corresponding to one cycle of the data coded pulse sequence. The chip is detected, equalized by the equalization circuit 248c4, converted to serial data by the P / S conversion unit 248c3, and stored in the ring memory 242c corresponding to the channel.

   The I channel data and Q channel data stored in the ring memory 242c2 are input as serial signals to the separation unit 243c, and the data-coded pulse trains are model-detected and output to the shift time detection means 250, respectively.

  Next, the ring memory 242c1 is shifted in ascending order to update the data to a predetermined state, and the second I-channel data encoding code pulse train is detected in the same manner. In the same manner, the data coding pulse train of the I channel up to mi / 2 is detected. The Q channel data encoding code pulse train is detected in the same manner. Instead of shifting the ring memories 242c2 in ascending order, it is possible to update the state by shifting them in descending order without departing from the spirit of the present invention. In addition, the analysis data of the FFT processing unit 248c is stored using a memory instead of the ring memory 242c2, and the order pulse train generation circuit 243c1 is shifted in ascending or descending order every time the multiplication process is completed, and the state is updated. The sequential pulse train is generated, and the sequence detection is repeated by multiplying the sequential pulse train and the multiplexed basic pulse train reproduced from the stored data read from the memory, and performing model detection. An I channel data coded code pulse train and a Q channel data coded code pulse train may be detected. This mi represents the multiplicity of the multiplexed basic pulse train transmitted i-th. The multiplicity mi / 2 is assigned to the I channel and Q channel, but there are many I channels and Q channels. The severity can also be set differently.

  FIG. 18A illustrates the localizable signal detection means 240 for the primary modulated signal of a single carrier wave. Although it is also used for the frequency hopping method, when primary demodulation is performed by the detection means 210, the demodulator 245s is not used, and the demodulated signal is input to the ADC 241s. The binarized pulse demodulated by the demodulator 245s is digitally converted by the ADC 241s, stored in the ring memory 242s, read out, and reproduced as a multiplexed basic pulse train by the multiplexed basic pulse train reproducing circuit 243s6 of the separator 243s. The reproduced signal is multiplied with the sequential pulse train generated by the sequential pulse train generating circuit 243s1 in the multiplier circuit 243s2, and the data of the corresponding rank is received by the canceller 243s3 that performs model detection by feeding back the output signal to the input side as many times as necessary. A code pulse train is model detected. The above process is the same for a signal modulated with a linear modulation signal.

  The canceller may be configured by connecting a required number of model detection circuits in series, or may be configured to feed back the output signal of the final stage of the model detection circuits connected in series to the input side. When the transmission signal is an impulse, the chip reproducing unit 249h illustrated in FIG. 21 or a chip reproducing unit having an equivalent function is used instead of the demodulating unit 245s.

  FIG. 18B shows the synchronization means 220 and the localizable signal detection means of the code-type receiving apparatus 200 used opposite to the code-type transmitting apparatus 1 having the transmission signal generating means 70 using the orthogonal modulation scheme of FIG. 7A or 7B. FIG. The detection means 210 of FIG. 14B is used as the detection means 210, and the output signals of the I component and the Q component are respectively input to the localizable signal detection means 240 and demodulated by the demodulation circuits 245d1 and 245d2 of the demodulation unit 245d. The A / D conversion circuits 241d1 and 241d2 of the ADC unit 241d respectively convert to digital quantities and store them in the ring memories 242d1 and 242d2. The separation unit 243d includes a multiplexed basic pulse train regeneration circuit 243d6, an order pulse train generation circuit 243d1, a product circuit 243d2, and a low-pass filter LPF 243d3. The data stored in each channel of the ring memory 242d is regenerated into a multiplexed basic pulse train by the multiplexed basic pulse train regeneration circuit 243d6, and the order pulse train generated by the sequential pulse train generation circuit 243d1 is multiplied by the multiplication circuit 243d2, and the canceller 243d3 In this way, the model detection is performed to detect the data-coded pulse trains of the I channel and the Q channel.

  FIG. 19 illustrates the localizable signal detection means 240 and the synchronization means 220 having the canceller of the code type receiver 200. The localizable signal detection means 240 includes a demodulator 245e, an ADC unit 241e, a ring memory unit 242e, a block demodulator 240e, and a canceller unit 247e. In this embodiment, the acquisition or holding of synchronization is performed using the output signal of the block demodulator 240e of the localizable signal detection means 240 instead of using the detection signal. The detection signal demodulated by the demodulator 245e is digitized for each channel by the ADC unit 241e and stored in a corresponding memory circuit of the ring memory unit 242e.

  The ring memory 242e acquires and stores the data of the data signal corresponding to one cycle of the data-coded pulse train by the A / D converter 241e, and links the last address of the memory immediately before the first address. Shifting in ascending order is to set the head address of each rank, and the stored data for one cycle is read out in ascending order with respect to the address. Instead of the signal data for one period of the data-coded pulse train, data for a plurality of periods may be acquired and stored. Further, instead of shifting in ascending order, it is possible to read data by shifting in descending order without departing from the gist of the present invention. The data in the ring memory 242e is input to the matched filter 240e1 to generate I component and Q component pulses. The stored data is read out and input to the block demodulator 240e, subjected to pulse compression by the digital matched filter 240e1, and output to the synchronization means 220. The synchronization means 220 detects a timing pulse as this peak, and acquires and / or holds synchronization. A memory is used instead of the ring memory unit 242f, and a data signal or synchronization signal data corresponding to one period or a plurality of periods is acquired and stored by the A / D conversion unit 241e, and is used by the synchronization unit 220. You may make it extract a timing pulse.

  The output of the matched filter 240e1 is output to the synchronization means 220 and simultaneously input to the estimation demodulation circuit 240e2. The estimation demodulation circuit 240e2 maintains the timing detected by the synchronization means 220, detects the phase and frequency between carriers of interference noise, corrects the offset, and detects the chip of the data coded pulse train. For block demodulation, reference can be made to pages 120 to 124 of Non-Patent Document 1.

  The canceller unit 247e reproduces a multiplexed basic pulse train based on the chip of the data coded code pulse sequence included in the multiplexed basic pulse sequence detected by the block demodulator 240e by the multiplexed basic pulse train generation circuit 247e1. Then, the separation circuit 247e2 separates the data-coded pulse sequence according to the order, and then the model detection is performed by the canceller circuit 247e3, and the detection signal is localized by the localization circuit 247e4. If the localization signal does not reach the required SNR, the model detection and localization process can be repeated as many times as necessary.

  In a signal transmitted by the OFDM method, it is preferable to provide a canceller unit for each narrow band and separate chip vectors, which enables a matrix operation with a small size and simplifies the configuration, but is not limited thereto.

  20 is used opposite to the code-type transmission apparatus 1 having the transmission signal generation means 70 shown in FIGS. 7A and 7B. The localizable signal detection means 240 includes an estimation demodulation unit, and the shift time detection means 250 has a canceller. The code | symbol type receiver 200 containing the part is illustrated. A data vector including chips for one period of the synchronized data-coded pulse sequence detected by the estimation demodulator 240f based on the timing extracted by the synchronization means 220 is a canceller using the model detection of the shift time detection means 250. The data-coded pulse train is model-detected and then input to the localization detector 253f. The localization detection unit 253f is localized using all the chips included in the period of the data-coded code pulse train, outputs the result to the data calculation unit 260, and feeds back the result to the localizable signal detection unit 240. The order pulse train generator 243f and the estimation demodulator 240f repeat the estimation demodulation of the signals of the same order according to this signal, or update the order and perform the estimation demodulation of the signal of the next order.

  In OFDM transmission, it is preferable to perform the above process for each narrow band because low-speed processing is possible and the configuration can be simplified.

  In UWB transmission using impulses, the receiving side detects a transmission signal including an impulse or impulse modulated signal by a detection means and outputs a detection signal, and a localizing signal detection means generates a transmission signal from the detection signal. The pulse train chip is restored while maintaining synchronization, and a localizable signal including the data coded code pulse train is detected from the pulse train representing the restored chip, and the localizable signal is detected by the shift time detecting means. Localize and detect localized pulses.

  Since the impulse and its modulated signal are signals with an average value of 0, these signals are converted to a single polarity using a template or the like, and integration is performed, or peak hold is performed and this value is integrated, A pulse representing the chip may be reproduced.

  The r-multiple δ delay transmission signal generation pulse train corresponds to the highest order because the chip is synthesized by reproducing and multiplexing pulses of multiplicity r synchronized with the transition time of the leading edge of the chip at δ intervals. The synthesized pulse amplitude between the leading edge transition time of the multiplicity r pulse train chip and the trailing edge transition time of the multiplicity r pulse train chip corresponding to the lowest order is sampled to regenerate the chip Is done. The waveform of the r multiple δ delay is illustrated in FIG. 33A. This UWB transmission can be used for wireless transmission and wired transmission.

  21 shows a UWB code having the data coded code pulse train generating means 30 of FIG. 3 and the transmission signal generating means 70 of FIG. 6B, or the data coded code pulse train generating means 30 of FIG. 3B and the transmission signal generating means 70 of FIG. 10B. The detection means 210, the synchronization means 220, the localizable signal detection means 240, and the shift time detection means 250 of the code | symbol type | mold receiving apparatus 200 used facing the type | mold transmission apparatus 1 are illustrated. The localizable signal detection means 240 includes a unipolar circuit 249h1, a pulse synthesis circuit 249h2, a sampler 249h including a sampler 249h3 and a template 249h4, a ring memory unit 242h, a multiplexed basic pulse train regeneration circuit 243h1, a product A separation unit 243h including a circuit 243h2, a canceller 243h3, and an order pulse train generation circuit 243h4 is included.

  The synchronization unit 220 acquires and holds synchronization using a synchronization impulse that is periodically transmitted in series with the data signal detected by the detection unit 210 or a synchronization impulse that is transmitted in parallel. The impulse detection may be performed asynchronously.

  The detection signal is input to the chip reproducing unit 249h, and the impulse is monopolarized by using the template signal generated by the template circuit 249h4 in the monopolarization circuit 249h1. The unipolar signal is integrated by the pulse synthesizing circuit 249h2 to synthesize the pulse, and sampled by the sampler 249h3 to reproduce the pulse of the transmission signal generating pulse train. If the signal is linear to the chip pulse, the regenerated pulse represents the chip, while if the chip is a binarized pulse, it represents the binary pulse. Next, the output signal of the sampler 249h3 is stored in the ring memory 242h. The stored chip data for one cycle is input to the separation unit 243h, the multiplexed basic pulse train is regenerated by the multiplexed basic pulse train regeneration circuit 243h1, and the order pulse train generated by the order pulse train generation unit 243h4 is obtained by the product circuit 243h2. The model is detected by the canceller 243h3 based on the model detection and the output signal is output to the shift time detecting means 250.

  In addition, the r-multiple δ delay transmission signal generation pulse train is synthesized by regenerating and multiplexing pulses of multiplicity r synchronized with the transition time of the leading edge of the chip at δ intervals. The synthesized pulse amplitude between the leading edge transition time of the multiplicity r pulse train chip corresponding to and the trailing edge transition time of the multiplicity r pulse train chip corresponding to the lowest order is sampled to sample the chip. Played. The waveform of the r multiple δ delay is illustrated in FIG. 33A.

  The UWB transmission described above can be used for wireless transmission and wired transmission.

  FIG. 22 is used in opposition to the impulse radio UWB code type transmission apparatus 1 having the data-coded code pulse train generation means 30 of FIG. 5 and the transmission signal generation means 70 of FIG. 10A or FIG. 10B. The code-type receiving apparatus 200 including the means 220, the localizable signal detecting means 240, and the shift time detecting means 250 is illustrated. The localizable signal detecting means 240 includes a chip reproducing unit 249i and a separating unit 243i having the same configuration as the chip reproducing unit 249h. The separation unit 243i includes a multiplexed basic pulse train regeneration circuit 243i5, an order pulse train product circuit 243i1, an order pulse train generation circuit 243i2, a canceller 243i3, and a memory 243i4, and the canceller 243i3 performs model detection.

  One cycle of chip data reproduced by the chip reproducing unit 249i is stored in the ring memory 242i, read out and input to the separating unit 243i, and the multiplexed basic pulse train reproducing circuit 243i5 is used for multiplexing the I channel and the Q channel. The pulse train is reproduced, and the sequential pulse train product circuit 243i1 multiplies the sequential pulse train generated by the sequential pulse train generation circuit 243i2 to separate the data coded code pulse train, and the canceller 243i3 detects the data coded code pulse train as a model. It is stored in the memory 243i4. The stored data is read and input to the shift time detecting means 250 to detect the shift time, and the result is fed back to the separation unit.

  Further, the output signal of the canceller 243i4 is repeatedly fed back to the input side as many times as necessary to improve the SNR at the time of detecting the data coded pulse train. The method of improving the SNR by feeding back the output signal of the canceller to the input side can be applied to other embodiments.

  Furthermore, the SNR can be improved by using the feedback signal from the shift time detecting means 250.

 FIG. 23A is used opposite to the code-type transmission apparatus 1 using OFDM for UWB transmission including the stream modulation transmission signal generation means 70 of FIG. 11A, and includes detection means 210, synchronization means 220, and localizable signal detection means 240. The code type receiving apparatus 200 having the shift time detecting means 250 is illustrated.

  The localizable signal detection means 240 includes a GI removal unit 244k, detection units 245k1 to 245kJ, and localizable signal detection units 246k1 to 246kJ.

  Timing beacons detected by the detection means 220, or synchronous impulses common to all bands periodically transmitted in series with data signals, or synchronous impulses transmitted using specific bands, or each band, respectively The synchronization impulse is used to capture and maintain synchronization.

  The detection signal of the detection unit 210 is subjected to GI removal by the GI removal unit 244k, and then input to the detection units 245k1 to 245kJ. The signal input to the j-th band detector 245kj is demodulated, and I-channel and Q-channel baseband impulse sequences are output. These baseband signals are subjected to interference noise in the same process as the localizable signal detector 240 of FIG. 22 by the localizable signal detector 246kj and the corresponding shift time detector 251kj of the shift time detector 250. After removal, it is localized and a localized pulse is output. However, the chip reproduction unit of the localizable signal detection unit 240 includes a pulse synthesis circuit and a sampler, and the detection signal output of the detection unit 210 is configured to be input to the pulse synthesis unit.

  Corresponding shift time detection means 250 has a localization unit for each band, and is configured to localize the output signal of the localizable signal detection unit 246kj and output the localized pulse to the data calculation means 260. You can do it.

  FIG. 23B is a binary value obtained by binary-converting the stream modulation generated by the transmission signal generating means 70 of FIG. 11B or the chip of the multiplexed basic pulse sequence of FIG. 11C provided in the code type receiver 13 illustrated in FIG. A localizable signal detection unit 240, a detection unit 210, a synchronization unit 220, and a shift time detection unit 250 using FFT for UWB primary demodulation using pulses are illustrated. The localizable signal detecting means 240 includes an ADC unit 241 kb, a memory 242 kb 0, a GI removing unit 244 kb, an FFT unit 245 kb, an equalizing unit 247 kb, and localizable signal detecting units 246 kb 1 to 246 kbJ. In addition, the shift time detection unit 250 includes shift time detection units 251 kb 1 to 251 kbJ configured similarly to the shift time detection unit 250 shown in FIG. 23B.

  The localizable signal detectors 246 kb 1 to 246 kbJ are similar to the localizable signal detector 240 shown in FIG. 23A, and are provided with a chip reproducing unit having a pulse synthesis circuit and a sampler. However, the present invention is not limited to this.

  The GI removal unit 244 kb removes the GI from the output signal of the detection unit 210, and the multiplexed complex multiplexed modulated signal is output to the FFT unit 245 kb. This complex multiplexed modulated signal is a signal generated by IDFT conversion using a transition pulse having a synchronized δ width in each band on the transmission side, and is a complex r-multiplexed basic pulse train assigned to each band. It represents a signal in which a modulated signal modulated by a δ pulse whose delay time of the transition portion of each chip is (u-1) δ is multiplexed. The FFT unit 245 kb performs FFT conversion on the multiplexed modulated signal for each delay time of the r-multiplexed basic pulse train chip, and has a baseband having a δ width and the transition amount of the r-multiplexed basic pulse train chip as an amplitude. A set of complex pulses is output at any δ time interval corresponding to the band to any of the localizable signal detectors 246 kb 1 to 246 kbJ. The GI removal by the GI removal unit 244 kb and the FFT conversion by the FFT unit 245 kb are repeatedly performed until all the pr transition pulses constituting the chip of the r-multiplex basic pulse train are completed, and the localizable signal detection unit The chips in each band are reproduced by 246 kb1 to 246 kbJ. The process of reproducing this chip is repeated NK times in each frequency band, and J sets of complex multiplexed basic pulse trains are reproduced.

  In the case of an OFDM signal generated by a binary pulse train in which the chip is converted to an m′-digit binary number, the chip is started from the m′-digit output signal of the FFT unit 245 kb by the localizable signal detectors 246 kb 1 to 246 kbJ. Are reproduced from the NK reproduced chips, and the sequence pulse train is multiplied to separate the data coded code pulse train of each band. The other steps are performed in the same way as stream modulation.

  Chip signals for the period of the complex multiplexed basic pulse train of the localizable signal detectors 246 kb 1 to 246 kbJ are output to any one of the corresponding shift time detectors 251 kb 1 to 251 kbJ of the shift time detector 250 for localization. Then, a localized pulse is output and fed back to any of the corresponding localizable signal detectors 246 kb 1 to 246 kbJ to remove interference noise. When the localizable signal detection unit 240 of FIG. 21 is used as the localizable signal detection unit, the feedback from the shift time detection unit 250 to the canceller unit is not used.

  Coded receiving apparatus 200 of the UWB system by OFDM of parallel modulation using the FFT illustrated in FIG. 23C generates a primary modulated signal using IDFT with pr sets of complex transition pulses constituting the chip as parallel inputs. It is used opposite to the code transmission device 1 for parallel transmission. The localizable signal detection means 240 is an A / D conversion unit 241kc that converts an input signal composed of a detection signal into a digital quantity, a memory 242kc0 that stores the digital quantity, and a GI that reads the stored data and removes the guard interval. Removal unit 244kc, FFT unit 245kc for converting the signal from which GI has been removed by FFT, equalization unit 246kc for performing equalization, P / S conversion unit 248kc for performing P / S conversion of the output signal for each channel, I channel And a chip synthesizing unit 249kc having a pulse synthesizing circuit 249kc2 for the Q channel and a sampler 249kc3 for obtaining the amplitude value of the synthesized pulse and reproducing the chip, a ring for the I channel and the Q channel for storing the reproduced chip Memory 242kc1, multiplexed basic pulse train regeneration circuit, sequential pulse train generator A circuit, a sequential pulse train product circuit that reads out data stored in a ring memory and multiplies it with a sequential pulse train generated by a sequential pulse train generation circuit, and a canceller circuit that detects a model of a signal on which the sequential pulse train is multiplied Part 243 kc. When the shift time detection unit 250 includes a canceller, the localizable signal detection unit 240 may not include the canceller unit 247kc.

  The detection signal is converted into a digital quantity according to the channel by the ADC unit 241 kc and stored in the memory 242 kc 0. The stored data from which the GI has been removed by the GI removal unit 244kc is input to the FFT unit 245kc.

  The FFT unit 245kc receives as input a multiplexed signal obtained by multiplexing the primary modulated signals generated by the complex transition pulses at the leading edge and the trailing edge of the pr sets of chips allocated to the J sets of bands. This is subjected to FFT conversion, and pr sets of complex transition pulses are output to the equalization unit 246kc for equalization, and then output to the P / S unit. It is preferable to configure J and pr to be equal to achieve high frequency use efficiency.

  The pulse including the leading edge of the chip is synthesized by the pulse synthesizing circuit of the chip reproducing unit 249 kc from the complex pulse train P / S converted by the P / S converting unit 248 kc to form a complex pulse. Next, a complex multiplexed signal that is first-order modulated with a transition pulse at the trailing edge of the chip is input to the FFT unit 245 kc, and the transition pulse at the trailing edge of the pr set is analyzed and equalized by the equalizing unit 246 kc. Then, the signal is converted into a pulse train by the P / S converter 248kc and input to the pulse synthesizing circuit of the chip regenerator 249kc to regenerate a complex pulse including the trailing edge. Sampling is performed by the sampler 249kc3 at a time representing the amplitude of the chip between the leading edge and the trailing edge of the reconstructed complex pulse, and a complex chip representing a set of I channel and Q channel chips is regenerated.

  The process until the above chip reproduction is repeated NK times equal to the number of chips included in the cycle, and the multiplexed basic pulse train is reproduced. The complex multiplexed basic pulse train is input to the separation unit 243kc, and the data coded code pulse train of each channel is separated and the model is detected to remove noise. Further, the shift time detecting means 250 detects the shift time of each channel from the separated data-coded pulse train. The shift time detection means 250 is preferably configured to localize signals and detect localized pulses of the respective channels, but is not limited thereto.

  In OFDM using parallel modulation of a binary pulse train in which the chip is binary-converted, the storage mode of the ring memory 242kc1 is the same as that of stream modulation, and the process of separation, noise removal including interference, and localized pulse detection are performed. And the configuration can be used.

FIG. 24A shows a multiplexed basic pulse train, its impulse, a binary pulse train obtained by binary-converting the multiplexed basic pulse train, and its impulse, a shift time detecting means used for a modulated signal in which a single carrier is modulated by any of these. 250 includes a ring memory unit 253s, a localization unit 251s, and a localization pulse detection unit 252s. The data-coded pulse trains that are model-detected by the localizable signal detection means 240 are stored in the ring memory 251s, read out, and input to the localization unit 251s. The localization unit has a circuit for performing localization, such as a matched filter or a correlation function calculation circuit, and localizes the data-coded pulse train. The localized pulse is detected by the shift time detecting means 252s and determination is made.

When a correlation function calculation circuit is used for the localization circuit, a fixed memory may be used instead of the ring memory.
Instead of the localization unit 251s and the localization pulse detection unit 252s, the phase of the code pulse train may be calculated using a Fourier coefficient, and the shift time may be calculated therefrom.

  FIG. 24B exemplifies the shift time detecting means 250 of the orthogonal modulation system, and includes a ring memory unit 253a including ring memories 253a1 and 253a2, a matched filter unit 251a including matched filter circuits 251a1 and 251a2, and a localized pulse detecting circuit 252a1. And a localized pulse detector 252a including 252a2, each corresponding to an I channel and a Q channel.

  The I-channel localizable data-coded pulse train detected by the localizable signal train detector 240 is localized by the matched filter 251a1, and the pulse is detected by the pulse detector 252a1. When a correlation function calculation circuit is used for the localization circuit, a fixed memory can be used instead of the ring memory. Similarly, the data-coded pulse train that can localize the Q channel is localized by the matched filter 251a2, and the pulse is detected by the detection unit 252a2, and the determination is performed. This process is repeated for the multiplicity, and the localized pulses of all the data-coded pulse sequences are output to the data calculating means 260.

  Instead of the localization unit 251a and the localization pulse detection unit 252a, the phase of the code pulse train may be calculated using a Fourier coefficient, and the shift time may be calculated therefrom.

  If the localized pulse cannot be detected, a control signal for requesting redetection processing may be transmitted to the localizable signal detecting means 240. If the pulse cannot be detected even by the re-detection process to the localizable signal detection unit 240, a retransmission request signal for requesting retransmission to the transmission side is transmitted to the control unit 280. Alternatively, the retransmission request signal may be transmitted to the control unit 280 without making a redetection processing request to the localizable signal detection unit 240. The re-detection process and the re-transmission process are similarly performed in the shift time calculation unit in FIG. 24A.

    FIG. 25 exemplifies the shift time detecting means 250 in OFDM, and includes a ring memory unit 253h including ring memories 253h11 to 253hJ1 for I channel and ring memories 253h12 to 253hJ2 for Q channel, localization circuits 251h11 to 251hJ1 and A Q pulse localization circuit 251h12 to 251hJ2 and a localization pulse detection unit 252h including localization pulse detection circuits 252h11 to 252hJ1 and 252h12 to 252hJ2 are provided. The ring memory circuit of the ring memory unit 253h, the localization circuit of the localization unit 251h, and the localization pulse detection circuit of the localization pulse detection unit 252h are respectively the ring memory 253s, the localization circuit 251s, and the localization circuit 251s shown in FIG. It is configured using a localized pulse detection circuit 252s.

  The I channel output signal and the Q channel output data of the j-th localizable signal sequence separation unit of the localizable signal sequence detection means 240 are stored in the ring memories 253hj1 and 253hj2, respectively. When a matched filter is used in the localization circuit, the read I-channel storage data is input to the localization circuit 251hj1, and pulse compression is performed within the time required for the ring memory 253hj1 to make a round. The localized pulse is detected by the detection circuit 252hj1. The above process is common to each band, and is repeated a number of times equal to the multiplicity in each band so that all data-coded pulse sequences are localized, and localized pulses are detected and output. The detection of the Q channel localized pulse is performed in the same manner. When the localization unit is configured by a correlation function calculation circuit, a fixed memory may be used instead of the ring memory.

  Like the shift time detection unit 250 shown in FIGS. 24A and 24B, the shift time detection unit 250 is configured to perform a reprocessing request or a retransmission request when a localized pulse cannot be detected. May be.

The data calculating unit 260 calculates data using the shift time obtained by detecting the localized pulse. If the data is source data subjected to error correction coding, decoding is performed to calculate the source data.

  FIG. 26A illustrates a data calculation unit 260, an output unit 270, a communication unit 230, and a control unit 280 having a memory unit 261s, a data reverse conversion unit 262s, and an error correction decoding unit 263s. In particular, it is preferably used corresponding to the shift time detecting means 250 of FIG. 21 or FIG. 24A, and its output is stored in the memory unit 261s, read out, and read out by the data inverse conversion unit 262s in binary, octal, The data is converted into an error correction encoded data format before being converted into N-decimal numbers on the transmission side such as hexadecimal or decimal, or converted into a required data format. Next, error correction decoding is performed by the error correction decoding unit 263 s to calculate source data, which is output from the output unit 270 to a display device, a computer, a communication line, and the like. If error correction decoding cannot be performed, an error signal is transmitted to the control unit 280, a control signal is generated, and a retransmission request is made via the communication unit 230. In a strong noise environment, the communication unit 230 generates and transmits a transmission signal using an encoded pulse train, and detects the reception signal with a configuration including a canceller using model detection.

  FIG. 26B illustrates a data calculation unit 260, an output unit 270, a communication unit 230, and a control unit 280 having a memory unit 261a, a data reverse conversion unit 262a, and an error correction decoding unit 263a. A memory unit 261a including memory circuits 261a1 and 261a2, a data inverse conversion unit 262a that calculates data from localized pulses, an error correction decoding unit 263a, and a P / S conversion unit 264a are provided. Output signals of the localized pulse detectors 252a1 and 252a2 shown in FIG. 24B are stored in the memory 261a corresponding to the channels. These stored data are input to the data inverse transform unit 262a in the same manner as the data inverse transform unit 262s of FIG. 26A, are error correction decoded and converted into I channel and Q channel error correction encoded data, Error correction decoding is performed by the error correction decoding unit 263a, source data is calculated, and output to output means for display, output to a computer, and the like.

  In any of the data calculation means, the data reverse conversion by the data reverse conversion unit and the error correction decoding by the error correction decoding unit are performed by the scale of the error-corrected data set on the transmission side and the data set converted to N-digit m-digits. Although it is preferable to be configured to be able to be performed according to the scale, the present invention is not limited to this. In addition, for high-speed processing, reading from the memory to the data inverse conversion unit, transmission from the data inverse conversion unit to the error correction decoding unit, and the like may be performed in parallel.

  FIG. 27 exemplifies data calculation means 260, output means 270, communication means 230, and control means 280 in OFDM. The data calculation means 260 includes a memory unit 261h including an I channel memory 261h11 to 265hJ1 and a Q channel memory 261h12 to 261hJ2, a data reverse conversion unit 262h, and an error correction decoding unit 263h.

  The output signals of the determination circuits 252hj1 and 252hj2 of the shift time detecting means are stored in the corresponding memories 261hj1 and 265hj2, respectively. The stored data is input in parallel to the data inverse conversion unit 262h to calculate error correction encoded data, and then input to the error correction decoding unit 263h to calculate source data and output it to the output means 270.

  The data calculation means 260 is configured to correspond to the transmission method of the code transmission device 1. In OFDM transmission using stream modulation, the source data is calculated by the error correction decoding unit 263h using the N-th mj-digit decoded data of the jth narrowband I channel and Q channel allocated over the entire band. Is done. Alternatively, instead of using the decoded data of the entire band, the frequency band is divided into a narrow band set corresponding to the transmission signal, and the error correction decoded data of each set of I channel and Q channel is used to generate the source data May be calculated.

  The present invention is a wireless integrated circuit tag (RFIC tag) that is transmitted and received using a signal based on a multiplexed basic pulse train, and is read and written, and is used opposite to an RF reader / writer that performs writing and reception. The frequency characteristic is designed so as to be compatible with the signal from the RF reader / writer. In particular, it is preferable to use a signal based on a secondary encoded pulse train for use in a noisy environment.

  This RFIC tag transmits / receives at least stored ID data and chip data of a multiplexed basic pulse train to / from a reader / writer. The chip data is stored in the memory as bit data of the chip, and is converted into an impulse, a pulse, or any one of those modulated signals as a bit stream at the time of transmission, becomes a transmission signal, and is transmitted as a response wave. Alternatively, instead of a bit stream, it is converted into an impulse, a pulse linear to the amplitude of the chip, or a transmission signal that is a modulated signal thereof, and transmitted as a response wave.

  In addition, it is preferable that the RFIC tag has means for storing at least data for identifying an application target to be attached and for the reader to store information for identifying the format of the data.

  The data is stored in the non-erasable storage means of the tag at the manufacturing stage, or is written into a rewritable memory or a non-erasable memory using a writer function of the reader / writer after shipment.

  This RFIC tag stores chip bit data or secondary encoded pulse train in memory, which increases the amount of information stored per bit of memory, simplifies arithmetic processing, and modulates the bit stream for transmission and reception. By using signals, conventional RFIC tag manufacturing technology can be used, development and manufacturing costs can be reduced, a large amount of data can be stored in a distributed manner, and response wave model detection processing is performed on the reader / writer side to shift time Therefore, the S / N ratio is improved, the error rate is reduced, and the communication range is expanded.

  In particular, when a secondary encoded pulse train is used, the S / N ratio at the time of detection in the reader / writer is improved by model detection, which is preferable. The transmitted control signal includes an encoded control signal generated by modulating the code pulse sequence or the sequence pulse sequence with a binary control pulse, or a code pulse sequence obtained by converting the control pulse into a shift time. The ordering control signal spread by the order pulse train can be used to detect the received control signal by performing model detection on the receiving side, but the control signal transmission method is not limited thereto.

  Further, communication with the reader side is performed by a half-duplex method by time division or a full-duplex method by band division. Further, the present invention may be configured to allow communication between RFIC tags.

  The RFIC tag is classified into a passive type tag in which power supply is supplied by transmission power from a reader / writer, and an active type in which power is supplied from a battery or the like. The passive type RFIC tag is an IC type tag equipped with an antenna that is shared between input and output, and stores at least data of a chip of a multiplexed basic pulse train or a secondary encoded pulse train and supplies it to the antenna. The stored data is processed and transmitted in synchronization with the input signal by the energy that has been generated.

  In particular, for miniaturization, cost reduction, and mass production, it is preferable that an antenna is mounted on a single-chip circuit. Data, ID, etc. may be written and stored so that they cannot be erased during manufacturing, or may be stored in a rewritable storage means.

  When the interrogation wave emitted from the RF reader / writer is detected by the antenna of the RFIC tag, the data stored in the storage means is read out to generate a transmission signal based on the transmission signal generation pulse train, and the response wave along with the command Is output to the RF reader / writer. This transmission signal may be an impulse train based on a multiplexed basic pulse train, a pulse train, an impulse modulated signal, or a pulse modulated signal, and may be a primary modulated signal, or a high frequency transmission signal is generated. It may be generated by directly modulating with a signal based on the pulse train for use.

  On the other hand, since the active RFIC tag has a power supply for supplying power, it has a calculation means, and the calculation result is an impulse generated by the bit stream of the chip of the multiplexed basic pulse train, a pulse, or any one of these modulated signals. It may be configured to transmit a certain transmission signal as a response wave. Alternatively, instead of the bit stream of the chip, an impulse having a linear amplitude with respect to the amplitude of the chip, a pulse, or a transmission signal that is one of these modulated signals may be transmitted as a response wave.

  The RFIC tag of the present invention uses a model detection method for detecting the data-coded pulse train. When a secondary encoded pulse train is used, the binary conversion pulse that is the modulation signal is detected based on the model detection method. Noise can be removed by model detection, and the S / N ratio is greatly improved. And, a transmission signal based on a transmission signal generation pulse train is received, calculation of source data from received data and calculation of source data from stored data and calculation of them, conversion and storage of calculation results into a multiplexed basic pulse train, It is configured to perform any or some of inter-tag communication and data processing including transmission signal generation and transmission, data transfer between adjacent RFIC tags, etc., but the functions provided are not limited to these. Absent.

  Instead of calculating the source data and performing the calculation, the calculation means may be configured to perform calculation with the received data having the same signal format as the data stored in the chip of the multiplexed basic pulse train.

  Alternatively, the source data or error-corrected data is transmitted from the reader / writer, the calculation is performed with the source data or the error-corrected storage data, the calculation result is stored, and a multiplexed basic pulse train is generated to transmit the signal. An impulse or pulse based on the bit stream secondary coding pulse train of the chip of the generation pulse train, or an impulse or pulse linear to the chip amplitude, or a transmission signal that is one of those modulated signals may be transmitted as a response wave.

  In addition, both passive and active tags have carrier oscillation circuits that use the same frequency, and the carrier whose frequency is synchronized after the congestion control is released is collected between adjacent tags by the operation result data and congestion control. You may comprise so that it may modulate with data etc. and may be transmitted to a reader / writer. In order to obtain such the same frequency, it is preferable to use a non-linear pull-in phenomenon. Thereby, transmission energy increases, the S / N ratio at the time of reception on the reader side is improved, and the communication distance is expanded.

  Further, each RFIC tag may have a calculation means for performing a calculation in a coordinated manner so that each assigned job is executed. Further, each tag, which is a member tag, may have a self-organizing function that is optimized with respect to a given evaluation criterion so as to efficiently execute a part of the job around the base tag. The base tag may have a configuration and a function at a start state of the operation, or may be configured to have a function as a base tag during the operation. For example, self-organization of the base tag and the member tag is performed by an interaction between the tags or by a control signal from a reader / writer, but is not limited thereto.

  FIG. 28A illustrates a passive RFIC tag 300 that stores a binary conversion pulse train of a multiplexed basic pulse train, and includes an antenna 3001a, a power supply means 3009a, an initial setting circuit 3008a, a clock circuit 3006a, and a processing / control means 3007a. The processing / control unit 3007a includes a decoder 30072 using model detection, a transmission control unit 30073, a congestion control unit 30071, and memory control units 30074 and 30075, and data obtained by binary conversion of the chip amplitude of the multiplexed basic pulse train Are used for storage and transmission / reception signals. The RFIC tag 300 preferably has means for storing at least data for identifying an application target to be pasted or embedded and for storing information for the reader to identify the format of the data.

  By performing model detection using a secondary encoded pulse train, the tag 300 can remove noise when detecting a binary conversion pulse. In particular, since the S / N ratio of the detection signal can be greatly improved, communication channel noise is large. It is also suitable for use in the environment and at long distances. In addition, the amount of stored information per memory cell is large, the calculation process is simplified, the model can be detected on the receiving side, the S / N ratio is improved, and the communication range can be expanded. Suitable for read-only applications, production management, inventory management, product management, distribution management, quality management, location information management, environmental management, property management, commuter pass, various tickets, securities It can be used for security management such as banknotes and immobilizers, pharmaceutical medication management, etc., but the application is not limited to these.

  The processing / control unit 3007a includes a model decoder 30072 that detects a model of a secondary encoded pulse train signal, a congestion control unit 30071, a transmission control unit 30073, a memory control unit 30074, and a memory 30075. In the present invention, a plurality of input signals at the time of congestion are removed as interference noise, but in order to obtain a good S / N ratio of the signal input to the reader by avoiding congestion, a congestion control unit 30071 is provided. Also good.

  The memory 30075 stores a binary conversion pulse obtained by bit-converting a chip of a multiplexed basic pulse train or a pulse of a secondary encoded pulse train. The power supply means 3009a is a rectifier circuit, forms an input / output circuit, and further includes a voltage suppression circuit that suppresses an excessive voltage.

  The interrogation wave from the RF reader / writer is received by the antenna 3001a and input to the power supply means 3009a to acquire power and supply it to the RFIC tag. The received signal of the antenna 3001a is input to the clock circuit 3006a and when power is acquired, a clock is generated. The initial setting circuit 3008a separates the code pulse train and detects the model to set the initial state, and according to the output of the decoder 30072. The memory controller 30074 operates to read data stored in the memory 30075 to the transmission controller 30073 to generate a transmission signal, and a signal from the reader / writer as a response wave from the antenna 3001a via the power supply means 3009a. Sent in response to. Transmission / reception of control signals and transmission / reception of data are performed by a half-duplex communication system or a full-duplex communication system. In addition, the congestion control unit 30071 controls the transmission control unit 30073 until it is reset when a sleep command is given once reading is completed and is once read, thereby preventing simultaneous operation of a plurality of tags.

  The storage data of the tag is updated by the writer function of the reader / writer. A signal including a command and data from the writer supplies power to the power supply means 3009a, initializes an initial setting circuit, and operates the clock circuit 3006a to oscillate a clock. A model of a secondary encoded pulse train representing a command is detected from a detection signal detected by the power supply means 3009a by a decoder 30072 using model detection. Next, the data is decoded and the memory control unit 30074 is operated to write data to the memory 30075. During this time, the transmission control unit 30073 controls the input circuit so that the input impedance matches. When the writing to the storage means is completed, the memory controller 30074 is controlled by the transmission controller 30073, and the chip data stored in the memory 30075 is sent to the reader / writer as a response wave. The tag 300 may further include a transfer unit and transfer the storage data of the adjacent tag.

  FIG. 28B illustrates an active RFIC tag 300 having power supply means configured by a battery, a battery, and the like. An antenna 3001b jointly used for transmission / reception, timing extraction means 3002b using model detection, transmission means 3004b, reception It has means 3003b, power supply means 3009b, calculation means 3005b, memory 3008b, control means 3000b and congestion control means 3010b, and is used in the same manner as the tag 300 in FIG. Diversify.

  Since the power supply unit 3009b is included, the calculation unit 3005b can perform calculation, and a transmission signal can be generated based on the calculation result and transmitted as a response wave.

  The control unit 3000b performs at least control of the calculation unit 3005b, state control of issuing and canceling a sleep command to the congestion control unit 3010b, and control of the transmission unit 3004b.

  From the synchronization code pulse train detected by the antenna 3001b, the timing extraction unit 3002b that performs model detection extracts the timing of the synchronization signal composed of the code pulse train signal, and the clock of the control unit 3000b is controlled by this timing. In order to remove noise, it is preferable to detect and maintain synchronization by detecting a localized pulse based on model detection using a code pulse train and a secondary encoded pulse train as a synchronization signal, but not limited thereto. Alternatively, a pulse train, a binary conversion pulse train, or the like may be used. A control command is detected by the receiving means 3003b using model detection and input to the control means 3000b. The bit data of the chip of the multiplexed basic pulse train stored in the memory 3008b is read and sent to the transmitting means 3004b. Is output and sent to the antenna 3001b. The memory 3008b may store the pulses of the secondary encoded pulse train instead of storing the bit data of the chip.

  The control unit 3000b stores the data calculated by the calculation unit 3005b in the memory 3008b, reads out the stored data, performs calculation processing, stores the result in the memory, and outputs the result to the transmission unit 3004b to be multiplexed basic pulse train. A transmission signal is generated based on a transmission signal generation pulse train, and a modulated signal in which a carrier wave or a hopping carrier wave is modulated by an impulse, a pulse, or any of them generated by a pulse of a bit stream whose bit is converted by the chip is generated. Configured to be sent out. Alternatively, in place of the chip bit stream pulse, an impulse or pulse linear with respect to the amplitude of the chip, or a modulated signal in which the carrier wave or the hopping carrier wave is modulated by any one of them is generated and transmitted. However, it is not limited to these.

  Although the power supply unit 3009b includes a battery, power may be supplied by electromagnetic induction in addition to the battery.

  The RFIC tag 300 of the present invention may constitute the control unit 3000b so as to transfer the storage data of the adjacent tag, and also stores the storage data of the adjacent tag in the memory 3008b and processes it by the arithmetic unit 3005b. Each means including the control means 300b may be configured so as to be stored in the memory 3008b and transmitted. The arithmetic means 3005b reproduces the multiplexed basic pulse train at the receiving means 3003b, separates the data coded pulse train, and then performs model detection to detect the data coded pulse train and the shift time or binary conversion thereof. An operation may be performed at the shift time, or an operation may be performed directly on the data-coded code pulse train.

  For example, in the direct calculation, a pulse sequence representing an M-sequence signal is used for the sequential pulse sequence and the data-coded code pulse sequence, and the calculation using the shift additivity is performed, but the present invention is not limited to this. When noise is superimposed, a binary encoded pulse train is used as a transmission signal, a binary conversion pulse is detected by detecting the model, a multiplexed basic pulse train is reproduced from this, and a data encoded code pulse train is separated to detect a model. The calculation using the shift additivity can be performed on the detected data-coded pulse sequence, but the present invention is not limited to this.

  In addition, the direct calculation using this basic pulse train is not limited to the RFIC tag, but a code-type transmitting device, code-type receiving device, RF reader / writer, storage device, other devices, devices, external devices that require calculation. Etc. can be used.

  The present invention supplies a power to the RFIC tag, generates a transmission signal generated based on at least chip data of a multiplexed basic pulse train such as data and ID, transmits it, and stores it in the memory of the RFIC tag 300 Then, the transmission signal in which the data, ID, etc. are converted to the transmission signal based on the bit stream of the chip of the multiplexed basic pulse train is sent to the RFIC tag as a query wave, and the response wave of the stored data reflected or transmitted in the same format is sent An RF reader / writer provided with a reader that receives and calculates source data and the like. This RF reader / writer is configured to perform transmission, reception, processing, storage, and the like of a signal that is matched to the RFIC tag used oppositely. .

  FIG. 29 illustrates an RF reader / writer 400, which includes an antenna 4000rc, a circulator 4001rc, a reception amplifier 4002rc, a transmission amplifier 4003rc, a calculation unit 4004rc, a memory 4005rc, an interface 4006rc, a control unit 4007rc, a transmission unit 4008rc, and a model. A detection receiving unit 4009rc and a clock oscillation / control unit 4010rc are provided.

  The transmission means 4008rc is configured using all or one part of the code-type transmission device 1, while the stop model detection reception means 4009rc is configured using all or one part of the code-type reception device 200. The means performs transmission and reception by sharing the antenna, and is controlled by the control means 4007rc.

  For read, when activated, a clock is oscillated by the oscillation / control unit 4010rc and the control unit 4007rc is activated. The interrogation wave generated by the transmission means 4008rc in accordance with the control signal that is the output signal is inputted in the order of the amplifier 4003rc, the circulator 4001rc, and the antenna 4000rc, and is sent to the tag 300 to be supplied with power, and the data stored in the tag is the response wave. Read as. This interrogation wave is a modulated signal in which either a binary pulse train representing a bit stream obtained by bit-converting a chip of a multiplexed basic pulse train, a code pulse train representing data depending on the type, or a secondary coded pulse train is modulated. It may be. Alternatively, the interrogation wave may be a modulated signal that is linearly modulated by a chip of a multiplexed basic pulse train. Note that the types of signals are not limited to these.

  The response wave is input in the order of the antenna 4000rc, the circulator 4001rc, the receiving amplifier 4002rc, and the model detection receiving means 4009rc. The model detection receiving unit 4009rc is configured to perform detection by a method corresponding to the type of signal.

  In the case of a binary pulse train of a bit stream, a pulse train is detected to reproduce a multiplexed basic pulse train, a data-coded pulse train is separated, model detection is performed to calculate a shift time, and source data is calculated. On the other hand, in the case of a code pulse train representing data by type, the model is detected to determine the type, and source data is calculated. In the case of a secondary encoded pulse train, binary conversion pulses are sequentially detected by model detection, a multiplexed basic pulse train is reproduced from this, and a shift by separation of the data encoded pulse train, model detection and localization is performed. Time calculation and error correction coded data are decoded and source data is calculated. The calculated data is collated with the ID of the memory 4005rc by the calculation means 4004rc. Further, the calculated source data is transmitted to an external device or the like via the interface 4006rc. ASK, AM, FM, or the like is used for modulation for reading.

  In order to reduce the influence of the communication environment, it is preferable to hop the oscillation frequency by the clock oscillation / control unit 4010rc.

  The arithmetic unit 4004rc controls the frequency of the clock oscillation / control unit 4010rc and performs frequency conversion of the detection signal of the reception unit 4009rc. Further, the control means 4007rc controls the transmission and reception processes in accordance with the control signal from the calculation means 4004rc. Further, the transmission frequency and order of the transmission means 4008rc are switched based on the calculation means 4004rc, and control is performed so that no congestion occurs between response waves. In addition, an order pulse train is assigned so as not to overlap between tags, and when congestion occurs, responses from other tags are removed as interference noise.

  When the transmission means 4008rc transmits an impulse interrogation wave as a passive RFIC tag reader, a power supply carrier wave in which a timing signal and an impulse are superimposed is used, and power is accumulated on the RFIC tag side to store stored data impulses. A response wave consisting of It is sent to the tag 300 side. Alternatively, the timing may be supplied using a beacon or the like. In this case, the RFIC tag captures or holds the timing using a beacon signal.

  The writing by the RF reader / writer 400 is generated by the computing unit 4004rc by storing the data and ID input via the interface 4006rc in the memory 4005rc by the computing unit 4004rc and operating the transmission unit 4008rc by the control unit 4007rc. A transmission signal converted into the chip data format of the multiplexed basic pulse train is generated from the write command and the input data, and is transmitted from the transmission amplifier 4003rc via the circulator 4001rc from the antenna 4000rc.

  When reading from the active RFIC tag 300 by the RF reader / writer 400, timing is supplied by a beacon or the like, and an impulse is transmitted as a data signal based on a multiplexed basic pulse train. The response wave format, storage format, control method, and the like in the RFIC tag are the same as in the passive RFIC tag.

  See FIGS. 36A to 36C for the bit stream in which the chip of the multiplexed basic pulse train is bit-converted and the storage format.

FIG. 30 shows signal waveforms at various parts of the code-type transmission apparatus 1 including the error correction coding means 20 of FIG. 2, the data coded pulse train generation means 30 of FIG. 3, and the transmission signal generation means 70 of FIG. The waveform of each part of the code-type receiving apparatus 200 that is used and includes the detection unit 210 of FIG. 14A, the localizable signal detection unit 240 of FIG. 18A, the shift time detection unit 250 of FIG. 24A, and the data calculation unit 260 of FIG. Represents. The same applies to the waveforms of the I channel and Q channel in quadrature modulation. FIG. 30B shows an example of a signal in which one type of code pulse train is used as the data coded pulse train and the chip width is widened and / or reduced, and the shift time depends on the clock according to the data. They are set synchronously. The data is converted into (0, 1, 2, 3, 4, 5, 6) by the data conversion unit 31s in FIG. 3 and is transferred to the shift register constituting the data conversion unit 32s according to this data in the initial state. The shift time of the code pulse train is set, and seven types of data coded pulse trains are generated. The code pulse train in the initial state is generated in synchronization with the clock (a) by the code pulse train generator 33s.
The clock frequency can be changed.

  b-1 to b-7 are output signals of the data converting unit 32s of the data encoding code pulse string generating means 30 of the code type transmitting apparatus 1, and b-1 is a first data encoding code pulse string in which the data is 0. This waveform corresponds to the code pulse train in the initial state generated by the code pulse train generating unit 33s. In addition, b-2 is 1 but b-3 is 2, b-4 is 3, b-5 is 4, b-6 is 5, and b-7 is 6 represents a data-coded code pulse train waveform.

  c-1 to c-7 are sequential pulse trains generated by the sequential pulse train generating means 50 and having a chip width of Tc, c-1 is an ordered pulse train having a shift time of 0, and c-2 is a shift time. It is an order pulse train of Tc. The same applies hereinafter, and c−j, which is the jth pulse train waveform, represents an ordered pulse train having a shift time of (j−1) Tc. The chip width Tc of the sequential pulse train is the chip width of the basic pulse train shown in (d) of FIG. 30A, and further the chip width of the multiplexed basic pulse train of (e). Note that this sequential pulse train may be configured to have a chip subjected to widening / reducing conversion.

  d-1 to d-7 represent basic pulse trains obtained by multiplying the data coded code pulse train and the order pulse train, and are output signals of the ordering unit 702s. d-1 represents a basic pulse train in which b-1 and c-1 are multiplied. The same applies hereinafter, and d-7 represents a basic pulse train in which b-7 and c-7 are multiplied.

  (E) is an output signal of the multiplexing unit 703s of the code-type transmission device 1 shown in FIG. 6A, and represents a multiplexed basic pulse train in which the basic pulse trains d-1 to d-7 are multiplexed. In this pulse train, a carrier wave is first-order modulated in 701 s, filtered by a filter 708 s, and a main carrier wave generated by a carrier wave generating unit 710 s is modulated by a modulating unit 709 s.

(F) shows the output signal of the product circuit 243s2 of the code type receiving apparatus 200 of FIG. 18A, and f-1 to f-7 are detection signals subjected to primary demodulation and are represented by (e). A signal obtained by multiplying the multiplexed basic pulse trains by the same order pulse trains as c-1 to c-7 in (c) and separating the data-coded pulse trains, and the other basic pulse trains and their order pulse trains, The pulse train that is the product of is superimposed as noise. This waveform is model-detected by the canceller 243s3.
(G) g-1 to g-7 illustrate detection signal waveforms obtained by detecting models f-1 to f-7, respectively. This waveform is identical or similar to the waveform of the data-coded pulse train having a constant chip width.
H-1 to h-7 in (h) exemplify the main peaks of the correlation function waveform between g-1 to g-7 and the local signal of the shift time detecting means 250, and the data are 0, 1, 2 respectively. , 3,4,5,6.

  When transmission is performed in a noisy environment, the noise generated in the communication path, the device, etc. is superimposed on the waveform shown in f-1 to f-7 in the despread signal. When noise remains in the waveform output to the shift time detecting means 250, the noise and local signals additively superimposed on the signal waveforms of the model detection signals g-1 to g-7 are added to the correlation function waveform. The correlation noise, which is the correlation function, is superimposed, but is localized and the SNR is improved in proportion to the code length.

  The localization unit 251s performs pulse detection, outputs localized signal waveforms whose main peaks are indicated by h-1 to h-7, and outputs the shift time information from the localized pulse detection unit 252s. .

  Information on the detected shift time is input to the data calculation means 260 to calculate source data. The same applies to the waveforms of the I channel and Q channel in the case of quadrature modulation. In addition, when transmitting using stream modulation in frequency division transmission including OFDM, the same model detection is performed in each channel of each band, and on the other hand, complex multiplexed basic pulse trains are modulated in parallel and transmitted The same model detection is performed for the I channel and the Q channel. Model detection is performed in the same manner in frequency hopping transmission and UWB transmission.

  FIG. 31A shows a linear modulation scheme using stream modulation for OFDM, which includes the error correction coding means 20 of FIG. 2, the data coding code pulse string generation means 30 of FIG. 5, and the transmission signal generation means 70 of FIG. 8A. Multiplex basic pulse train waveforms s1I to sJI and s1Q to sJQ for one period T time, which are output signals of the I channel multiplexing units 703b11 to 703bJ1 and the Q channel multiplexing units 703b12 to 703bJ2 Represents. Multiplexed basic pulse trains with multiplicity m are divided according to conditions such as transmission rate and transmission path characteristics, and assigned to each narrow band so as to be complex multiplexed basic pulse trains, and chips of the same time are transmitted in synchronization in parallel. Is done. Instead of the data conversion circuits 32b11 to 32bJ2, m data conversion units 32b are configured with m data conversion circuits, and the ordering unit 702b is configured with m ordering circuits correspondingly. M basic pulse trains may be generated in parallel and input to the multiplexing unit 703b to increase the speed by parallel processing.

  s1I to sJI represent multiplexed basic pulse trains in which the period assigned to each narrowband I channel is T, the chip width is Tc, the multiplicity is m1j, and j = 1 to J. From time t0 to t1, the chip CI11 of S1I corresponds to the I component (real part) of the first narrow-band complex symbol having the frequency f1. Similarly, the Q component (imaginary part) corresponds to the chip CQ11 of the multiplexed basic pulse train of the Q channel. The same applies to the following, and the j-th narrowband I-component chip whose subcarrier frequency is fj from time t0 to t1 is CI1j, and the Q-component chip is CQ1j. These (CI1j, CQ1j), j = 1 to J complex symbols are input in parallel to the IDFT unit 704b and subjected to inverse discrete Fourier transform to generate an I channel signal and a Q channel signal.

  Similarly, between the times t (r−1) and tr, the I component of the jth complex symbol having fj is the chip CIrj, the Q component is CQrj, and the IDFT unit 704b performs discrete inverse Fourier transform. Is done. r is an integer from 1 to KN, and KN is equal to the number of chips included in the period T.

  On the other hand, FIG. 31 (b) shows the I-channel signal waveform and the Q-channel signal waveform of each narrow band of the FFT circuit 248b2 included in the localizable signal detection means 240 of the code type receiver 200 shown in FIG. The waveform of (a) is reproduced.

  FIG. 32A shows a waveform of an input signal of the S / P conversion unit 714c of the transmission signal generating means 70 of the OFDM transmission using the parallel modulation method illustrated in FIG. 9A. In the period from time t0 to tKN, a multiplexing basic pulse train I1 corresponding to an I component having a period of T, a chip width of Tc, a chip number of KN and a chip of i1j, and a Q component corresponding to a Q component having a chip of q1j. Each of the pulse trains Q1 is input to the S / P converter 714c and converted into a pair of complex symbols (i1j, q1j), j = 1, 2,..., J to modulate the jth narrowband subcarrier. Signal. Therefore, the number of bands J is equal to the number of chips KN. Similarly, in (n-1) T + t0≤tj≤ (n-1) T + tKN, 2≤n, the S / P converter 714c provides a multiplexed basic pulse train Qn having a chip Inj and a multiplexed basic pulse train Qnj. Are converted into pairs (inj, qnj) corresponding to complex symbols.

  FIG. 32B shows a parallel input signal waveform of the IDFT unit 704c of FIG. 9A, where the vertical axis represents the subcarrier fj and the horizontal axis represents time, and the chip pair (inj, qnj) is assigned to the subcarrier fj. Signals for period T are transmitted at times tj-1 to tj. The output signal waveform of the P / S circuit included in the FFT processing unit of the localizable signal generating unit 240 of the code type receiving apparatus 1 corresponding to the transmission signal generating unit 70 of FIG. 9A is the same as that of FIG. 35A. For example, the output signal waveform of the P / S circuit 248c3 included in the FFT processing unit of the localizable signal generating unit 240 of the code type receiver 1 of FIG. 17 is the same as that of FIG. 35A.

  33A shows the UWB code-type transmitting apparatus 1 having the data-coded code pulse train generating means 30 illustrated in FIG. 5, the transmission signal generating means 70 illustrated in FIG. 10A, and the localizable signal detection illustrated in FIG. The signal waveform of each part in the means 240 is represented. Similar waveforms correspond to the chip reproducing unit 249i in FIG.

  33A, (a) represents a clock pulse of the code-type transmission device 1, and (b) is an output signal of the circuits 712d21 to 712d2pr of the r-multiplexing unit of the impulse generating unit 712d, and the multiplicity m A multi-level chip of a multiplexed basic pulse train with a value of 15 represents a chip waveform of a multi-level pulse with a multiplicity r of 5, a delay time of δ time intervals, and a division number pr of 3. b-1 is a chip of the first r-multiplexed basic pulse train synchronized with the clock, b-2 is a chip of the second r-multiplexed basic pulse train delayed by δ time from the clock, and b-3 is 3 represents a chip of a third r-multiplexed basic pulse train delayed by 2δ hours from the clock. The rear edge portion of the chip constitutes the front edge portion of the immediately following chip, and a separator that is a time for distinguishing the chip may be inserted between them.

  In FIG. 33A (b), b-1 is the first divided multi-valued pulse, the amplitude value is 3E, the chip width is Tc, and the delay time is 0 between t0 and tL. The leading edge of the pulse transitions from -E to 3E in synchronization with the clock pulse at time t0, and the amplitude value of the trailing edge transitions to E at time tL after Tc time. b-2 is a second multi-value pulse in which the leading edge transitions from -E to E with a delay of δ time from t0, and the subsequent pulse has an amplitude value of E, so that at the time tL + δ of the trailing edge. The amplitude value does not change. b-3 is a third multi-value pulse in which the leading edge transitions from E to -E with a delay of 2δ from t0, and the trailing edge transitions from -E to E at time t0 + 2δ.

  (C) of FIG. 33A is an output waveform of the impulse generation circuits 712d31 to 712d3pr of the impulse generator 712d3. This waveform may have other shapes as long as the average value is zero. For example, both are impulses whose amplitude value is determined according to the amplitude value of the chip of the multiplexed basic pulse train and change the position of the impulse according to the data, 0 when no impulse exists, 0 when on AOOK (Amplitude ON-OFF Keying) in which the amplitude of the impulse is determined according to the amplitude value of the chip of the multiplexed basic pulse train can be used, but is not limited thereto.

  c-1 is an output waveform of the impulse generation circuit 712d31. The average value generated in synchronization with the chip leading edge of b-1 is 0, and the first peak value -4E and the second peak value 4E are positive. The phase impulse represents a negative-phase impulse having a first peak value 2E and a second peak value-2E generated in synchronization with the trailing edge.

  c-2 is an output waveform of 712d32 whose delay time is δ, and the first peak value -2E and the second peak value 2E whose average values generated in synchronization with the chip leading edge of b-2 are zero. The positive phase impulse and the trailing edge impulse are zero.

  c-3 is an output waveform of 712d33 having a delay time of 2δ, and the average value generated in synchronization with the chip leading edge of b-3 is 0, and the first peak value 2E and the second peak value − This represents a 2E negative-phase impulse and a positive-phase impulse in which the first peak value generated in synchronization with the trailing edge is −2E and the second peak value is 2E.

  (D) of FIG. 33A is an output waveform of the multiplexing unit 712d4, and impulses generated by the impulse generation circuits 712d31 to 712d33 are arranged at δ time intervals in the leading edge portion and the trailing edge portion. The three impulses shown in (c) are arranged at the δ time interval in the leading edge portion, and one impulse is arranged at the time tL and the time tL + 2δ in the trailing edge portion.

  In the above, if the delay time δ is 0, the output waveform of the multiplexing unit 712d4 is formed at the leading edge and the trailing edge of the chip of the sequential pulse train included in the multiplexed basic pulse train of multiplicity m. The impulse has an amplitude value determined by an amplitude value corresponding to the chip of the sequential pulse train.

  FIG. 33A (e) shows the waveform of the output signal of the unipolarization circuit 249h1 of the chip reproducing unit 249h of the localizable signal detecting means 240 included in the code type receiving apparatus 200. The first impulse of the waveform shown in (d) obtained from the received signal is unipolarized using the template, the bimodal impulse having an amplitude value of 4E from the time t0, and the second impulse A bimodal impulse having an amplitude value of 2E starting from a unipolar t0 + δ and a bimodal impulse having an amplitude value of −2E starting from t0 + 2δ from which the third impulse is unipolar are shown. On the other hand, at the trailing edge, the amplitude value starts from the time t0 + Tc obtained from the first impulse, the starting point is a bimodal impulse having an amplitude value of -2E, and the second impulse is unipolar t0 + Tc + 2δ. Each 2E impulse is shown. There is no impulse at t0 + Tc + δ.

  (F) of FIG. 33A represents the waveform of the output signal of the pulse synthesis circuit 249h2. The first bimodal impulse shown in (e) is integrated, and the amplitude value of the output signal of the pulse synthesis circuit 249h2 changes from −E to 3E from time t0 + δ. Next, the second bimodal impulse is integrated, and the amplitude value changes to 5E at time t0 + 2δ. Next, the amplitude value changes from 5E to 3E by integration of the third bimodal impulse and is held until tL + δ. This amplitude value changes to E at t0 + Tc + δ by integrating the fourth bimodal impulse with a trailing edge amplitude value of −2E. Furthermore, an amplitude value of 3E is obtained at t0 + Tc + 3δ by integration of the fifth bimodal impulse.

  (G) of FIG. 33A shows a sampling pulse having a period Tc for sampling the pulse synthesized in (f). The synthesized pulse represents a chip with a multiplicity m of 15 between t0 + 3δ and tL + δ. Therefore, the sampling time ts is determined so that sampling is performed between t0 + 3δ and tL + δ.

  (H) in FIG. 33A represents a reproduction pulse waveform in which the output signal of the sampler 249h3 is held. The start time of the leading edge of the reproduced chip waveform is ts, the trailing edge is ts + Tc, and this pulse waveform is delayed by ts−t0.

  The waveforms shown in (a) to (e) of FIG. 33B correspond to the waveforms shown in (a) to (e) of FIG. The chips of the multiplexed basic pulse train shown in (e) are represented by C1 to Cn.

  33C (a) shows bits djs, j = 1 to n, and bits dj, r, j = 1, 2, which represent the chip amplitude as binary three-digit numbers. .., N, r = 0, 1, and 2 converted pulse trains are shown. Such pulsing may be performed using A / D conversion or by digital calculation. Further, in place of the method shown in FIG. 33C (a), pulsing may be performed by using DPSK (Differentially Encoded Phase Shift Keying) or the like. Various methods can be used.

  A method of converting this multiplexed basic pulse train into binary numbers to form a binary pulse includes UWB transmission, pulse transmission, frequency hopping transmission, OFDM transmission, orthogonal modulation, single carrier modulated signal transmission, etc., to a storage medium. However, the application is not limited to these.

FIG. 33C (b) represents an impulse generated at the pulse transition portion shown in FIG. 33C (a). These impulses consist of a preceding negative peak and a subsequent positive peak when the transition site transitions from negative to positive, and are in the opposite phase at the transition site that transitions from positive to negative. If not, it is in phase with the previous impulse, but the method of expressing the impulse is not limited to this. For example, there is a method of not generating an impulse for a pulse having the same amplitude as the previous pulse. . Furthermore, the average value of the impulse may be 0, and is not limited to the waveform of FIG. 33C (b).
The impulse signal of FIG. 33C (b) may be unipolarized using a template for the difference from the immediately preceding impulse signal, this unipolarized pulse is integrated, and the integrated value is sampled to reproduce the pulse.

33D (a) to 33 (e) illustrate the relationship between the period of the data-coded code pulse sequence that can be generated by the data-coded code pulse train generating means 30 of the code-type transmitting apparatus 1 and the chip width. These data coded code pulse trains are multiplied with a sequential pulse train having chips of a fixed chip width or converted chip width to generate a basic pulse train. (A) illustrates a data-coded pulse train having a code length of 7, a period of T, and a fixed chip width of Tk. (B) illustrates an arrangement of code pulse trains in the case where a plurality of data-coded code pulse trains having a fixed chip width having a period T are arranged in series in the cycle TM of a long-period sequential pulse train and are simultaneously ordered. The plurality of data-coded pulse trains included in the TM are simultaneously ordered to form a long-cycle basic pulse train. Although TM is preferably an integer multiple of T in terms of utilization rate, it is not limited to this.
(C) includes a plurality of pulse trains representing the same code sequence to which the same data is mapped arranged in series to form a group having a period Tg, and this group is included in a plurality of periods TM of a long-period sequential pulse train, An example of an arrangement of group periods with respect to periods of basic pulse trains generated by being ordered at the same time is illustrated. (D) is a figure which illustrates the chip arrangement | sequence of the data-ized code | symbol pulse sequence whose code length which has the converted chip width is N = 7. In this way, the data-coded code pulse train having the chip width converted and having the cycle Tv is multiplied by the sequential pulse train having the cycle Tv or the long cycle to form the basic pulse train. The sequential pulse train may be composed of a code pulse train having a constant chip width, or may be composed of a code pulse train having a converted chip width. (E) is a diagram exemplifying a case where two series of data-coded pulse sequences in which the same data is mapped and converted in the same chip width are arranged in series in the cycle Tv of the basic pulse train.

A transmission signal using a multiplexed basic pulse train of a basic pulse train obtained by multiplying a data-coded code pulse train having a period of T and a constant chip width by an ordered pulse train, or a transmission signal generated based on a multiplexed basic pulse train Then, the conversion shown in (d) can be performed on the signal from which the data encoding code pulse train is separated. Also,
A group of data coding code pulse trains each having a constant chip width and a group of data coding code pulse trains each having a period Tg and consisting of a plurality of single data coding pulse trains having a cycle T and a plurality of identical code pulse trains mapped with the same data. In a long-cycle basic pulse train arranged in series according to the order and ordered by a long-cycle sequential pulse train, the periods T and Tg are used as units, respectively, directly from a detected signal or from a decoded or / and reproduced signal. A signal with a length is acquired and despread to separate the data coded code pulse train, or the signal is subjected to short or long period despreading to separate the data coded code pulse train, and then the chip width is increased. One of the models is detected after conversion, and the data-coded pulse train or its localized pulse is detected.
FIGS. 34A to 34D are UWB waveforms using the OFDM of the stream modulation shown in FIG. 11B.

  FIG. 34A shows an output waveform of the r-multiplexing unit 712eb2, and represents a chip waveform of pr complex r-multiplexed basic pulse trains of each band obtained by dividing the frequency band into J.

  FIG. 34B shows an output waveform of the δ pulse unit 712eb3, and the transition pulse of each band is a pulse having a width of δ generated in synchronization with the transition unit of the complex r-multiplexing chip. The pulse width is not limited to δ, and may be a short pulse within a range where IDFT conversion is possible.

  FIG. 34C shows an output waveform of the δ multiplexing unit 712eb4. The i-th complex δ pulse (Itpj-if, Qtpj-if) at the leading edge of each band, j = 1, 2,..., J are input to the IDFT unit 715eb in parallel and IDFT-converted. Modulation is performed. This process is sequentially performed for δ pulses with i ranging from 1 to pr. Similarly, the δ pulse at the trailing edge is first-order modulated by IDFT conversion.

  FIG. 34D shows an output waveform of the FFT unit 245 kb of FIG. The complex short pulse at the leading edge and the transition short pulse at the trailing edge of the complex chip in each band are detected along the time axis, respectively, and output to the localizable signal detector 246kbj in the corresponding band for detection. Is reproduced, and the data-coded pulse train is separated using the regenerated NK chips.

  FIGS. 35A to 35D are UWB waveforms using OFDM with parallel modulation shown in FIG. 11C.

  FIG. 35A shows a chip output waveform of the r-multiplexing circuit 712ec2, and pulses of multiplicity m are divided into an I channel and a Q channel and multiplexed so that the multiplicity becomes r for each delay time. Yes. a-i1 to a-ipr and a-q1 to a-qpr are δ delay r-multiplexed waveforms of the I channel and Q channel of 712ec21 to 712ec2pr of the r-multiplex circuit, respectively.

  B-i1 to b-ipr and b-q1 to b-qpr in FIG. 35B are the values of the δ pulse circuits 712ec31 to 712ec3pr generated in synchronization with the transition part of the corresponding δ delay r-multiplexing chip in FIG. 35A, respectively. It is an output waveform of I channel and Q channel. The width of each pulse is indicated by the delay time δ, but it may be equal to or less than δ. It is preferable for UWB transmission to set the delay time δ as short as possible within the range where IDFT conversion is possible.

  FIG. 35C shows an input waveform of IDFT, and the vertical axis corresponds to the frequency band. c-i1 to c-ipr and c-q1 to c-qpr are output waveforms of the corresponding δ pulse circuits 712ec31 to 712ec3pr, respectively, and are input pulses to the IDFT unit 715ec. The pulses I11f to I1prf and Q11f to Q1prf constituting the leading edge portion of the first chip shown in FIG. 35B are input to the IDFT unit 715ec in parallel, and at least hold time during which inverse Fourier transform is performed between t0 and t1. Is done. Subsequently, similarly, the rear edge of the first chip pulse is subjected to IDFT conversion between t1 and t2, and the IDFT conversion of the first chip pulse is completed. Similarly, pr chips are subjected to IDFT conversion for one cycle.

  FIG. 35D is an output waveform of the FFT unit 245kc of FIG. 22, and the vertical axis represents the frequency band. The FFT transform outputs a set of pr complex transition short pulses with a narrow width at the leading edge of the first chip for each frequency band between times t0 and t1, and then between the trailing edges at t1 and t2. Pr sets of transition short pulses are output. Similarly, complex transition short pulses of up to the NK-th complex chip are output for one cycle.

  36A to 36C show an example of a waveform and a data format when a multiplexed basic pulse train is converted into a binary number, stored, and transmitted.

  FIG. 36A is an example of a multiplexed basic pulse train waveform. Further, the data format when the waveform is bit-converted is illustrated in FIG. 36B, but is not limited thereto. The format of FIG. 36B can be used as a storage format of the storage medium, but the format used for storage is not limited to this. FIG. 36C illustrates the bit stream of the multiplexed basic pulse train shown in FIG. 36B, but is not limited thereto. This method using a bit stream can be used for IC, data transmission inside the apparatus, and transmission in a communication system. FIG. 37 illustrates a storage medium writing / reading apparatus 500 that uses the code-type transmission apparatus 1 as a transmission means and uses the code-type reception apparatus 200 as a reception means.

  FIG. 36B shows an example of the bit arrangement when the multiplexed basic pulse train is converted into m ′ bits by the bit converter. Each chip indicated by Cj is converted into a binary number and expressed by a binary pulse, and is expressed by a binary m ′ digit with the least significant digit (LSD) at the right end and the most significant digit (MSD) at the left end. The display method is not limited to this.

  The bit-converted multiplexed basic pulse train can be used for storage, communication, and the like.

  FIG. 36C shows an example of a bit stream system bit arrangement for converting a multiplexed basic pulse train into a bit stream and transmitting or writing data to or reading data from the storage device. Sent or received. When the amplitude of the chip is represented by a binary number of m ′ digits, the multiplexed basic pulse train represents data for one period with NKm ′ bits, so that data for one period is transmitted as a packet in transmission and reception in a batch. However, the communication method is not limited to this.

  As an example of a storage device using a bit stream, a means for generating a basic pulse train by multiplying a code pulse train having a shift time in which data is mapped and having a chip width converted and an order pulse train, and a generated basic pulse train, Means for generating a multiplexed basic pulse train by multiplexing, means for generating a binary pulse train by binary conversion of the multiplexed basic pulse train, means for storing the binary pulse in a storage medium, detecting the stored pulse Means for regenerating a multiplexed basic pulse train, multiplying the regenerated multiplexed basic pulse train by the sequential pulse train to separate the code pulse train, and calculating a Fourier coefficient or FFT value from the obtained signal Means, the signal model using the Fourier coefficient, the Fourier coefficient or the FFT model and the FFT value and the corresponding model. The it was at least and means for calculating the parameters, there is a memory device, not limited to this.

  Chip pulses are recovered from the received bitstream. The subsequent steps are the same as the transmission by the linear modulation method, and separation of the data-coded code pulse train, model detection, and then source data calculation are performed. Noise superimposed on the bit stream is reduced by the separation and localization process of the data-coded pulse sequence, and the S / N ratio is improved. If the secondary encoded pulse train illustrated in FIG. 33C (a) is used instead of the transmission method using the binary converted pulse train of FIG. 36C, noise is removed by detecting the model of the secondary encoded pulse train, and the S / S N ratio is improved. Further, if the binary conversion pulse is detected by localizing the model detected secondary code pulse train and detecting the localized pulse, the S / N ratio in proportion to the code length is further improved.

  FIG. 37A shows a storage medium writing / reading device 5000 that uses the code-type transmission device 1 as a transmission means and the code-type reception device 200 as a reception means, and uses a data-coded pulse sequence with a converted chip width. An example of a storage medium writing / reading device 5000 for writing to and reading from the storage medium 6000 using a binary conversion pulse train pulse obtained by converting a chip of a multiplexed basic pulse train into a binary number is illustrated. This apparatus comprises a writing means 5001 src, a reading means 5002 src, a clock oscillation / control means 5003 src, an arithmetic means 5004 src, a memory 5005 src, an interface 5006 src, a control means 5007 src, a transmission means 5008 src, and a receiving means 5009 src. The configuration may be arbitrarily changed, added, and / or deleted without departing from the spirit.

  The transmission unit 5008src generates a transmission signal based on the multiplexed basic pulse train, and is configured using all or part of the code-type transmission device 1. The transmission unit 5008src uses the data and ID acquired via the interface by the calculation unit. Transmit the transmission signal to be transmitted.

  The receiving unit 5009src includes a localizable signal detecting unit 50091scr, a model detecting unit 50092scr, and a data calculating unit 50093scr, and reads stored data based on the multiplexed basic pulse train stored in the storage medium 6000 to detect a localizable signal. The means 50091scr reproduces the multiplexed basic pulse train to perform despreading, the model detection unit 50092scr detects the model of the data signable pulse train, and the source data is determined from the shift time of the data signable pulse train detected by the data calculation unit 50093scr. Information is calculated, and is configured using all or part of the code-type receiving device 200.

  The calculated data is output to the calculation means 5004src, collated with the ID stored in the memory 5005src, and transmitted to the external system via the interface. The calculation means 5004src does not depart from the spirit of the present invention even if calculation is performed using detected data, stored data, and the like. This storage medium writing / reading device 5000 may be used by being incorporated in another device.

  The storage medium 6000 is an optical storage medium that writes and reads data using a laser. The storage medium 6000 stores data using magnetism, changes the magnetic state, stores data, detects the magnetic state, and reads data. Examples include, but are not limited to, a magnetic storage medium, a storage medium that stores or reads data in a memory using electromagnetic waves, a storage medium that writes and reads data using an electrical signal, a storage medium that uses a hologram, and the like.

  FIG. 37B illustrates a distance measuring apparatus 300m for measuring the distance to the object 3000, and includes a control unit 320, a transmitting unit 310, and a receiving unit 330. The signal based on the code pulse train sent from the transmission means 310 is reflected by the object 3000 and detected by the signal detector 331, and the model detector 333 detects the code pulse train from which noise has been removed by performing model detection. The data is output to the distance calculation unit 334m. The distance calculation unit 334m localizes the code pulse train to calculate the delay time, performs correction including Doppler shift, calculates the distance, and outputs the distance to the display / output unit 335m.

  FIG. 37C illustrates a code-type image measurement apparatus 400p for measuring an image of the measurement object 4000, and includes a control unit 420p, a transmission unit 410p, and a reception unit 430P. A signal based on the code pulse train transmitted from the signal transmission unit 412p is reflected by the measurement target 4000, input to the signal detection unit 431p, detected, and output to the model detection unit 432p. The model detection unit 432p detects the code pulse train by detecting the model of the code pulse train and outputs it to the image processing unit 433p. The processed image is output to the display / output unit 434p and displayed. At the same time, it is output to external devices, communication lines, etc.

  The signal transmitted from the signal transmission unit 412p is composed of an energy medium that can be modulated with a code pulse train suitable for image measurement. For example, one or a plurality of laser beams, infrared rays, far infrared rays, electromagnetic waves, Examples include magnetic waves, radiation including X-rays, and ultrasonic waves.

  38 (a) to (c) and FIGS. 39A to 39B are examples of transmission / reception processes of a packet type transmission system using the code-type transmitting apparatus 1, the base station, and the code-type receiving apparatus 200 using orthogonal modulation. Represents. These steps may be arbitrarily changed, added, or deleted without departing from the spirit of the present invention. In this example, a code pulse train is used for the synchronization signal and the control signal, and the slots constituting the frame of the packet signal are configured to perform transmission using the secondary coded pulse train. The secondary encoded pulse train is a pulse train obtained by multiplying a pulse of a binary conversion pulse train that is a bit pulse train obtained by bit-converting the chip amplitude of the multiplexed basic pulse train and a code pulse train having a period of this pulse width.

   Depending on the transmission environment, a code pulse train is used for the synchronization signal, a binary pulse is used for the control signal, and a binary conversion pulse train is used for the packet signal, or a transmission signal linearly modulated with a multi-level signal based on a multiplexed basic pulse train is used. Even if the receiving side is configured so that it can be used oppositely and the corresponding process is adopted, the gist of the present invention is not deviated. Further, the configuration method and the process used are not limited to the above. Further, the base station may be configured by a hub, a router, etc. according to the transmission system. Furthermore, it may be configured to transmit directly from the transmission side to the reception side without including a base station.

  FIG. 38 (a) shows the transmission process on the transmission side constituted by the code-type transmission apparatus 1, FIG. 38 (b) shows the process of the base station, and FIG. 38 (c) shows the process of FIG. ) Represents an example of the reception process of the code-type receiving device 200 that is used opposite to the code-type transmitting device 1 and receives an orthogonal modulated signal. The code-type transmission device 1 generates a multiplexed basic pulse train of a plurality of periods ordered by a long-period sequential pulse train, and generates a packet signal together with at least a synchronization signal and transmits a transmission signal, or orders each cycle. A packet signal including a synchronization signal and a data signal is generated and transmitted.

  Note that, instead of generating a packet by the code-type transmission apparatus 1, a base station may generate a packet. Transmission from the transmission side to the base station forms an uplink (UL: Up Link). On the other hand, the base station uses the communication means to control the transmission side, such as transmission power, transmission speed, and multiplicity of transmission signals, and control the reception side. Next, source data is calculated from the uplink packet signal, and a downlink (DL) frequency packet signal is generated and transmitted to the receiving side. The DL packet signal is generated by calculating source data from the UL packet signal, or is generated by frequency conversion of the UL packet signal, but is not limited to this, and does not depart from the spirit of the present invention. The range may be arbitrarily changed, added, or deleted so as to comply with standards such as IEEE. The code-type receiving apparatus 200 receives a downlink packet signal generated by the base station, performs processing including model detection, and calculates source data.

  When transmission starts in step 01001 in FIG. 38 (a), a start signal including an ID is transmitted to (b) of the base station 38. The base station detects this signal at step 02001, and makes a UL test signal request to the transmitting side at step 02002. The transmitting side receives this request at step 01003, sets the output level, clock frequency, and multiplicity at step 01004, and transmits a test signal at step 01005. The base station measures and determines this test signal in steps 02004 to 02006, and returns a setting request to the transmitting side in step 02003 if the signal is not set appropriately. In response to this, the transmitting side repeats Step 01003 to Step 01005 and transmits the test signal to the base station again. Step 02005 includes equalization processing.

  If the base station determines that the signal is appropriate, the base station transmits a reception request to the receiving side in step 02007. In response to this, the receiving side transmits a downlink test signal transmission request to the base station in steps 0301 to 03002. In steps 02008 to 02009, the base station transmits a test signal to the receiving side. On the receiving side, this test signal is measured in steps 0303 to 03005. If the test signal is not appropriate, a retransmission request is transmitted to the base station in step 03006, and the base station resets the signal in steps 02008 to 02009 to perform DL. The test signal is transmitted again, and measurement and evaluation are performed on the receiving side in steps 0303 to 03005. In the test signal measurement, signal equalization is also performed.

  If it is an appropriate signal, a transmission request is made to the base station in step 0309. In response to this, the base station requests the transmission side to transmit a UL signal including data and the like in step 02010. In response to this, the transmitting side generates a UL packet signal in steps 01006 to 01008 and transmits it to the base station. The base station receives and processes this signal in steps 0201-11020. If synchronization cannot be acquired or maintained during this time, a retransmission request is transmitted to the transmitting side in step 02013, and if an error is detected, a retransmission request is transmitted to the transmitting side in step 02014. If reception processing is properly performed, transmission parameters are appropriately set in steps 0015 to 02017, and a DL packet signal is generated and transmitted to the reception side. In response to this, on the receiving side, the packet signal is processed in steps 03007 to 03008 and 0301 to 03013 to perform calculation, processing, display, and the like of data.

  If synchronization acquisition is not possible during the process, a retransmission request is made to the base station in step 03010, and if an error is detected, in step 03010. If reception is completed on the receiving side, an end signal is generated in step 03014, and reception is ended in step 03015 and the end signal is transmitted to the base station. In response, the base station generates an end signal at steps 02018 to 02019, ends at step 02020, and sends an end signal to the transmitting side. In accordance with this, the transmission side ends the transmission in steps 01009-01010.

  FIG. 39A shows the packet signal generation process represented by step 01007. If it is determined in step 01006 that a transmission request has been received, a synchronization signal is generated in step 010071, then data is input in step 010072, error correction coding is performed in step 010073, and converted to N-digit m digits in step 010074. . Next, in step 010076, data coding pulse trains for I channel and Q channel are generated, the chip width is widened / reduced, and an order pulse train that can order at least the basic pulse train included in the period is multiplied. Stacked and ordered to generate a basic pulse train. This sequential pulse train may be composed of one code sequence. In this case, the order pulse train orders one multiplexed basic pulse train, or simultaneously orders a plurality of multiplexed basic pulse trains arranged in series. Alternatively, one multiplexed basic pulse train may be ordered using a plurality of code sequences, or a plurality of basic pulse trains arranged in series may be ordered.

  Further, the basic pulse train is multiplexed to generate a multiplexed basic pulse train. This multiplexed basic pulse train is subjected to binary conversion, and then a code pulse train having a period of the bit pulse width is multiplied to generate a secondary encoded pulse train. A packet frame data slot is created using this pulse train, and a packet frame signal including a control signal such as a synchronization signal is generated.

  Next, primary modulation is performed in step 010076, quadrature modulation is performed in step 010077, and the process proceeds to step 01008.

  FIG. 39B shows the packet signal reception process shown in step 03008. In response to step 03007, the packet signal is received and demodulated in step 030080, and a synchronous code pulse train is reproduced from the secondary encoded pulse train and output to step 030082. In step 030082, a synchronization signal is detected from the preamble, and synchronization acquisition or holding is performed. Next, the packet is released and the control signal and the like are processed. If synchronization is not captured or maintained, a re-transmission request is made to the transmission side in step 03003.

  If synchronization is maintained, the multiplexed basic pulse train is reproduced in step 030083, and the multiplexed basic pulse train is multiplied with the sequential pulse train to separate the data coded code pulse train, the model detection is performed, and the data coded code is obtained. A pulse train is detected.

  Next, at step 030084, the data-coded pulse train is localized, a local pulse is detected, and a shift time is calculated.

  This shift time information is input to step 030085, where data reverse conversion and error correction decoding are performed. If an error occurs, the information is fed back to step 03011. If error correction decoding is performed normally, source data is calculated and output in step 030086, and the process ends in step 030087.

  In the above, each step may be arbitrarily changed, added and / or deleted without departing from the spirit of the present invention. Note that, instead of reversely converting N-ary data to binary numbers, reverse conversion to octal numbers, hexadecimal numbers, and the like does not depart from the spirit of the present invention.

  As described above, the basic technical idea of the present invention is a communication system, in which data is converted into a code pulse sequence shift time to generate a data-coded code pulse sequence, and a transmission signal is transmitted. Detecting means for obtaining a shift time of a data-coded pulse sequence from the detection signal and calculating source data based on the shift time; and a control signal for controlling at least the transmission output by the transmitting means and / or the receiving means Is a communication system that can communicate between a transmission side and a reception side. This transmission means may be configured by any of the code-type transmission devices 1 described above, and the reception means is configured by a code-type reception device 200 that is used opposite to the code-type transmission device. Further, instead of a system using a base station, a system, an apparatus, or an integrated circuit configured so that a transmission unit and a reception unit can directly communicate with each other does not depart from the gist of the present invention.

  According to one aspect of the present invention, a sequence pulse train is generated, a data encoding code pulse sequence having a shift time set according to data in accordance with the order is generated, a basic pulse sequence including the data encoding code pulse sequence is generated, and a basic pulse sequence is generated. Is a computer-readable storage medium that stores a transmission program for generating and transmitting a transmission signal based on a transmission signal generation pulse train including. This basic pulse train includes a data conversion order basic pulse train and a product basic pulse train.

  According to another aspect of the present invention, a transmission signal is detected, a multiplexed basic pulse train is reproduced from the detection signal, a data-coded pulse train is separated, noise is removed from this signal by model detection, and a data-coded pulse train is calculated. This is a computer-readable storage medium that stores a reception program for determining data and determining a data-coded pulse train and calculating data using the shift time.

  Yet another embodiment of the present invention is a computer-readable storage medium storing the transmission program and the reception program.

  Another aspect of the present invention is a readable data storage medium that stores data of a signal based on a basic pulse train including a data-coded pulse train having a shift time set in accordance with the data according to a sequence. The storage medium includes at least a magnetic memory, an IC memory chip, an optically readable storage medium, a hologram storage medium, an image storage medium, and a barcode, but is not limited thereto.

These storage media may be embedded or embedded, printed, or formed inside, but are not limited thereto. And the storage medium used for RF (high frequency) IC tag, a banknote, securities, a book, a case, etc. is contained.

  The present invention includes ADSL communication, VDSL communication, power line communication, cable TV broadcasting, videophone, mobile phone, mobile videophone, wireless LAN, RF (wireless) ID tag, wireless communication, satellite communication, optical communication using a telephone line, etc. A storage medium storing data generated based on a data-coded pulse sequence, such as digital television broadcasting including communication, unidirectional communication and bidirectional communication, intra-device communication, intra-IC communication, ubiquitous devices such as home electronics, etc. It can be used for communication encryption, various measuring devices, etc., but is not limited thereto.

  Among these, the use for signal transmission enables not only unidirectional but also bidirectional communication. In addition, the measurement device includes an image measurement device for weak measurement signals, such as an OCT (Optical Coherence Tomography) device for measuring weak signals, various laser image measurement devices, an MRI (Magnetic Resonance Imaging) device, a CT (Computer Tomography) device, etc. Biological image measuring device, digital X-ray measuring device, diagnostic device such as ultrasonic diagnostic device, biopsy device, analysis device, remote sensing device using code sequence, etc. Various distance measuring devices including an inter-vehicle distance measuring device and an astronomical distance measuring device are included.

It is a figure which shows one Embodiment of the code | symbol type | mold transmission apparatus which comprises the transmission side of this invention. It is a figure which illustrates the error correction encoding means of FIG. It is a figure which illustrates the data-coded code | symbol pulse train production | generation means of FIG. 1 using the modulation by any of these, an impulse, a pulse, or a hopping modulation system. It is a figure which illustrates the data-coded-code pulse-sequence production | generation means of FIG. 1 using the parallel modulation in a OFDM system, orthogonal modulation, or frequency hopping modulation. It is a figure which illustrates the data-ized code pulse train production | generation means of FIG. 1 in OFDM modulation using a stream modulation system, an impulse system, a frequency hopping system, etc. FIG. 4 is a diagram exemplifying the transmission signal generation unit of FIG. 1 having the data coding code pulse train generation unit of FIG. 3 and linear with the amplitude of the signal. FIG. 4 is a diagram illustrating another example of the transmission signal generation unit of FIG. 1 that includes the data-coded code pulse sequence generation unit of FIG. 3 and performs modulation using a binary-converted pulse sequence. It is a figure which illustrates the transmission signal production | generation means of FIG. 1 using a quadrature modulation system. It is a figure which illustrates the transmission signal production | generation means of FIG. 1 using the orthogonal modulation system which modulates with the pulse train by which binary number conversion was carried out. It is a figure which illustrates the transmission signal production | generation means of FIG. 1 in the OFDM system using stream modulation. It is a figure which shows the other example of the transmission signal production | generation means of FIG. 1 in the OFDM system using the stream modulation | alteration which modulates with the pulse train by which binary number conversion was carried out. It is a figure which illustrates the transmission signal production | generation means of FIG. 1 in the OFDM system using a parallel modulation system. It is a figure which shows the example of the transmission signal production | generation means of FIG. 1 in the OFDM system using the parallel modulation which modulates with the pulse train by which binary number conversion was carried out. FIG. 2 is a diagram illustrating transmission signal generation means of FIG. 1 in a δ delay r-multiplex system. It is a figure which shows the other example of the transmission signal production | generation means of FIG. 1 in UWB which produces | generates an impulse in the transition part of the pulse train converted by binary number. It is a figure which illustrates the transmission signal production | generation means of FIG. 1 which performs stream modulation using a band division | segmentation for UWB. It is a figure which shows the other example of the transmission signal production | generation means of FIG. 1 which performs stream modulation by (delta) delay r-multiplex signal using OFDM for UWB. It is a figure which shows the other example of the transmission signal production | generation means of FIG. 1 which performs parallel modulation with (delta) delay r-multiplex signal using OFDM for UWB. (A) is a figure which illustrates the transmission signal production | generation means of FIG. 1 in the code type transmission apparatus of the frequency hopping system using a binary conversion pulse train, (b) is a figure which shows the primary modulation circuit of (a). It is a figure illustrated. It is a figure which shows one Embodiment of the code | cord | chord type receiver which comprises the receiving side of this invention facing the code | cord | chord type transmitter of FIG. It is a figure which illustrates the detection part of FIG. It is a figure which illustrates the detection part of FIG. It is a figure which illustrates the detection part of FIG. It is a figure which illustrates the detection part of FIG. (A) is a figure which illustrates the detection means in the code | symbol type receiver of FIG. 13 which used the frequency hopping system, (b) is a figure which illustrates the delay detection part of the detection means shown to (a). (C) is a figure which illustrates the detection means of the code | symbol type receiver illustrated in FIG. 13 in the frequency hopping system using a synthesizer. It is a figure which illustrates the localization signal detection means of FIG. 13 using an orthogonal modulation system. (A) is a figure which illustrates the canceller of the localizable signal detection means using the solution which formulated the simultaneous equation using model detection. (B) is a figure which illustrates the canceller which solves simultaneous equations based on model detection, and detects a signal. Both (a) and (b) are used for a localizable signal detection means using model detection, including the localizable signal detection means illustrated in FIGS. 15 (a) to 23C. It is a figure which illustrates the localization signal detection means of FIG. 13 which used the OFDM system for the modulation | alteration by the stream of a data pulse. It is a figure which illustrates the localization signal detection means of the code | symbol type receiver of FIG. 13 which used OFDM for the modulation | alteration by the parallel pulse by which S / P conversion was carried out. It is a figure which illustrates the localization signal detection means of the code | symbol type receiver of FIG. 13 using a single carrier wave modulated signal. It is a figure which illustrates the synchronizing means and localizable signal detection means of the code | symbol type receiver of this invention used oppositely with the code | symbol type transmitter which has a transmission signal production | generation means using a quadrature modulation system. It is a figure which illustrates the localization signal detection means of the code | symbol type receiver of FIG. 13, which is used opposite to the code type transmitter of the UWB system. It is a figure which illustrates the localization signal detection means of the code | symbol-type receiver of FIG. 13 used oppositely with the code | cord | chord type transmitter which used the frequency division system for UWB transmission. It is a figure which illustrates the localizable signal detection means of the code | symbol type receiver of FIG. 13 used oppositely with the code | cord | chord type transmitter which used the OFDM system of the stream modulation for UWB transmission. It is a figure which illustrates the localizable signal detection means of the code | symbol receiver of FIG. 13 used opposite to the code | symbol transmitter which used the OFDM system of parallel modulation for UWB transmission. It is a figure which illustrates the localized localization signal detection means of the code | symbol-type receiver of FIG. 13 used oppositely with the code | cord | chord type transmitter using an impulse, a pulse, or a single carrier wave modulated signal. It is a figure which illustrates the localized localization signal detection means using FFT of the code | symbol type receiver of FIG. 13, which is used opposite to the code type | mold transmitter which uses an impulse, a pulse, or a single carrier wave modulated signal. It is a figure which illustrates the localization signal detection means of the code | symbol type receiver of FIG. 13 which used OFDM of parallel modulation for UWB transmission. It is a figure which illustrates the shift time detection means of FIG. It is a figure which illustrates the shift time detection means of the code | symbol type | mold receiving apparatus of FIG. 13 used oppositely with the code | symbol type | mold transmission apparatus using an orthogonal modulation system. It is a figure which illustrates the shift time detection means of the code | symbol type | mold receiving apparatus of FIG. It is a figure which illustrates the data calculation means of the code | symbol type | mold receiving apparatus of FIG. 13 used opposite to the code | symbol type | mold transmission apparatus using an impulse, a pulse, a single carrier wave modulated signal, or a hopping modulated signal. It is a figure which illustrates the data calculation means of the code | symbol receiver of FIG. 13 used oppositely with the code | cord | chord type transmitter which used the orthogonal modulation system, the OFDM system of a parallel modulation, a parallel UWB system, or a hopping system. It is a figure which illustrates the data calculation means of the code | symbol type | mold receiving apparatus of FIG. 13 used oppositely with the code | symbol type | mold transmission apparatus using the OFDM system of stream modulation. It is a figure which illustrates the RFIC tag to which this invention is applied. It is a figure which illustrates the RFIC tag to which this invention is applied. It is a figure which illustrates RF reader / writer to which the present invention is applied. (A)-(h) is a figure which shows the operation waveform of each part of the code | symbol type | mold transmission apparatus of FIG. 1, and the code | cord | chord type receiving apparatus of FIG. (A) shows the output signal of the multiplexing part for I channel and Q channel in the code type transmission apparatus of FIG. 1 using the stream modulation method, and (b) shows the code type of FIG. It is a figure which shows the I channel signal waveform and Q channel signal waveform of each narrow band of the FFT circuit in a receiver. It is a figure which shows the input waveform of the S / P conversion part of FIG. 9A. It is a figure which shows the parallel input signal waveform of the IDFT part of FIG. 9A. (A)-(d) shows the signal waveform of each part of the code | symbol type | mold transmission apparatus of FIG. 1 in the UWB transmission of (delta) delay r-multiplex system, (e)-(h) is a figure used facing this. It is a figure which shows the signal waveform of each part of 13 code | symbol type receivers. (A)-(e) is a figure which shows the signal waveform of each part which leads to the multiplexed signal production | generation of the code | symbol type | mold transmission apparatus of FIG. 1 in UWB transmission using the pulse train by which binary number conversion was carried out. (A) illustrates a binary converted pulse train obtained by converting the waveform of (e) of FIG. 33A into a binary number by the bit conversion unit of the code-type transmitting apparatus of FIG. 1 having the transmission signal generating means of FIG. 10B. It is a figure to do. (B) is a figure which illustrates the signal waveform which consists of an impulse produced | generated in the transition part of each pulse waveform of (a). (A) is a figure which illustrates the arrangement | sequence of the chip | tip of the data-coded code | symbol pulse train whose fixed chip width Tk and period is T. FIG. (B) is a diagram exemplifying a case where a plurality of data-coded pulse trains having a period T are paralleled in series and simultaneously ordered to a period TM of a long-period order pulse train. (C) includes a plurality of the same code pulse trains in which the same data is mapped to the period TM of the sequential pulse trains arranged in series to form a group having a period Tg, and the plurality of groups are arranged in series. It is a figure which illustrates the arrangement | sequence of the group in the case of being ordered simultaneously. (D) is a figure which illustrates the chip arrangement | sequence of the data-ized code | symbol pulse train by which the chip | tip width was converted. (E) is a figure which illustrates the arrangement | sequence of the data-coded code | symbol pulse sequence in case chip | tip width | variety is converted into the period TV and two sets of the data-coded code | symbol pulse sequences whose period is 2T are included. It is a figure which shows the signal waveform of the r-multiplex part of the code | symbol type transmitter which has FIG. 11B. It is a figure which shows the signal waveform of (delta) pulse part of the code | symbol type transmitter which has FIG. 11B. It is a figure which shows the input signal waveform of the IDFT part of the code | symbol type transmitter which has FIG. 11B. It is a figure which shows the output waveform of the FFT part of the code | symbol type receiver which has FIG. 23B. It is a figure which shows the output waveform of the r-multiplexing circuit of the code | symbol type transmitter which has FIG. 11C. It is a figure which shows the output waveform of (delta) pulse circuit of the code | symbol type transmitter which has FIG. 11C. It is a figure which shows the input waveform of IDFT of the code | symbol type transmitter which has FIG. 11C. It is a figure which shows the output signal waveform of the FFT circuit of the code | symbol type receiver which has FIG. 23C. It is a figure which shows an example of the multiplexed basic pulse train waveform produced | generated by the transmission signal production | generation means of the code | symbol type | mold transmission apparatus of FIG. It is a figure which illustrates the data format of a bit conversion part. It is a figure which shows the obtained bit stream. It is a figure which illustrates the storage medium writing / reading apparatus to which this invention is applied. It is a figure which illustrates the code type distance measuring device to which the present invention is applied. It is a figure which illustrates the code type image measuring device to which the present invention is applied. (A) is a figure which shows the transmission operation process in the code | symbol type | mold transmission apparatus of FIG. 1, (b) is a figure which shows the operation | movement process of a base station, (c) is the reception operation | movement in the code | cord | chord type reception apparatus of FIG. It is a figure which shows a process. It is a figure explaining step 01007 of FIG. It is a figure explaining step 03008 of FIG.

Explanation of symbols

1: Code-type transmitting device 200: Code-type receiving device,
10: input means, 20: error correction coding means, 30: data coding code pulse train generation means, 50: sequential pulse train generation means, 60: control means, 70: transmission signal generation means, 80: synchronization signal generation means, 90: Sending means, 100: communication means,
210: Detection means, 220: Synchronization means, 230: Communication means, 240: Localizable signal detection means, 250: Shift time detection means, 260: Data calculation means, 270: Output means, 280: Control means

Claims (23)

Means for generating a synchronization signal for capturing or maintaining synchronization;
Means for generating a sequential pulse train at a timing based on the synchronization signal;
Means for generating a data-coded pulse sequence having a shift time determined according to the input data in accordance with the sequence using the sequence pulse sequence;
Means for generating a transmission signal with a signal based on a transmission signal generation pulse sequence that is included by multiplexing a basic pulse sequence in which the data-coded pulse sequence is ordered,
The data coded code pulse train is represented by a model having parameters, and the parameters are model detectable pulse trains determined using a frequency domain;
The code | symbol type | mold transmission apparatus characterized by these. The data code pulse train generated by the means for generating the data code pulse train comprises a chip having a chip width that has been widened or reduced,
The code | symbol type transmitter of Claim 1 characterized by these. The basic pulse train is a product basic pulse train obtained by multiplying the sequential pulse train by a pulse train formed by serially arranging the data-coded pulse trains of a plurality of cycles in which the same data is mapped to the cycle of the sequential pulse train. There is,
The code-type transmission device according to claim 1 or 2, characterized in that:   The sequence pulse train has a code pulse sequence in which the type of code sequence is associated with the sequence, or has a shift time that changes in ascending or descending order, or has a shift time that changes in a predetermined order, and the shift times are ordered. The code-type transmission device according to claim 1, wherein the code-type transmission device is a code pulse train associated with the code pulse sequence. The transmission signal generation pulse train is configured using error-correction-encoded data and / or error-correction-encoded pulse trains;
The code | symbol type | mold transmission apparatus of any one of Claims 1 thru | or 4 characterized by these. A signal based on the transmission signal generating pulse train is a multiplexed basic pulse train, an impulse train generated based on the multiplexed basic pulse train, a binary pulse train obtained by binary-converting the multiplexed basic pulse train, and any one of these signals A modulated signal modulated by the above, or a hopping signal generated using any of these signals,
The code | symbol type | mold transmission apparatus of any one of Claim 1 thru | or 5 characterized by these. Code-type reception that receives a transmission signal based on a multiplexed basic pulse train in which a basic pulse train composed of a data-coded pulse train in which data is mapped at a shift time and an ordered pulse train multiplied by the data is received to calculate data A device,
Means for detecting the transmission signal;
Detecting means for obtaining the multiplexed basic pulse train from the detected transmission signal, separating the data-coded pulse train, and detecting the pulse train using a model having parameters;
Means for detecting a shift time of the code pulse train;
Means for calculating data using the shift time;
The code | symbol type receiver characterized by this. The model comprises a model representing the data coded code pulse sequence separated from the model and a model representing noise superimposed on the model, and the model detection calculates a parameter of the model using a frequency domain, and the data coded code pulse train The detection means performs the model detection,
The code-type receiving apparatus according to claim 7. A model of the localized pulse expressed using the model of the data-coded pulse train from which the model is separated and a model of localized noise expressed using a model of noise superimposed on the model. The model detection calculates a parameter included in the localized signal represented by a model representing the signal using a frequency domain to determine the data-coded code pulse train, and the detection means This model detection is to be performed,
The code-type receiving device according to claim 7, wherein:   The detection means calculates a Fourier coefficient or an FFT value using a signal obtained by separating the data-coded code pulse sequence from the multiplexed basic pulse sequence, determines a corresponding model parameter, and determines the data-coded code. The code-type receiving apparatus according to claim 7, wherein the code-type receiving apparatus detects a pulse train. Means for generating a synchronization signal for capturing or maintaining synchronization;
Means for generating a sequential pulse train at a timing based on the synchronization signal;
Means for generating a data-coded pulse sequence having a shift time determined according to the input data in accordance with the sequence using the sequence pulse sequence;
A code-type transmission device comprising: means for generating a transmission signal using a signal based on a transmission signal generation pulse sequence including a multiplexed basic pulse sequence in which at least the basic pulse sequence having the data encoding code pulse sequence is multiplexed;
Means for detecting the transmission signal and generating a detection signal;
Means for detecting a signal including the data-coded pulse sequence from the generated detection signal;
Means for determining and detecting the parameter over the frequency domain using a model having a chip with a chip width that includes the parameter and has been subjected to widening / reduction conversion of the data-coded pulse sequence;
Means for detecting the shift time;
A communication system comprising: a code-type receiving device including means for calculating data using the shift time. A method of transmitting data using a code pulse train,
A data encoding code that generates a synchronization signal for capturing or maintaining synchronization, generates a sequence pulse sequence at a timing based on the synchronization signal, and has a shift time determined according to input data according to the sequence using the sequence pulse sequence A pulse train is generated, a basic pulse train having at least the data-coded code pulse train is multiplexed, a transmission signal is generated based on a transmission signal generation pulse train including a multiplexed basic pulse train, and the transmission signal is detected to detect the transmission signal. A multiplexed basic pulse train is acquired, the data coded code pulse train is separated from the multiplexed basic pulse train, model detection is performed on the signal, the data coded code pulse train is detected, the shift time is calculated, and the shift time is calculated. Using a pulse train capable of model detection for the code pulse train,
A communication method characterized by the above.
An RFIC tag using a code pulse train,
An RFIC tag characterized by storing a code pulse train that can be detected using at least model detection having a shift time to which data is mapped. Conveying information using a shift time of a code pulse train capable of at least model detection, and using at least model detection for detection of the code pulse train;
RFIC tag characterized by. 15. An RFIC reader / writer comprising at least means for transmitting and storing data in the RFIC tag according to claim 13 or the RFIC tag according to claim 14, and means for reading the stored data.
A means for transmitting a signal based on a code pulse train, and a Fourier coefficient or FFT value is calculated using at least the detected signal of the code pulse train converted from the chip width by detecting the signal based on the code pulse train and the model having parameters. And a means for detecting the code pulse train by determining at least its parameters and a means for measuring the distance using a localized pulse of the code pulse train.
A means for transmitting a signal based on a code pulse train, and a Fourier coefficient or FFT value is calculated using at least the detected signal of the code pulse train converted from the chip width by detecting the signal based on the code pulse train and the model having parameters. And a means for detecting the code pulse train by determining at least its parameters and a means for measuring a distance using a localized pulse of the code pulse train. Means for generating a basic pulse train by multiplying a data coded code pulse train having a shift time to which data is mapped and whose chip width is converted and an ordered pulse train, and multiplexing the generated basic pulse train to multiplex a basic pulse train A storage medium writing apparatus comprising: means for generating a binary pulse train by binary conversion of the multiplexed basic pulse train; and means for storing the binary pulse train in a storage medium. A multiplexed basic pulse train obtained by multiplying a basic pulse train generated by multiplying a data coded code pulse train having a shift time to which data is mapped and whose chip width is converted and an ordered pulse train is binary-transformed. A storage reading device for reading a binary pulse train from a memory and reproducing data,
Means for detecting the stored pulse train and regenerating a multiplexed basic pulse train; multiplying the regenerated multiplexed basic pulse train with the sequential pulse train to separate the code pulse train; Is included in the corresponding model using the means for calculating the FFT value, the model having the parameter using the Fourier coefficient and the Fourier coefficient, or the model having the parameter using the FFT and the FFT value. A storage / reading device comprising at least means for calculating a parameter to detect the data-coded pulse train, means for detecting a shift time of the code pulse train, and data calculating means for calculating the data from the shift time.   A storage device using the storage medium writing device according to claim 17 as the storage writing means and the storage reading device according to claim 18 as the storage data reading means.   A storage medium that can be read by a reading device and stores a signal based on a multiplexed basic pulse train using a data-coded pulse train converted in chip width. Data is acquired, the acquired data is error-correction encoded, this data is converted to a number modulo the code length of the code sequence, this number is mapped to the shift time of the code pulse sequence, and the chip width is converted And generating a pulse train representing the order, multiplying the pulse train to generate a basic pulse train, multiplexing the pulse train for generating a transmission signal including the multiplexed basic pulse train, and generating a pulse train based on the pulse train. A computer- or processor-readable storage medium storing a reception program for generating and transmitting a transmission signal. The transmission signal is detected, the multiplexed basic pulse train is reproduced from the detected signal, the data-coded pulse train is separated, the Fourier coefficient or FFT value of this signal is calculated, and the corresponding Fourier coefficient or FFT model of this signal A computer- or processor-readable storage medium storing a reception program for calculating a parameter using, determining a data-coded pulse train, and calculating data using the shift time.