JP2008225710A - Computer system and process-switching method used in the system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce overhead by holding multiple sets of registers in a CPU and executing retreating and recovering processing to a memory at a necessary minimum, even when a process is switched. <P>SOLUTION: A computation control part 4A refers to storage areas 712, 722, etc., at the final use time set in register sets by using a CPU operation mode flag 41A, a register set-selecting means 42 and a process space-computing means 43 when a process to be executed, among a plurality of processes which are deployed for each process space 31, 32, etc., in a memory 3, does not use any of the register sets 71, 72, etc. Then, the computation control part 4A stores the storage contents of the register set, which is earliest in the final use time among the plurality of register sets, in the corresponding register retreating areas 311, 322, etc., in the memory 3, releases the register set and executes the process to be executed by using the released register set. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a computer system and a process switching method used in the system, and more particularly to a computer system (including an embedded system) having a plurality of register sets and a process switching method used in the system.

This type of register set is a storage device inside the CPU (Central Processing Unit) for temporarily storing input / output data processed by the control unit and calculation results of the calculation unit. It consists of a set of general-purpose registers such as registers and address registers and dedicated registers such as program counters and index registers.
By the way, in a conventional computer system (including an embedded system), only one register set is held (except for the purpose of improving the efficiency at the time of calling a function call in the same program). Therefore, the contents of the register are stored in the memory (main storage device) each time the process is switched as a program processing unit in the multitasking OS (operating system) or the privileged mode / non-privileged mode is switched. Since processing for saving (saving) or restoring (restoring) the contents of the memory to the register is necessary, the original processing and data transfer are delayed accordingly, which is a problem.

  Therefore, in order to reduce this type of process switching overhead (overall system load), for example, the management apparatus described in Patent Document 1, the operating system processing method described in Patent Document 2, and Patent Document 3 The described central processing unit is provided.

  The management device of Patent Document 1 includes a set of general-purpose registers, and saves only the contents of the general-purpose registers used by the program to the memory (main storage device) or restores the contents of the memory to the registers. Processing and return processing are reduced to reduce overhead.

  In addition, in the operating system processing method described in Patent Document 2, by operating the register window control mechanism of the processor or a similar mechanism, the application software thread cannot use some general-purpose registers. In the context switch between threads, the number of registers to be saved and restored is reduced, and the overhead time of the context switch is shortened.

The central processing unit described in Patent Document 3 includes an instruction processing device, a memory (main storage device), and a plurality of register groups. The contents of a plurality of programs are held in individual register groups, and time-division processing is performed. When the process is switched, the process of saving the contents saved in the register group to the memory or restoring the contents of the memory to the register is eliminated, thereby improving the processing efficiency of the central processing unit. I have to.
JP 2004-021610 A JP 2000-242505 A Japanese Utility Model Publication No. 06-15138

  However, since the management apparatus of Patent Document 1 basically has only one set of general-purpose register groups, if the number of processes that can be executed simultaneously increases, the overhead cannot be reduced so much. It is. In addition, the operating system processing method described in Patent Document 2 has a problem that it cannot cope with an increase in user processes because the application software thread cannot use some general-purpose registers.

  Since the central processing unit of Patent Document 3 is provided with a plurality of register groups, the number of processes that can be executed simultaneously can be expected although a reduction in overhead can be expected as compared with the techniques of Patent Document 1 and Patent Document 2. However, since the number of register groups is limited, when the number of processes to be executed simultaneously exceeds the number of register groups, multitask control is impossible or confused, which is a problem.

  The present invention has been made in view of the above circumstances. If the number of register sets is within the range, the overhead at the time of process switching can be surely reduced, and the number of processes to be executed at the same time can be reduced. It is an object of the present invention to provide a computer system capable of smoothly performing multitask control even when the number exceeds, and a process switching method used in the system.

  In order to solve the above problem, the invention according to claim 1 is directly connected to a plurality of register sets each including a plurality of registers as a set, a memory for storing a user program and data, and the register set and the memory. The present invention relates to a process switching method in a computer system including a control unit that controls these, wherein the control unit sets a plurality of process spaces in the memory, sets a register save area for each process space, and A plurality of register sets are used for each process (processing unit of user program) to execute each process in parallel with switching, and a plurality of processes developed for each process space of the memory When the process to be executed does not use any register set, The stored contents of one of the register sets is stored in the corresponding register save area in the memory and the register set is released, and then the process to be executed using the released register set is performed. It is characterized by executing.

  The invention according to claim 2 includes a plurality of register sets including a plurality of registers as a set, a memory for storing a user program and data, and a control unit that is directly connected to and controls the register set and the memory. According to a process switching method in a computer system, the control unit sets a plurality of process spaces in the memory, sets a register save area for each process space, and sets the plurality of register sets to a process ( Each process used for each user program processing unit) is executed in parallel with switching, and a process to be executed among a plurality of processes developed for each process space of the memory. However, when none of the register sets are used, the plurality of register sets In other words, the storage contents of the register set having the longest non-use period (or the oldest last use time) are stored in the corresponding register save area in the memory and the register set is released, and then the released register set The process to be executed is executed using a register set.

  A third aspect of the present invention relates to a process switching method in the computer system according to the first or second aspect, wherein the register set includes a plurality of general purpose registers.

  The invention according to claim 4 relates to a process switching method in the computer system according to claim 1 or 2, wherein the register set has a plurality of general-purpose registers that can be used for multiple purposes and a single or a plurality of registers that are used for special purposes. And a dedicated register.

  The invention according to claim 5 relates to a process switching method in the computer system according to claim 1 or 2, wherein the control unit determines which register set is selected to execute the process. And a process space calculation function for determining in which address on the memory the process space identified by the process ID is stored based on a process ID uniquely assigned to each process to be executed It is characterized by having.

  The invention according to claim 6 relates to a process switching method in the computer system according to claim 1 or 5, wherein each register set stores a final process ID for storing a process ID that last used the register set. And a storage area.

  The invention according to claim 7 relates to a process switching method in a computer system according to claim 2, 3, 4 or 5, in which each register set stores a process ID that last used the register set. The last process ID storage area and a last use time storage area for storing the time immediately after the use of the register set is completed, and the control unit is stored in the last use time storage area Referring to the time immediately after the above, it is characterized in determining which register set is the register set having the longest non-use period (or the oldest last use time).

  The invention according to claim 8 relates to a process switching method in the computer system according to claim 1 or 2, wherein a larger number of the process spaces than the number of the register sets are set in the memory. It is characterized by.

  The invention according to claim 9 relates to a process switching method in the computer system according to claim 1 or 2, wherein the control unit uses a plurality of the register sets for the predetermined process. It is characterized by performing.

  The invention according to claim 10 relates to a process switching method in the computer system according to claim 1 or 2, wherein the control unit, for a predetermined process, is based on the number of used register sets stored in the executable module. The predetermined process is executed by selecting and using a plurality of register sets.

  The invention according to claim 11 is a plurality of register sets including a plurality of registers as a set, a memory for storing a user program and data, and a control unit that is directly connected to and controls the register set and the memory. The control unit sets a plurality of process spaces in the memory, sets a register save area for each process space, and A register set is used for each process (processing unit of the user program), and each process is executed in parallel with switching, and among the plurality of processes developed for each process space of the memory If the process you are trying to run does not use any of the register sets, After storing the stored contents of one register set in the corresponding register save area in the memory and releasing the register set, the process to be executed is executed using the released register set. It is characterized by being composed.

  According to a twelfth aspect of the present invention, a plurality of register sets including a plurality of registers as a set, a memory for storing a user program and data, and a control unit that is directly connected to and controls the register set and the memory The control unit sets a plurality of process spaces in the memory, sets a register save area for each process space, and A register set is used for each process (processing unit of the user program), and each process is executed in parallel with switching, and among the plurality of processes developed for each process space of the memory When the process to be executed does not use any register set, After storing the stored contents of the register set having the longest non-use period (or the oldest last use time) in the corresponding register save area in the memory and releasing the register set, It is characterized in that the process to be executed is executed using the released register set.

  A thirteenth aspect of the invention relates to the computer system of the eleventh or twelfth aspect, wherein the register set includes a plurality of general purpose registers.

  The invention according to claim 14 relates to the computer system according to claim 11 or 12, wherein the register set includes a plurality of general-purpose registers that can be used for various purposes, and a single or a plurality of dedicated registers that are used for special purposes. It is characterized by comprising.

  The invention according to claim 15 relates to the computer system according to claim 11 or 12, wherein the control unit determines which register set is selected to execute the process, and execution. And a process space calculation means for determining in which address on the memory the process space identified by the process ID is stored based on a process ID uniquely assigned to each process. It is characterized by that.

  The invention according to claim 16 relates to the computer system according to claim 11 or 12, wherein each of the register sets has a final process ID storage area for storing a process ID that last used the register set. It is characterized by having.

  The invention according to claim 17 relates to the computer system according to claim 12, 13, 14 or 15, wherein each of the register sets stores a final process ID for storing a process ID that last used the register set. A storage area and a last use time storage area for storing a time immediately after the use of the register set is completed, and the control unit stores the time immediately after the last use time storage area. , It is characterized in that it is determined which register set is the register set having the longest non-use period (or the oldest last use time).

  The invention according to claim 18 relates to the computer system according to claim 11 or 12, characterized in that a larger number of the process spaces than the number of the register sets are set in the memory. Yes.

  The invention according to claim 19 relates to the computer system according to claim 11 or 12, wherein, for the predetermined process, the control unit executes the predetermined process using a plurality of the register sets. It is characterized by.

  The invention according to claim 20 relates to the computer system according to claim 11 or 12, wherein the control unit, for a predetermined process, uses a plurality of register sets based on the number of used register sets stored in the executable module. The predetermined process is executed by selecting and using the register set.

  The invention according to claim 21 relates to the computer system according to claim 19 or 21, wherein a register set number storage area for storing the number of register sets used when executing the predetermined process is added. It is characterized by having.

  According to the configuration of this example, a plurality of register sets are provided, and if the number of the register sets is within the range, the plurality of register sets are used for each process, and each process is performed concurrently with switching. As a result, the overhead during process switching can be reliably reduced, and even if the number of processes to be executed simultaneously exceeds the number of installed register sets, the stored contents of one of the register sets can be handled in the memory. Since the register set is released by being stored in the register saving area to be used and the released register set can be used, multitask control can be performed smoothly.

  The CPU includes a plurality of register sets. The arithmetic control unit 4A uses each register set for each process (user program processing unit), switches the processes in a time-sharing manner, and executes the processes in parallel. A larger number of process spaces than the number of register sets are set in the memory.

FIG. 1 is an electrical block diagram showing a main part configuration of a computer system according to a first embodiment of the present invention. FIG. 2 shows a main part configuration of the computer system according to the first embodiment (hereinafter referred to as a computer main body). It is also an electrical block diagram showing in more detail.
As shown in FIG. 1, the computer main body of this example has a CPU (central processing unit) 1 and a system timer when a plurality of processes (user program processing units) are executed in parallel by multitask switching by program control. 2 and a memory (main storage device) 3 such as a ROM or a RAM that can be directly accessed by the CPU 1A.

  As shown in the figure, the CPU 1A is directly connected to an arithmetic control unit 4A for interpreting instructions, generating control signals and performing logical operations, and temporarily storing arithmetic results and input / output data. And a register unit 5 for storing.

  As shown in FIG. 2, the register unit 5 includes a privilege mode register unit 6 used when a program having special authority such as an operating system (OS) or a system operation management program is executed, and a process. The non-privileged mode register unit 7 includes a plurality of register sets that are used when a (processing unit of a program in a multitasking OS) is executed and reduce overhead.

  As shown in FIG. 2, the non-privileged mode register unit 7 holds a plurality of register sets (four register sets in this example) 71, 72, 73, 74, and further stores a “final process ID”. Areas 711, 721, 731, and 741 and “last use time” storage areas 712, 722, 732, and 742 are added.

  Each register set 71, 72, 73, 74 has a plurality of registers composed of flip-flop circuits, for example, a plurality of general purpose registers such as a data register and an address register, and a plurality of dedicated registers such as a program counter, a status register, and an index register. It consists of a pair with a register.

  The last process ID storage areas 711, 721, 731, and 741 store the process ID that last used the register set 71, 72, 73, and 74, and the last use time storage areas 712 and 722. , 732, and 742 store the time immediately after the use of the register sets 71, 72, 73, and 74 is completed.

  The system timer 2 generates a system time by ticking time, and provides the generated system time to the CPU. The system time is the only existence in the computer system, and the unit of the system time to be provided is the finest time accuracy of the computer system such as a machine clock.

  In the memory 3, a plurality of process spaces (in this example, five process spaces) 31, 32, 33, 34, and 35 are stored in order to store processes (as processing units of user programs) and related data. Register save areas 311, 322, 333, 344, and 355 for storing corresponding register images (stored contents of register sets) are set in the process spaces 31, 32, 33, 34, and 35. ing.

  The arithmetic control unit 4A includes a CPU operation mode flag 41A indicating whether the CPU 1A is operating in the privileged mode or the non-privileged mode, and which register set 71 in the register unit 7 for the non-privileged mode. , 72, 73, 74 are selected by register ID selection means 42 for determining whether to execute the process, and specified by the process ID based on the process ID (IDentification) uniquely assigned to each process to be executed And a process space calculation means 43 for determining at which address on the memory 3 the process spaces 31, 32, 33, 34, and 35 are stored.

  The arithmetic control unit 4A in this example is expanded for each process space 31, 32, 33, 34, 35 in the memory 3 by using the CPU operation mode flag 41A, the register set selection means 42, and the process space calculation means 43. When a process to be executed among a plurality of processes does not use any register set 71, 72, 73, 74, it is set in each register set 71, 72, 73, 74. Referring to the “last use time” storage areas 712, 722, 732, and 742, among the plurality of register sets 71, 72, 73, and 74, a register having the oldest use time (ie, the longest non-use period) The stored contents (register images) of the sets 71, 72, 73, 74 are stored in the corresponding register save areas 311, 322, 333 in the memory 3. After opening the register set 71, 72, 73, and 74 stored in the 344,355, using the opened the register set, and has a configuration to execute a process to be the execution.

Next, the operation of this example will be described with reference to FIG.
In a situation where the user program is not operating at all after the system is started, all the non-privileged mode registers 7 are in the initial state (0 cleared). Here, as shown in the figure, the operation when the process (user program) with the process ID: 1 developed in the process space 31 of the memory 3 is executed will be described.

Operation example 1
First, a flag indicating the non-privileged mode is set in the CPU operation mode flag 41A, whereby the CPU 1A operates in the non-privileged mode. Then, the register set selection means 42 determines which register set 71, 72, 73, 74 to select (use) and execute the process (user program) of process ID: 1 developed in the process space 31. To do. In determining, referring to the storage areas 711, 721, 731 and 741 of the final process ID of each register set 71, 72, 73 and 74, if there is a register set storing the process ID: 1 The program is executed using the register set.
At this time, neither processing for saving the contents of the register set stored in the memory 2 by process switching nor processing for restoring the contents of the register set stored in the memory 2 is required, so that no overhead occurs.

Operation example 2
If there is no register set in which process ID 1 is stored as a result of referring to the storage areas 711, 721, 731, and 741 of the final process ID, the “last use time” of each register set 71, 72, 73, and 74 is stored. Referring to the storage areas 712, 722, 732, and 742, the program is executed by selecting and using the register set with the oldest time.

  In this case, all of the non-privileged mode register units 7 are in the initial state, so the register set selection unit 42 selects the register set 71 and stores the process ID in the “final process ID” storage area 711 for the register set 71. “1” is stored. At this time, neither the processing for saving the contents of the register set stored in the memory 2 by the process switching nor the processing for restoring the contents of the register set stored in the memory 2 is required, so that no overhead occurs.

Operation example 3
Next, when the process (user program) with the process ID: 1 releases the CPU 1A and performs process switching, the CPU 1A acquires the current time from the system timer 2, and sets the acquired current time value in the register set 71. The “last use time” storage area 712 is stored. In this state, when the process with the process ID: 1 is executed again, the register set selecting unit 42 selects the register set 71 and the process with the process ID: 1 (user program) is executed. . At this time, neither the processing for saving the contents of the register set stored in the memory 2 by the process switching nor the processing for restoring the contents of the register set stored in the memory 2 is required, so that no overhead occurs.

Operation example 4
Next, in the non-privileged mode register unit 7 shown in FIG. 2, the process ID is 1 in the “final process ID” storage area 711 for the register set 71 and the process is in the “final process ID” storage area 721 for the register set 72. With the ID: 2, the process ID: 3 stored in the “final process ID” storage area 731 for the register set 73, and the process ID: 4 stored in the “final process ID” storage area 741 for the register set 74, An operation when the process (user program) of process ID: 1, process ID: 2, process ID: 3, and process ID: 4 is switched and executed in a time division manner will be described.

  The register set selection means 42 is time-shared. Which register set 71, 72, 73, 74 is a process (user program) of process ID: 1, a process of process ID: 2, a process of process ID: 3, and a process of process ID: 4 deployed in the process space 31. Select (use) to decide whether to execute. For the determination, the storage areas 711, 721, 731 and 741 of the final process ID of each register set 71, 72, 73 and 74 are referred to. In this case, since there are all register sets 71, 72, 73, and 74 in which process ID: 1, process ID: 2, process ID: 3, and process ID: 4 are stored, these register sets 71, Each process is executed using 72, 73, 74. At this time, neither processing for saving the contents of the register set stored in the memory 2 by process switching nor processing for restoring the contents of the register set stored in the memory 2 is required, so that no overhead occurs.

Operation example 5
Next, in the non-privileged mode register section 7 shown in FIG. 2, “1” is stored in the “final process ID” storage area 711 for the register set 71, and “2” is stored in the “final process ID” storage area 721 for the register set 72. "3" is stored in the "final process ID" storage area 731 for the register set 73, and "4" is stored in the "final process ID" storage area 741 for the register set 74. The operation when this process (user program) is executed will be described.

  The register set selection unit 42 determines whether or not the process ID: 5 is stored in the “final process ID” storage areas 711, 721, 731, and 741 for any register set according to the above rule. In this case, since the ID value stored in any of the “final process ID” storage areas is not “5”, the register set selection unit 42 determines that the process ID: 5 is the “final process ID” for any register set. It is determined that the “process ID” storage areas 711, 721, 731, and 741 are not stored.

  Next, the register set selection means 42 refers to the “last use time” storage areas 712, 722, 732, and 742 of each register set, and selects the register set in which the oldest time is stored.

  In this case, assuming that the “last use time” storage area 712 for the register set 71 is the oldest, the process (user program) with the process ID: 5 is executed using the register set 71. . If the process is executed as it is, the image of the register set 71 used by the process ID: 1 is destroyed. Therefore, the process space calculation unit 43 uses the “final process ID” storage area 711 (in this case, From “1” is stored), the address of the register save area 311 for process ID: 1 is calculated, and the register image of the register set 71 is stored in the register save area 311 for process ID: 1. Therefore, in the case of the operation example 5, the processing for saving the register set storage contents to the memory 2 by the process switching and the processing for restoring the register set storage contents from the memory 2 are necessary, so that overhead occurs.

  As described above, according to the configuration of the first embodiment, a plurality of register sets 71, 72, 73, 74 are held in the CPU 1A, and even when the process is switched, the memory is transferred to the memory at the minimum necessary. The overhead at the time of process switching can be reduced. Further, according to the configuration of this example, the process space 31, 32, 33, 34, 35 more than the number of the register sets 71, 72, 73, 74 is set in the memory 3. Even when the number of processes to be executed simultaneously exceeds the number of installed register sets, the stored contents of any one register set are stored in the corresponding register save area in the memory, and the corresponding register set is released. Since the register set can be used, multitask control can be smoothly performed to execute the process to be executed.

FIG. 3 is an electrical block diagram showing the main configuration of the computer system according to the second embodiment of the present invention.
The configuration of the computer system of this example is greatly different from that of the first embodiment described above, as shown in the figure, a CPU operation mode flag 41B is provided with a used register set number storage area 8 and a single process. The (user program) is configured to execute processing using a plurality of register sets (for example, two register set register sets 71 and 72) held by the CPU 1B.

  Here, the used register set number storage area 8 is a storage area capable of storing the number of register sets used for the CPU operation mode flag 41B.

  In the configuration of this example, the number of register sets to be used is stored in advance in the executable module (set by the compiler at the time of compilation). When the process is executed, the number of used register sets stored in the executable module is read and set in the used register set number storage area 8 of the CPU operation mode flag 41B. The register set selection means 42 refers to the used register set number storage area 8 and performs a process of securing the required number of register sets.

  The embodiment of the present invention has been described in detail with reference to the drawings. However, the specific configuration is not limited to this embodiment, and there are design changes and the like without departing from the gist of the present invention. Are also included in the present invention. For example, in the above-described embodiment, each register set is composed of a plurality of general-purpose registers and a plurality of dedicated registers. However, the present invention is not limited to this, and a plurality of register sets can be used for multiple purposes. It may be composed of only general purpose registers, or may be composed of a plurality of general purpose registers and a single dedicated register used for a special purpose.

In the second embodiment described above, the case where a single process (user program) executes processing using two register set register sets 71 and 72 is described. However, the number of register sets used is arbitrary. All the register sets held by the CPU 1B may be used as necessary. Further, the number of register sets held is arbitrary, and the number of process space settings is also arbitrary.
Further, the stored contents of the register set having the oldest use time (that is, the longest non-use period) among the plurality of register sets are saved in the register save area of the memory, but the present invention is not limited to this. For example, the register set to be saved may be determined in consideration of the frequency of use.

  It can be applied not only to computer systems but also to embedded systems.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is an electrical block diagram showing a main configuration of a computer system according to a first embodiment of the present invention. It is an electrical block diagram which shows the principal part structure of the computer system which is the 1st Example in detail. It is an electrical block diagram which shows the principal part structure of the computer system which is 2nd Example of this invention.

Explanation of symbols

1A, 1B CPU (part of computer system)
2 System timer 3 Memory 31, 32, 33, 34, 35 Process space 311, 322, 333, 344, 355 Register save area 4A, 4B Operation control unit (control unit)
41A, 41B CPU operation mode flag 8 Register set number storage area 42 Register set selection means 43 Process space calculation means 5 Register part 6 Privileged mode register part 7 Non-privileged mode register part 711, 721, 731, 741 Final process ID storage Area 712, 722, 732, 742 Last use time storage area

Claims (21)

A process switching method in a computer system comprising a plurality of register sets including a plurality of registers, a memory for storing user programs and data, and a control unit that is directly connected to and controls the register set and the memory There,
The controller is
Setting a plurality of process spaces in the memory, setting a register saving area for each process space; and
The plurality of register sets are used for each process (processing unit of user program), and each process is executed concurrently with switching.
When a process to be executed among a plurality of processes expanded for each process space of the memory does not use any register set, the storage contents of any one register set are The process switching in the computer system, wherein the process to be executed is executed using the released register set after storing the corresponding register save area in the memory and releasing the register set Method. A process switching method in a computer system comprising a plurality of register sets including a plurality of registers, a memory for storing user programs and data, and a control unit that is directly connected to and controls the register set and the memory There,
The controller is
Setting a plurality of process spaces in the memory, setting a register saving area for each process space; and
The plurality of register sets are used for each process (processing unit of user program), and each process is executed concurrently with switching.
When a process to be executed among a plurality of processes expanded for each process space of the memory does not use any register set, the most unused period of the plurality of register sets After storing the stored contents of the register set with the longest (or the oldest use time) in the corresponding register save area in the memory and releasing the register set, use the released register set A process switching method in a computer system, wherein the process to be executed is executed.   3. The process switching method in a computer system according to claim 1, wherein the register set includes a plurality of general purpose registers.   3. The process switching method in a computer system according to claim 1, wherein the register set includes a plurality of general-purpose registers that can be used for multiple purposes, and one or more dedicated registers that are used for special purposes. . The controller is
A register set selection function for determining which register set is selected to execute the process;
A process space calculation function for determining in which address on the memory the process space identified by the process ID is stored based on a process ID uniquely assigned to each process to be executed 3. A process switching method in a computer system according to claim 1, wherein the process is switched.   6. The process switching method in a computer system according to claim 1, wherein each of the register sets has a final process ID storage area for storing a process ID that last used the register set. .   Each register set includes a final process ID storage area for storing a process ID that last used the register set, and a last use time storage area for storing a time immediately after the use of the register set is completed. The control unit refers to the time immediately after stored in the last use time storage area, and which register set has the longest non-use period (or the last use time is the oldest) 6. The process switching method in a computer system according to claim 2, wherein it is determined whether the set is a set.   3. The process switching method in a computer system according to claim 1, wherein a larger number of the process spaces than the number of the register sets are set in the memory.   3. The process switching method in the computer system according to claim 1, wherein the control unit executes the predetermined process for a predetermined process using a plurality of the register sets.   The control unit, for a predetermined process, selects and uses a plurality of the register sets based on the number of used register sets stored in an executable module, and executes the predetermined process. Item 3. A process switching method in the computer system according to Item 1 or 2. Provided with a plurality of register sets having a plurality of registers as a set, a memory for storing user programs and data, a control unit that is directly connected to and controls the register set and the memory, and a function for switching processes A computer system comprising:
The controller is
Setting a plurality of process spaces in the memory, setting a register saving area for each process space; and
The plurality of register sets are used for each process (processing unit of user program), and each process is executed concurrently with switching.
When a process to be executed among a plurality of processes expanded for each process space of the memory does not use any register set, the storage contents of any one register set are It is configured to execute the process to be executed using the released register set after storing the corresponding register save area in the memory and releasing the register set.
A computer system characterized by that. Provided with a plurality of register sets having a plurality of registers as a set, a memory for storing user programs and data, a control unit that is directly connected to and controls the register set and the memory, and a function for switching processes A computer system comprising:
The controller is
Setting a plurality of process spaces in the memory, setting a register saving area for each process space; and
The plurality of register sets are used for each process (processing unit of user program), and each process is executed concurrently with switching.
When a process to be executed among a plurality of processes expanded for each process space of the memory does not use any register set, the most unused period of the plurality of register sets After storing the stored contents of the register set with the longest (or the oldest use time) in the corresponding register save area in the memory and releasing the register set, use the released register set Configured to execute the process to be executed,
A computer system characterized by that.   The computer system according to claim 11 or 12, wherein the register set includes a plurality of general-purpose registers.   13. The computer system according to claim 11, wherein the register set includes a plurality of general-purpose registers that can be used for various purposes and a single or a plurality of dedicated registers that are used for special purposes. The controller is
Register set selection means for determining which register set to select to execute the process;
Based on a process ID uniquely assigned to each process to be executed, a process space calculation means for determining in which address on the memory the process space identified by the process ID is stored The computer system according to claim 11 or 12, characterized in that   16. The computer system according to claim 11, wherein each of the register sets has a final process ID storage area for storing a process ID that last used the register set.   Each register set includes a final process ID storage area for storing a process ID that last used the register set, and a last use time storage area for storing a time immediately after the use of the register set is completed. The control unit refers to the time immediately after stored in the last use time storage area, and which register set has the longest non-use period (or the last use time is the oldest) 16. The computer system according to claim 12, 13, 14 or 15, wherein it is determined whether the set is a set.   The computer system according to claim 11 or 12, wherein a larger number of the process spaces than the number of the register sets are set in the memory.   13. The computer system according to claim 11, wherein the control unit executes the predetermined process using a plurality of the register sets for the predetermined process.   The control unit, for a predetermined process, selects and uses a plurality of the register sets based on the number of used register sets stored in an executable module, and executes the predetermined process. Item 13. The computer system according to Item 11 or 12. The computer system according to claim 19 or 21, further comprising a register set number storage area for storing the number of register sets used when executing the predetermined process.

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