JP2008032780A - Method for manufacturing electro-optical device, and electro-optical device, and electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent occurrence of short-circuit defects caused by the flattening treatment of an interlayer insulating film. <P>SOLUTION: The conductive film 71' has a light shielding property like a metal film such as Al and becomes a lower electrode 71 in an image display region and a light shielding film 71a in a peripheral region by being patterned into a predetermined shape in subsequent steps. Even when, for example, a data line 6a and a source line 406a are exposed on the surface of the interlayer insulating film 42 caused by the flattening treatment of the interlayer insulating film 42, the data line 6a and the source line 406a are prevented from being short-circuited to a portion formed on the upper layer side of the interlayer insulating film 42 (e.g. the lower electrode 71 or the light shielding film 71a) by means of a protective film 65. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a method for manufacturing an electro-optical device including, for example, a planarization process by a CMP (Chemical Mechanical Polishing) method, an electro-optical device such as a liquid crystal panel manufactured by the method for manufacturing such an electro-optical device, and its The present invention relates to the technical field of electronic equipment such as a projector equipped with such an electro-optical device.

  In this type of electro-optical device, display electrodes, wiring lines such as scanning lines and data lines for driving the display electrodes, and electronic elements are laminated on each other via an interlayer insulating film. When the electro-optical device adopts an active matrix drive format, a thin film transistor for pixel switching (hereinafter referred to as “TFT” as appropriate) is formed on a substrate.

  In this type of electro-optical device, the surface of the TFT array substrate is flattened to improve display characteristics. For example, as shown in Patent Document 1, an interlayer insulating film is formed by CMP (Chemical Mechanical In many cases, the surface is flattened by a polishing method. In a liquid crystal device having a planarized interlayer insulating film, since the flatness of the interlayer insulating film is improved, for example, an alignment film formed on the interlayer insulating film is formed flat. According to such an alignment film, light leakage due to liquid crystal alignment failure, streak-like display failure due to rubbing marks during rubbing, display failure due to peeling of the alignment film, and the like are reduced, and a high-quality image is displayed. It becomes possible.

  In addition, a light shielding film for reducing light leakage current flowing through the TFT may be formed on the planarized interlayer insulating film.

JP 2004-170912 A

  However, when a foreign substance enters the lower layer side of the interlayer insulating film, the interlayer insulating film is uneven depending on the size of the foreign substance. When planarization processing such as CMP is performed on the interlayer insulating film in the state where the unevenness is generated, wiring formed on the lower layer side of the interlayer insulating film or electronic elements such as TFT may be partially exposed from the interlayer insulating film. is there. When the light shielding film is formed on the interlayer insulating film in such a state, there is a problem in the manufacturing process that the wiring and the light shielding film are short-circuited and the yield of the liquid crystal device is lowered. In many cases, a drive circuit for driving the pixel portion is formed around the display area on the TFT array substrate. Such a drive circuit has an electronic element such as a TFT. When light is irradiated like the pixel switching TFT, a light leakage current is generated, and a predetermined image cannot be displayed in the display area. There is also a point. There is also a high demand for a high-performance liquid crystal device capable of displaying high-quality images over a long period of time by increasing the reliability of the drive circuit.

  Accordingly, the present invention has been made in view of the above-described problems. For example, an electro-optical device capable of manufacturing an electro-optical device capable of suppressing an increase in yield and displaying an image with high display quality over a long period of time. It is an object of the present invention to provide an optical device manufacturing method, an electro-optical device, and an electronic apparatus including such an electro-optical device.

  In order to solve the above problems, an electro-optical device manufacturing method according to the present invention flattens a display region on a substrate and an insulating film formed over the peripheral region located around the display region on the substrate. A flattening step for forming a protective layer, a protective film forming step for forming a protective film on the surface of the insulating film, a light-shielding film step for forming a light-shielding film on the surface of the protective film for shielding the lower layer side of the protective film, A patterning step of patterning each of the protective film and the light shielding film into a predetermined shape by a common patterning process.

  According to the electro-optical device manufacturing method of the present invention, in the planarization step, the insulating film is formed, for example, as an interlayer insulating film on the upper side of the pixel switching TFT formed in the display region on the substrate. Such an insulating film is planarized by using a general planarization method such as a CMP method. Note that the “display region” is a region where a plurality of pixel electrodes are formed in a step after a patterning step described later, and an image is displayed on the pixel electrodes by a plurality of pixel portions.

  In the protective film forming step, a protective film is formed on the surface of the insulating film using a general-purpose film forming method. Accordingly, the surface of the planarized insulating film is protected by a protective film, and if wiring or various elements formed on the lower layer side of the insulating film are exposed on the planarized insulating film surface However, it is covered with the wiring or the protective film. Therefore, for example, wiring or pixel switching TFTs formed on the lower layer side of the insulating film can be prevented from being short-circuited with a light-shielding film described later, and a decrease in yield of the electro-optical device can be suppressed. In particular, when the light shielding film is shared with the wiring on the substrate or a part of various elements, the surface protection of the insulating film by the protective film is useful for performing normal image display.

  In addition, since the insulating film is flattened, the protective film formed on the surface of the insulating film is also flatly formed. Therefore, for example, the flatness of the alignment film formed on the upper layer side of the protective film is improved, and a high-quality image can be displayed. In addition, the protective film may be formed using a material having excellent characteristics that prevent entry of moisture and the like. According to such a protective film, deterioration of various circuits or wirings formed on the lower layer side of the protective film in the peripheral region can be reduced, and the display performance of the electro-optical device can be maintained over a long period of time. It is also possible to improve the reliability of the system.

  In the light shielding film forming step, a light shielding film that shields the lower layer side of the protective film is formed on the surface of the protective film. More specifically, a conductive metal thin film such as Al is formed as a light-shielding film by using a general-purpose thin film forming method such as a general-purpose sputtering method or a vapor deposition method. Such a light shielding film blocks incident light incident from the upper side of the substrate toward the lower layer side of the light shielding film. Therefore, for example, the light leakage current generated in the pixel switching TFT formed in the display area can be reduced, and the light leakage current flowing in various circuits formed in the peripheral area can be reduced, so that an electro-optic that can display an image with high quality. The device can be manufactured.

  As described above, according to the method for manufacturing an electro-optical device according to the present invention, it is possible to manufacture an electro-optical device capable of suppressing a decrease in yield and displaying an image with high display quality over a long period of time.

  One aspect of the electro-optical device according to the invention includes a peripheral circuit portion forming step for forming a peripheral circuit portion for driving a plurality of pixel portions to be formed in the display region prior to the planarization step. In the patterning step, the protective film and the light shielding film may be patterned so as to overlap the peripheral circuit portion.

  According to this aspect, in the peripheral circuit portion forming step, the data line driving circuit for supplying the image signal to the data line formed in the display area, the scanning line driving circuit for supplying the scanning signal to the scanning line, or the image signal is provided. A peripheral circuit unit including a sampling circuit for sampling an image signal supplied from the outside is formed. Such a peripheral circuit section includes an electronic element such as a TFT.

  The pattern light shielding film and the protective film are patterned into a predetermined shape all at once by a common patterning process, more specifically, a common etching process, and overlap the peripheral circuit portion. Therefore, the peripheral circuit portion is shielded from light by the light shielding film patterned in a predetermined shape. Therefore, an electro-optical device capable of displaying an image with high quality can be provided by reducing light leakage current generated in an electronic element such as a TFT formed in the peripheral region. In addition, compared with the case where the light shielding film and the protective film are individually patterned by patterning the protective film that reduces the intrusion of moisture and the like into the peripheral circuit portion into a predetermined shape in the same patterning process as the light shielding film. Thus, the manufacturing process of the electro-optical device can be simplified.

  In order to solve the above problems, an electro-optical device according to an aspect of the invention includes a substrate, a plurality of pixel portions formed in the display region on the substrate, and a peripheral region positioned around the display region on the substrate. An insulating film formed and planarized; a protective film formed on the surface of the insulating film in the peripheral region; and a lower layer of the protective film formed on the surface of the protective film. A light shielding film for shielding the side.

  According to the electro-optical device according to the present invention, similarly to the above-described method for manufacturing the electro-optical device according to the present invention, a reduction in yield is suppressed, and an electric image capable of displaying an image with high display quality over a long period of time. An optical device can be provided.

  In one aspect of the electro-optical device according to the present invention, the electro-optical device includes a peripheral circuit unit that is provided in the peripheral region and supplies various signals for driving the pixel unit to the pixel unit. Each of the light shielding films may be patterned into a predetermined shape by a common patterning process so as to overlap the peripheral circuit portion.

According to this aspect, it is possible to provide an electro-optical device capable of displaying an image with high quality by reducing a light leakage current generated in an electronic element such as a TFT included in the peripheral circuit portion formed in the peripheral region. . In addition, since the protective film can reduce the intrusion of moisture and the like into the peripheral circuit portion, the reliability of the electro-optical device is enhanced.
it can.

  In another aspect of the electro-optical device according to the invention, the protective film may be a SiN film.

  According to this aspect, it is possible to reduce the intrusion of foreign substances such as moisture from the upper layer side to the lower layer side of the protective film, and it is possible to improve the reliability of the electro-optical device.

  In order to solve the above problems, an electronic apparatus according to the present invention includes the above-described electro-optical device of the present invention.

  According to the electronic apparatus according to the present invention, since the electro-optical device according to the present invention described above is provided, a projection display device, a mobile phone, an electronic notebook, a word processor, and a viewfinder type capable of high-quality display. Alternatively, various electronic devices such as a monitor direct-view video tape recorder, a workstation, a videophone, a POS terminal, and a touch panel can be realized. In addition, as an electronic apparatus according to the present invention, for example, an electrophoretic device such as electronic paper can be realized.

  Such an operation and other advantages of the present invention will become apparent from the embodiments described below.

  Hereinafter, an electro-optical device manufacturing method, an electro-optical device, and an electronic apparatus according to the present embodiment will be described with reference to the drawings.

<1: Electro-optical device>
<1-1: Overall Configuration of Electro-Optical Device>
First, an overall configuration of a liquid crystal device which is an example of an electro-optical device according to the present embodiment will be described with reference to FIGS. 1 and 2. FIG. 1 is a plan view showing the configuration of the liquid crystal device according to this embodiment, and FIG. 2 is a cross-sectional view taken along the line II-II ′ of FIG.

  1 and 2, in the liquid crystal device 1 according to the present embodiment, a TFT array substrate 10 and a counter substrate 20 are disposed to face each other. A liquid crystal layer 50 is sealed between the TFT array substrate 10 and the counter substrate 20, and the TFT array substrate 10 and the counter substrate 20 are image displays that are examples of the “display region” according to the electro-optical device of the present invention. They are bonded to each other by a sealing material 52 provided in a sealing region located around the region 10a. A dustproof substrate 120b made of a transparent material such as glass is disposed on the lower surface of the TFT array substrate 10, and a dustproof material made of the same material as the dustproof substrate 120b is placed on the upper surface of the counter substrate 20. A substrate 120a is disposed.

  In the image display area 10a on the TFT array substrate 10, a plurality of pixel portions 72 arranged in a matrix are formed as will be described in detail later. Such a pixel portion 72 includes, for example, a semiconductor element such as a TFT as a switching element, and is electrically connected to a scanning line and a data line extending to the image display region 10a. The TFT array substrate 10 is a substrate in which a transparent substrate such as a glass substrate or a quartz substrate and a multilayer structure including an insulating film are formed on the transparent substrate. Similarly to the TFT array substrate 10, the counter substrate 20 also has a transparent substrate such as a glass substrate and a multilayer structure formed on the transparent substrate.

  In FIG. 1, a light-shielding frame light-shielding film 53 that defines the frame area of the image display area 10a among the peripheral areas extending around the image display area 10a in parallel with the inside of the seal area where the seal material 52 is disposed. Are provided on the counter substrate 20 side. On the TFT array substrate 10, the sampling circuit 7 and the scanning line driving circuit 104 are formed in a region overlapping the frame region where the frame light shielding film 53 is formed. Therefore, the sampling circuit 7 and the scanning line driving circuit 104 are shielded from light by the frame light shielding film 53.

  Out of the peripheral area extending around the image display area 10 a, the external circuit connection terminal 102 is provided along one side of the TFT array substrate 10 in an area located outside the seal area where the sealing material 52 is disposed. Yes. The sampling circuit 7 is provided so as to overlap the frame region extending inward from the seal region along one side. The scanning line driving circuit 104 is provided in a frame region extending inside the seal region along two sides adjacent to the one side. On the TFT array substrate 10, vertical conduction terminals 106 for connecting the two substrates with the vertical conduction material 107 are arranged in regions facing the four corner portions of the counter substrate 20. With these vertical conduction terminals 106, electrical conduction can be established between the TFT array substrate 10 and the counter substrate 20.

  1 and 2, the light shielding film 71a is formed on the TFT array substrate 10 outside the frame area where the frame light shielding film 53 is formed in the peripheral area extending outside the image display area 10a. The data line driving circuit 101 and the routing wiring 90 which are examples of the “peripheral circuit unit” of the electro-optical device according to the present invention are covered with the light-shielding film 71a which is an example of the “light-shielding film” of the electro-optical device according to the present invention. It has been broken. The lead wiring 90 electrically connects the external connection terminal 102 to the data line driving circuit 101, the scanning line driving circuit 104, the vertical conduction terminal 106, and the like.

  As shown in FIG. 2, the light shielding film 71 a also overlaps the sampling circuit 7. A protective film 65a described later is formed between the light shielding film 71a and the data line driving circuit 101 and the sampling circuit 7. The protective film 65a electrically insulates the light shielding film 71a from the data line driving circuit 101 and the sampling circuit 7. As will be described in detail later, the protective film 65a is formed on the surface of the second interlayer insulating film 42 planarized by a general planarization method such as a CMP method, and the data line driving circuit 101 and the sampling circuit 7 are formed. Is provided on the lower layer side of the second interlayer insulating film 42. The protective film 65a is, for example, a silicon nitride film (SiN film), and can reduce intrusion of foreign matters such as moisture. Therefore, the reliability of the data line driving circuit 101 and the sampling circuit 7 can be improved, and the lifetime that is a period during which these circuit units can operate normally can be extended.

  The light shielding film 71a reflects incident light that cannot be completely shielded by the frame light shielding film 53 and light reflected by the light shielding film 71a by the frame light shielding film 53 and enters the TFT array substrate 10 from outside the frame region. Block out light. Therefore, it is possible to reduce the occurrence of light leakage current in a semiconductor element such as a TFT included in each of the data line driving circuit 101 and the sampling circuit 7.

  The protective film 65a and the light shielding film 71a may be formed so as to overlap the scanning line driving circuit 104 in the peripheral region of the TFT array substrate 10. In such a case, the lifetime of the scan line driver circuit 104 can be extended, and generation of light leakage current in the semiconductor element included in the scan line driver circuit 104 can be reduced.

  In FIG. 2, on the TFT array substrate 10, there is a laminated structure in which pixel switching TFTs (Thin Film Transistors), which are driving elements for controlling the alignment of liquid crystals, and wiring such as scanning lines and data lines are formed. Is formed. In the image display area 10a, a pixel electrode 9a is provided in an upper layer of wiring such as a pixel switching TFT, a scanning line, and a data line. On the other hand, on the surface of the counter substrate 20 that faces the TFT array substrate 10, a light shielding film (not shown) that defines the opening area of each pixel in the image display area 10a, that is, the area through which light is substantially transmitted in the pixel (FIG. 7). Reference) is formed. A counter electrode 21 made of a transparent material such as ITO is formed on the surface of the counter substrate 20 facing the TFT array substrate 10 so as to face the plurality of pixel electrodes 9a. The alignment films 16 and 22 are respectively formed on the TFT array substrate 10 and the counter substrate 20.

  The alignment state of the liquid crystal layer 50 is controlled according to the potential difference between the pixel electrode 9a and the counter electrode 21, that is, the applied voltage applied to the liquid crystal, and a predetermined image is displayed in the image display region 10a. On the TFT array substrate 10, in addition to the data line driving circuit 101 and the scanning line driving circuit 104, an inspection circuit for inspecting quality, defects, etc. of the liquid crystal device during manufacturing or at the time of shipment, and an inspection pattern Etc. may be formed.

<1-2: Electrical Connection Configuration and Operation Principle of Pixel Unit>
Next, the electrical connection configuration and operation principle of the pixel unit 72 formed in the image display region 10a on the TFT array substrate 10 will be described with reference to FIG. FIG. 3 is an equivalent circuit diagram of various elements and wirings in the pixel portion 72 formed in the image display area 10a of the liquid crystal device 1.

  In FIG. 3, a pixel electrode 9a and a TFT 30 for controlling the switching of the pixel electrode 9a are formed in each of the plurality of pixel portions 72 formed in a matrix that forms the image display region 10a of the liquid crystal device 1. The data line 6 a to which the image signal is supplied is electrically connected to the source of the TFT 30. The image signals S1, S2,..., Sn to be written to the data lines 6a may be supplied line-sequentially in this order, or may be supplied for each group to a plurality of adjacent data lines 6a. May be.

  The scanning line 11a is electrically connected to the gate of the TFT 30, and the scanning signals G1, G2,..., Gm are applied to the scanning line 11a in a pulse-sequential manner in this order at a predetermined timing. It is configured. The pixel electrode 9a is electrically connected to the drain of the TFT 30, and the image signal S1, S2,... Supplied from the data line 6a is closed by closing the switch of the TFT 30 serving as a switching element for a certain period. Sn is written at a predetermined timing.

  A predetermined level of image signals S1, S2,..., Sn written on the liquid crystal, which is an example of an electro-optical material, via the pixel electrode 9a is between the counter electrode 21 formed on the counter substrate 20 for a certain period. Retained. The liquid crystal 50 modulates light and enables gradation display by changing the orientation and order of the molecular assembly according to the applied voltage level. In the normally white mode, the transmittance for incident light is reduced according to the voltage applied in units of each pixel, and in the normally black mode, the light is incident according to the voltage applied in units of each pixel. The light transmittance is increased, and light having a contrast corresponding to the image signal is emitted from the liquid crystal device 1 as a whole.

  In order to prevent the image signal held here from leaking, a holding capacitor 70 is added in parallel with the liquid crystal capacitor formed between the pixel electrode 9a and the counter electrode. One electrode of the storage capacitor 70 is connected to the drain of the TFT 30 in parallel with the pixel electrode 9a, and the other electrode is connected to a capacitor wiring 400 to which a fixed potential is supplied so as to have a constant potential.

<1-3: Specific Configuration of Pixel Unit>
Next, a specific configuration of the pixel portion of the liquid crystal device 1 will be described with reference to FIGS. 4 to 6 are plan views showing a partial configuration related to the pixel portion on the TFT array substrate 10. 4 and 5 correspond to a lower layer portion (FIG. 4) and an upper layer portion (FIG. 5), respectively, of a laminated structure described later. FIG. 6 is an enlarged plan view of the laminated structure, in which FIGS. 4 and 5 are superimposed. FIG. 7 is a cross-sectional view taken along line VII-VII ′ when FIGS. 4 and 5 are overlapped. In FIG. 7, the scale of each layer / member is different for each layer / member so that each layer / member can be recognized on the drawing.

  4 to 7, each circuit element of the pixel portion 72 described above is structured on the TFT array substrate 10 as a patterned conductive film. Each circuit element includes, in order from the bottom, the first layer including the scanning line 11a, the second layer including the TFT 30 and the like, the third layer including the data line 6a and the like, the fourth layer including the storage capacitor 70 and the like, the pixel electrode 9a and the like. It consists of the 5th layer containing. Further, the base insulating film 12 is provided between the first layer and the second layer, the first interlayer insulating film 41 is provided between the second layer and the third layer, the second interlayer insulating film 42 is provided between the third layer and the fourth layer, and the fourth layer. A third interlayer insulating film 43 is provided between the layer and the fifth layer, respectively, to prevent a short circuit between the aforementioned elements. Of these, the first to third layers are shown in FIG. 4 as lower layer portions, and the fourth to fifth layers are shown in FIG. 5 as upper layer portions.

(Structure of the first layer-scanning lines, etc.)
The first layer is composed of scanning lines 11a. The scanning line 11a is patterned into a shape including a main line portion extending along the X direction of FIG. 4 and a protruding portion extending in the Y direction of FIG. 4 where the data line 6a extends. The scanning line 11a is made of, for example, conductive polysilicon, and at least one of refractory metals such as titanium (Ti), chromium (Cr), tungsten (W), tantalum (Ta), and molybdenum (Mo). It is possible to form a single metal containing one metal, an alloy, metal silicide, polysilicide, or a laminate thereof. In the present embodiment, in particular, the scanning line 11a is a conductive film arranged on the lower layer side of the TFT 30 so as to include a region facing the channel region 1a. For this reason, when a double-plate type projector is constructed using a back surface reflection on the TFT array substrate 10 or a liquid crystal device as a light valve, light emitted from other liquid crystal devices and penetrating through a synthetic optical system such as a prism is used. Also for the return light, the channel region 1a can be shielded from the lower layer side by the scanning line 11a.

(Second layer configuration-TFT, etc.)
The second layer is composed of the TFT 30. The TFT 30 has an LDD (Lightly Doped Drain) structure, for example, and includes a gate electrode 3a, a semiconductor layer 1a, and an insulating film 2 including a gate insulating film that insulates the gate electrode 3a from the semiconductor layer 1a. The gate electrode 3a is made of, for example, conductive polysilicon. The semiconductor layer 1a is made of, for example, polysilicon, and includes a channel region 1a ′, a low concentration source region 1b and a low concentration drain region 1c, and a high concentration source region 1d and a high concentration drain region 1e. The TFT 30 preferably has an LDD structure. However, the TFT 30 may have an offset structure in which no impurity is implanted into the low concentration source region 1b and the low concentration drain region 1c. It may be a self-aligned type in which a high concentration source region and a high concentration drain region are formed by implanting the film.

  The gate electrode 3a of the TFT 30 is electrically connected to the scanning line 11a through a contact hole 12cv formed in the base insulating film 12 in a part 3b thereof. The base insulating film 12 is made of, for example, a silicon oxide film, and is formed on the entire surface of the TFT array substrate 10 in addition to the interlayer insulating function between the first layer and the second layer. Has a function of preventing changes in the element characteristics of the TFT 30 caused by the above. The TFT 30 according to the present embodiment is a top gate type, but may be a bottom gate type.

(3rd layer configuration-data lines, etc.)
The third layer is composed of a data line 6a and a relay layer 600.

  The data line 6a is formed as a three-layer film of aluminum, titanium nitride, and silicon nitride in order from the bottom. The data line 6 a is formed so as to partially cover the channel region 1 a ′ of the TFT 30. For this reason, the channel region 1a ′ of the TFT 30 can be shielded against incident light from the upper layer side by the data line 6a that can be disposed close to the channel region 1a ′. The data line 6 a is electrically connected to the high concentration source region 1 d of the TFT 30 through a contact hole 81 that penetrates the first interlayer insulating film 41.

  The relay layer 600 is formed as the same film as the data line 6a. As shown in FIG. 4, the relay layer 600 and the data line 6a are formed so as to be separated from each other. The relay layer 600 is electrically connected to the high-concentration drain region 1 e of the TFT 30 through a contact hole 83 that penetrates the first interlayer insulating film 41.

  The first interlayer insulating film 41 is made of, for example, NSG (non-silicate glass). In addition, for the first interlayer insulating film 41, silicate glass such as PSG (phosphorus silicate glass), BSG (boron silicate glass), BPSG (boron phosphorus silicate glass), silicon nitride, silicon oxide, or the like can be used.

(Fourth layer configuration-holding capacity, etc.)
The fourth layer is composed of a storage capacitor 70. The storage capacitor 70 has a configuration in which a capacitor electrode 300 and a lower electrode 71 are disposed to face each other with a dielectric film 75 interposed therebetween. The capacitor electrode 300 is electrically connected to the capacitor wiring 400 and is maintained at a fixed potential. The extending portion of the lower electrode 71 is electrically connected to the relay layer 600 through a contact hole 84 penetrating the protective film 65 and the second interlayer insulating film 42 formed of a SiN film.

  For example, the capacitor electrode 300 and the lower electrode 71 are formed by laminating a single metal containing at least one of metals such as Al, Ti, Cr, W, Ta, and Mo, an alloy, a metal silicide, a polysilicide, and a nitride. Consists of things. For this reason, the channel region 1a ′ of the TFT 30 can be more reliably shielded from incident light from the upper layer side by the storage capacitor 70 that can be disposed close to the data line 6a via the interlayer insulating film 42. That is, each of the capacitor electrode 300 and the lower electrode 71 functions as a light shielding film that shields the TFT 30.

  The protective film 65 is formed on the surface of the planarized interlayer insulating film 42. Therefore, even when the interlayer insulating film 42 that is uneven due to the foreign matter is planarized, for example, the data line 6a exposed from the interlayer insulating film 42 and the lower electrode 71 functioning as a light shielding film are short-circuited. This can prevent the decrease in yield when the liquid crystal device 1 is manufactured. In addition, according to the protective film 65, the intrusion of foreign matters such as moisture can be reduced, so that the characteristic deterioration of the TFT 30 due to the foreign matters can be reduced.

As shown in FIG. 5, the dielectric film 75 is formed in a non-opening region located in the gap between the opening regions for each pixel when viewed in plan on the TFT array substrate 10. That is, the dielectric film 75 is hardly formed in the opening region. Therefore, even if the dielectric film 75 is an opaque film, it is not necessary to reduce the transmittance in the opening region. Therefore, the dielectric film 75 is formed of a silicon nitride film or the like having a high dielectric constant without considering the transmittance. For this reason, the dielectric film 75 can also function as a film for preventing moisture and moisture, and can also improve water resistance and moisture resistance. In addition to the silicon nitride film, for example, a single layer film or a multilayer film such as hafnium oxide (HfO ₂ ), alumina (Al ₂ O ₃ ), tantalum oxide (Ta ₂ O ₅ ), or the like is used as the dielectric film. Also good.

(Fifth layer configuration-pixel electrode, etc.)
A third interlayer insulating film 43 is formed on the entire surface of the fourth layer, and a pixel electrode 9a is formed thereon as a fifth layer. The third interlayer insulating film 43 is made of, for example, NSG. In addition, the third interlayer insulating film 43 can be made of silicate glass such as PSG, BSG, or BPSG, silicon nitride, silicon oxide, or the like. The surface of the third interlayer insulating film 43 is subjected to a planarization process such as CMP similarly to the second interlayer insulating film 42.

  The pixel electrode 9a (the outline is indicated by a broken line 9a 'in FIG. 5) is arranged in each of the pixel areas that are partitioned and arranged vertically and horizontally, and the data lines 6a and the scanning lines 11a are arranged in a grid pattern at the boundaries. (See FIGS. 4 and 5). The pixel electrode 9a is made of a transparent conductive film such as ITO (Indium Tin Oxide).

  The pixel electrode 9a is electrically connected to the extending portion of the lower electrode 71 through a contact hole 85 that penetrates the interlayer insulating film 43 (see FIG. 7). Therefore, the potential of the lower electrode 71 is a pixel potential.

  Further, as described above, the extending portion of the lower electrode 71 and the relay layer 600 are electrically connected to the relay layer 600 and the high-concentration drain region 1e of the TFT 30 through the contact holes 84 and 83, respectively. . That is, the pixel electrode 9a and the high-concentration drain region 1e of the TFT 30 are relay-connected through the relay layer 600 and the extended portion of the lower electrode 71. Accordingly, it is possible to avoid a situation in which it is difficult to connect the pixel electrode and the drain with a single contact hole due to a long interlayer distance. In addition, the laminated structure and the manufacturing process are not complicated. An alignment film 16 that has been subjected to a predetermined alignment process such as a rubbing process is provided above the pixel electrode 9a. The above is the configuration of the pixel portion on the TFT array substrate 10 side.

  On the other hand, the counter substrate 20 is provided with a counter electrode 21 on the entire surface of the counter substrate 20, and an alignment film 22 is further provided thereon (under the counter electrode 21 in FIG. 7). As with the pixel electrode 9a, the counter electrode 21 is made of a transparent conductive film such as an ITO film. A light-shielding film 23 is provided between the counter substrate 20 and the counter electrode 21 so as to cover at least a region facing the TFT 30 in order to prevent generation of light leakage current in the TFT 30.

  A liquid crystal layer 50 is provided between the TFT array substrate 10 thus configured and the counter substrate 20. The liquid crystal layer 50 is formed by sealing liquid crystal in a space formed by sealing the peripheral portions of the substrates 10 and 20 with a sealing material. The liquid crystal layer 50 takes a predetermined alignment state by the alignment film 16 and the alignment film 22 that have been subjected to an alignment process such as a rubbing process in a state where an electric field is not applied between the pixel electrode 9 a and the counter electrode 21. It is like that.

  The configuration of the pixel portion described above is common to each pixel portion as shown in FIGS. Such pixel portions are periodically formed in the image display region 10a (see FIG. 1). On the other hand, in such a liquid crystal device 1, as described with reference to FIGS. 1 and 2, the scanning line driving circuit 104, the data line driving circuit 101, and the like are provided in the peripheral area located around the image display area 10 a. A drive circuit is formed.

  The light shielding film 71 a shown in FIGS. 1 and 2 is formed as the same film on the TFT array substrate 10 in the same layer as the lower electrode 71. Therefore, according to the light shielding film 71a, the data line driving circuit 101 and the sampling circuit 7 can be shielded in the peripheral region extending around the image display region 10a, and the light leakage current generated in these circuits can be reduced. The light shielding film 71a does not have to be formed in the same layer as the lower electrode 71, and is formed as the same film in the same layer as the capacitor electrode 300 in the peripheral region extending around the image display region 10a. May be.

<2: Manufacturing method of electro-optical device>
Next, a method for manufacturing the electro-optical device according to the present embodiment will be described with reference to FIGS. 8 to 10 are process cross-sectional views sequentially showing main processes of the method for manufacturing the electro-optical device according to the present embodiment. For the sake of simplicity, FIGS. 8 to 10 show cross sections near the TFT 430 included in the data line driving circuit 101 in the peripheral circuit portion provided in the peripheral region on the TFT array substrate 10. .

As shown in FIG. 8A, the data line 6a and the relay line 600 are formed in the image display area of the TFT array substrate 10, and the source line 406a and the drain line 4600 are formed in the peripheral area. More specifically, the lower light-shielding film 411a, the TFT 430, the source line 406a, and the drain line 4600 are formed in the peripheral region. The lower light-shielding film 411a is formed as the same film on the TFT array substrate 10 in the same layer as the scanning line 11a. T
The FT 430 has, for example, the same configuration as that of the TFT 30 and includes a gate electrode 403a and a semiconductor layer 401a. The gate electrode 403a and the semiconductor layer 401a are formed as the same film in the same layer as the gate electrode 3a and the semiconductor layer 1a. The semiconductor layer 1a includes a channel region 401a ′, a low concentration source region 401b and a low concentration drain region 401c, and a high concentration source region 401d and a high concentration drain region 401e. Therefore, the TFT 430 can be formed by a process common to the process of forming the TFT 30. The source line 406a is electrically connected to the low concentration source region 401b through the contact hole 481. The drain line 4600 is electrically connected to the low concentration drain region 401e through the contact hole 483.

  Next, as shown in FIG. 8B, an interlayer insulating film 42 is formed over the peripheral region and the image display region, and the interlayer insulating film 42 is planarized by CMP. Therefore, the surface of the interlayer insulating film 42 is flattened in each of the image display region and the peripheral region.

  Next, as shown in FIG. 9C, a protective film 65 is formed on the surface of the interlayer insulating film 42 from the image display region to the peripheral region. The protective film 65 is, for example, a SiN film formed using a general-purpose film forming method. Since the protective film 65 is formed on the planarized interlayer insulating film 42, the protective film 65 is also formed flat. Therefore, for example, the flatness of the alignment film formed on the upper layer side of the protective film 65 is improved, and a high-quality image can be displayed. Further, by forming a SiN film as the protective film 65, it is possible to reduce the intrusion of foreign substances such as moisture from the upper layer side to the lower layer side of the protective film 65. According to such a protective film 65, the characteristic deterioration of the TFT 30 can be reduced in the image display region. In addition, according to the protective film 65a described later, it is possible to reduce deterioration of characteristics of the TFT 430 formed on the lower layer side of the protective film 65a in the peripheral region, and to maintain the display performance of the electro-optical device for a long period of time. It is also possible to increase the reliability of the device.

  Next, as shown in FIG. 9D, a conductive film 71 ′ is formed from the image display region to the peripheral region. The conductive film 71 ′ is a light-shielding conductive film such as a metal film of Al or the like, and is patterned into a predetermined shape in a subsequent process, whereby the lower electrode 71 is formed in the image display region and the light shielding is performed in the peripheral region. The film 71a is formed. The conductive film 71 ′ is formed using a general-purpose thin film forming method such as a general-purpose sputtering method or a vapor deposition method. The contact hole 84 is formed by partially removing the protective film 65 and the interlayer insulating film 42. A conductive film 71 ′ extends on the inner wall of the contact hole 84, and the conductive film 71 ′ is electrically connected to the relay wiring 600.

  As shown in FIG. 9D, according to the protective film 65, for example, the data line 6 a and the source line 406 a are exposed on the surface of the interlayer insulating film 42 by the planarization process of the interlayer insulating film 42. However, it is possible to prevent the data line 6a and the source line 406a from being short-circuited with a portion (for example, the lower electrode 71 or the light shielding film 71a described later) formed on the upper layer side of the interlayer insulating film 42.

  Next, as shown in FIG. 10, the conductive film 71 ′ and the protective film 65 are patterned into a predetermined shape. More specifically, in the image display region, the lower electrode 71 having the planar pattern shown in FIG. 5 is formed by patterning the conductive film 71 ′. In the peripheral region, the protective film 65 and the conductive film 71 ′ are simultaneously patterned to form the protective film 65 a and the light shielding film 71 a so as to overlap the TFT 430. According to such a light shielding film 71a, light leakage current generated in the TFT 430 can be reduced. In addition, since the protective film 65a protects the TFT 430, deterioration of characteristics of the TFT 430 due to foreign matters such as moisture can be suppressed, and the life of the data line driving circuit 101 and the like can be extended. Further, in the peripheral region, the light shielding film 71a and the protective film 65a can be patterned more specifically by a common patterning process. More specifically, compared to the case where the light shielding film 71a and the protective film 65a are individually formed in the peripheral region. There is an advantage that the manufacturing process of the liquid crystal device 1 can be simplified.

  Subsequently, by building a predetermined structure on the lower electrode 71 and the light shielding film 71a, the laminated structure on the TFT array substrate 10 side shown in FIGS. 2 to 7 is formed.

  As described above, according to the method of manufacturing the electro-optical device according to the present embodiment, it is possible to prevent problems such as a short circuit that may occur with the planarization of the interlayer insulating film 42, and thus the yield of the liquid crystal device 1. Reduction can be suppressed. In addition, since it is possible to prevent deterioration of characteristics and lifetime of peripheral circuits provided in the peripheral region on the TFT array substrate 10, the liquid crystal device 1 having high display performance can be manufactured.

<3: Electronic equipment>
Next, a projector as an example in which the above-described liquid crystal device is applied to various electronic devices will be described with reference to FIG. The above-described liquid crystal device is used as a light valve for a projector. FIG. 11 is a plan view showing a configuration example of the projector. As shown in FIG. 11, a lamp unit 1102 including a white light source such as a halogen lamp is provided inside the projector 1100. The projection light emitted from the lamp unit 1102 is separated into three primary colors of RGB by four mirrors 1106 and two dichroic mirrors 1108 arranged in the light guide 1104, and serves as a light valve corresponding to each primary color. The light enters the liquid crystal panels 1110R, 1110B, and 1110G.

  The configurations of the liquid crystal panels 1110R, 1110B, and 1110G have the same configuration as that of the above-described liquid crystal device, and are driven by R, G, and B primary color signals supplied from the image signal processing circuit, respectively. The light modulated by these liquid crystal panels enters the dichroic prism 1112 from three directions. In this dichroic prism 1112, R and B light is refracted at 90 degrees, while G light travels straight. Accordingly, as a result of the synthesis of the images of the respective colors, a color image is projected onto the screen or the like via the projection lens 1114.

  Here, paying attention to the display images by the liquid crystal panels 1110R, 1110B, and 1110G, the display image by the liquid crystal panel 1110G needs to be horizontally reversed with respect to the display images by the liquid crystal panels 1110R, 1110B.

  Note that since light corresponding to the primary colors R, G, and B is incident on the liquid crystal panels 1110R, 1110B, and 1110G by the dichroic mirror 1108, it is not necessary to provide a color filter.

  Such a projector 1100 includes the liquid crystal panels 1110R, 1110B, and 1110G, and therefore can display a high-quality image. In addition, the projector 1100 has high reliability.

1 is a plan view illustrating a configuration of an electro-optical device according to an embodiment. It is the II-II 'sectional view taken on the line of FIG. FIG. 6 is an equivalent circuit diagram of various elements, wirings, and the like in a pixel portion formed in an image display area of the electro-optical device according to the embodiment. It is a figure which shows a lower layer part among the laminated structure of the electro-optical apparatus which concerns on this embodiment. It is a figure which shows the upper layer part among the laminated structures of the electro-optical apparatus concerning this embodiment. FIG. 6 is an enlarged view in which FIGS. 4 and 5 are superimposed. FIG. 7 is a cross-sectional view taken along line VII-VII ′ in each of FIGS. 4 and 5. FIG. 6 is a process cross-sectional view (part 1) illustrating the main processes of the method of manufacturing the electro-optical device according to the embodiment in order. FIG. 10 is a process cross-sectional view (part 2) illustrating the main processes of the method for manufacturing the electro-optical device according to the embodiment in order. FIG. 11 is a process cross-sectional view (part 3) illustrating the main processes of the method of manufacturing the electro-optical device according to the embodiment in order. It is sectional drawing showing the structure of the liquid crystal projector which concerns on one Embodiment of the electronic device which concerns on this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Liquid crystal device, 7 ... Sampling circuit, 10 ... TFT array substrate, 20 ... Counter substrate, 65, 65a protective film, 42 ... Interlayer insulation film, 71 ... Lower electrode, 71a ... light-shielding film, 101 ... data line driving circuit, 104 ... scanning line driving circuit

Claims (6)

A planarization step of planarizing an insulating film formed over a display region on the substrate and a peripheral region located around the display region on the substrate;
A protective film forming step of forming a protective film on the surface of the insulating film;
A light-shielding film step of forming a light-shielding film on the surface of the protective film to shield the lower layer side of the protective film;
A patterning step of patterning each of the protective film and the light-shielding film into a predetermined shape by a common patterning process. Prior to the planarization step, comprising a step of forming a peripheral circuit portion for driving a plurality of pixel portions to be formed in the display region,
2. The method of manufacturing an electro-optical device according to claim 1, wherein in the patterning step, the protection film and the light shielding film are patterned so as to overlap the peripheral circuit portion. A substrate,
A plurality of pixel portions formed in a display region on the substrate;
An insulating film formed in a peripheral region located on the periphery of the display region on the substrate and subjected to planarization;
In the peripheral region, a protective film formed on the surface of the insulating film;
An electro-optical device comprising: a light-shielding film that is formed on a surface of the protective film and shields a lower layer side of the protective film. A peripheral circuit section provided in the peripheral area, for supplying various signals for driving the pixel section to the pixel section;
4. The electro-optical device according to claim 3, wherein each of the protective film and the light shielding film is patterned into a predetermined shape by a common patterning process so as to overlap the peripheral circuit portion. The electro-optical device according to claim 3, wherein the protective film is a SiN film. An electronic apparatus comprising the electro-optical device according to any one of claims 3 to 5.

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