JP2008017264A - Pon multiplex relay system, pon multiplex relay device to be used for the same and its network synchronization method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To avoid the collision of an uplink signal from each terminal equipment while accurately achieving network synchronization even in a PON multiplex relay system in which a plurality of PONs are relayed by a multiplex relay device whose transmission speed is much higher. <P>SOLUTION: This PON multiplex relay device is configured of a pair of multiplex relay units 2U and 2D connected to each other by one high speed line 1, and interposed between a plurality of PON station side devices 3 and optical fiber networks 5 in P2MP mode. The local side relay unit 2U to which each of the plurality of PON station side devices 3 is connected between the pair of multiplex relay units 2U and 2D is configured to transmit a downlink high speed signal with which a downlink signal from the station side device 3 is multiplexed to the high speed line 1, and the subscriber's relay unit 2D connected to the plurality of PON optical fiber networks 5 is configured to transmit an uplink high speed signal with which an uplink signal from each terminal equipment 7 included in the optical fiber networks 5 is multiplexed to the high speed line 1, and the station side relay unit 2U inserts a time stamp measured by a reproduction clock reproduced from the downlink signal from each of the plurality of PON station side devices 3 into the downlink high speed signal of the high speed line 1. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a PON multiple relay system in which a plurality of PONs are further time-division multiplexed and relayed to one high-speed transmission path in a TDM-PON in which a station side device and a plurality of terminal devices communicate with each other in a time division multiplex system. More specifically, the present invention relates to a network synchronization method in the multiple relay system.

A PON system (Passive Optical Network System) is a P2MP (P2MP) in which one station side device (OLT: Optical Line Terminal) and a plurality of user terminal devices (ONU: Optical Network Unit) are connected via a passive element such as an optical coupler. Point To Multipoint) type optical fiber network system. Among these PON systems, GE-PON (Gigabit Ethernet-PON) is an economical implementation of a gigabit class transmission system based on Ethernet (registered trademark) technology. It was established as IEEE 802.3ah ^TM in 2004. This is one of the high-speed optical access methods standardized in June.

  In the PON system described above, a TDM (Time Division Multiplexing) method for aligning and transmitting signals for each terminal device is used for the downlink signal transmitted from the station side device to each terminal device. For uplink signals transmitted to the apparatus, a TDMA (Time Division Multiple Access) system is employed in which optical signals are transmitted at correct timing so that the signals do not collide with each other. In order to accurately perform the signal transmission timing in the TDMA system, it is necessary that the clock of the terminal device and the clock of the station side device are accurately synchronized.

For this reason, for example, in the standard based on the IEEE 802.3ah ^TM , the station side device counts the local clock to generate a clock of the station side device (hereinafter referred to as a PON counter), and the transmission clock of the PON downstream signal is the local clock. It is specified that the PON control frame transmitted to the terminal device is synchronized with the clock and the value of the PON counter at the time of transmission is described as a time stamp (hereinafter sometimes abbreviated as TS).
Also, as a terminal device, the local clock is synchronized with the clock included in the PON reception signal, the local clock is counted to generate the PON counter of the terminal device, and when the PON control frame is received, Update the PON counter with the indicated time stamp value, transmission permission is indicated by the value of the PON counter, and the terminal device transmits to the PON when its own PON counter is within the specified range, at this time Is synchronized with a local clock (see Non-Patent Document 1).

The PON system is first introduced in a densely populated area where stations and users can be connected with an optical fiber of 20 km or less, but in the future, it will be necessary to expand to suburbs and depopulated areas. For this purpose, it is desirable to increase the distance between the station side device and the user and to perform another level of multiplexing.
However, it is difficult to add an optical coupler to form a multistage configuration because the optical power becomes weak. Therefore, in order to respond to such requests for lengthening and multiplexing, there is a need for a relay device that multiplexes and relays a plurality of PON lines at a large source. As a multiplex relay apparatus that is not limited to PON applications, there are generally a WDM system and a TDM system, and the latter has an advantage in that the number of multiplexing is limited compared to the former but is economical.

For example, as an example of the latter, there has been proposed an Ethernet multiplex relay apparatus that performs time division multiplexing and transmission / reception of parallel data allocated to a plurality of Gigabit Ethernet line ports on a high-speed line (see Patent Document 1).
Further, as an example of the high-speed line, there is a 10 Gigabit Ethernet communication method having an information rate of 10 Gbps, which is 10 times that of Gigabit Ethernet, for example, and this communication method is standardized as IEEE 802.3ae ^TM (see Non-Patent Document 2). ). Note that the encoding system in this standard is based on 64b / 66b.
IEEE Std 802.3ah (TM) -2004 (64.Multipoint MAC Control) IEEE Std 802.3ae (TM) -2002 JP 2003-32259 A

  As described above, in a TDMA PON system, clock synchronization is performed between a station-side device and a plurality of terminal devices so that uplink signals transmitted from the terminal devices do not collide with each other and are densely time-division multiplexed. (Network synchronization) needs to be achieved. For this reason, the local clocks of the station side device and the plurality of terminal devices are synchronized with each other by the terminal device corresponding to the station side device using the clock component (time stamp) included in the signal transmitted by the station side device in the downlink direction. This is done by synchronizing playback.

  However, as in Patent Document 1, in order to further extend the length of the PON system, a system configuration in which multiple relay devices having a higher transmission speed are interposed between a plurality of PON station-side devices and an optical fiber network is used. In this case, since one high-speed line having a different transmission rate is used, the synchronization between the downlink signal transmitted from the station side apparatus and the downlink signal input to the terminal apparatus cannot be established on all PON lines. For this reason, it is impossible to synchronize the local clocks of the station side device and the terminal device. As a result, there is a possibility that the uplink signals transmitted from the terminal devices collide.

  In view of such a situation, the present invention provides an upstream signal from each terminal device so that network synchronization can be accurately achieved even in a PON multiple relay system in which a plurality of PONs are relayed by a multiple relay device having a higher transmission speed. The aim is to avoid collisions.

  The present invention is a PON multiplex repeater comprising a pair of multiplex repeaters connected to each other by a single high-speed line and interposed between a plurality of PON station side devices in the P2MP form and an optical fiber network. Of the pair of multiple repeaters, the station-side repeater to which the station-side devices of the plurality of PONs are connected can transmit a downlink high-speed signal obtained by multiplexing the downlink signal from the station-side device to the high-speed line. Yes, the home-side repeater connected to the optical fiber network of the plurality of PONs can transmit an upstream high-speed signal obtained by multiplexing the upstream signal from each terminal device included in the optical fiber network to the high-speed line, The station-side repeater inserts a time stamp measured with a recovered clock reproduced from a downlink signal from each station-side device of the plurality of PONs into a downlink high-speed signal of the high-speed line.

According to the present invention, the station-side repeater inserts the time stamp measured with the recovered clock reproduced from the downlink signal from each station-side device of a plurality of PONs into the downlink high-speed signal on the high-speed line. In the home-side repeater, the local clock is synchronized with the regenerated clock in the station-side repeater based on the time stamp included in the downlink high-speed signal of the high-speed line, and the terminal device is based on the synchronized local clock. By generating the downlink signal, it is possible to accurately synchronize the downlink signal transmitted from each station side device and the downlink signal input to the terminal device corresponding to the station side device.
Therefore, even in a system configuration in which a plurality of PONs are relayed by a higher-speed multiple relay device, network synchronization can be achieved by matching the local clocks of the station side device and the terminal device.

In the PON multiplex repeater of the present invention, the station-side repeater and the home-side repeater employ a plurality of lanes that separate the high-speed line uplink high-speed signal and the downlink high-speed signal in parallel, It is preferable to fix the correspondence between a plurality of PON lines and the plurality of lanes.
In this case, it is not necessary to provide special means (for example, the comma conversion circuit described in Patent Document 1) for identifying and demultiplexing which PON line the signal entering the repeater is, and the system Can be configured at a lower cost.

For example, as shown in an embodiment described later, when each PON is a GE-PON having a transmission speed of 1.25 Gbps, when 10 GB Ethernet having an information communication speed of 10 Gbps is adopted as a high-speed line, eight PONs are used. The GE-PON line can be multiplex-relayed with almost no transmission code and without waste.
In this case, the pair of multiple repeaters constituting the PON multiple relay system restores the block stream represented by the PON received signal assigned to each of the plurality of PON line ports, and multiplexes the plurality of block streams onto the high-speed line. The block stream separated on the receiving side is transmitted to each PON line port as a PON transmission signal.
In this case, the network synchronization method inserts a time stamp for network synchronization in each PON into the block stream before multiplexing, and configures the PON based on the time stamp included in the block stream after separation. This can be done by adjusting the timing of the transmission signal to each terminal device.

  As described above, according to the present invention, even in a PON multiple relay system in which a plurality of PONs are relayed by a multiple relay apparatus having a higher transmission speed, network synchronization is achieved by matching the local clocks of the station side apparatus and the terminal apparatus. Therefore, it is possible to avoid collision of uplink signals from each terminal device.

FIG. 1 shows an embodiment of a PON multiple relay system according to the present invention.
As shown in the figure, the PON multiplex repeater system of this embodiment is a multiplex repeater comprising one high-speed line 1 made of an optical fiber and a pair of multiplex repeaters 2U and 2D connected to each other via the high-speed line 1. 2 and a plurality of station-side devices 3 (hereinafter sometimes referred to as OLT (i)), a station-side device group 4 and a plurality of optical fibers constituting a PON corresponding to each station-side device 3 And a network 5 (hereinafter sometimes referred to as FN (i)).

The multiplex repeater 2 is interposed between a plurality of PON station-side devices 3 having a P2MP configuration and a corresponding optical fiber network 5, and each optical fiber network of the present embodiment shown in FIG. 5 is configured by connecting a terminal unit (ONU) 7 to the ends of a plurality of optical fibers (branches) branched from the optical coupler 6.
The station side device group 4 has a configuration in which a plurality of OLTs (i) are accommodated therein, and in the illustrated example, a configuration example including at least 8 OLTs (i) (i = 1 ·· 8) is depicted. ing.

  Each OLT (i) of the station side apparatus group 4 is connected to a station side repeater U via an optical fiber (PON line) 8, and this repeater U is the high-speed line 1 made of a single optical fiber. To the home-side repeater D. A plurality of optical fiber networks 5 (FN (i)) are connected to the home-side repeater D via optical fibers (PON lines) 8. In the illustrated example, the same number of 8 FNs as OLT (i). A configuration example in which (i) is connected to the home-side repeater D is depicted.

  Each OLT (i) constituting the station side device group 4 has one interface to the higher level network and one interface to the PON. Of the FN (i) of the eight PONs, FN (1) is a passive optical network configured in a star or tree shape by the optical coupler 6, and the terminal device 7 is connected to each end of the network. Has been. Each terminal device 7 has an interface to the user network. The other FN (i) (i = 2 ·· 8) is the same as in the case of FN (1).

Here, conventionally, OLT (i) and FN (i) are individually directly connected by one optical fiber 8 to constitute one PON system. However, in this embodiment, a plurality of OLTs (i ) (I = 1 ·· 8) and FN (i) (i = 1 ·· 8) are connected to each other by a single high-speed line 1 that is faster than the PON line 8 and the home-side repeater 2U The relay device 2D is connected via the multiple relay device 2.
As a connection configuration different from that shown in FIG. 1, an optical coupler may be arranged between the OLT (i) and the station-side repeater U and a branch line branched by the optical coupler may be relayed.
In the present embodiment, the PON line 8 is a Gigabit Ethernet PON (so-called GE-PON), and the high-speed line 1 is 10 Gigabit Ethernet (10GE).

FIG. 2 is a block diagram showing the internal configuration of the station-side repeater U and the home-side repeater D.
However, in the home side repeater D, the “PON side reference clock” shown in FIG. 2 is not necessary.
In FIG. 2, the optical transceiver 11 is a 10GE transceiver having an XAUI interface, which is commercially available, for example, as a XENPAC transceiver. Of the components of the optical transceiver 11, XGXS is a device that converts XAUI and XGMII, which is also commercially available.

Here, the XAUI is configured by bundling four 312.5 Mbps serial transmissions, and each serial stream is encoded with 8B10B. On the other hand, XGMII is a double rate 32-bit parallel transmission based on a clock of 156.25 MHz. XGMII is divided into 8-bit units, and this division is called a lane.
In FIG. 2, a pair of XGMS via the XAUI can be omitted. In this case, the PCS of the optical transceiver and the interface module of each lane are connected via XGMII.

A code called 64b / 66b is adopted in 10GE PCS, and 64-bit information sent by two transmissions in XGMII is associated with one 66-bit code. That is, the XGMII 32-bit stream on the transmission side is reproduced as it is as the XGMII stream on the reception side.
In this embodiment, the PON-IF units (1) and (2) in lane 0 create an XGMII start symbol as an initial operation. Thereafter, the stream is transmitted as an infinite frame of 10GE.
In this embodiment, the PON-IF unit (i) is arranged on the PON line (i), and two PON-IF units (1) and (2) are combined to form one interface module, and the XGMII Is associated with one lane.

  For example, in FIG. 2, the 4-bit signal output from the PON-IF unit (1) and the 4-bit signal output from the PON-IF unit (2) are respectively converted into predetermined 4-bits of the XGMII 8-bit signal. It corresponds. The lane 0 signal in the reverse direction of XGMII is divided into two 4-bit signals and input to the PON-IF units (1) and (2), respectively. That is, 4-bit parallel transmission of 312.5 MHz is realized between the PON-IF unit (i) pair of the station-side repeater U and the home-side repeater D.

3 and 4 show a first embodiment of the PON-IF unit. Among these, FIG. 3 shows a configuration of the PON-IF unit in the station-side repeater U.
In FIG. 3, a 4-bit word (156.25 MHz double rate) signal sent from the multiplexing unit is converted into a 10-bit word (125 MHz) signal by the word conversion unit 12 according to the 8B10B code delimiter. 8B and 10B are decoded and temporarily stored in the elastic buffer 13 as a 10-bit stream (corresponding to GMII) to which control information such as a frame break is added.

The stream extracted from the elastic buffer 13 is parallel-serial converted (SER) after 8B10B encoding (PCS) by the serializer 14 and further converted into an optical signal by the PON transmitter 15.
This optical signal is bidirectionally multiplexed by the WDM filter 16 and then transmitted to the PON side. As shown in FIG. 3, the operation after the output of the elastic buffer 13 operates based on a clock P (described later).

  On the other hand, the optical signal sent from the PON side is separated from the transmission light by the WDM filter 16 and sent to the PON receiver 17. The PON receiver 17 converts an optical signal into a binary electric signal and sends it to a CDR (Clock Data Recovery) 18. The CDR 18 regenerates a clock and data from the electric signal. These clocks and data are sent to the deserializer 19, where 10-bit parallel conversion of the data, alignment to 10B code (DES), and 8B10B decoding (PCS) are performed, and control information such as frame delimiters is added. The 10-bit stream (corresponding to GMII) is temporarily stored in the elastic buffer 20.

The stream extracted from the elastic buffer 20 passes through the time stamp insertion unit 21, is further converted into a 4-bit word (156.25 MHz double rate) signal by the word conversion unit 22, and is then sent to the multiplexing unit.
After the output of the elastic buffer 20, it operates in synchronization with the high-speed line side reference clock T (156.25 MHz). The word conversion unit 22 generates a 10B clock (125 MHz) synchronized with a 10-bit word based on the clock, and supplies this clock to the elastic buffer 20, the time stamp insertion unit 21, and the counter 0.

The counter 0 counts the clock and outputs it to the frequency management unit 23. Further, the counter I counts the clock P of the code rate (125 MHz) restored by the DES of the serializer 19 and outputs it to the frequency management unit 23. The value of the counter I is sent to the time stamp insertion unit 21 via the frequency management unit 23. The time stamp insertion unit 21 performs 8B10B encoding on the passing stream.
As will be described in detail later, at this time, in the frame preample, two octets before the LLID (Logical Link ID) are replaced with the value of the counter I when the octet passes (see FIG. 8B).

Further, when the gap between frames persists, the time stamp insertion unit 21 replaces two idle sequences (I2) with time stamp sequences at a predetermined timing (see FIG. 8B). As the time stamp sequence, the first two codes indicate a time stamp sequence, such as / Cl /, and the next two codes indicate the time stamp value when the code passes as in the case of the preamble. .
However, regarding the method of inserting time stamp information, these are merely examples, and the present invention is not limited to these examples.

  Here, the elastic buffers 13 and 20 are for absorbing a clock difference between input and output. The clock difference is adjusted by shortening / extending the gap between frames to prevent overrun and underrun while the frame data passes. In order to prevent underrun when the clock on the exit side is fast, when a new frame arrives, a method of storing data to some extent in the elastic buffers 13 and 20 and outputting it is common.

  On the other hand, the frequency management unit 23 optimally controls the output timing of the elastic buffer 23 by tracing the difference between the counter I and the counter 0. That is, when the frequency measured by the counter 0 is slower than the frequency measured by the counter I, the frame is output as soon as it is input to the elastic buffer 20. Otherwise, even if the longest frame passes, the data is accumulated and output without being underrun.

Next, FIG. 4 shows the configuration of the PON-IF unit in the home-side repeater D.
In FIG. 4, the 4-bit word (156.25 MHz double rate) signal sent from the multiplexing unit is converted into a 10-bit word (125 MHz) signal by the word conversion unit 26 in accordance with the 8B10B code delimiter, and then the 8B10B decoding is performed. Then, it is sent to the time stamp extraction unit 27 as a 10-bit stream (corresponding to GMII) to which control information such as a frame delimiter is added.

The time stamp extraction unit 27 extracts the time stamp inserted in the station-side repeater U and outputs the time stamp to the frequency control unit 28. The signal obtained by restoring the original preamble or inter-frame gap is also sent to the elastic buffer 29. Send to.
The stream extracted after being temporarily stored in the elastic buffer 29 is subjected to parallel serial conversion (SER) after 8B10B encoding (PCS) in the serializer 30, and further converted into an optical signal in the PON transmitter 31. . This optical signal is bidirectionally multiplexed by the WDM filter 32 and then transmitted to the PON side.

  The output of the elastic buffer 29 and the SER of the serializer 30 operate based on a clock V output from a VCXO (voltage controlled crystal oscillator) 33. The VCXO 33 can control the frequency within a range of ± several hundred ppm around 125 MHz. The counter 0 counts the clock V and outputs it to the frequency control unit 28. The counter I counts a 125 MHz clock synchronized with the high-speed line side and outputs it to the same frequency control unit 28.

The frequency control unit 28 recognizes the difference between the counter 0 and the time stamp in the initial state, and controls the frequency of the VCXO 33 so that the difference becomes constant thereafter. At this time, since each time stamp includes a certain amount of fluctuation, control is not based on an instantaneous difference but based on a history for each predetermined time (for example, based on an average of a predetermined period). Is desirable.
Further, by tracing the difference between the counters 0 and I, the frequency control unit 28 optimally controls the output timing of the elastic buffer 29. The meaning of this optimum control is the same as that of the frequency management unit 23 of the PON-IF unit (i) for the station side repeater U shown in FIG.

  On the other hand, the optical signal sent from the PON side is separated from the transmission light by the WDM filter 32 and sent to the PON receiver 34. The PON receiver 34 converts the optical signal into a binary electrical signal and sends it to the CDR 35. The CDR 35 regenerates a clock and data from the electric signal. These clocks and data are sent to the deserializer 36, where 10-bit parallel conversion of the data, alignment to 10B codes (DES), and 8B10B decoding (PCS) are performed, and control information such as frame delimiters is added. The 10-bit stream (corresponding to GMII) is temporarily stored in the elastic buffer 37.

The stream taken out from the elastic buffer 37 is 8B10B-encoded by the word conversion unit 38, converted into a 4-bit word (156.25 MHz double rate) signal, and sent to the multiplexing unit.
After the output of the elastic buffer 38, it operates in synchronization with the high-speed line side reference clock T (156.25 MHz). Based on the clock T, the word conversion unit 38 generates a 10B clock (125 MHz) synchronized with the 10-bit word, and supplies this clock to the elastic buffer 37. Here, the meanings of the elastic buffers 29 and 37 are the same as those of the PON-IF unit for the station-side repeater U shown in FIG.

  According to the multiplex repeater 2 of the present embodiment having the above-described configuration, the time stamp measured by the station-side repeater 2U with the regenerated clock regenerated from the downstream signal (8B10B) from each station-side device 3 (OLT (i)). Is inserted into the downlink high-speed signal (64b / 66b) of the high-speed line 1, and the home-side repeater 2D converts its local clock into the station-side repeater 2U based on the time stamp included in the high-speed line 1 downlink high-speed signal. Since the downlink signal to the terminal device 7 is generated based on the synchronized local clock, the downlink signal transmitted from each station side device 3 and the station side device 2 The downlink signal input to the corresponding terminal device 7 can be accurately synchronized.

  Further, according to the multiplex repeater 2 of the present embodiment, as the station side repeater 2U and the home side repeater 2D, a plurality of lanes (in FIG. 2) for separating the upstream high speed signal and the downstream high speed signal of the high speed line 1 in parallel. In the example, the one having lane 0 to lane 3) is adopted, and the correspondence between the plurality of PON lines and the plurality of lanes is fixed. There is also an advantage that the system can be configured at a lower cost without providing a special means for identifying and demultiplexing the signal of the PON line.

5 to 7 show a second embodiment of the station side repeater U and the home side repeater D. FIG. 6 shows the PON-IF unit of the station-side repeater U, and FIG. 7 shows the PON-IF unit of the home-side repeater D.
In the first embodiment (FIGS. 2 to 4), a 32-bit word of XGMII is divided every 4 bits, and information of one port is communicated every word with the 4 bits (see FIG. 2). On the other hand, in the second embodiment, as shown in FIG. 5, a 32-bit word is divided into units of bytes, and information of two ports is alternately communicated with the one byte.

More specifically, in lane 0 shown in FIG. 5, the outputs of the PON-IF unit (1) and the PON-IF unit (2) are input to the MUX (0) 41. This MUX (0) 41 multiplexes the signal from the PON-IF unit (1) and the signal from the PON-IF unit (2) alternately so as to output the XGMII lane 0 signal (bits 0: 7). drive.
On the other hand, the lane 0 signal in the reverse direction of XGMII is input to DEMUX (0) 42, and this DEMUX (0) 42 converts the 8-bit signal of XGMII into the PON-IF unit (1) and the PON-IF unit (2). (Alternatively, the distribution method will be described later).

That is, transmission between the PON-IF unit (i) (i = 1..8) and MUX (j) or DEMUX (j) (j = 0..3) is a single rate based on a clock of 156.25 MHz. 8-bit parallel transmission. The same applies to lanes 1 to 3.
Therefore, the PON-IF unit shown in FIGS. 6 and 7 has the same configuration as the PON-IF unit shown in FIGS. 3 and 4 except that the number of bits and the speed of the interface with the multiplexing unit are different. Yes.
As an initial operation in this embodiment, MUX (0) in lane 0 creates an XGMII start symbol. Thereafter, the stream is transmitted as an infinite frame of 10GE.

Therefore, a method of separating the PON-IF unit (1) and the PON-IF unit (2) will be described by taking lane 0 shown in FIG. 5 as an example.
First, in the XGMII facing the station-side repeater U and the home-side repeater D, a 10-Gigabit Ethernet physical layer implementation that preserves double-rate clock edges and 64-bit code wrapping (ie, clock edge rising edge) In the implementation in which one unit of 64-bit code is interfaced at the next falling edge, 64-bit information interfaced at the falling edge of the clock edge and the next rising edge is not mapped to one code. ), The MUX (0) 41 and the DEMUX (0) 42 need only associate the PON-IF number with the clock edge.

For example, MUX (0) 41 outputs the information of the PON-IF unit (1) at the rising edge of the clock, outputs the information of the PON-IF unit (2) at the falling edge, and DEMUX (0) 42 outputs the clock. The information input at the rising edge is output to the PON-IF unit (1), and the information input at the falling edge is output to the PON-IF unit (2).
On the other hand, in the implementation of the 10-Gigabit Ethernet physical layer where the above assumption does not hold, the content of the main signal is viewed and distributed in DEMUX0. That is, an 8-bit stream input at the rising edge of the clock is divided into an 8-bit stream input at the falling edge, and the correspondence with the PON-IF unit is determined by looking at the contents of the stream.

In order to make this determination possible, for example, the code representing the time stamp sequence in FIG. 6 may be distinguished between the PON-IF unit (1) and the PON-IF unit (2).
When the DEMUX (0) 42 has the distribution means, means similar to the word conversion (T) 12 and 26 in FIGS. 6 and 7 are required for the DEMUX (0) 42. In order to avoid duplication of means and simplify the configuration, it is desirable to integrate the means into DEMUX (0) 42. In this case, in FIG. 5, the interface between DEMUX (0) and the PON-IF units (1) and (2) is 10-bit parallel transmission based on a 125 MHz clock.

As described above, there are variations in the method of mapping the information of each PON-IF unit to the XGMII interface.
The invention is not limited to the illustrated embodiments. In these embodiments, the word conversion unit applies the 8B10B code to the multiplexing unit side, but another code may be used.

FIG. 8A shows a block stream that flows in the downstream direction of the high-speed line 1 in the first embodiment (FIGS. 2 to 4) described above.
In FIG. 8 (a), for each of the GE-PON lines P1 to P8, the frame train input to the station side repeater U is output to the ports P1 to P8 of the home side repeater D in a substantially unchanged form. Is done. In the figure, I represents idle (inter-frame gap), P represents a preamble, and F represents frame data.

In the present embodiment, since the high-speed line 1 is 10 GE, the 64b66b block stream is transmitted as an infinite-length 10GE frame. The 64-bit data of each block has a fixed correspondence with P1-P8 every 4 bits, and the 4-bit data of P1-P8 is repeated twice to generate 64-bit data. Time division multiplexed. However, on the actual high-speed line 1, each 4-bit data in the 64-bit data is scrambled.
FIG. 8B shows data contents when the block stream of the high-speed line 1 is developed on the P1-P8 GE-PON logical lines. Here, time stamp (TS) information for each PON line is embedded in a predetermined position of the preamble P (in the example, two octets before the LLID (Logical Link ID)).

  Further, for example, when the inter-frame gap continues for a long time as in P8 in FIG. 8B, the idle sequence is replaced with the time stamp sequence at a predetermined timing. This time stamp sequence is composed of the first two octets indicating the start of the sequence (in the example, configuration C is used), followed by two octets of time stamp (TS) information.

In the second embodiment (FIGS. 5 to 7), in the case of a block stream flowing in the downstream direction of the high-speed line 1, 64-bit data of each block is GE-PON lines P1 to P8 every 8 bits. The 64-bit data is composed of a collection of 8-bit data P1 to P8. However, also in this case, each 8-bit data in the 64-bit data is scrambled on the actual high-speed line 1.
In these embodiments, multiple GE-PON lines are multiplexed and relayed by one 10GE line. The standard 10GE line uses two optical fibers according to directions as physical media, but the wavelength to be used may be divided according to the direction and may be multiplexed in one optical fiber. Further, by further wavelength multiplexing the plurality of 10GE lines, it is possible to multiplex and relay more GE-PON lines to one relay line. These are also included in the embodiments of the present invention.

It is a schematic block diagram of the PON multiple relay system based on this invention. It is a block diagram which shows the internal structure of the station side repeater of 1st embodiment, and a home side repeater. It is a block diagram which shows the structure of the PON-IF part in the station side repeater of 1st embodiment. It is a block diagram which shows the structure of the PON-IF part in the home side repeater of 1st embodiment. It is a block diagram which shows the internal structure of the station side repeater of 2nd embodiment, and a home side repeater. It is a block diagram which shows the structure of the PON-IF part in the station side repeater of 2nd embodiment. It is a block diagram which shows the structure of the PON-IF part in the home side repeater of 2nd embodiment. (A) is a frame diagram showing an example of a block stream of a high-speed line, and (b) is a frame diagram showing data contents when the block stream is developed on each logical line of GE-PON.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 High-speed line 2 Multiple repeater 2U Station side repeater 2D Home side repeater 3 Station side apparatus (OLT)
5 Optical fiber network 6 Optical coupler 7 Terminal device 8 Optical fiber (PON line)

Claims (5)

A PON multiplex repeater comprising a pair of multiplex repeaters connected to each other by a single high-speed line and interposed between a plurality of PON station-side devices in the P2MP form and an optical fiber network,
Of the pair of multiplex repeaters, the station-side repeater to which the station-side devices of the plurality of PONs are connected can transmit a downlink high-speed signal obtained by multiplexing downlink signals from the station-side device to the high-speed line. The home-side repeater connected to the optical fiber network of the plurality of PONs can transmit an upstream high-speed signal obtained by multiplexing the upstream signal from each terminal device included in the optical fiber network to the high-speed line,
The PON multiplex repeater, wherein the station-side repeater inserts a time stamp measured with a recovered clock regenerated from downlink signals from the station-side devices of the plurality of PONs into the downlink high-speed signal of the high-speed line.   The home-side repeater synchronizes its local clock with the recovered clock at the station-side repeater based on the time stamp included in the downlink high-speed signal of the high-speed line, and based on the synchronized local clock The PON multiple relay apparatus according to claim 1, wherein the PON multiple relay apparatus generates a downlink signal to the terminal apparatus.   The station-side repeater and the home-side repeater include a plurality of lanes for separating the upstream high-speed signal and the downstream high-speed signal of the high-speed line in parallel, and the plurality of PON lines and the plurality of lanes The PON multiple repeater according to claim 1 or 2, wherein the correspondence relationship is fixed. A station-side repeater to which a plurality of PON station-side devices in the P2MP form are respectively connected, a home-side repeater to which the plurality of PON optical fiber networks are respectively connected, and these repeaters are connected to each other A high-speed line that multiplexes a downlink signal from each station-side device and an uplink signal from each terminal device included in the optical fiber network, and outputs the high-speed signal as a downlink high-speed signal and an uplink high-speed signal. A PON multiple relay system for transmission to a line,
The station-side repeater inserts a time stamp measured with a regenerated clock reproduced from the downlink signal from each station-side device of the plurality of PONs into the downlink high-speed signal of the high-speed line,
The home-side repeater synchronizes its local clock with the recovered clock at the station-side repeater based on the time stamp included in the downlink high-speed signal of the high-speed line, and based on the synchronized local clock A PON multiple relay system, wherein a downlink signal to the terminal device is generated. A pair of multiple repeaters connected to each other via a single high-speed line, each of these multiple repeaters restores the block stream represented by the PON received signal assigned to each of the plurality of PON line ports, In a PON multiple relay system that multiplexes a block stream on the high-speed line, transmits and receives, and transmits the block stream separated on the receiving side as a PON transmission signal to each PON line port,
A time stamp for network synchronization at each PON is inserted into the block stream before multiplexing, and transmitted to each terminal device constituting the PON based on the time stamp included in the block stream after separation A network synchronization method in a PON multiple relay system, characterized by adjusting a signal timing.

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