JP2007313299A - Physiological data sensor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a physiological data sensor system capable of being replaced in a simple manner. <P>SOLUTION: The physiological data sensor has a pressure-sensitive adhesive tape having a pressure-sensitive adhesive surface provided with a pressure-sensitive adhesive material and a surface not provided with the pressure-sensitive adhesive material, a physiological data sensor having the ID tag and sensor attached to the pressure-sensitive adhesive tape on the side of its pressure-sensitive adhesive surface and the antenna connected to the physiological data sensor and taken out to the surface of the pressure-sensitive adhesive tape from the pressure-sensitive adhesive surface of the pressure-sensitive adhesive through the groove provided to the pressure-sensitive adhesive and the physiological data sensor system in which individual data are stored is provided to the ID tag. By this constitution, the physiological data sensor system can be soon replaced with a new one even if the physiological data sensor is contaminated and is sanitary. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention detects biological information (electrical signal) of a human body with a biological information detection sensor attached to the human body, transmits the detected biological information, and communicates the detected or transmitted biological information with an external device. The present invention relates to a biological information processing apparatus capable of

In recent years, in order to respond to demands such as health check, a biological information detection sensor that is mounted on a detection site of a user and detects biological information has been developed, and along with the downsizing of electronic devices, the downsizing of the biological information detection sensor is progressing. Yes (see Patent Document 1).
JP 2003-275183 A

  It is unsanitary to always keep the biological information detection sensor in contact with the human body, which may adversely affect the human skin.

  Accordingly, an object of the present invention is to provide a biological information detection sensor device that can be easily replaced.

  The present invention includes an adhesive surface provided with an adhesive material, an adhesive tape having a surface on which the adhesive material is not provided, a biological information detection unit attached to the adhesive surface side of the adhesive tape, a memory unit, A biological information detection sensor including an arithmetic processing circuit unit and a communication circuit unit, and connected to the biological information detection sensor and taken out from the adhesive surface of the adhesive tape to the surface through a groove provided in the adhesive tape. The present invention relates to a biological information detection sensor device characterized in that biological information is stored in the memory unit.

  Further, the present invention provides an adhesive surface provided with an adhesive material, an adhesive tape having a surface on which the adhesive material is not provided, a biological information detection unit attached to the adhesive surface side of the adhesive tape, and an insulating surface. A biological information detection sensor including a memory unit, an arithmetic processing circuit unit, and a communication circuit unit, which is formed of a thin film transistor in which a channel region is formed by a semiconductor layer formed and divided into islands, and the biological information detection An antenna connected to the sensor and taken out from the adhesive surface of the adhesive tape through a groove provided in the adhesive tape, and biometric information is stored in the memory unit It is related with the biometric information detection sensor apparatus.

  In the present invention, a groove is provided on the surface of the adhesive tape, an adhesive material is embedded in the bottom surface of the groove, and the antenna is fixed by the adhesive material.

  In the present invention, a groove is provided on the surface of the adhesive tape, a protrusion is provided on a side surface of the groove, and the antenna is fitted.

  Further, the present invention provides an adhesive surface provided with an adhesive material, an adhesive tape having a surface on which no adhesive material is provided, and an adhesive chip side of the adhesive tape, and an ID chip (IC chip, ID tag, IC tag) , RFID, also referred to as a wireless tag), a biological information detection sensor having a biological information detection unit, and a surface connected from the adhesive surface of the adhesive tape through a groove connected to the biological information detection sensor and provided in the adhesive tape The present invention relates to a biological information detection sensor device characterized in that biological information is stored in the ID chip.

  In the present invention, information stored in the ID chip and information detected by the sensor are transmitted and received by the antenna.

  In the present invention, the antenna is fixed to the surface of the adhesive tape by a fixing mechanism provided on the surface of the adhesive tape, and the fixing mechanism is provided with a groove on the surface of the adhesive tape. It is a mechanism for attaching the antenna by providing an adhesive material, or a mechanism for fitting the antenna by providing a groove on the surface of the adhesive tape and providing a protrusion on the side surface of the groove.

  Since the biological information detection sensor device of the present invention is in direct contact with human skin, there is a risk that the outside will be immediately soiled by sweat or the like. Alternatively, the semiconductor layer of the transistor included in the biological information detection sensor device may be contaminated by the alkali metal element contained in the sweat, and the electrical characteristics of the transistor may be deteriorated. However, according to the present invention, even if the biological information detection sensor becomes dirty, it can be immediately replaced with a new one, which is hygienic.

  In addition, since the biological information detection sensor system of the present invention is inexpensive to manufacture, it can be easily replaced with a new one, and it is possible to always wear a sanitary biological information detection sensor.

  This embodiment mode will be described with reference to FIGS. 1A to 1B, FIGS. 2A to 2B, and FIG.

  The biological information detection sensor 101 is attached to the portion of the human wrist 106 where the pulse touches with the adhesive tape 103. The adhesive tape 103 has an adhesive surface on which an adhesive material is provided, and a surface on which no adhesive material is provided, and the biological information detection sensor 101 has a human wrist by means of the adhesive material provided on the adhesive surface. Affixed to 106. The biological information detection sensor 101 includes a humidity sensor, a body temperature sensor, a pulse sensor, an ID chip on which personal information is recorded, and the like (see FIG. 1). In this specification, a combination of the biological information detection sensor 101 and the adhesive tape 103 to which the biological information detection sensor 101 is attached is referred to as a biological information detection sensor device or a biological information detection sensor system. In FIG. 1, the biological information detection sensor 101 is attached to the wrist. However, the place where the biological information detection sensor 101 is attached is not limited to the wrist, and the place such as a foot, an ear, or a neck may be changed as necessary. .

  The biological information detection sensor 101 is provided with an antenna 102 for transmitting or receiving information. The antenna 102 is taken out from the adhesive surface of the adhesive tape 103 through the groove 104 to the surface where no adhesive material is provided. A fixing mechanism 105 for fixing the antenna 102 is provided on the surface of the adhesive tape 103. After fixing the adhesive tape 103 to the wrist 106, the antenna 102 is fixed to the surface of the adhesive tape 103 (see FIG. 2).

  For example, the fixing mechanism 105 may be provided with a groove on the surface of the adhesive tape 103, an adhesive material on the bottom surface of the groove, and the antenna 102 attached thereto. Further, for example, a groove may be provided on the surface of the adhesive tape 103, and a protrusion may be provided on a side surface of the groove to fit the antenna 102.

  If the antenna 102 is long and does not fit in the fixing mechanism on the surface of the adhesive tape 103, another adhesive tape may be attached to the arm.

  Since there is a mechanism for fixing the antenna 102 on the surface of the adhesive tape 103, the antenna 102 does not interfere with daily living activities.

  In the ID chip built in the biological information detection sensor 101, data such as the person's name, sex, blood type, date of birth, medical history, height and weight are recorded in advance.

  The pulse sensor built in the biological information detection sensor 101 sends the detected pulse data to the external memory via the antenna 102. The sent pulse data is compared with pulse data registered in the external memory in advance, and it is determined whether the pulse data is normal or abnormal.

  Regarding the body temperature as well as the pulse, the body temperature sensor built in the biological information detection sensor 101 sends the detected body temperature data to the external memory via the antenna 102. The transmitted body temperature data is compared with body temperature data registered in the external memory in advance, and it is determined whether the body temperature data is normal or abnormal.

  The detected pulse data and body temperature data are transmitted via the antenna 102, and these data are transmitted via the antenna 114 of the read (R) / write (W) machine (hereinafter referred to as “R / W machine”) 111. The data is taken into the R / W machine 111. The fetched data is stored in an internal memory built in the R / W machine 111. In the built-in memory of the R / W machine 111, pulse data, body temperature data, and the like are registered in advance and compared with data sent from the biological information detection sensor 101 (see FIG. 3).

  When the data is compared and it is determined that the transmitted data is abnormal, an alarm is displayed on the display unit 112 of the R / W machine 111 to notify the abnormality. At this time, it may be displayed how far the numerical value of the abnormal data is different from the normal numerical value.

  The R / W machine 111 has another display unit 113 and displays the state of the R / W machine 111 itself. The operation button 115 is an operation button for switching display as necessary, stopping an alarm, and turning on / off the power.

  Further, the R / W machine 111 can rewrite the information if the recorded information of the ID chip built in the biological information detection sensor 101 is changed. For example, the information stored in the ID chip can be rewritten if there is a change in height, weight, past illness, and the like.

  In the rewriting method, data is created by the operation button 115 and sent to the biological information detection sensor 101 by a radio signal from the antenna 114. Based on the information received via the antenna 102, the internal information of the ID chip in the biological information detection sensor 101 is rewritten.

  Further, instead of creating information directly by the R / W machine 111, data may be created by another computer or the like, and the data may be sent to the ID chip via the R / W machine 111.

  The R / W machine 111 is preferably a portable type, and is preferably placed on the side of the person wearing the biological information detection sensor 101.

  Note that this embodiment mode can be combined with any of the embodiment examples if necessary.

  In this embodiment, an example in which the biological information detection sensor of the present invention is applied to an infant including a newborn will be described with reference to FIGS. 4 (A) to 4 (D).

  A newborn 201 (201a, 201b, 201c,...) Is laid on the bed 204 placed in the newborn room 205 of the hospital (see FIG. 4A), and the wrist 202 of the newborn 201 has biometric information. A detection sensor system 211 is attached (see FIG. 4B).

  The biological information detection sensor system 211 has the configuration described in the embodiment, that is, the biological information detection sensor 212 is attached to the wrist 202 with an adhesive tape 214. The biological information detection sensor 212 is attached with an antenna 213 for transmission / reception. The antenna 213 is taken out from the adhesive surface to the surface through a groove provided in the adhesive tape 214 and is provided on the surface of the adhesive tape 214. It is fixed to the surface of the adhesive tape 214 by the fixing mechanism.

  In addition, as described in the embodiment, a groove portion may be provided on the surface of the adhesive tape, an adhesive material may be embedded in the bottom surface of the groove portion to fix the antenna, or a protrusion portion may be provided on a side surface of the groove portion to fit the antenna. You may disguise.

  The biological information detection sensor 212 includes a humidity sensor, a body temperature sensor, a pulse sensor, and an ID chip on which personal information is recorded. Personal information includes date of birth, gender, blood type, parent's name, height and weight, etc., and may be stored in the ID chip in advance and the biological information detection sensor 212 may be attached, or the height and weight may change. May be rewritten for each measurement. In addition, blood types such as blood types that can be found later may be stored after the biological information detection sensor 212 is attached.

  By storing the personal information in the ID chip in the biological information detection sensor 212, it is possible to easily identify the newborn baby 201 and to prevent any mistakes. In addition, information such as height and weight, blood type, etc. can be easily obtained.

  Moreover, the physical condition management of the newborn baby 201 can be performed by various sensors such as a humidity sensor, a body temperature sensor, and a pulse sensor built in the biological information detection sensor 212. For example, the body temperature is constantly observed by a body temperature sensor, and a warning is issued when the temperature is above a certain temperature, so that even if there is an abnormality in the physical condition, it is possible to respond immediately.

  Infants including newborns are heavily metabolized and skin is not so strong. Therefore, the biological information detection sensor system of this embodiment which can be easily and frequently replaced has the advantage of being hygienic and simple.

  In addition, if necessary, a device that transmits position information may be incorporated in the biological information detection sensor 212, and a transmission device provided in the biological information detection sensor 212 and a detection device that detects the transmission device are used. Thus, it is possible to instantly grasp whether the patient is in the newborn room 205, the parent room in the hospital, the outside of the parent room, or where in the hospital.

  Note that this embodiment can be combined with the embodiment mode and embodiments if necessary.

  In this example, an example of manufacturing an ID chip (also referred to as an IC tag or an IC chip) using the present invention is shown in FIGS. 5A to 5B and FIGS. 6A to 6B. It shows using FIG. 7 (A)-FIG. 7 (B) and FIG. 8 (A)-FIG. 8 (B).

  In this embodiment, a TFT that is insulated and separated is illustrated as a semiconductor element. However, a semiconductor element used in an integrated circuit is not limited to this, and any circuit element can be used. For example, in addition to the TFT, a memory element, a diode, a photoelectric conversion element, a resistance element, a coil, a capacitor element, an inductor, and the like can be typically given.

  First, a separation layer 402 is formed over a heat-resistant substrate (first substrate) 401 by using a sputtering method. As the first substrate 401, for example, a glass substrate such as barium borosilicate glass or alumino borosilicate glass, a quartz substrate, a ceramic substrate, or the like can be used. Alternatively, a metal substrate including a stainless steel substrate or a semiconductor substrate with an insulating film formed on the surface thereof may be used. A substrate made of a synthetic resin having flexibility such as plastic generally tends to have a lower heat resistant temperature than the above substrate, but can be used as long as it can withstand the processing temperature in the manufacturing process. .

  As the separation layer 402, a layer containing silicon as its main component such as amorphous silicon, polycrystalline silicon, single crystal silicon, or microcrystalline silicon (including semi-amorphous silicon) can be used. The separation layer 402 can be formed by a sputtering method, a low pressure CVD method, a plasma CVD method, or the like. In this embodiment, amorphous silicon having a thickness of about 50 nm is formed by a low pressure CVD method and used as the peeling layer 402. Note that the separation layer 402 is not limited to silicon and may be formed using a material that can be selectively removed by etching. The thickness of the release layer 402 is desirably 50 to 60 nm. For semi-amorphous silicon, the thickness may be 30 to 50 nm.

  Note that a semi-amorphous semiconductor typified by semi-amorphous silicon is a film including a semiconductor having an intermediate structure between an amorphous semiconductor and a semiconductor having a crystal structure (including single crystal and polycrystal). This semi-amorphous semiconductor is a semiconductor having a third state which is stable in terms of free energy, and is a crystalline one having a short-range order and having a lattice strain, and having a grain size of 0.5 to 20 nm. It can be dispersed in a single crystal semiconductor.

  Further, at least 1 atomic% or more of hydrogen or halogen is contained as a material for terminating dangling bonds (dangling bonds). Here, for convenience, such a semiconductor is referred to as a semi-amorphous semiconductor (SAS). Further, by adding a rare gas element such as helium, argon, krypton, or neon to further promote lattice distortion, stability is improved and a good semi-amorphous semiconductor can be obtained.

Semi-amorphous silicon has its Raman spectrum shifted to a lower wavenumber than 520 cm ^−1, and the diffraction peaks of (111) and (220), which are considered to be derived from the silicon (Si) crystal lattice in X-ray diffraction. Observed.

Semi-amorphous silicon can be obtained by glow discharge decomposition of a gas containing silicon. A typical gas containing silicon is SiH ₄ , and Si ₂ H ₆ , SiH ₂ Cl ₂ , SiHCl ₃ , SiCl ₄ , SiF _{4, and the} like can also be used. In addition, hydrogen or a gas in which one or more kinds of rare gas elements selected from helium, argon, krypton, and neon are added to hydrogen, and this silicon-containing gas is diluted and used to form semi-amorphous silicon. It can be easy. It is preferable to dilute the gas containing silicon within a range of a dilution rate of 2 to 1000 times.

  Next, a base film 403 is formed over the peeling layer 402. The base film 403 is provided to prevent an alkali metal such as Na or an alkaline earth metal contained in the first substrate 401 from diffusing into the semiconductor film and adversely affecting the electrical characteristics of a semiconductor element such as a TFT. The base film 403 also has a role of protecting the semiconductor element in a process of peeling the semiconductor element later. The base film 403 may be a single layer or a stack of a plurality of insulating films. Therefore, the insulating film is formed using an insulating film such as silicon oxide, silicon nitride, silicon oxide containing nitrogen, or silicon nitride containing oxygen that can suppress diffusion of alkali metal or alkaline earth metal into the semiconductor film.

In this embodiment, a silicon oxide film containing nitrogen with a thickness of 100 nm is used as the lower base film 403a, a silicon nitride film containing oxygen with a thickness of 50 nm is used as the middle base film 403b, and an oxide containing nitrogen with a thickness of 100 nm is used as the upper base film 403c. Although the base film 403 is formed by sequentially stacking silicon films, the material, film thickness, and number of layers of each film are not limited thereto. For example, instead of the silicon oxide film containing nitrogen in the lower base film 403a, a siloxane-based resin having a thickness of 0.5 to 3 μm may be formed by a spin coat method, a slit coater method, a droplet discharge method, or the like. Further, a silicon nitride film (such as Si ₃ N ₄ ) may be used instead of the silicon nitride film containing oxygen in the intermediate base film 403b. Further, a silicon oxide film may be used instead of the silicon oxide film containing nitrogen of the upper base film 403c. Each film thickness is preferably 0.05 to 3 μm, and can be freely selected from the range.

  Alternatively, the lower base film 403a of the base film 403 closest to the peeling layer 402 is formed of a silicon oxide film or a silicon oxide film containing nitrogen, the middle base film 403b is formed of a siloxane-based resin, and the upper base film 403c is oxidized. A silicon film may be formed.

Here, the silicon oxide film is formed by a method such as thermal CVD, plasma CVD, atmospheric pressure CVD, or bias ECRCVD using a mixed gas such as SiH ₄ and O ₂ or TEOS (tetraethoxysilane) and O _2. Can do. The silicon nitride film can be typically formed by plasma CVD using a mixed gas of SiH ₄ and NH ₃ . Further, a silicon oxide film containing nitrogen (composition ratio O> N) and a silicon nitride film containing oxygen (composition ratio N> O) typically use a mixed gas of SiH ₄ and N ₂ O, and plasma CVD is performed. Can be formed.

  Next, a semiconductor film is formed over the base film 403. The semiconductor film is preferably formed without being exposed to the air after the base film 403 is formed. The thickness of the semiconductor film is 20 to 200 nm (desirably 40 to 170 nm, preferably 50 to 150 nm). Note that the semiconductor film may be an amorphous semiconductor, a semi-amorphous semiconductor, or a polycrystalline semiconductor. As the semiconductor, not only silicon but also silicon germanium can be used. When silicon germanium is used, the concentration of germanium is preferably about 0.01 to 4.5 atomic%.

An amorphous semiconductor can be obtained by glow discharge decomposition of a gas containing silicon. As a typical gas containing silicon, SiH ₄ and Si ₂ H ₆ can be given. This gas containing silicon may be diluted with hydrogen or hydrogen and helium.

As described above, the semi-amorphous semiconductor can be obtained by glow discharge decomposition of a gas containing silicon. In the gas containing silicon, a carbide gas such as CH ₄ and C ₂ H ₆ , GeH ₄ , GeF _The energy band width may be adjusted to 1.5 to 2.4 eV or 0.9 to 1.1 eV by mixing germanium gas such as ₄ or F ₂ .

For example, when using a gas added with _{H 2} to SiH _4, or the case of using the added gas _{F 2} to SiH _4, when TFT is formed by using the formed semi-amorphous semiconductor, the subthreshold coefficient of the TFT (S Value) can be 0.35 V / dec or less, typically 0.25 to 0.09 V / dec, and the mobility can be 10 cm ² / Vsec. When a TFT using the semi-amorphous semiconductor, for example, a 19-stage ring oscillator is formed, characteristics with an oscillation frequency of 1 MHz or more, preferably 100 MHz or more can be obtained at a power supply voltage of 3 to 5 V. In addition, at a power supply voltage of 3 to 5 V, the delay time per inverter stage can be 26 ns, preferably 0.26 ns or less.

  Then, the semiconductor film is crystallized using a laser. Alternatively, a crystallization method using a catalytic element and a laser crystallization method using a laser may be combined.

  In the case of performing laser crystallization, heat treatment at 500 ° C. for 1 hour may be added to the semiconductor film before laser crystallization in order to increase the resistance of the semiconductor film to the laser.

  For laser crystallization, a pulsed laser having an oscillation frequency of 10 MHz or more, preferably 80 MHz or more can be used as a continuous wave laser (CW laser) or a pseudo CW laser.

Specifically, as a continuous wave laser, Ar laser, Kr laser, CO ₂ laser, YAG laser, YVO ₄ laser, forsterite (Mg ₂ SiO ₄ ) laser, YLF laser, YAlO ₃ laser, GdVO ₄ laser, Y ₂ O ₃ laser, alexandrite laser, Ti: sapphire laser, helium cadmium laser, polycrystalline (ceramic) YAG, Y ₂ O ₃ , YVO ₄ , YAlO ₃ , GdVO ₄ as dopants Nd, Yb, Cr, Ti, Ho , Er, Tm, Ta, or the like, or a laser having a medium added with one or more of them.

As a pseudo CW laser, an Ar laser, a Kr laser, an excimer laser, a CO ₂ laser, a YAG laser, a Y ₂ O ₃ laser, a YVO can be used as long as it can oscillate a pulse having an oscillation frequency of 10 MHz or more, preferably 80 MHz or more. ₄ laser, forsterite (Mg ₂ SiO ₄ ) laser, YLF laser, YAlO ₃ laser, GdVO ₄ laser, alexandrite laser, Ti: sapphire laser, copper vapor laser or gold vapor laser, polycrystalline (ceramic) YAG, Y ₂ A pulse like a laser in which one or more of Nd, Yb, Cr, Ti, Ho, Er, Tm, and Ta are added as dopants to O ₃ , YVO ₄ , YAlO ₃ , and GdVO ₄ as a medium. An oscillation laser can be used.

  Such a pulsed laser has an effect equivalent to that of a continuous wave laser as the oscillation frequency is increased.

For example, when a solid-state laser capable of continuous oscillation is used, a crystal having a large grain size can be obtained by irradiating laser light of second to fourth harmonics. Typically, it is desirable to use the second harmonic (532 nm) or the third harmonic (355 nm) of a YAG laser (fundamental wave 1064 nm). For example, laser light emitted from a continuous wave YAG laser is converted into a harmonic by a non-linear optical element and irradiated onto a semiconductor film. Energy density may be about 0.01 to 100 MW / cm ² (preferably 0.1~10MW / cm ^2). Irradiation is performed at a scanning speed of about 10 to 2000 cm / sec.

Note that single crystal YAG, YVO ₄ , forsterite (Mg ₂ SiO ₄ ), YAlO ₃ , GdVO ₄ , or polycrystalline (ceramic) YAG, Y ₂ O ₃ , YVO ₄ , YAlO ₃ , GdVO ₄ , dopants Nd, Yb, Cr, Ti, Ho, Er, Tm, and Ta, a laser that uses one or a plurality of types added as a medium, Ar laser, Kr laser, or Ti: sapphire laser It is also possible to cause pulse oscillation by performing Q switch operation, mode synchronization, and the like. When the laser beam is oscillated at an oscillation frequency of 10 MHz or more, the semiconductor film is irradiated with the next pulse during the period from when the semiconductor film is melted by the laser to solidification. Therefore, unlike the case of using a pulse laser having a low oscillation frequency, the solid-liquid interface can be continuously moved in the semiconductor film, so that crystal grains continuously grown in the scanning direction can be obtained.

  When ceramic (polycrystal) is used as the medium, it is possible to form the medium in a free shape in a short time and at low cost. When a single crystal is used, a cylindrical medium having a diameter of several millimeters and a length of several tens of millimeters is usually used. However, when ceramic is used, a larger one can be made.

  Since the concentration of dopants such as Nd and Yb in the medium that directly contributes to light emission cannot be changed greatly regardless of whether it is a single crystal or a polycrystal, there is a certain limit to improving the laser output by increasing the concentration. However, in the case of ceramic, since the size of the medium can be remarkably increased as compared with the single crystal, there is a possibility that the output is greatly improved.

  Further, in the case of ceramic, a medium having a parallelepiped shape or a rectangular parallelepiped shape can be easily formed. When a medium having such a shape is used to cause oscillation light to travel in a zigzag manner inside the medium, the oscillation optical path can be made longer. As a result, amplification is increased and oscillation can be performed with high output. Further, since the laser beam emitted from the medium having such a shape has a quadrangular cross-sectional shape at the time of emission, it is advantageous for shaping into a linear beam as compared with a round beam. By shaping the emitted laser beam using an optical system, it is possible to easily obtain a linear beam having a short side length of 1 mm or less and a long side length of several mm to several m. Become. In addition, by irradiating the medium with the excitation light uniformly, the linear beam has a uniform energy distribution in the long side direction.

  By irradiating the semiconductor film with this linear beam, the entire surface of the semiconductor film can be annealed more uniformly. When uniform annealing is required up to both ends of the linear beam, it is necessary to arrange a slit at both ends to shield the energy attenuating portion.

  By irradiating the semiconductor film with the laser light, a crystalline semiconductor film with higher crystallinity is formed.

  Next, island-shaped semiconductor films 404 to 406 are formed using the crystalline semiconductor film. The island-like semiconductor films 404 to 406 become TFT active layers.

Next, an impurity for threshold control is introduced into the island-shaped semiconductor film. In this embodiment, boron (B) is introduced into the island-shaped semiconductor film by doping diborane (B ₂ H ₆ ).

  Next, an insulating film is formed so as to cover the island-shaped semiconductor films 404 to 406. For the insulating film, for example, silicon oxide, silicon nitride, silicon oxide containing nitrogen, or the like can be used. As a film formation method, a plasma CVD method, a sputtering method, or the like can be used.

  Next, after a conductive film is formed over the insulating film, gate electrodes 441 to 443 are formed using the conductive film.

  The gate electrodes 441 to 443 are formed using a structure in which a single conductive film or two or more conductive films are stacked. In the case where two or more conductive films are stacked, an element selected from tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), and aluminum (Al), or the element as a main component The gate electrodes 441 to 443 may be formed by stacking alloy materials or compound materials to be stacked. Alternatively, the gate electrode may be formed using a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus (P).

  In this embodiment, the gate electrodes 441 to 443 are formed as follows. First, as the first conductive film, for example, a tantalum nitride (TaN) film is formed with a thickness of 10 to 50 nm, for example, 30 nm. Then, as the second conductive film, for example, a tungsten (W) film is formed with a thickness of 200 to 400 nm, for example, 370 nm on the first conductive film, and a stacked film of the first conductive film and the second conductive film is formed. Form.

  Next, the second conductive film is etched by anisotropic etching to form upper layer gate electrodes 441b to 443b. Next, the first conductive film is etched by isotropic etching to form lower gate electrodes 441a to 443a. Thus, gate electrodes 441 to 443 are formed.

  The gate electrodes 441 to 443 may be formed as part of the gate wiring, or another gate wiring may be formed and the gate electrodes 441 to 443 may be connected to the gate wiring.

  Then, using the gate electrodes 441 to 443 or a resist as a mask, an impurity imparting one conductivity (n-type or p-type conductivity) is added to each of the island-shaped semiconductor films 404 to 406, so that the source region, the drain A region, a low-concentration impurity region, and the like are formed.

First, phosphorous (P) is introduced into the island-shaped semiconductor film using phosphine (PH ₃ ) with an acceleration voltage of 60 to 120 keV and a dose of 1 × 10 ¹³ to 1 × 10 ¹⁵ cm ⁻² . When this impurity is introduced, a channel formation region 411 of the n-channel TFT 451 and a channel formation region 431 of the n-channel TFT 453 are formed.

Further, in order to manufacture the p-channel TFT 452, diborane (B ₂ H ₆ ) is applied with an applied voltage of 60 to 100 keV, for example, 80 keV, and a dose amount of 1 × 10 ^{13 to} 5 × 10 ¹⁵ cm ⁻² , for example, 3 × 10 ¹⁵ cm ^{−. Under} the condition (2), boron (B) is introduced into the island-shaped semiconductor film. As a result, a source region or drain region 422 of the p-channel TFT 452 and a channel formation region 421 are formed when this impurity is introduced.

  Next, gate insulating films 407 to 409 are formed using the insulating film.

After the gate insulating films 407 to 409 are formed, an applied voltage of 40 to 80 keV, for example, 50 keV, a dose of 1.0 × 10 ¹⁵ is used using phosphine (PH ₃ ) in the island-shaped semiconductor films to be the n-channel TFTs 451 and 453. Phosphorus (P) is introduced at ˜2.5 × 10 ¹⁶ cm ⁻² , for example, 3.0 × 10 ¹⁵ cm ⁻² . As a result, the low concentration impurity region 412 and the source or drain region 413 of the n-channel TFT 451 and the low concentration impurity region 432 and the source or drain region 433 of the n-channel TFT 453 are formed.

In this embodiment, each of the source region or drain region 413 of the n-channel TFT 451 and the source region or drain region 433 of the n-channel TFT 453 has a concentration of 1 × 10 ^{19 to} 5 × 10 ²¹ cm ⁻³ . Phosphorus (P) will be included. Each of the low-concentration impurity region 412 of the n-channel TFT 451 and the low-concentration impurity region 432 of the n-channel TFT 453 contains phosphorus (P) at a concentration of 1 × 10 ^{18 to} 5 × 10 ¹⁹ cm ^−3. . Further, the source or drain region 422 of the p-channel TFT 452 contains boron (B) at a concentration of 1 × 10 ^{19 to} 5 × 10 ²¹ cm ⁻³ .

  Through the above steps, an n-channel TFT 451, a p-channel TFT 452, and an n-channel TFT 453 are formed (see FIG. 5A). In this embodiment, the TFTs 451 to 453 have a top gate structure, but may have a bottom gate structure (reverse stagger structure).

  The n-channel TFT 451 includes a gate electrode 441 including an island-shaped semiconductor film 404, a gate insulating film 407, a lower gate electrode 441a, and an upper gate electrode 441b on an upper base film 403c. In the island-shaped semiconductor film 404, a channel formation region 411, a low concentration impurity region 412, and a source or drain region 413 are formed.

  The p-channel TFT 452 includes a gate electrode 442 including an island-shaped semiconductor film 405, a gate insulating film 408, a lower gate electrode 442a, and an upper gate electrode 442b on the upper base film 403c. In the island-shaped semiconductor film 405, a channel formation region 421 and a source region or a drain region 422 are formed.

  The n-channel TFT 453 includes a gate electrode 443 including an island-shaped semiconductor film 406, a gate insulating film 409, a lower gate electrode 443a, and an upper gate electrode 443b on the upper base film 403c. In the island-shaped semiconductor film 406, a channel formation region 431, a low concentration impurity region 432, and a source region or a drain region 433 are formed.

  Further, after that, a passivation film 461 for protecting the TFTs 451 to 453 may be formed. The passivation film 461 is preferably formed using silicon nitride, silicon oxide containing nitrogen, aluminum nitride, aluminum oxide, silicon oxide, or the like that can prevent alkali metal or alkaline earth metal from entering the TFTs 451 to 453. Specifically, for example, a silicon oxide film containing nitrogen with a thickness of about 600 nm can be used as the passivation film 461. In this case, the hydrogenation process may be performed after the silicon oxide film containing nitrogen is formed. By using the above structure, since the TFTs 451 to 453 are covered with the base film 403 and the passivation film 461, an alkali metal such as Na or an alkaline earth metal diffuses into the semiconductor film used in the semiconductor element, An adverse effect on the electrical characteristics of the semiconductor element can be further prevented.

  Next, a first interlayer insulating film 462 is formed so as to cover the TFTs 451 to 453 and the passivation film 461. For the first interlayer insulating film 462, a heat-resistant organic resin such as polyimide, acrylic, or polyamide can be used. In addition to the organic resin, a low dielectric constant material (low-k material), a resin including a Si—O—Si bond formed using a siloxane-based material as a starting material (hereinafter referred to as a siloxane-based resin), or the like is used. be able to.

  Siloxane has a skeletal structure with a bond of silicon (Si) and oxygen (O), and an organic group containing at least hydrogen (for example, an alkyl group or an aryl group) is used as a substituent. Further, a fluoro group may be used as a substituent. Further, as a substituent, an organic group containing at least hydrogen and a fluoro group may be used.

  For the formation of the first interlayer insulating film 462, depending on the material, spin coating, dipping, spray coating, droplet discharge method (ink jet method, screen printing, offset printing, etc.), doctor knife, roll coater, curtain coater A knife coater or the like can be employed. In addition, an inorganic material may be used. In that case, silicon oxide, silicon nitride, silicon oxynitride, PSG (phosphorus glass), BPSG (phosphorus boron glass), an alumina film, or the like can be used. Note that the first interlayer insulating film 462 may be formed by stacking these insulating films.

  Further, in this embodiment, a second interlayer insulating film 463 is formed on the first interlayer insulating film 462. As the second interlayer insulating film 463, a film containing carbon such as DLC (diamond-like carbon) or carbon nitride (CN), a silicon oxide film, a silicon nitride film, a silicon oxide film containing nitrogen, or the like is used. it can. As a formation method, a plasma CVD method, an atmospheric pressure plasma method, or the like can be used. Alternatively, a photosensitive or non-photosensitive organic material such as polyimide, acrylic, polyamide, resist, or benzocyclobutene, a siloxane resin, or the like may be used.

  Note that the first interlayer insulating film 462 or the second interlayer insulating film 463 and the first interlayer insulating film 462 or the second interlayer insulating film 463 are caused by a stress generated from a difference in thermal expansion coefficient between a conductive material or the like that forms a wiring to be formed later. In order to prevent film peeling or cracking of the second interlayer insulating film 463, a filler may be mixed in the first interlayer insulating film 462 or the second interlayer insulating film 463.

Next, contact holes are formed in the first interlayer insulating film 462 and the second interlayer insulating film 463, and electrodes or wirings 471 to 475 connected to the TFTs 451 to 453 are formed. In this embodiment, the electrode and the wiring are integrally formed. However, the electrode and the wiring may be separately formed and electrically connected. A gas used for etching at the time of forming the contact hole is a mixed gas of CHF ₃ and He, but is not limited to this. In this embodiment, the electrodes or wirings 471 to 475 are formed by using a five-layer structure in which Ti, TiN, Al—Si, Ti, and TiN are stacked and formed by sputtering.

  Note that silicon (Si) is mixed in the aluminum film (Al film) (sometimes referred to as “Al—Si” in this specification) to prevent generation of hillocks in resist baking during wiring formation. Can do. Further, instead of Si, about 0.5% copper (Cu) may be mixed. Further, the hillock resistance is further improved by sandwiching the Al—Si layer with titanium (Ti) or titanium nitride (TiN). In the etching, it is desirable to use the hard mask made of silicon oxide containing nitrogen. Note that the wiring material and the formation method are not limited to these, and the material used for the gate electrode described above may be employed.

  Further, the electrodes or wirings 471 to 475 may be formed of an aluminum alloy film containing at least one element selected from nickel, cobalt, and iron, and carbon. Such an aluminum alloy film can prevent mutual diffusion of silicon and aluminum even when it comes into contact with silicon. In addition, since such an aluminum alloy film does not cause a redox reaction even when it comes into contact with a transparent conductive film, for example, an ITO (Indium Tin Oxide) film, it is possible to directly contact them. Furthermore, such an aluminum alloy film is useful as a wiring material because of its low specific resistance and excellent heat resistance.

  Note that the electrode or wiring 471 and the electrode or wiring 472 are connected to the source region or the drain region 413 of the n-channel TFT 451. The electrode or wiring 472 and the electrode or wiring 473 are connected to the source region or the drain region 422 of the p-channel TFT 452. The electrode or wiring 474 and the electrode or wiring 475 are connected to the source region or the drain region 433 of the n-channel TFT 453. Further, the electrode or wiring 475 is also connected to the gate electrode 443 of the n-channel TFT 453. The n-channel TFT 453 can be used as a memory element of a random number ROM (see FIG. 5B).

  Next, a third interlayer insulating film 464 is formed over the second interlayer insulating film 463 so as to cover the electrodes or wirings 471 to 475. The third interlayer insulating film 464 is formed to have an opening at a position where the electrode or wiring 471 is partially exposed. Note that the third interlayer insulating film 464 can be formed using a material similar to that of the first interlayer insulating film 462.

  Next, an antenna 477 is formed over the third interlayer insulating film 464 (see FIG. 6A). The antenna 477 is formed using a conductive material including one or more metals such as Ag, Au, Cu, Pd, Cr, Mo, Ti, Ta, W, Al, Fe, Co, Zn, Sn, and Ni, and a metal compound. Can do. The antenna 477 is connected to an electrode or wiring 471. Note that in FIG. 6A, the antenna 477 is directly connected to the electrode or the wiring 471; however, the ID chip of the present invention is not limited to this structure. For example, the antenna 477 and the electrode or wiring 471 may be electrically connected using a separately formed wiring.

  The antenna 477 can be formed by a printing method, a photolithography method, an evaporation method, a droplet discharge method, or the like. In this embodiment, the antenna 477 is formed of a single-layer conductive film, but it is also possible to form the antenna 477 in which a plurality of conductive films are stacked. For example, the antenna 477 may be formed by coating a wiring formed of Ni or the like with Cu electroless plating.

  The droplet discharge method means a method of forming a predetermined pattern by discharging droplets containing a predetermined composition from the pores, and includes an ink jet method and the like in its category. The printing method includes a screen printing method and an offset printing method. By using a printing method or a droplet discharge method, the antenna 477 can be formed without using an exposure mask. In addition, unlike the photolithography method, there is no waste of material that is removed by etching in the droplet discharge method and the printing method. In addition, since it is not necessary to use an expensive exposure mask, the cost for manufacturing the ID chip can be suppressed.

  In the case of using a droplet discharge method or various printing methods, for example, conductive particles in which Cu is coated with Ag can be used. Note that in the case where the antenna 477 is formed by a droplet discharge method, it is preferable that treatment for increasing the adhesion of the antenna 477 be performed on the surface of the third interlayer insulating film 464.

  As a method for improving the adhesion, specifically, for example, a method of attaching a metal or a metal compound capable of enhancing the adhesion of the conductive film or the insulating film to the surface of the third interlayer insulating film 464 by catalytic action. An organic insulating film having high adhesion to the conductive film or insulating film to be formed, a method of attaching a metal or a metal compound to the surface of the third interlayer insulating film 464, and a surface of the third interlayer insulating film 464 Examples include a method of performing surface modification by performing plasma treatment under atmospheric pressure or reduced pressure. Examples of the metal having high adhesion to the conductive film or insulating film include titanium, titanium oxide, 3d transition elements such as Sc, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, and Zn. Is mentioned. Examples of the metal compound include the above-described metal oxides, nitrides, and oxynitrides. Examples of the organic insulating film include polyimide and siloxane resin.

  When the metal or metal compound attached to the third interlayer insulating film 464 has conductivity, the sheet resistance is controlled so that the normal operation of the antenna is not hindered. Specifically, the average thickness of the conductive metal or metal compound is controlled to be, for example, 1 to 10 nm, or the metal or metal compound is partially or entirely insulated by oxidation. Just do it. Alternatively, the deposited metal or metal compound may be selectively removed by etching except for the region where the adhesion is desired to be improved. Alternatively, the metal or the metal compound may be selectively attached only to a specific region by using a droplet discharge method, a printing method, a sol-gel method, or the like, instead of attaching the metal or the metal compound to the entire surface of the substrate in advance. Note that the metal or metal compound does not need to be a completely continuous film on the surface of the third interlayer insulating film 464, and may be dispersed to some extent.

  6B, after the antenna 477 is formed, a protective layer 465 is formed over the third interlayer insulating film 464 so as to cover the antenna 477. The protective layer 465 is formed using a material that can protect the antenna 477 when the peeling layer 402 is removed by etching later. For example, the protective layer 465 can be formed by applying an epoxy resin, an acrylate resin, or a resin containing silicon that is soluble in water or alcohols to the entire surface.

  In this example, a water-soluble resin (manufactured by Toagosei Co., Ltd .: VL-WSHL10) is applied by spin coating so as to have a film thickness of 30 μm, and after exposure for 2 minutes for temporary curing, UV light is applied to the back surface. For 2.5 minutes and 10 minutes from the surface for a total of 12.5 minutes for main curing to form a protective layer 465. In addition, when laminating | stacking a some organic resin, there exists a possibility that organic resins may melt | dissolve partially at the time of application | coating or baking with the solvent currently used, or adhesiveness may become high too much. Therefore, when the third interlayer insulating film 464 and the protective layer 465 are both made of an organic resin that is soluble in the same solvent, the third interlayer insulating film is removed so that the protective layer 465 can be removed smoothly in the subsequent process. An inorganic insulating film (a silicon nitride film, a silicon nitride film containing oxygen, a silicon oxide film containing nitrogen, an aluminum nitride film, an aluminum nitride film containing oxygen, or an aluminum oxide film containing nitrogen) is formed so as to cover 464. It is preferable to keep it.

  Next, as shown in FIG. 7A, an opening (also referred to as a groove) 481 is formed in order to separate the ID chips. The opening 481 may be of a size that exposes the release layer 402. The opening 481 can be formed by dicing, scribing, or the like. Note that in the case where it is not necessary to separate the ID chip formed over the first substrate 401, the opening 481 is not necessarily formed.

Next, as illustrated in FIG. 7B, the peeling layer 402 is removed by etching. In this embodiment, halogen fluoride is used as an etching gas, and the gas is introduced from the opening 481. In this embodiment, for example, ClF ₃ (chlorine trifluoride) is used under the conditions of temperature: 350 ° C., flow rate: 300 sccm, atmospheric pressure: 798 Pascal (798 Pa), and time: 3 h. Further, a gas in which nitrogen is mixed with ClF ₃ gas may be used. By using halogen fluoride such as ClF ₃ , the separation layer 402 is selectively etched, and the first substrate 401 can be separated from the TFTs 451 to 453. The halogen fluoride may be either a gas or a liquid.

  Next, as illustrated in FIG. 8A, the peeled TFTs 451 to 453 and the antenna 477 are attached to the second substrate 491 using an adhesive 482. As the adhesive 482, a material capable of bonding the second substrate 491 and the base film 403 is used. As the adhesive 482, for example, various curable adhesives such as a reactive curable adhesive, a thermosetting adhesive, a photocurable adhesive such as an ultraviolet curable adhesive, and an anaerobic adhesive can be used.

  As the second substrate 491, an organic material such as flexible paper or plastic can be used. Alternatively, a flexible inorganic material may be used as the second substrate 491. As the plastic substrate, ARTON (manufactured by JSR) made of polynorbornene with a polar group can be used. Polyester represented by polyethylene terephthalate (PET), polyethersulfone (PES), polyethylene naphthalate (PEN), polycarbonate (PC), nylon, polyetheretherketone (PEEK), polysulfone (PSF), polyetherimide (PEI), polyarylate (PAR), polybutylene terephthalate (PBT), polyimide, acrylonitrile butadiene styrene resin, polyvinyl chloride, polypropylene, polyvinyl acetate, acrylic resin and the like. The second substrate 491 preferably has a high thermal conductivity of about 2 to 30 W / mK in order to diffuse the heat generated in the integrated circuit.

  Next, as illustrated in FIG. 8B, after the protective layer 465 is removed, an adhesive 483 is applied over the third interlayer insulating film 464 so as to cover the antenna 477, and a cover material 492 is attached. The cover material 492 can be formed using a flexible organic material such as paper or plastic, like the second substrate 491. The thickness of the adhesive 483 may be, for example, 10 to 200 μm.

  The adhesive 483 is formed using a material that can bond the cover material 492 to the third interlayer insulating film 464 and the antenna 477. As the adhesive 483, for example, various curable adhesives such as a reactive curable adhesive, a thermosetting adhesive, a photocurable adhesive such as an ultraviolet curable adhesive, and an anaerobic adhesive can be used.

The ID chip is completed through the above-described steps. By the above manufacturing method, an extremely thin integrated circuit having a total film thickness of 0.3 μm to 3 μm, typically about 2 μm, can be formed between the second substrate 491 and the cover material 492. Note that the thickness of the integrated circuit includes not only the thickness of the semiconductor element itself but also the thicknesses of various insulating films and interlayer insulating films formed between the adhesive 482 and the adhesive 483. The area occupied by the integrated circuit included in the ID chip, 5 mm square (25 mm ²⁾ or less, and more preferably may be 0.3mm square (0.09 mm ²⁾ to 4 mm square (16 mm ²⁾ degree.

  Note that the mechanical strength of the ID chip can be increased by positioning the integrated circuit more centrally between the second substrate 491 and the cover material 492. Specifically, when the distance between the second substrate 491 and the cover material 492 is d, the distance x between the second substrate 491 and the center in the thickness direction of the integrated circuit satisfies the following formula 1. As described above, it is desirable to control the thicknesses of the adhesive 482 and the adhesive 483.

  Preferably, the thicknesses of the adhesive 482 and the adhesive 483 are controlled so as to satisfy the following formula 2.

  Note that FIG. 8B illustrates an example in which the cover material 492 is used; however, the present invention is not limited to this structure. For example, the process may be ended up to the step shown in FIG.

  Note that this embodiment shows a method for separating a substrate and an integrated circuit by providing a separation layer between the first substrate 401 having high heat resistance and the integrated circuit and removing the separation layer by etching. The manufacturing method of the ID chip of the present invention is not limited to this configuration. For example, a metal oxide film may be provided between a substrate having high heat resistance and the integrated circuit, and the integrated circuit may be peeled by weakening the metal oxide film by crystallization. Alternatively, a separation layer using an amorphous semiconductor film containing hydrogen is provided between a substrate with high heat resistance and an integrated circuit, and the separation layer is removed by laser light irradiation to separate the substrate and the integrated circuit. You may do it. Alternatively, the integrated circuit may be separated from the substrate by mechanically removing the highly heat-resistant substrate on which the integrated circuit is formed or removing the substrate by etching with a solution or gas.

  In order to ensure the flexibility of the ID chip, in the case where an organic resin is used for the adhesive 482 that is in contact with the base film 403, a silicon nitride film or a silicon oxide film containing nitrogen is used as the base film 403. Alkali metals such as Na and alkaline earth metals can be prevented from diffusing into the semiconductor film.

  Further, the surface of the object has a curved surface, whereby the second substrate 491 of the ID chip bonded to the curved surface is bent so as to have a curved surface drawn by the movement of the generating line such as a cone surface or a column surface. In this case, it is desirable to align the direction of the bus and the direction in which the carriers of the TFTs 451 to 453 move. With the above structure, even if the second substrate 491 is bent, it can be prevented that the electrical characteristics of the TFTs 451 to 453 are affected by the bending. In addition, by setting the ratio of the area occupied by the island-shaped semiconductor film in the integrated circuit to 1 to 30%, even if the second substrate 491 is bent, the electrical characteristics of the TFTs 451 to 453 are affected thereby. Can be further suppressed.

  Note that although an example in which the antenna is formed over the same substrate as the integrated circuit has been described in this embodiment, the present invention is not limited to this structure. An antenna formed over another substrate and the integrated circuit may be bonded later to be electrically connected.

  In general, the frequency of radio waves used in an ID chip is 13.56 MHz and 2.45 GHz, and it is very important to increase the versatility to form an ID chip so that radio waves of that frequency can be detected. Is important to.

In addition, the ID chip of this embodiment has an advantage that radio waves are less shielded than an ID chip formed using a semiconductor substrate, and the signal can be prevented from being attenuated by shielding the radio waves. Therefore, it is not necessary to use a semiconductor substrate, so that the cost of the ID chip can be significantly reduced. For example, the case where a silicon substrate having a diameter of 12 inches is used is compared with the case where a glass substrate of 730 × 920 mm ² is used. The area of the former silicon substrate is about 73000 mm ² , while the area of the latter glass substrate is about 672000 mm ² , and the glass substrate corresponds to about 9.2 times the silicon substrate. When the area of the latter glass substrate is about 672000 mm ² , ignoring the area consumed by dividing the substrate, it is calculated that about 672,000 1 mm square ID chips can be formed, and the number is about 9.2 times that of the silicon substrate. It is equivalent to the number of Capital investment for mass production of ID chips requires fewer steps when using a 730 × 920 mm ² glass substrate than when using a 12-inch diameter silicon substrate. It can be done in a third. Further, in the present invention, the glass substrate can be used again after the integrated circuit is peeled off. Therefore, cost can be significantly reduced as compared with the case of using a silicon substrate, even in view of the expense of making up for a damaged glass substrate or cleaning the surface of the glass substrate. Even if the glass substrate is discarded without being reused, the cost of a 730 × 920 mm ² glass substrate is about half that of a silicon substrate having a diameter of 12 inches, which greatly reduces the cost of the ID chip. You can see that

Therefore, it can be seen that when a glass substrate of 730 × 920 mm ² is used, the price of the ID chip can be reduced to about 1/30 compared with the case of using a silicon substrate having a diameter of 12 inches. Since the ID chip can be used on the premise that it is disposable, the ID chip of the present invention, which can significantly reduce the cost, is very useful for the above application.

  Note that in this embodiment, the example in which the integrated circuit is separated and attached to a flexible substrate is described; however, the present invention is not limited to this structure. For example, in the case where a substrate having a heat resistant temperature that can withstand heat treatment in a manufacturing process of an integrated circuit, such as a glass substrate, is used, the integrated circuit is not necessarily peeled off.

  Further, this embodiment can be freely combined with the embodiment mode and other embodiments if necessary.

  In this embodiment, an example in which an ID chip (also referred to as an IC chip or an IC tag) incorporated in the biological information detection sensor of the present invention has a configuration different from that of the second embodiment is shown in FIGS. 9 (B), FIGS. 10 (A) to 10 (B), FIGS. 11 (A) to 11 (B), and FIGS. 12 (A) to 12 (B).

  In this embodiment, a TFT that is insulated and separated is illustrated as a semiconductor element. However, a semiconductor element used in an integrated circuit is not limited to this, and any circuit element can be used. For example, in addition to the TFT, a memory element, a diode, a photoelectric conversion element, a resistance element, a coil, a capacitor element, an inductor, and the like can be typically given.

  First, the separation layer 602 is formed over a heat-resistant substrate (first substrate) 601 using a sputtering method. As the first substrate 601, for example, a glass substrate such as barium borosilicate glass or alumino borosilicate glass, a quartz substrate, a ceramic substrate, or the like can be used. Alternatively, a metal substrate including a stainless steel substrate or a semiconductor substrate with an insulating film formed on the surface thereof may be used. A substrate made of a synthetic resin having flexibility such as plastic generally tends to have a lower heat resistant temperature than the above substrate, but can be used as long as it can withstand the processing temperature in the manufacturing process. .

  The separation layer 602 can be formed using a layer containing silicon as a main component, such as amorphous silicon, polycrystalline silicon, single crystal silicon, or microcrystalline silicon (including semi-amorphous silicon). The separation layer 602 can be formed by a sputtering method, a low pressure CVD method, a plasma CVD method, or the like. In this embodiment, amorphous silicon having a thickness of about 50 nm is formed by a low pressure CVD method and used as the peeling layer 602. Note that the separation layer 602 is not limited to silicon and may be formed using a material that can be selectively removed by etching. The thickness of the release layer 602 is desirably 50 to 60 nm. For semi-amorphous silicon, the thickness may be 30 to 50 nm.

  Note that a semi-amorphous semiconductor typified by semi-amorphous silicon is a film including a semiconductor having an intermediate structure between an amorphous semiconductor and a semiconductor having a crystal structure (including single crystal and polycrystal). This semi-amorphous semiconductor is a semiconductor having a third state which is stable in terms of free energy, and is a crystalline one having a short-range order and having a lattice strain, and having a grain size of 0.5 to 20 nm. It can be dispersed in a single crystal semiconductor.

  Further, hydrogen or halogen is contained at least 1 atomic% or more as a material for terminating dangling bonds (dangling bonds). Here, for convenience, such a semiconductor is referred to as a semi-amorphous semiconductor (SAS). Further, by adding a rare gas element such as helium, argon, krypton, or neon to further promote lattice distortion, stability is improved and a good semi-amorphous semiconductor can be obtained.

Semi-amorphous silicon has its Raman spectrum shifted to a lower wavenumber than 520 cm ⁻¹ , and diffraction peaks of (111) and (220), which are considered to be derived from the Si crystal lattice in X-ray diffraction, are observed. .

Semi-amorphous silicon can be obtained by glow discharge decomposition of a gas containing silicon. A typical gas containing silicon is SiH ₄ , and Si ₂ H ₆ , SiH ₂ Cl ₂ , SiHCl ₃ , SiCl ₄ , SiF _{4, and the} like can also be used. In addition, hydrogen or a gas in which one or more kinds of rare gas elements selected from helium, argon, krypton, and neon are added to hydrogen, and this silicon-containing gas is diluted and used to form semi-amorphous silicon. It can be easy. It is preferable to dilute the gas containing silicon within a range of a dilution rate of 2 to 1000 times.

  Next, a base film 603 is formed over the peeling layer 602. The base film 603 is provided to prevent an alkali metal such as Na or an alkaline earth metal contained in the first substrate 601 from diffusing into the semiconductor film and adversely affecting the electrical characteristics of a semiconductor element such as a TFT. The base film 603 also has a role of protecting the semiconductor element in a process of peeling the semiconductor element later. The base film 603 may be a single layer or a stack of a plurality of insulating films. Therefore, the insulating film is formed using an insulating film such as silicon oxide, silicon nitride, silicon oxide containing nitrogen, or silicon nitride containing oxygen that can suppress diffusion of alkali metal or alkaline earth metal into the semiconductor film.

In this embodiment, a silicon oxide film containing nitrogen having a thickness of 100 nm is used as the lower base film 603a, a silicon nitride film containing oxygen having a thickness of 50 nm is used as the middle base film 603b, and an oxide containing nitrogen having a thickness of 100 nm is used as the upper base film 603c. Although the base film 603 is formed by sequentially stacking silicon films, the material, film thickness, and number of layers of each film are not limited to these. For example, instead of the silicon oxide film containing nitrogen in the lower base film 603a, a siloxane-based resin with a thickness of 0.5 to 3 μm may be formed by a spin coat method, a slit coater method, a droplet discharge method, or the like. Further, a silicon nitride film (such as Si ₃ N ₄ ) may be used instead of the silicon nitride film containing oxygen in the intermediate base film 603b. Further, a silicon oxide film may be used instead of the silicon oxide film containing nitrogen of the upper base film 603c. Each film thickness is preferably 0.05 to 3 μm, and can be freely selected from the range.

  Alternatively, the lower base film 603a of the base film 603 closest to the peeling layer 602 is formed of a silicon oxide film or a silicon oxide film containing nitrogen, the intermediate base film 603b is formed of a siloxane-based resin, and the upper base film 603c is oxidized. A silicon film may be formed.

Here, the silicon oxide film is formed by a method such as thermal CVD, plasma CVD, atmospheric pressure CVD, or bias ECRCVD using a mixed gas such as SiH ₄ and O ₂ or TEOS (tetraethoxysilane) and O _2. Can do. The silicon nitride film can be typically formed by plasma CVD using a mixed gas of SiH ₄ and NH ₃ . In addition, a silicon oxide film containing nitrogen (composition ratio O> N) and silicon nitride containing oxygen (composition ratio N> O) are typically formed by plasma CVD using a mixed gas of SiH ₄ and N ₂ O. Can be formed.

  Next, a semiconductor film is formed over the base film 603. The semiconductor film is preferably formed without being exposed to the air after the base film 603 is formed. The thickness of the semiconductor film is 20 to 200 nm (desirably 40 to 170 nm, preferably 50 to 150 nm). Note that the semiconductor film may be an amorphous semiconductor, a semi-amorphous semiconductor, or a polycrystalline semiconductor. As the semiconductor, not only silicon but also silicon germanium can be used. When silicon germanium is used, the concentration of germanium is preferably about 0.01 to 4.5 atomic%.

An amorphous semiconductor can be obtained by glow discharge decomposition of a gas containing silicon. As a typical gas containing silicon, SiH ₄ and Si ₂ H ₆ can be given. This gas containing silicon may be diluted with hydrogen or hydrogen and helium.

As described above, the semi-amorphous semiconductor can be obtained by glow discharge decomposition of a gas containing silicon. In the gas containing silicon, a carbide gas such as CH ₄ and C ₂ H ₆ , GeH ₄ , GeF _The energy band width may be adjusted to 1.5 to 2.4 eV or 0.9 to 1.1 eV by mixing germanium gas such as ₄ or F ₂ .

For example, when using a gas added with _{H 2} to SiH _4, or the case of using the added gas _{F 2} to SiH _4, when TFT is formed by using the formed semi-amorphous semiconductor, the subthreshold coefficient of the TFT (S Value) can be 0.35 V / dec or less, typically 0.25 to 0.09 V / dec, and the mobility can be 10 cm ² / Vsec. When a TFT using the semi-amorphous semiconductor, for example, a 19-stage ring oscillator is formed, characteristics with an oscillation frequency of 1 MHz or more, preferably 100 MHz or more can be obtained at a power supply voltage of 3 to 5 V. In addition, at a power supply voltage of 3 to 5 V, the delay time per inverter stage can be 26 ns, preferably 0.26 ns or less.

  Next, the semiconductor film is irradiated with a linear beam from a laser irradiation apparatus to be crystallized.

  In the case of performing laser crystallization, heat treatment at 500 ° C. for 1 hour may be added to the semiconductor film before laser crystallization in order to increase the resistance of the semiconductor film to the laser.

  For laser crystallization, a pulsed laser having an oscillation frequency of 10 MHz or more, preferably 80 MHz or more can be used as a continuous wave laser (CW laser) or a pseudo CW laser.

Specifically, as a continuous wave laser, Ar laser, Kr laser, CO ₂ laser, YAG laser, YVO ₄ laser, forsterite (Mg ₂ SiO ₄ ) laser, YLF laser, YAlO ₃ laser, GdVO ₄ laser, Y ₂ O ₃ laser, alexandrite laser, Ti: sapphire laser, helium cadmium laser, polycrystalline (ceramic) YAG, Y ₂ O ₃ , YVO ₄ , YAlO ₃ , GdVO ₄ as dopants Nd, Yb, Cr, Ti, Ho , Er, Tm, Ta, or the like, or a laser having a medium added with one or more of them.

As a pseudo CW laser, an Ar laser, a Kr laser, an excimer laser, a CO ₂ laser, a YAG laser, a Y ₂ O ₃ laser, a YVO can be used as long as it can oscillate a pulse having an oscillation frequency of 10 MHz or more, preferably 80 MHz or more. ₄ laser, forsterite (Mg ₂ SiO ₄ ) laser, YLF laser, YAlO ₃ laser, GdVO ₄ laser, alexandrite laser, Ti: sapphire laser, copper vapor laser or gold vapor laser, polycrystalline (ceramic) YAG, Y ₂ A pulse like a laser in which one or more of Nd, Yb, Cr, Ti, Ho, Er, Tm, and Ta are added as dopants to O ₃ , YVO ₄ , YAlO ₃ , and GdVO ₄ as a medium. An oscillation laser can be used.

  Such a pulsed laser has an effect equivalent to that of a continuous wave laser as the oscillation frequency is increased.

For example, when a solid-state laser capable of continuous oscillation is used, a crystal having a large grain size can be obtained by irradiating laser light of second to fourth harmonics. Typically, it is desirable to use the second harmonic (532 nm) or the third harmonic (355 nm) of a YAG laser (fundamental wave 1064 nm). For example, laser light emitted from a continuous wave YAG laser is converted into a harmonic by a non-linear optical element and irradiated onto a semiconductor film. Energy density may be about 0.01 to 100 MW / cm ² (preferably 0.1~10MW / cm ^2). Irradiation is performed at a scanning speed of about 10 to 2000 cm / sec.

Note that single crystal YAG, YVO ₄ , forsterite (Mg ₂ SiO ₄ ), YAlO ₃ , GdVO ₄ , or polycrystalline (ceramic) YAG, Y ₂ O ₃ , YVO ₄ , YAlO ₃ , GdVO ₄ , dopants Nd, Yb, Cr, Ti, Ho, Er, Tm, and Ta, a laser that uses one or a plurality of types added as a medium, Ar laser, Kr laser, or Ti: sapphire laser It is also possible to cause pulse oscillation by performing Q switch operation, mode synchronization, and the like. When the laser beam is oscillated at an oscillation frequency of 10 MHz or more, the semiconductor film is irradiated with the next pulse during the period from when the semiconductor film is melted by the laser to solidification. Therefore, unlike the case of using a pulse laser having a low oscillation frequency, the solid-liquid interface can be continuously moved in the semiconductor film, so that crystal grains continuously grown in the scanning direction can be obtained.

  When ceramic (polycrystal) is used as the medium, it is possible to form the medium in a free shape in a short time and at low cost. When a single crystal is used, a cylindrical medium having a diameter of several millimeters and a length of several tens of millimeters is usually used. However, when ceramic is used, a larger one can be made.

  Since the concentration of dopants such as Nd and Yb in the medium that directly contributes to light emission cannot be changed greatly regardless of whether it is a single crystal or a polycrystal, there is a certain limit to improving the laser output by increasing the concentration. However, in the case of ceramic, since the size of the medium can be remarkably increased as compared with the single crystal, there is a possibility that the output is greatly improved.

  Further, in the case of ceramic, a medium having a parallelepiped shape or a rectangular parallelepiped shape can be easily formed. When a medium having such a shape is used to cause oscillation light to travel in a zigzag manner inside the medium, the oscillation optical path can be made longer. As a result, amplification is increased and oscillation can be performed with high output. Further, since the laser beam emitted from the medium having such a shape has a quadrangular cross-sectional shape at the time of emission, it is advantageous for shaping into a linear beam as compared with a round beam. By shaping the emitted laser beam using an optical system, it is possible to easily obtain a linear beam having a short side length of 1 mm or less and a long side length of several mm to several m. Become. In addition, by irradiating the medium with the excitation light uniformly, the linear beam has a uniform energy distribution in the long side direction.

  By irradiating the semiconductor film with this linear beam, the entire surface of the semiconductor film can be annealed more uniformly. When uniform annealing is required up to both ends of the linear beam, it is necessary to arrange a slit at both ends to shield the energy attenuating portion.

  By irradiating the semiconductor film with the laser light, a crystalline semiconductor film with higher crystallinity is formed.

  Next, island-shaped semiconductor films 621 to 623 are formed using the obtained crystalline semiconductor film. This island-like semiconductor film becomes an active layer of a TFT formed in the subsequent process.

Next, impurities for threshold control are introduced into the island-shaped semiconductor films 621 to 623. In this embodiment, boron (B) is introduced into the island-shaped semiconductor films 621 to 623 by doping with diborane (B ₂ H ₆ ).

  Next, an insulating film is formed so as to cover the island-shaped semiconductor films 621 to 623. For the insulating film, for example, silicon oxide, silicon nitride, silicon oxide containing nitrogen, or the like can be used. As a film formation method, a plasma CVD method, a sputtering method, or the like can be used.

  Next, gate insulating films 661 to 663 are formed over the island-shaped semiconductor films 621 to 623 using the insulating film, respectively.

  A first conductive film and a second conductive film are formed to cover the island-shaped semiconductor films 621 to 623 and the gate insulating films 661 to 663.

  The first conductive film and the second conductive film each include an element selected from tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), and aluminum (Al), or the element as a main component. The alloy material or the compound material to be laminated is laminated.

  In this embodiment, as the first conductive film, for example, a tantalum nitride (TaN) film is formed with a thickness of 10 to 50 nm, for example, 30 nm. Then, as the second conductive film, for example, a tungsten (W) film is formed with a thickness of 200 to 400 nm, for example, 370 nm on the first conductive film, and a stacked film of the first conductive film and the second conductive film is formed. Form.

  Next, the second conductive film is etched by anisotropic etching to form upper layer gate electrodes 671b to 673b. Next, the first conductive film is etched by isotropic etching to form lower gate electrodes 671a to 673a. Thus, gate electrodes 671 to 673 are formed.

  The gate electrodes 671 to 673 may be formed as part of the gate wiring, or another gate wiring may be formed and the gate electrodes 671 to 673 may be connected to the gate wiring.

  Next, a resist is formed so as to cover the island-shaped semiconductor film 622, the gate insulating film 662, and the gate electrode 672 which are active layers of the p-channel TFT 612.

  Then, using the gate electrode 671 and the gate insulating film 661 as a mask, an impurity imparting n-type conductivity is added to the island-shaped semiconductor film 621 to form a channel formation region 631, a low concentration impurity region 632, and a source region or a drain region 633. To do. At the same time, using the gate electrode 673 and the gate insulating film 663 as a mask, an impurity imparting n-type conductivity is added to the island-shaped semiconductor film 623 so that the channel formation region 651, the low-concentration impurity region 652, the source region or the drain region 653 are formed. Form.

First, phosphorus is used as an element imparting n-type, phosphine (PH ₃ ) is used, phosphorus (P) is accelerated to 40 to 100 keV, for example 60 keV, and the dose is set to 1 × 10 ¹³ to 1 × 10 ^15. It introduce | transduces into the island-like semiconductor films 621 and 623 as cm ^{< -2>} , for example, 2.6 * 10 ^{< 13} > cm ^<-2 >. When this impurity is introduced, a channel formation region 631 of the n-channel TFT 611 and a channel formation region 651 of the n-channel TFT 613 are formed.

Next, in the island-shaped semiconductor films 621 and 623, using phosphine (PH ₃ ), an applied voltage of 10 to 60 keV, for example, 20 keV, a dose amount of 5.0 × 10 ^{14 to} 2.5 × 10 ¹⁶ cm ⁻² , for example, 3 Phosphorus (P) is introduced at 0.0 × 10 ¹⁵ cm ⁻² . As a result, a low concentration impurity region 632 and a source or drain region 633 of the n-channel TFT 611 are formed. Further, a low concentration impurity region 652 and a source or drain region 653 of the n-channel TFT 613 are formed.

In this embodiment, the source region or drain region 633 of the n-channel TFT 611 and the source region or drain region 653 of the n-channel TFT 613 are phosphorous at a concentration of 1 × 10 ^{19 to} 5 × 10 ²¹ cm ⁻³ , respectively. (P) will be included. The low-concentration impurity region 632 of the n-channel TFT 611 and the low-concentration impurity region 652 of the n-channel TFT 613 contain phosphorus (P) at a concentration of 1 × 10 ^{18 to} 5 × 10 ¹⁹ cm ⁻³ .

  Next, the resist over the island-shaped semiconductor film 622, the gate insulating film 662, and the gate electrode 672 is removed, and the island-shaped semiconductor film 621, the gate insulating film 661 and the gate electrode 671, and the island-shaped semiconductor film 623, the gate insulating film 663, and A resist is formed so as to cover the gate electrode 673.

In order to fabricate the p-channel TFT 612, diborane (B ₂ H ₆ ) is applied with an applied voltage of 60 to 100 keV, for example, 80 keV, and a dose amount of 1 × 10 ^{13 to} 5 × 10 ¹⁵ cm ⁻² , for example, 3 × 10 ¹⁵ cm ^−2. Under the conditions, boron (B) is introduced into the island-shaped semiconductor film 622. As a result, a source region or drain region 642 of the p-channel TFT and a channel formation region 641 are formed when this impurity is introduced.

  Note that in the p-channel TFT 612, when boron is introduced, since the applied voltage is high, sufficient boron is sufficient to form the source region or the drain region 642 through the lower gate electrode 672 a and the gate insulating film 662. Added in the membrane 622.

The source region or drain region 642 of the p-channel TFT 612 contains boron (B) at a concentration of 1 × 10 ^{19 to} 5 × 10 ²¹ cm ⁻³ .

  Next, after removing the resist, an insulating film for forming a sidewall is formed so as to cover the island-shaped semiconductor films 621 to 623, the gate insulating films 661 to 663, and the gate electrodes 671 to 673.

  This insulating film can be formed using a silicon oxide film or a silicon oxide film containing nitrogen by a plasma CVD method or a low pressure CVD (LPCVD) method. In this embodiment, a silicon oxide film is formed with a thickness of 50 to 200 nm, preferably 100 nm, by plasma CVD.

  Next, by etching the insulating film, sidewalls 665 are formed on the side surfaces of the gate insulating film 661 and the gate electrode 671, sidewalls 666 are formed on the side surfaces of the gate insulating film 662 and the gate electrode 672, and the gate insulating film 663 and Sidewalls 667 are formed on side surfaces of the gate electrode 673. The sidewalls 665 to 667 are formed to have a tapered shape or a rectangular shape. In this embodiment, the tapered sidewalls 665 to 667 are formed.

  Next, a metal film is formed to cover the island-shaped semiconductor films 621 to 623, the gate insulating films 661 to 663, the gate electrodes 671 to 673, and the sidewalls 665 to 667.

  As the metal film, titanium (Ti), nickel (Ni), cobalt (Co), tungsten (W), platinum (Pt), or the like can be used. In this embodiment, a nickel film is formed with a thickness of 10 nm as the metal film.

  Next, the island-shaped semiconductor films 621 to 623 on which the metal film is formed are heated by applying a thermal annealing method using a furnace annealing furnace, a laser annealing method, or a rapid thermal annealing method (RTA method). Thus, a silicide region 635 is formed in the island-shaped semiconductor film 621, a silicide region 645 is formed in the island-shaped semiconductor film 622, and a silicide region 655 is formed in the island-shaped semiconductor film 623. In this embodiment, silicide regions 635, 645, and 655 are formed by heating at a temperature of 350 ° C. or higher by a rapid thermal annealing method.

  After the silicide regions 635, 645, and 655 are formed, the unreacted metal film is removed by etching with a chemical solution such as sulfuric acid or nitric acid.

  Through the above steps, an n-channel TFT 611, a p-channel TFT 612, and an n-channel TFT 613 are formed (see FIG. 9A). In this embodiment, the TFTs 611 to 613 have a top gate structure, but may have a bottom gate structure (reverse stagger structure).

  The n-channel TFT 611 has a gate electrode 671 including an island-shaped semiconductor film 621, a gate insulating film 661, a lower gate electrode 671a, and an upper gate electrode 671b on the upper base film 603c. In the island-shaped semiconductor film 621, a channel formation region 631, a low concentration impurity region 632, a source or drain region 633, and a silicide region 635 are formed. The silicide region 635 is formed in a part of the source region or the drain region 633. Sidewalls 665 are formed on the side surfaces of the gate insulating film 661 and the gate electrode 671.

  The p-channel TFT 612 includes a gate electrode 672 including an island-shaped semiconductor film 622, a gate insulating film 662, a lower gate electrode 672a, and an upper gate electrode 672b on the upper base film 603c. In the island-shaped semiconductor film 622, a channel formation region 641, a source or drain region 642, and a silicide region 645 are formed. The silicide region 645 is formed in a part of the source region or the drain region 642. Sidewalls 666 are formed on side surfaces of the gate insulating film 662 and the gate electrode 672.

  The n-channel TFT 613 includes a gate electrode 673 including an island-shaped semiconductor film 623, a gate insulating film 663, a lower gate electrode 673a, and an upper gate electrode 673b on the upper base film 603c. In the island-shaped semiconductor film 623, a channel formation region 651, a low concentration impurity region 652, a source or drain region 653, and a silicide region 655 are formed. The silicide region 655 is formed in a part of the source region or the drain region 653. Sidewalls 667 are formed on side surfaces of the gate insulating film 663 and the gate electrode 673.

  Furthermore, after that, a passivation film 681 for protecting the TFTs 611 to 613 may be formed. As the passivation film 681, it is preferable to use silicon nitride, silicon oxide containing nitrogen, aluminum nitride, aluminum oxide, silicon oxide, or the like which can prevent alkali metal or alkaline earth metal from entering the TFTs 611 to 613. Specifically, for example, a silicon oxide film containing nitrogen with a thickness of about 600 nm can be used as the passivation film. In this case, the hydrogenation process may be performed after the silicon oxide film containing nitrogen is formed. By using the above configuration, since the TFT 611 to TFT 613 are covered with the base film 603 and the passivation film 681, alkali metal such as Na or alkaline earth metal diffuses into the semiconductor film used for the semiconductor element, An adverse effect on the electrical characteristics of the semiconductor element can be further prevented.

  Next, a first interlayer insulating film 682 is formed so as to cover the TFTs 611 to 613 and the passivation film 681. The first interlayer insulating film 682 can be formed using a heat-resistant organic resin such as polyimide, acrylic, or polyamide. In addition to the organic resin, a low dielectric constant material (low-k material), a resin including a Si—O—Si bond formed using a siloxane-based material as a starting material (hereinafter referred to as a siloxane-based resin), or the like is used. be able to.

  Siloxane has a skeletal structure with a bond of silicon (Si) and oxygen (O), and an organic group containing at least hydrogen (for example, an alkyl group or an aryl group) is used as a substituent. Further, a fluoro group may be used as a substituent. Further, as a substituent, an organic group containing at least hydrogen and a fluoro group may be used.

  For the formation of the first interlayer insulating film 682, depending on the material, spin coating, dipping, spray coating, droplet discharge method (ink jet method, screen printing, offset printing, etc.), doctor knife, roll coater, curtain coater A knife coater or the like can be employed. In addition, an inorganic material may be used. In that case, silicon oxide, silicon nitride, silicon oxynitride, PSG (phosphorus glass), BPSG (phosphorus boron glass), an alumina film, or the like can be used. Note that the first interlayer insulating film 682 may be formed by stacking these insulating films.

  Further, in this embodiment, a second interlayer insulating film 683 is formed on the first interlayer insulating film 682. As the second interlayer insulating film 683, a film containing carbon such as DLC (diamond-like carbon) or carbon nitride (CN), a silicon oxide film, a silicon nitride film, a silicon oxide film containing nitrogen, or the like is used. it can. As a formation method, a plasma CVD method, an atmospheric pressure plasma, or the like can be used. Alternatively, a photosensitive or non-photosensitive organic material such as polyimide, acrylic, polyamide, resist, or benzocyclobutene, a siloxane resin, or the like may be used.

  Note that the first interlayer insulating film 682 or the second interlayer insulating film 683 and the first interlayer insulating film 682 or the like due to a stress generated from a difference in thermal expansion coefficient between a conductive material or the like that forms a wiring to be formed later In order to prevent the second interlayer insulating film 683 from peeling or cracking, a filler may be mixed in the first interlayer insulating film 682 or the second interlayer insulating film 683.

Next, contact holes are formed in the first interlayer insulating film 682 and the second interlayer insulating film 683. Next, electrodes or wirings 691 to 695 connected to the TFTs 611 to 613 are formed through the contact holes. In this embodiment, the electrode and the wiring are integrally formed. However, the electrode and the wiring may be separately formed and electrically connected. A gas used for etching at the time of forming the contact hole is a mixed gas of CHF ₃ and He, but is not limited to this. In this embodiment, a titanium (Ti) film, a titanium nitride (TiN) film, an aluminum (Al-Si) film containing silicon, a titanium (Ti) film, and a titanium nitride (TiN) film are stacked to form a five-layer structure. Electrodes or wirings 691 to 695 are formed by using a sputtering method.

  Note that silicon (Si) is mixed in the aluminum (Al) film (sometimes referred to as “Al—Si” in this specification) to prevent generation of hillocks in resist baking during wiring formation. it can. Further, instead of Si, about 0.5% Cu may be mixed. Further, the hillock resistance is further improved by sandwiching the Al—Si layer with titanium (Ti) or titanium nitride (TiN). In the etching, it is desirable to use the hard mask made of silicon oxide containing nitrogen. Note that the wiring material and the formation method are not limited to these, and the material used for the gate electrode described above may be employed.

  Alternatively, the electrodes or wirings 691 to 695 may be formed of an aluminum alloy film containing carbon, at least one element selected from nickel, cobalt, and iron. Such an aluminum alloy film can prevent mutual diffusion of silicon and aluminum even when it comes into contact with silicon. In addition, since such an aluminum alloy film does not cause a redox reaction even when it comes into contact with a transparent conductive film, for example, an ITO (Indium Tin Oxide) film, it is possible to directly contact them. Furthermore, such an aluminum alloy film is useful as a wiring material because of its low specific resistance and excellent heat resistance.

  Note that the electrode or wiring 691 and the electrode or wiring 692 are electrically connected to a silicide region in the source region or the drain region 633 of the n-channel TFT 611. The electrode or wiring 692 and the electrode or wiring 693 are electrically connected to the silicide region in the source region or drain region 642 of the p-channel TFT 612. The electrode or wiring 694 and the electrode or wiring 695 are electrically connected to the silicide region in the source region or drain region 653 of the n-channel TFT 613. Further, the electrode or wiring 695 is also connected to the gate electrode 673 of the n-channel TFT 613. The n-channel TFT 613 can be used as a memory element of a random number ROM (see FIG. 9B).

  Next, a third interlayer insulating film 701 is formed over the second interlayer insulating film 683 so as to cover the electrodes or wirings 691 to 695. The third interlayer insulating film 701 is formed to have an opening at a position where the electrode or wiring 691 is partially exposed. Note that the third interlayer insulating film 701 can be formed using a material similar to that of the first interlayer insulating film 682.

  Next, an antenna 705 is formed over the third interlayer insulating film 701 (see FIG. 10A). The antenna 705 is formed using a conductive material having one or more metals such as Ag, Au, Cu, Pd, Cr, Mo, Ti, Ta, W, Al, Fe, Co, Zn, Sn, and Ni, or a metal compound. Can do. The antenna 705 is connected to an electrode or wiring 691. In FIG. 10A, the antenna 705 is directly connected to the electrode or the wiring 691, but the ID chip of the present invention is not limited to this structure. For example, the antenna 705 and the electrode or wiring 691 may be electrically connected using a separately formed wiring.

  The antenna 705 can be formed by a printing method, a photolithography method, an evaporation method, a droplet discharge method, or the like. In this embodiment, the antenna 705 is formed of a single-layer conductive film, but it is also possible to form the antenna 705 in which a plurality of conductive films are stacked. For example, the antenna 705 may be formed by coating a wiring formed of Ni or the like with electroless plating.

  The droplet discharge method means a method of forming a predetermined pattern by discharging droplets containing a predetermined composition from the pores, and includes an ink jet method and the like in its category. The printing method includes a screen printing method and an offset printing method. By using a printing method or a droplet discharge method, the antenna 705 can be formed without using an exposure mask. In addition, unlike the photolithography method, there is no waste of material that is removed by etching in the droplet discharge method and the printing method. In addition, since it is not necessary to use an expensive exposure mask, the cost for manufacturing the ID chip can be suppressed.

  In the case of using a droplet discharge method or various printing methods, for example, conductive particles in which Cu is coated with Ag can be used. Note that in the case where the antenna 705 is formed by a droplet discharge method, it is preferable that treatment for increasing the adhesion of the antenna 705 be performed on the surface of the third interlayer insulating film 701.

  As a method for improving the adhesion, specifically, for example, a method of attaching a metal or a metal compound capable of enhancing the adhesion of the conductive film or the insulating film to the surface of the third interlayer insulating film 701 by catalytic action. An organic insulating film having high adhesion to the formed conductive film or insulating film, a method of attaching a metal or a metal compound to the surface of the third interlayer insulating film 701, and a surface of the third interlayer insulating film 701 Examples include a method of performing surface modification by performing plasma treatment under atmospheric pressure or reduced pressure. Examples of the metal having high adhesion to the conductive film or insulating film include titanium, titanium oxide, 3d transition elements such as Sc, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, and Zn. Is mentioned. Examples of the metal compound include the above-described metal oxides, nitrides, and oxynitrides. Examples of the organic insulating film include polyimide and a resin containing siloxane.

  When the metal or metal compound attached to the third interlayer insulating film 701 has conductivity, the sheet resistance is controlled so that the normal operation of the antenna is not hindered. Specifically, the average thickness of the conductive metal or metal compound is controlled to be, for example, 1 to 10 nm, or the metal or metal compound is partially or entirely insulated by oxidation. Just do it. Alternatively, the deposited metal or metal compound may be selectively removed by etching except for the region where the adhesion is desired to be improved. Alternatively, the metal or the metal compound may be selectively attached only to a specific region by using a droplet discharge method, a printing method, a sol-gel method, or the like, instead of attaching the metal or the metal compound to the entire surface of the substrate in advance. Note that the metal or metal compound does not need to be a completely continuous film on the surface of the third interlayer insulating film 701, and may be dispersed to some extent.

  Then, as shown in FIG. 10B, after the antenna 705 is formed, a protective layer 711 is formed over the third interlayer insulating film 701 so as to cover the antenna 705. The protective layer 711 is formed using a material that can protect the antenna 705 when the peeling layer 602 is removed later by etching. For example, the protective layer 711 can be formed by applying an epoxy resin, an acrylate resin, or a resin containing silicon that is soluble in water or alcohols to the entire surface.

  In this example, a water-soluble resin (manufactured by Toagosei Co., Ltd .: VL-WSHL10) is applied by spin coating so as to have a film thickness of 30 μm, and after exposure for 2 minutes for temporary curing, UV light is applied to the back surface. Exposure to 2.5 minutes and 10 minutes from the surface for a total of 12.5 minutes to perform main curing to form the protective layer 711. In addition, when laminating | stacking a some organic resin, there exists a possibility that organic resins may melt | dissolve partially at the time of application | coating or baking with the solvent currently used, or adhesiveness may become high too much. Therefore, in the case where an organic resin that is soluble in the same solvent is used for both the third interlayer insulating film 701 and the protective layer 711, the third interlayer insulating film is removed so that the protective layer 711 can be removed smoothly in the subsequent process. An inorganic insulating film (a silicon nitride film, a silicon nitride film containing oxygen, a silicon oxide film containing nitrogen, an aluminum nitride film, an aluminum nitride film containing oxygen, or an aluminum oxide film containing nitrogen) is formed so as to cover 701. It is preferable to keep it.

  Next, as shown in FIG. 11A, an opening (also referred to as a groove) 715 is formed in order to separate the ID chips. The opening 715 may be of a size that exposes the release layer 602. The opening 715 can be formed by dicing, scribing, or the like. Note that in the case where it is not necessary to separate the ID chip formed over the first substrate 601, the opening 715 is not necessarily formed.

Next, as shown in FIG. 12B, the peeling layer 602 is removed by etching. In this embodiment, halogen fluoride is used as an etching gas, and the gas is introduced from the opening 715. In this embodiment, for example, ClF ₃ (chlorine trifluoride) is used under the conditions of temperature: 350 ° C., flow rate: 300 sccm, atmospheric pressure: 798 Pascal (798 Pa), and time: 3 h. Further, a gas in which nitrogen is mixed with ClF ₃ gas may be used. By using halogen fluoride such as ClF ₃ , the separation layer 602 is selectively etched, and the first substrate 601 can be separated from the TFTs 611 to 613. The halogen fluoride may be either a gas or a liquid.

  Next, as illustrated in FIG. 12A, the peeled TFT 611 to TFT 613 and the antenna 705 are attached to the second substrate 721 using an adhesive 722. The adhesive 722 is formed using a material capable of bonding the second substrate 721 and the base film 603 together. As the adhesive 722, for example, various curable adhesives such as a reaction curable adhesive, a thermosetting adhesive, a photocurable adhesive such as an ultraviolet curable adhesive, and an anaerobic adhesive can be used.

  As the second substrate 721, an organic material such as flexible paper or plastic can be used. Alternatively, a flexible inorganic material may be used as the second substrate 721. As the plastic substrate, ARTON (manufactured by JSR) made of polynorbornene with a polar group can be used. Polyester represented by polyethylene terephthalate (PET), polyethersulfone (PES), polyethylene naphthalate (PEN), polycarbonate (PC), nylon, polyetheretherketone (PEEK), polysulfone (PSF), polyetherimide (PEI), polyarylate (PAR), polybutylene terephthalate (PBT), polyimide, acrylonitrile butadiene styrene resin, polyvinyl chloride, polypropylene, polyvinyl acetate, acrylic resin and the like. The second substrate 721 preferably has a high thermal conductivity of about 2 to 30 W / mK in order to diffuse the heat generated in the integrated circuit.

  Next, as shown in FIG. 12B, after the protective layer 711 is removed, an adhesive 726 is applied over the third interlayer insulating film 701 so as to cover the antenna 705, and a cover material 725 is attached. The cover material 725 can be formed using a flexible organic material such as paper or plastic, like the second substrate 721. The thickness of the adhesive 726 may be, for example, 10 to 200 μm.

  For the adhesive 726, a material that can bond the cover material 725 to the third interlayer insulating film 701 and the antenna 705 is used. As the adhesive 726, various curable adhesives such as a reactive curable adhesive, a thermosetting adhesive, a photocurable adhesive such as an ultraviolet curable adhesive, and an anaerobic adhesive can be used.

The ID chip is completed through the above-described steps. By the above manufacturing method, an extremely thin integrated circuit having a total film thickness of 0.3 μm to 3 μm, typically about 2 μm, can be formed between the second substrate 721 and the cover material 725. Note that the thickness of the integrated circuit includes not only the thickness of the semiconductor element itself but also the thicknesses of various insulating films and interlayer insulating films formed between the adhesive 722 and the adhesive 726. The area occupied by the integrated circuit included in the ID chip, 5 mm square (25 mm ²⁾ or less, and more preferably may be 0.3mm square (0.09 mm ²⁾ to 4 mm square (16 mm ²⁾ degree.

  Note that the mechanical strength of the ID chip can be increased by positioning the integrated circuit at a more central position between the second substrate 721 and the cover material 725. Specifically, when the distance between the second substrate 721 and the cover material 725 is d, the distance x between the second substrate 721 and the center in the thickness direction of the integrated circuit satisfies the following formula 3. As described above, it is desirable to control the thicknesses of the adhesive 722 and the adhesive 726.

  Preferably, the thicknesses of the adhesive 722 and the adhesive 726 are controlled so as to satisfy the following formula 4.

  Note that FIG. 12B illustrates an example in which the cover member 725 is used; however, the present invention is not limited to this structure. For example, the process may be ended up to the step shown in FIG.

  Note that in this embodiment, a method is described in which a peeling layer is provided between the first substrate 601 with high heat resistance and the integrated circuit, and the peeling layer is removed by etching, whereby the substrate and the integrated circuit are peeled off. The manufacturing method of the ID chip of the present invention is not limited to this configuration. For example, a metal oxide film may be provided between a substrate having high heat resistance and the integrated circuit, and the integrated circuit may be peeled by weakening the metal oxide film by crystallization. Alternatively, a separation layer using an amorphous semiconductor film containing hydrogen is provided between a substrate with high heat resistance and an integrated circuit, and the separation layer is removed by laser light irradiation to separate the substrate and the integrated circuit. You may do it. Alternatively, the integrated circuit may be separated from the substrate by mechanically removing the highly heat-resistant substrate on which the integrated circuit is formed or removing the substrate by etching with a solution or gas.

  In order to ensure the flexibility of the ID chip, in the case where an organic resin is used for the adhesive 722 in contact with the base film 603, a silicon nitride film or a silicon oxide film containing nitrogen is used as the base film 603. Alkali metals such as Na and alkaline earth metals can be prevented from diffusing into the semiconductor film.

  Further, the surface of the object has a curved surface, whereby the second substrate 721 of the ID chip bonded to the curved surface is bent so as to have a curved surface drawn by the movement of the generating line such as a conical surface or a column surface. In this case, it is desirable to align the direction of the bus and the direction in which the carriers of the TFTs 611 to 613 move. With the above structure, even when the second substrate 721 is bent, it can be prevented that the electrical characteristics of the TFTs 611 to 613 are affected. Further, by setting the ratio of the area occupied by the island-shaped semiconductor film in the integrated circuit to 1 to 30%, even if the second substrate 721 is bent, the electrical characteristics of the TFTs 611 to 613 are affected thereby. Can be further suppressed.

  Note that although an example in which the antenna is formed over the same substrate as the integrated circuit has been described in this embodiment, the present invention is not limited to this structure. An antenna formed over another substrate and the integrated circuit may be bonded later to be electrically connected.

  In general, the frequency of radio waves used in an ID chip is 13.56 MHz and 2.45 GHz, and it is very important to increase the versatility to form an ID chip so that radio waves of that frequency can be detected. Is important to.

In addition, the ID chip of this embodiment has an advantage that radio waves are less shielded than an ID chip formed using a semiconductor substrate, and the signal can be prevented from being attenuated by shielding the radio waves. Therefore, it is not necessary to use a semiconductor substrate, so that the cost of the ID chip can be significantly reduced. For example, the case where a silicon substrate having a diameter of 12 inches is used is compared with the case where a glass substrate of 730 × 920 mm ² is used. The area of the former silicon substrate is about 73000 mm ² , while the area of the latter glass substrate is about 672000 mm ² , and the glass substrate corresponds to about 9.2 times the silicon substrate. When the area of the latter glass substrate is about 672000 mm ² , ignoring the area consumed by dividing the substrate, it is calculated that about 672,000 1 mm square ID chips can be formed, and the number is about 9.2 times that of the silicon substrate. It is equivalent to the number of Capital investment for mass production of ID chips requires fewer steps when using a 730 × 920 mm ² glass substrate than when using a 12-inch diameter silicon substrate. It can be done in a third. Further, in the present invention, the glass substrate can be used again after the integrated circuit is peeled off. Therefore, cost can be significantly reduced as compared with the case of using a silicon substrate, even in view of the expense of making up for a damaged glass substrate or cleaning the surface of the glass substrate. Even if the glass substrate is discarded without being reused, the cost of a 730 × 920 mm ² glass substrate is about half that of a silicon substrate having a diameter of 12 inches, which greatly reduces the cost of the ID chip. You can see that

Therefore, it can be seen that when a glass substrate of 730 × 920 mm ² is used, the price of the ID chip can be reduced to about 1/30 compared with the case of using a silicon substrate having a diameter of 12 inches. Since the ID chip can be used on the premise that it is disposable, the ID chip of the present invention, which can significantly reduce the cost, is very useful for the above application.

  Note that in this embodiment, the example in which the integrated circuit is separated and attached to a flexible substrate is described; however, the present invention is not limited to this structure. For example, in the case where a substrate having a heat resistant temperature that can withstand heat treatment in a manufacturing process of an integrated circuit, such as a glass substrate, is used, the integrated circuit is not necessarily peeled off.

  Further, this embodiment can be freely combined with the embodiment mode and other embodiments if necessary.

  In this embodiment, configurations of an ID chip and a sensor used in the biological information detection sensor of the present invention will be described with reference to FIGS.

  FIG. 13 illustrates a configuration of an ID chip 800 including an integrated circuit portion 801 and an antenna 802. The integrated circuit unit 801 includes a sensor unit (biological information detection unit) 806 that detects temperature, humidity, illuminance, and other characteristics by physical or chemical means. The sensor unit 806 includes a sensor 808 and a sensor circuit 809 that controls the sensor 808. The sensor 808 is formed of a semiconductor element such as a resistance element, a capacitive coupling element, an inductive coupling element, a photovoltaic element, a photoelectric conversion element, a thermoelectric element, a piezoelectric element, a transistor, a thermistor, or a diode. What is necessary is just to select the structure of the sensor 808 by what is detected with respect to biometric information. For example, when it is desired to detect a pulse, a piezoelectric element may be used. Moreover, what is necessary is just to use a thermoelectromotive force element and a resistive element in order to measure body temperature. The sensor circuit 809 detects changes in impedance, reactance, inductance, voltage, or current, performs analog / digital conversion (A / D conversion), and outputs a signal to the arithmetic processing circuit unit 803.

  The memory unit 804 includes one or both of a read-only memory and a rewritable memory. The memory unit 804 includes a static RAM (Static RAM), an EEPROM (Electrically Erasable Programmable Read-Only Memory), a flash memory, and the like, so that information from the outside received via the sensor unit 806 and the antenna 802 can be received as needed. Can be recorded. The memory unit 804 can be divided into a first memory unit 810 that stores a signal detected by the sensor unit 806 and a second memory unit 811 that records information written from the reader / writer device. Further, a read-only memory unit may be provided by a mask ROM or a programmable ROM.

  The first memory unit 810 is preferably composed of a flash memory or the like that allows sequential writing and records no data in order to record biological information detected by the sensor unit 806. In addition, it is preferable to apply a storage element having a floating gate structure, which can be written only once.

  The communication circuit unit 805 includes a demodulation circuit 812 and a modulation circuit 813. The demodulation circuit 812 demodulates a signal input via the antenna 802 and outputs the demodulated signal to the arithmetic processing circuit unit 803. The signal includes a signal for controlling the sensor unit 806 and information stored in the memory unit 804. In addition, a signal output from the sensor circuit 809 and information read from the memory unit 804 are output to the modulation circuit 813 through the arithmetic processing circuit unit 803. The modulation circuit 813 modulates this signal into a signal capable of wireless communication, and outputs the signal to an external device via the antenna 802.

  Electric power necessary for operating the arithmetic processing circuit unit 803, the sensor unit 806, the memory unit 804, and the communication circuit unit 805 is supplied via the antenna 802. The antenna 802 receives electromagnetic waves supplied from an external device called a reader / writer and generates necessary power in the power supply circuit unit 807. The antenna 802 may be designed as appropriate depending on a frequency band for communication. As a frequency band of electromagnetic waves, a long wave band up to 135 kHz, a short wave band of 6 to 60 MHz (typically 13.56 MHz), an ultra high frequency band of 400 to 950 MHz, a microwave band of 2 to 25 GHz, and the like can be used. As the long wave band or short wave band antenna, an antenna using electromagnetic induction by a loop antenna is used. In addition, a mutual inductive action (electromagnetic coupling method) or an electrostatic induction action (electrostatic coupling method) may be used. Electric power is generated by the power supply circuit unit 807. As the antenna 802, a data communication antenna and a power supply antenna may be provided separately.

  Such an antenna 802 is formed using a metal material containing aluminum, copper, or silver. For example, the antenna 802 can be formed using a paste composition of copper or silver by screen printing, offset printing, or an inkjet printing method. Alternatively, an antenna film 802 may be formed by etching and forming an aluminum film. In addition, the antenna 802 may be formed using an electrolytic plating method or an electroless plating method. Needless to say, the antenna 477 in Embodiment 2 and the antenna 705 in Embodiment 3 may be formed using the same material and the same manufacturing process.

  FIG. 14 shows an ID chip 820 in which the configuration of the memory portion 804 is changed in the ID chip 800 shown in FIG. The integrated circuit portion 821 is configured by a memory element having a floating gate structure in which the memory portion 822 can be sequentially written and data is not lost. In particular, it is preferable to use a memory element having a floating gate structure, which can be written only once. The ID chip 820 having this configuration has only a function of recording and reading data detected by the sensor 808. By simplifying the function, the ID chip 820 can be downsized. In addition, power can be saved.

  FIG. 15 shows an example of a reader / writer module 900 that transmits and receives information to and from the ID chip 800. The reader / writer module 900 includes a communication circuit unit 902 including an antenna 901, an oscillator 903, a demodulation circuit 904, and a modulation circuit 905. In addition, an arithmetic processing circuit unit 906 and an external interface unit 907 are provided and can be connected to an information processing apparatus such as a computer. In order to encrypt and transmit the control signal, the encryption / decryption circuit unit 908 and the memory unit 909 may be provided. The power supply circuit unit 910 supplies power to each circuit.

  The ID chip 800 illustrated in FIG. 13 and the ID chip 820 illustrated in FIG. 14 are configured by combining other active elements and passive elements such as a transistor manufactured using a single crystal semiconductor and a TFT manufactured using a polycrystalline semiconductor film. Of course, an ID chip may be formed based on the description in the second embodiment or the third embodiment.

FIG. 16 is a perspective view illustrating a configuration example of the ID chip 800 or the ID chip 820 in which the substrate 950, the element formation layer 951, and the antenna 802 are stacked. For example, the substrate 950 may be the same as the substrate 491 of the second embodiment and the substrate 721 of the third embodiment.
The element formation layer 951 includes, for example, the base film 403, the island-shaped semiconductor films 404 to 406, the gate insulating films 407 to 409, the gate electrodes 441 to 443, the passivation film 461, the interlayer insulating film 462, and the interlayer shown in FIG. An insulating film 463 and electrodes or wirings 471 are included. The element formation layer 951 includes a base film 603, island-shaped semiconductor films 621 to 623, gate insulating films 661 to 663, sidewalls 665 to 667, gate electrodes 671 to 673, a passivation film 681, shown in FIG. An interlayer insulating film 682, an interlayer insulating film 683, electrodes or wirings 691 to 695 may be included. The antenna 802 is connected to a circuit formed of TFTs. A protective film may be further formed over the antenna 802 using an inorganic insulating material or an organic insulating material. In this manner, the ID chip can be miniaturized by integrally forming the element formation layer 951 and the antenna 802. A sensor unit 806 is provided in the ID chip 800 or the ID chip 820. The sensor unit 806 may be configured such that a light introduction window or an electrode for measuring capacitance is provided and exposed.

  FIG. 17 shows an example of the sensor unit 806. The sensor unit 806 is a sensor that detects temperature. The sensor 808 is formed of a multi-stage ring oscillator 850 using TFTs. This utilizes the fact that the oscillation frequency of the ring oscillator 850 changes depending on the temperature. The threshold voltage of the TFT decreases as the temperature increases. The on-current increases as the threshold voltage decreases. The ring oscillator 850 has a characteristic that the oscillation frequency increases as the on-current of the TFT increases. Using this characteristic, the ring oscillator 850 can be used as a temperature sensor. The oscillation frequency of the ring oscillator 850 can be measured by the pulse counter 851 of the sensor circuit 809. The signal of the pulse counter 851 may be output to the arithmetic processing circuit unit 803 as it is or after being level-shifted. The body temperature of the human body can be measured by a sensor that detects this temperature.

  FIG. 18A illustrates an example of a sensor that detects the presence or absence of light. The sensor 808 is formed of a photodiode, a phototransistor, or the like. The sensor circuit 809 includes a sensor drive unit 852, a detection unit 853, and an A / D conversion unit 854. With a photodiode, phototransistor, etc., for example, the time during which the human body is exposed to ultraviolet light can be detected.

  FIG. 18B is a circuit diagram illustrating the detection unit 853. When the reset TFT 855 is turned on, a reverse bias voltage is applied to the sensor 808. Here, an operation in which the potential of the negative terminal of the sensor 808 is charged to the potential of the power supply voltage is referred to as “reset”. Thereafter, the reset TFT 855 is turned off. At that time, due to the electromotive force of the sensor 808, the potential state changes as time passes. In other words, the potential of the negative terminal of the sensor 808 that has been charged to the potential of the power supply voltage gradually decreases due to the charge generated by the photoelectric conversion. When the bias TFT 857 is turned on after a certain period of time has elapsed, a signal is output to the output side through the amplification TFT 856. In this case, the amplification TFT 856 and the bias TFT 857 operate as a so-called source follower circuit.

  Although FIG. 18B shows an example in which the source follower circuit is formed of an n-channel TFT, it can of course be formed of a p-channel TFT. A power supply voltage Vdd is applied to the amplification side power supply line 858. The bias-side power line 859 is given a reference potential of 0 volts. The drain terminal of the amplification TFT 856 is connected to the amplification side power supply line 858, and the source terminal of the amplification TFT 856 is connected to the drain terminal of the bias TFT 857. The source terminal of the bias TFT 857 is connected to the bias side power supply line 859. A bias voltage Vb is applied to the gate terminal of the bias TFT 857, and a bias current Ib flows through the TFT. The bias TFT 857 basically operates as a constant current source. The input voltage Vin is applied to the gate terminal of the amplifying TFT 856, and the source terminal becomes the output terminal. The input / output relationship of this source follower circuit is Vout = Vin−Vb. This output voltage Vout is converted into a digital signal by the A / D converter 854. The digital signal is output to the arithmetic processing circuit unit 803.

  FIG. 19 shows an example in which a sensor 808 is provided with an element for detecting capacitance. The element for detecting the capacitance includes a pair of electrodes. A medium such as liquid or gas is filled between the electrodes. By detecting the change in capacitance between the pair of electrodes, for example, the body temperature, pulse and muscle movement of the human body are detected. In addition, by interposing a polyimide, acrylic or other hygroscopic dielectric material between a pair of electrodes, it is also possible to detect sweating of the human body by reading minute changes in electrical resistance.

  The sensor circuit 809 has the following configuration. An oscillation circuit (pulse generator) 860 generates a measurement reference signal and inputs the signal to the electrode of the sensor 808. The voltage at this time is also input to the voltage detection circuit 861. The reference signal detected by the voltage detection circuit 861 is converted into a voltage signal indicating an effective value by the conversion circuit 863. A current flowing between the electrodes of the sensor 808 is detected by a current detection circuit 862. The signal detected by the current detection circuit 862 is converted into a current signal indicating an effective value by the conversion circuit 864. The arithmetic circuit 866 calculates an electrical parameter such as impedance or admittance by performing arithmetic processing on the voltage signal output from the conversion circuit 863 and the current signal output from the conversion circuit 864. Further, the output of the voltage detection circuit 861 and the output of the current detection circuit 862 are input to the phase comparison circuit 865. The phase comparison circuit 865 outputs the phase difference between the two signals to the arithmetic circuit 867. The arithmetic circuit 867 calculates the capacitance using the output signals of the arithmetic circuit 866 and the phase comparison circuit 865. Then, the signal is output to the arithmetic processing circuit unit 803.

  In the present embodiment, a configuration in which the sensor unit (biological information detection unit) 108 is built in the ID chip is shown. However, the sensor unit may be formed separately from the ID chip.

  Further, this embodiment can be freely combined with the embodiment mode and other embodiments if necessary.

  According to the present invention, it is possible to obtain a biological information detection sensor that is hygienic and can be easily replaced.

The figure which shows the biometric information detection sensor of this invention. The figure which shows the biometric information detection sensor of this invention. The figure which shows the biometric information detection sensor of this invention. The figure which shows the biometric information detection sensor of this invention. 4A and 4B show a manufacturing process of an ID chip of the present invention. 4A and 4B show a manufacturing process of an ID chip of the present invention. 4A and 4B show a manufacturing process of an ID chip of the present invention. 4A and 4B show a manufacturing process of an ID chip of the present invention. 4A and 4B show a manufacturing process of an ID chip of the present invention. 4A and 4B show a manufacturing process of an ID chip of the present invention. 4A and 4B show a manufacturing process of an ID chip of the present invention. 4A and 4B show a manufacturing process of an ID chip of the present invention. The figure which shows the structure of the ID chip | tip of this invention. The figure which shows the structure of the ID chip | tip of this invention. 1 is a diagram showing a configuration of a reader / writer module of the present invention. The perspective view which shows the example of 1 structure of ID chip | tip of this invention. The block diagram explaining the structure of the sensor part of this invention. The block diagram and circuit diagram explaining the structure of the sensor part of this invention. The block diagram explaining the structure of the sensor part of this invention.

Explanation of symbols

101 Biological information detection sensor 102 Antenna 103 Adhesive tape 104 Groove 105 Fixing mechanism 106 Wrist 108 Sensor unit 111 R / W machine 112 Display unit 113 Display unit 114 Antenna 115 Operation button 201 Newborn 201a Newborn 201b Newborn 201c Newborn 202 Wrist 204 Bed 205 Newborn Chamber 211 Biological information detection sensor system 212 Biological information detection sensor 213 Antenna 214 Adhesive tape 401 Substrate 402 Release layer 403 Base film 403a Lower base film 403b Middle base film 403c Upper base film 404 Island semiconductor film 405 Island semiconductor film 406 Island shape Semiconductor film 407 Gate insulating film 408 Gate insulating film 409 Gate insulating film 411 Channel formation region 412 Low concentration impurity region 413 Source region or drain region 421 Channel formation Region 422 Source region or drain region 431 Channel formation region 432 Low concentration impurity region 433 Source region or drain region 441 Gate electrode 441a Lower gate electrode 441b Upper gate electrode 442 Gate electrode 442a Lower gate electrode 442b Upper gate electrode 443 Gate electrode 443a Lower gate Electrode 443b Upper gate electrode 451 TFT
452 TFT
453 TFT
461 Passivation film 462 Interlayer insulating film 463 Interlayer insulating film 464 Interlayer insulating film 465 Protective layer 471 Electrode or wiring 472 Electrode or wiring 473 Electrode or wiring 474 Electrode or wiring 475 Electrode or wiring 477 Antenna 481 Opening 482 Adhesive 483 Adhesive 491 Substrate 492 Cover material 601 Substrate 602 Release layer 603 Underlayer 603a Lower layer underlayer 603b Middle layer underlayer 603c Upper layer underlayer 611 TFT
612 TFT
613 TFT
621 Island-like semiconductor film 622 Island-like semiconductor film 623 Island-like semiconductor film 631 Channel formation region 632 Low-concentration impurity region 633 Source region or drain region 635 Silicide region 641 Channel formation region 642 Source region or drain region 645 Silicide region 651 Channel formation region 652 Low-concentration impurity region 653 Source region or drain region 655 Silicide region 661 Gate insulating film 662 Gate insulating film 663 Gate insulating film 665 Side wall 666 Side wall 671 Gate electrode 671a Lower gate electrode 671b Upper gate electrode 672 Gate electrode 672a Lower layer gate electrode 672b Upper layer gate electrode 673 Gate electrode 673a Lower layer gate electrode 673b Upper layer gate electrode 681 Passivation film 6 2 Interlayer insulation film 683 Interlayer insulation film 691 Electrode or wiring 692 Electrode or wiring 693 Electrode or wiring 694 Electrode or wiring 695 Electrode or wiring 695 Interlayer insulating film 705 Antenna 711 Protective layer 715 Opening 721 Substrate 722 Adhesive 725 Cover material 726 Adhesion Agent 800 ID chip 801 Integrated circuit unit 802 Antenna 803 Arithmetic processing circuit unit 804 Memory unit 805 Communication circuit unit 806 Sensor unit 807 Power supply circuit unit 808 Sensor 809 Sensor circuit 810 First memory unit 811 Second memory unit 812 Demodulation circuit 813 Modulation circuit 820 ID chip 821 Integrated circuit unit 822 Memory unit 850 Ring oscillator 851 Pulse counter 852 Sensor drive unit 853 Detection unit 854 A / D conversion unit 855 Reset TFT
856 TFT for amplification
857 Bias TFT
858 Amplification side power supply line 859 Bias side power supply line 860 Oscillation circuit 861 Voltage detection circuit 862 Current detection circuit 863 Conversion circuit 864 Conversion circuit 865 Phase comparison circuit 866 Operation circuit 867 Operation circuit 900 Reader / writer module 901 Antenna 902 Communication circuit unit 903 Oscillator 904 Demodulation circuit 905 Modulation circuit 906 Arithmetic processing circuit unit 907 External interface unit 908 Encryption / decryption circuit unit 909 Memory unit 910 Power supply circuit unit 950 Substrate 951 Element formation layer

Claims (7)

An adhesive surface provided with an adhesive material, and an adhesive tape having a surface on which the adhesive material is not provided,
A biological information detection sensor including a biological information detection unit, a memory unit, an arithmetic processing circuit unit, and a communication circuit unit attached to the adhesive surface side of the adhesive tape;
An antenna connected to the biological information detection sensor and taken out from the adhesive surface of the adhesive tape to the surface via a groove provided in the adhesive tape;
Have
Biological information is stored in the memory unit, and the biological information detecting sensor device. An adhesive surface provided with an adhesive material, and an adhesive tape having a surface on which the adhesive material is not provided,
A biometric information detection unit attached to the adhesive surface side of the adhesive tape, a memory unit formed of a thin film transistor in which a channel region is formed of a semiconductor layer formed on an insulating surface and divided into islands, and an arithmetic operation A biological information detection sensor including a processing circuit unit and a communication circuit unit;
An antenna connected to the biological information detection sensor and taken out from the adhesive surface of the adhesive tape to the surface via a groove provided in the adhesive tape;
Have
Biological information is stored in the memory unit, and the biological information detecting sensor device. In claim 1 or claim 2,
A biological information detection sensor device, wherein a groove is provided on a surface of the adhesive tape, an adhesive material is embedded in a bottom surface of the groove, and the antenna is fixed by the adhesive material. In claim 1 or claim 2,
A biological information detection sensor device, wherein a groove is provided on the surface of the adhesive tape, a protrusion is provided on a side surface of the groove, and the antenna is fitted. An adhesive surface provided with an adhesive material, an adhesive tape having a surface on which no adhesive material is provided,
A biological information detection sensor attached to the adhesive surface side of the adhesive tape and having an ID chip and a biological information detection unit;
An antenna connected to the biological information detection sensor and taken out from the adhesive surface of the adhesive tape to the surface via a groove provided in the adhesive tape;
Have
Biological information is stored in the ID chip, The biological information detecting sensor device. In claim 5,
A biological information detection sensor device characterized in that information stored in an ID chip and information detected by a sensor are transmitted and received by the antenna. In claim 5 or claim 6,
The antenna is fixed to the surface of the adhesive tape by a fixing mechanism provided on the surface of the adhesive tape,
The fixing mechanism is a mechanism for providing a groove on the surface of the adhesive tape, providing an adhesive material on the bottom surface of the groove, and affixing the antenna, or
A biological information detection sensor device characterized in that a groove is provided on the surface of the adhesive tape, and a projection is provided on a side surface of the groove to fit the antenna.

Images