JP2007293827A - Table value converter, and table value conversion and writing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a table value converter and a table value conversion and writing method for more easily and efficiently rewriting values stored in a lookup table type table memory. <P>SOLUTION: A conversion module 20 is interposed on an external bus OB of a CPU 10 for reading a table value TB as a model from a ROM 30. The conversion module 20 applies a correction operation to the table value TB read from the ROM 30 and outputted by the CPU 10, and writes the corrected table value CTB into a table value of a lookup table (LUT) belonging to a macro 40. The conversion module 20 performs the correction operation based on a conversion parameter set through the CPU 10. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a table value conversion apparatus and a table value conversion writing method useful for converting values in a table memory stored as a lookup table.

  In general, an electronic camera, a digital copying machine, a laser printer, and the like are provided with an image processing device that converts acquired digital image data as required. In general, this type of image processing apparatus is provided with a look-up table (LUT) table memory, and image data is converted based on, for example, a table value stored as a color correction value in the table memory. By doing so, color correction is performed. Specifically, the table memory is accessed using the acquired image data as an address, and a table value corresponding to the address is read from the table memory, whereby color correction is performed on the acquired image data.

  By the way, in an image processing apparatus that performs color correction using such a LUT table memory, for example, gamma correction of image data to be output, and characteristics such as contrast or saturation are stored in the table memory. The table value may need to be rewritten. Therefore, conventionally, several methods as exemplified in FIG. 13 have been proposed as methods for realizing such rewriting of the table memory. First, in the first method, as shown in FIG. 13A, a plurality of table memories TM corresponding to various characteristics are provided in the ROM 60 in advance and, for example, a table corresponding to the characteristics when it is desired to enhance contrast. The memory TM is read through the CPU 61. Then, the LUT 63 of the macro 62 is rewritten based on the read value of the table memory TM (see, for example, Patent Document 1).

  Further, in the second method, as shown in FIG. 13B, a reference table memory STM serving as a reference is provided in the ROM 60 in advance, and a value read from the reference table memory STM through the CPU 64 is appropriately corrected. The LUT 63 of the macro 62 is rewritten based on the corrected value (see, for example, Patent Document 2).

As a third method, as shown in FIG. 13C, a dedicated computing unit 65 is installed for the macro 62 having the LUT 63, and the image data output through the LUT 63 is converted to the computing unit. A method is also considered in which the necessary correction processing or enhancement processing is performed on the acquired image data by performing necessary arithmetic processing through 65.
JP-A-6-70165 JP-A-6-133158

  Regardless of which method is used, rewriting of the table value stored in the LUT table memory or calculation processing of the table value is performed, so that various corrections to the acquired image data are surely performed. It becomes possible. However, in any of these methods, the following disadvantages cannot be ignored in practical use, and there is still room for improvement.

  That is, in the case of the first method shown in FIG. 13A, since a plurality of table memories TM are usually prepared in the ROM 60 used as a program memory, the memory capacity of the ROM 60 itself increases. There is a problem. Further, in the case of the second method shown in FIG. 13B, since the CPU 64 performs correction calculation, the calculation load increases, and as a result, the overall processing time for image processing increases. There is a problem such as. In the case of the third method shown in FIG. 13C, it is necessary to install one dedicated arithmetic unit for one macro. Therefore, as the number of macros increases, so does the number of arithmetic units. Inevitably, an increase in cost is inevitable.

  SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to provide a table value conversion apparatus that can more easily and efficiently rewrite values stored in a look-up table type table memory. And providing a table value conversion writing method.

  To achieve the above object, according to the first aspect of the present invention, a table value read from a memory storing a template table value is corrected, and a function macro that is hardware for performing a specific process is provided separately. A table value conversion device that rewrites a table value of a look-up table based on the corrected value, wherein the central processing processing is performed on an external bus of a central processing device that reads a table value as a template from the memory A conversion module for converting the table value of the lookup table of the macro based on the calculated value while performing a specific correction calculation on the data output from the apparatus is interposed.

  According to such a configuration, the central processing unit, that is, the CPU simply reads out the table value as a template from the memory and outputs it to the external bus (data bus). Then, it is automatically converted through a correction operation by a conversion module interposed on the external bus and written into a look-up table of a corresponding macro. As a result, the table values to be stored in the memory (ROM) can be minimized, and the calculation load on the CPU can be greatly reduced. Even if lookup tables are provided, table values to be written to the lookup tables can be converted through a single conversion module. That is, the table value can be converted very efficiently with a simple configuration.

  According to a second aspect of the present invention, the conversion module executes the specific correction calculation according to a conversion parameter set in the conversion module. With such a configuration of the conversion module, the degree of freedom for the correction calculation is increased, and conversion of table values according to the contents of various macros is possible.

According to a third aspect of the present invention, the conversion parameter set in the conversion module includes a multiplication value, an addition value, a clip lower limit value, and a clip upper limit value. The multiplication value is M, the addition value is A, and the clip lower limit value. When the value is L, the clip upper limit value is H, the data output from the central processing unit is DATAin, and the operation value output by the conversion module is DATAout, the conversion module calculates the correction operation as the correction operation.

DATAout = max (L, min (H, DATAin × M + A))
However, max (a, b): a function for selecting the larger of a and b
min (a, b): function that selects the smaller of a and b

It was decided to execute. By introducing such a calculation method as a correction calculation by the conversion module, it is basically possible to convert a table value with a high degree of freedom through the setting of the multiplication value M and the addition value A, and the clip lower limit. Through the combined use of the value L and the clip upper limit value H, it is possible to suitably suppress the appearance of a table value that deviates greatly from a predetermined range that becomes a noise component.

  According to a fourth aspect of the present invention, the rewrite read out by the central processing unit from a look-up table of the macro in which the table value is rewritten based on the data subjected to the specific correction operation by the conversion module. A reverse conversion module that reversely converts the later table value into data corresponding to the data before the specific correction calculation, and outputs the data after the reverse conversion to the central processing unit; did.

  According to such a configuration, the table value as write data output from the central processing unit and the table value input to the central processing unit as read data, that is, the data after reverse conversion are set to the same value. be able to. Therefore, for example, even when an ICE (In-Circuit Emulator) that determines a write error when the write data and the read data do not match is used as the central processing unit, it is determined that the write error is detected. It can suppress suitably.

  In the invention according to claim 5, the conversion module executes the specific correction calculation according to a conversion parameter set in the conversion module. With such a configuration of the conversion module, the degree of freedom for the correction calculation is increased, and conversion of table values according to the contents of various macros is possible. Further, the inverse transformation module performs the inverse transformation according to an inverse transformation parameter set in the inverse transformation module according to the transformation parameter. By the inverse transformation parameter set in the inverse transformation module, the inverse transformation can be surely executed even for the table value transformed by the correction operation with a high degree of freedom.

  In the invention according to claim 6, the conversion module includes a predetermined address of a lookup table of the macro specified by the central processing unit as the write destination address of the operation value in the conversion module. Input from an arithmetic processing unit, the conversion module generates a correction value according to at least one of a conversion parameter set in the conversion module and the write destination address, and executes the specific correction calculation according to the correction value It was decided to.

  By adopting such a configuration for the conversion module, for example, when a correction value is generated using a write destination address, a correction value that varies depending on the write destination address can be generated. The degree of freedom for the correction calculation can be further improved through the value.

  In the invention according to claim 7, the conversion module subtracts a predetermined reference address from the write destination address, and uses the look-up address of the macro specified by the central processing unit as the write destination address. It was decided to convert it to an address in the uptable.

  By adopting such a configuration for the conversion module, it is possible to generate a correction value that varies according to the address in the lookup table of the macro specified as the write destination by the central processing unit. Then, the degree of freedom for the correction calculation is further increased through the generated correction value, and conversion of table values according to the contents of various macros is possible.

  In the invention according to claim 8, the conversion module has a predetermined address of a lookup table of the macro specified by the central processing unit as the write destination address of the operation value in the conversion module. Input from the arithmetic processing unit, the conversion module divides the lookup table of the macro specified by the central processing unit into a plurality of areas, according to the area to which the address of the write destination belongs, A coefficient control circuit for setting a correction coefficient input to the second arithmetic unit for generating the correction value is provided.

  According to such a configuration, it is possible to set a different correction coefficient for each region of the lookup table possessed by the macro designated as the write destination by the coefficient control circuit. Through this correction coefficient, the degree of freedom for setting the correction value used for the correction calculation can be improved.

  In the invention according to claim 9, a table of a lookup table provided separately from a function macro that is hardware for performing a specific process by correcting a table value read from a memory storing a table value as a template. A table value conversion writing method for converting a value based on the corrected value and writing the value into the lookup table, wherein the central calculation is performed on an external bus of a central processing unit that reads a table value as a template from the memory. A conversion module that converts the table value of the lookup table of the macro based on the computation value while performing a specific correction computation on the data output from the processing device is interposed to the lookup table of the macro. When rewriting table values, the calculated values corrected through this conversion module That it was decided to write to the look-up table.

  By such a writing method relating to table values, the central processing unit, that is, the CPU simply reads out the template table values from the memory and outputs them to the external bus (data bus). The value is automatically converted through a correction operation by a conversion module interposed on the external bus and written into a lookup table of a corresponding macro. As a result, the table values to be stored in the memory (ROM) can be minimized, and the calculation load on the CPU can be greatly reduced. Even if lookup tables are provided, table values to be written to the lookup tables can be converted through a single conversion module. That is, the table value can be converted very efficiently with a simple configuration.

In the invention according to claim 10, after setting a conversion parameter for the specific correction operation in the conversion module in correspondence with a lookup table of a specific macro,
a. A process of reading the table value as the template from the memory through the central processing unit by one address;
b. Corresponding to this reading, a process of converting the table value output from the central processing unit to be written to the lookup table of the specific macro by a correction operation based on the set conversion parameter through the conversion module ,
c. A process of writing the converted table value to a predetermined address of the lookup table of the specific macro;
A. ~ C. The above process is repeatedly executed until the table value read address from the memory and the table value write address to the lookup table of the specific macro are incremented until all the table values in the lookup table are rewritten. It was. Through such a table value conversion writing method, it is possible to reliably rewrite the table value for the lookup table for any macro.

  As described above, according to the present invention, it is possible to more easily and efficiently rewrite values stored in a lookup table type table memory.

(First embodiment)
A first embodiment of a table value conversion apparatus and a table value conversion writing method according to the present invention will be described below with reference to FIGS. FIG. 1 is a block diagram showing the overall configuration of the table conversion apparatus according to this embodiment.

  As shown in FIG. 1, this table value conversion apparatus is roughly divided into a central processing unit (CPU) 10 and a conversion module 20 provided on an external bus OB of the CPU 10. The ROM 30 and the macro 40 are commonly connected to the external bus OB.

  Here, the CPU 10 sends a conversion command for converting the data based on digital image data acquired by an image capturing device or the like, a table value conversion write command, and the like to the macro 40 (specifically, a specific macro thereof). This is a part that comprehensively controls processing related to image processing and the like.

  The macro 40 is a hardware group that performs processing such as specific image processing. In this example, the macro 40 includes a plurality of macros including three types of macros such as a macro A41, a macro B42, and a macro C43. Yes. Each of the macros A41 to C43 has LUTs 51, 52 and 53 having different characteristics as look-up table type table memories. Normally, some data (value) is given from the CPU 10 together with the conversion command. Thus, processing such as conversion based on the LUT that the device has is performed.

  The conversion module 20 interposed on the external bus OB between each of the macros A41 to C43 and the CPU 10 has arithmetic functions such as multiplication, addition, and clipping, and mainly includes the LUTs 51 to 53. This is a part that assists and mediates the processing of the CPU 10 when executing table value conversion writing. That is, when executing the table value conversion writing, the CPU 10 reads the table value TB of the reference table memory STM, which serves as a template for LUT rewriting, from the ROM 30 commonly connected to the external bus OB. The value TB is output to the conversion module 20 via the external bus OB. Prior to this, the CPU 10 sets a conversion parameter for use in the correction calculation of the table value TB in the conversion module 20 through the setting signal SS. Incidentally, here, conversion parameters set by the CPU 10 for the conversion module 20 include a multiplication value M, an addition value A, a clip upper limit value H, and a clip lower limit value L, as will be described in detail later. Thus, the conversion module 20 to which the conversion parameter is set and the table value TB is given performs a correction operation based on the set conversion parameter with respect to the given table value TB, and the corrected table value CTB Are output to a specific macro designated by the CPU 10 in the macro 40. As a result, the LUT of the corresponding macro is updated, that is, rewritten by the corrected table value CTB.

  As described above, in this embodiment, since the conversion module 20 is interposed on the external bus OB of the CPU 10, the CPU 10 simply converts the table of the reference table memory STM as a model from the ROM 30 when converting the table value. It is only necessary to read the value TB and output it to the external bus OB. Then, the table value TB output in this way is automatically converted through the correction calculation by the conversion module 20 and written into the LUT of the designated macro.

  The conversion module 20 is set to output the table value TB read from the ROM 30 to the CPU 10 as it is when the CPU 10 reads the table value TB from the ROM 30. The conversion module 20 is also set so as not to operate during execution of normal data conversion processing (image processing) through the macro LUT. That is, in the table value conversion apparatus of this embodiment, the conversion module 20 is set to be in a so-called “through” state during execution of such data conversion processing through the LUT.

  FIG. 2 is a block diagram showing an example of the internal configuration of a correction arithmetic circuit that performs the table value conversion of the conversion module 20 employed in the table value conversion apparatus of this embodiment. With reference to the drawing, the correction calculation mode by the conversion module 20 will be described in detail.

  The conversion module 20 basically includes a multiplier 21, an adder 22, and a clip circuit 23 as the correction arithmetic circuit. Among these, the multiplier 21 receives a multiplication value M, which is a conversion parameter set in a register or the like by the setting signal SS from the CPU 10. The multiplier 21 multiplies the input data DATAin, which is the table value TB of the reference table memory STM input from the CPU 10, by the multiplication value M and outputs the calculated value V 1 to the adder 22. The adder 22 is also supplied with an addition value A, which is a conversion parameter set in a register or the like by the setting signal SS from the CPU 10. The adder 22 adds the addition value A to the calculation value V1 and outputs the calculation value V2 to the clip circuit 23.

  On the other hand, the clip circuit 23 includes first and second comparators 25A and 25B and first and second selection circuits 26A and 26B. In the clipping circuit 23, the calculated value V2 is first input to the first comparator 25A and the first selection circuit 26A. Here, the first comparator 25A has a clip upper limit value H which is a conversion parameter set in a register or the like by the setting signal SS from the CPU 10 in addition to the calculation value V2 input from the adder 22 as described above. Is entered. Then, the first comparator 25A compares the calculated value V2 with the clip upper limit value H and generates a comparison signal S1 indicating whether the calculated value V2 is larger than the clip upper limit value H or not. Output to. Here, similarly to the first comparator 25A, the calculation value V2 and the clip upper limit value H are also input to the first selection circuit 26A. In the first selection circuit 26A, from the first comparator 25A. Based on the given comparison signal S1, the smaller one of the calculated value V2 and the clip upper limit value H is selected and outputted. That is, the calculated value V2 is the output value V3 when the calculated value V2 is smaller than the clip upper limit value H, and the clip upper limit H is the output value V3 when the clip upper limit value H is smaller than the calculated value V2. The data is output from the selection circuit 26A to the second comparator 25B and the second selection circuit 26B. Among these, in addition to the output value V3, a clip lower limit value L that is a conversion parameter set in a register or the like by the setting signal SS from the CPU 10 is input to the second comparator 25B. Then, the second comparator 25B compares the output value V3 from the first selection circuit 26A with the clip lower limit value L, and outputs a comparison signal S2 indicating whether or not the output value V3 is smaller than the clip lower limit value L. 2 is output to the selection circuit 26B. Similarly to the second comparator 25B, the output value V3 from the first selection circuit 26A and the clip lower limit value L are also input to the second selection circuit 26B. The second selection circuit 26B receives the second selection circuit 26B. Based on the comparison signal S2 provided from the comparator 25B, the larger one of the output value V3 and the clip lower limit L is selected and output. That is, when the output value V3 from the first selection circuit 26A is larger than the clip lower limit value L, the output value V3 is obtained. When the clip lower limit value L is larger than the output value V3, the clip lower limit value L is obtained. The output data DATAout of the conversion module 20 is output from the second selection circuit 26B to the macro 40.

As described above, the conversion module 20 employed here performs a correction operation on the table value TB of the reference table memory STM input from the CPU 10, that is, the input data DATAin.

DATAout = max (L, min (H, DATAin × M + A)) (1)
However, max (a, b): a function for selecting the larger of a and b
min (a, b): function that selects the smaller of a and b

To obtain output data DATAout. As a result, it is possible to convert a table value with a high degree of freedom through the multiplication value M and the addition value A, and to use a predetermined value that becomes a noise component through the combined use of the clip upper limit value H and the clip lower limit value L. It is possible to convert the input data DATAin while suppressing the appearance of table values greatly deviating from the range. If the table value TB of the reference table memory STM, which is a template, is written to the LUT of the macro 40 as it is, the CPU 10 makes settings so that the table value TB is output to the macro 40 as it is.

  FIG. 3 is a flowchart showing the processing procedure of a table value conversion writing method using such a table value conversion apparatus. Next, the conversion writing method will be described in more detail with reference to FIG. Here, of the macros A41 to C43, the table value conversion writing to the LUT 51 of the macro A41 will be described as an example.

  In writing the table value conversion to the macro A 41, the CPU 10 first outputs the setting signal SS to the conversion module 20 as a process of step 1, and converts the conversion parameter corresponding to the LUT 51 of the macro A 41 to the conversion module 20. That is, a multiplication value M, an addition value A, a clip upper limit value H, and a clip lower limit value L are set. For example, this process is performed by the CPU 10 determining that the conversion parameter is input and set by the user, and providing the conversion module 20 with the conversion parameter corresponding to the setting content through the setting signal SS. Alternatively, the CPU 10 may automatically set a conversion parameter corresponding to the imaging environment or the like in each conversion module 20. Then, as the processing of step 2, the CPU 10 reads from the ROM 30 the table value TB of the address i of the reference table memory STM as a model for one address. Incidentally, this process is performed as a process of reading one address at a time from the table value TB of address 0 in the case where the reference table memory STM of the ROM 30 has a table value TB of addresses 0 to 255, for example.

  When the table value TB is read in this way, the CPU 10 outputs the read table value TB to the external bus OB so as to be written to the same address i of the LUT 51 of the macro A41 as the processing of step 3 next. That is, when the table value TB at the address 0 is read from the ROM 30 in the step 2, the CPU 10 outputs the table value TB as a value for rewriting the table value at the address 0 of the LUT 51 of the macro A41.

  Next, as a process of step 4, the conversion module 20 performs a correction process on the table value TB output from the CPU 10 by performing a correction operation based on the conversion parameter set in the step 1. Specifically, the correction calculation of the above equation (1) is executed with the table value TB output from the CPU 10 as input data DATAin and the corrected table value CTB as output data DATAout.

  When the table value TB is corrected in this way, the conversion module 20 next outputs the output data DATAout, that is, the corrected table value CTB, to the macro A41 as the processing of step 5. That is, the corrected table value CTB is written to the predetermined address i of the LUT 51 of the macro A41 in accordance with the write command from the CPU 10 in step 3 above. By this processing, the table value of the address i of the LUT 51 of the macro A41 is rewritten to the corrected table value CTB.

  Thereafter, as the processing of step 6, the table value read address from the ROM 30 and the value of the address i which is the table value write address to the LUT 51 of the macro A41, and the total address of the reference table memory STM of the ROM 30 and the LUT 51 of the macro A41 Compare the number k. As a result, when it is determined that the address i is less than the total number of addresses k, the CPU 10 then increments the address i as the processing of step 7 and returns to the processing of step 2 above. The processes in steps 2 to 7 are repeatedly executed until the address i reaches the total number of addresses k, that is, until the table values of all addresses are rewritten. If it is determined in step 6 that the address i has reached the total number of addresses k, the table value conversion writing to the LUT 51 of the macro A 41 is terminated. As a result, all the table values of the LUT 51 of the macro A41 can be reliably converted.

According to the embodiment described in detail above, the following effects can be obtained.
(1) The correction table value CTB is applied to the LUT of the macro 40 while performing a correction operation on the reference table value TB between the CPU 10 and the macro 40, that is, on the external bus OB. A conversion module 20 for conversion writing is provided. As a result, the table value TB can be converted and written to a plurality of macro LUTs through a single conversion module 20, so that the cost can be reduced. Further, since the reference table memory STM to be stored in the ROM 30 can be suppressed to a minimum capacity, an increase in memory capacity can be suppressed. In addition, the conversion module 20 greatly reduces the calculation load on the CPU 10, so that the processing time can be shortened. In other words, the table value conversion writing to the LUT of each macro can be realized very efficiently while having a simple configuration.

(2) The conversion module 20 performs the correction operation DATAout = max (L, min (H, DATAin) based on the conversion parameters set by the CPU 10, that is, the multiplication value M, the addition value A, the clip upper limit value H, and the clip lower limit value L. × M + A)) (1) is executed to convert the input data DATAin (table value TB) from the CPU 10 into data DATAout (table value CTB). As a result, it is possible to convert a table value having a high degree of freedom through the multiplication value M and the addition value A, and to use a predetermined noise component as a noise component through the combined use of the clip upper limit value H and the clip lower limit value L. Appearance of table values greatly deviating from the range can be suitably suppressed.

  (3) The ROM 30 and the macros A41 to C43 are commonly connected to the external bus OB of the CPU 10 in which the conversion module 20 is interposed. As a result, the utilization efficiency of the external bus OB can be improved, and in particular, the ROM 30 is connected to the subsequent stage of the conversion module 20 so that the degree of design freedom of the entire apparatus can be increased.

  (4) During normal data conversion (image processing) using the LUTs 51 to 53, the conversion module 20 is set not to operate. As a result, unnecessary power consumption during normal data conversion (image processing) can be suppressed.

(Second Embodiment)
Hereinafter, a second embodiment of the table value conversion apparatus according to the present invention will be described with reference to FIGS. In the table value conversion apparatus of this embodiment, the conversion module is different from that of the first embodiment. Hereinafter, the difference from the first embodiment will be mainly described.

FIG. 4 is a block diagram showing an example of the internal configuration of a correction arithmetic circuit that performs table value conversion, in particular, of the conversion module 70 employed in the table value conversion apparatus of the present embodiment.
As shown in FIG. 4, the conversion module 70 basically includes a subtractor 71, a multiplier 72 and an adder 73 that constitute a second calculator, as the correction calculation circuit. Among these, the subtracter 71 receives an address Addr of a specific macro LUT designated by the CPU 10 from the CPU 10. That is, the macro address Addr to which the corrected table value CTB input to the conversion module 70 is written is input from the CPU 10 to the subtractor 71.

  FIG. 5 is an address map of the ROM 30 and the macro 40 viewed from the CPU 10. As shown in FIG. 5, addresses 000H to 0FFH are assigned to ROM 30, addresses 180H to 27FH are assigned to LUT 51 of macro A41, addresses 280H to 37FH are assigned to LUT 52 of macro B42, and addresses 400H to 4FFH are assigned to LUT 53 of macro C43. As is well known, “H” indicates that the value is a hexadecimal number.

  The subtracter 71 receives a reference address RA set by a setting signal SS from the CPU 10. The subtractor 71 subtracts the reference address RA from the address Addr and outputs a correction value C1 obtained by the subtraction to the multiplier 72. In the present embodiment, when the macro designated by the CPU 10 is the macro A41, the reference address RA is set to the head address 180H of the LUT 51 of the macro A41. When the macro designated by the CPU 10 is the macro B42, the reference address RA is set to the head address 280H of the LUT 52 of the macro B42. When the macro designated by the CPU 10 is the macro C43, the reference address RA is set to the head address 400H of the LUT 53 of the macro C43. That is, in the present embodiment, as shown in FIG. 6, when the leading address of the LUT of each macro 40 is added to the address Addr and input to the conversion module 70, the reference address is set so that the correction value C1 becomes “0”. RA is set. The correction value C1 here is an address in the LUT of a specific macro designated by the CPU 10, and the value is incremented by "1" every time the address Addr input from the CPU 10 increases by one address from the head address. Will be increased.

  Similarly, the multiplier 72 to which the correction value C1 is input receives a multiplication value M that is a conversion parameter set in a register or the like by the setting signal SS from the CPU 10. The multiplier 72 multiplies the correction value C1 by the multiplication value M and outputs a correction value C2 (see FIG. 6) obtained by the multiplication to the adder 73.

  The adder 73 adds the correction value C2 to the input data DATAin which is the table value TB (see FIG. 6) of the reference table memory STM input from the CPU 10, and calculates the calculated value as the output data DATAout of the conversion module 70. Is output to a predetermined address of the LUT of a specific macro. In other words, the adder 73 outputs the corrected table value CTB to the address Addr of the LUT specified by the CPU 10. Thereby, the table value of the address Addr of the LUT designated by the CPU 10 is rewritten to the corrected table value CTB.

As described above, the conversion module 70 employed here performs the correction operation DATAout = DATAin + {(Addr−RA) × for the table value TB of the reference table memory STM input from the CPU 10, that is, the input data DATAin. M} (2)
To obtain output data DATAout. As a result, it is possible to convert a table value with a high degree of freedom through the multiplication value M, and the value differs for each address of the table value TB of the reference table memory STM through the combined use of the address Addr and the reference address RA. The table value can be converted by the correction value C2.

According to this embodiment described in detail above, the following effects can be obtained in addition to the functions and effects of the first embodiment (1), (3), and (4).
(5) The conversion module 70 performs a predetermined operation (subtraction and multiplication in this example) on the address Addr input from the CPU 10. Thereby, it is possible to easily generate the correction value C2 (see FIG. 6) having a different value for each address of the table value TB (LUT of a specific macro) in the reference table memory STM. Through this correction value C2 {= (Addr−RA) × M}, it is possible to convert a table value with a higher degree of freedom. As a result, conversion of table values according to the contents of each macro 40 is also possible.

  For example, by providing a dedicated counter and changing the conversion parameter based on the count value of the counter, a correction value having a different value for each address of the table value TB of the reference table memory STM can be generated. . However, in this generation method, since it is necessary to install the dedicated counter or the like, an increase in cost is inevitable. On the other hand, in the conversion module 70 of the present embodiment, it is only necessary to add an arithmetic unit that performs a predetermined operation on the address Addr originally output from the CPU 10, so that an increase in cost can be suppressed. .

(Third embodiment)
Hereinafter, a third embodiment of the table value conversion apparatus according to the present invention will be described with reference to FIGS. In the table value conversion apparatus of this embodiment, the conversion module is different from that of the first embodiment. Hereinafter, the difference from the first embodiment will be mainly described.

FIG. 7 is a block diagram showing an example of an internal configuration of a correction arithmetic circuit that performs table value conversion of the conversion module 80 employed in the table value conversion apparatus of the present embodiment.
As shown in FIG. 7, the conversion module 80 basically includes a subtractor 81, a multiplier 82, an adder 83, an adder 84, and a coefficient control circuit 85 as correction arithmetic circuits. I have. Among these, the subtracter 81 receives the address Addr of a specific macro LUT designated by the CPU 10 from the CPU 10 as in the subtractor 71 of the second embodiment. The subtracter 81 receives a reference address RA set by a setting signal SS from the CPU 10. The subtractor 81 subtracts the reference address RA from the address Addr, and outputs a correction value C1 (see FIG. 8) obtained by the subtraction to the multiplier 82.

  The address Addr input from the CPU 10 is also input to the coefficient control circuit 85. The coefficient control circuit 85 sets a multiplication value M and an addition value A as correction coefficients according to the input address Addr. More specifically, as shown in FIG. 8, the coefficient control circuit 85 divides the entire LUT into a plurality (three in this example) of regions R1, R2, and R3, and each of these regions R1 to R3. Different multiplication values M and addition values A are set. That is, when the address Addr is included in the region R1, the coefficient control circuit 85 sets the multiplication value M to the first multiplication value M1 and the addition value A to the first addition value A1. In addition, when the address Addr is included in the region R2, the coefficient control circuit 85 sets the multiplication value M to the second multiplication value M2 and the addition value A to the second addition value A2. In addition, when the address Addr is included in the region R3, the coefficient control circuit 85 sets the multiplication value M to the third multiplication value M3 and the addition value A to the third addition value A3.

  The multiplier 82 to which the correction value C1 is input receives the multiplication value M (first to third multiplication values M1 to M3) set by the coefficient control circuit 85 according to the address Addr. The multiplier 82 multiplies the correction value C1 by the multiplication value M and outputs a correction value C2 obtained by the multiplication to the adder 83.

  The adder 83 receives the addition value A (first to third addition values A1 to A3) set by the coefficient control circuit 85 according to the address Addr. The adder 83 adds the addition value A to the correction value C2, and outputs a correction value C3 (see FIG. 8) obtained by the addition to the adder 84. As shown in FIG. 8, the correction value C3 obtained here has a different slope for each of the regions R1 to R3.

  The adder 84 adds the correction value C3 to the input data DATAin which is the table value TB (see FIG. 8) of the reference table memory STM input from the CPU 10, and calculates the calculated value as the output data DATAout of the conversion module 80. Is output to a predetermined address of the LUT of a specific macro. That is, the adder 84 outputs the corrected table value CTB to the address Addr of the LUT specified by the CPU 10. Thereby, the table value of the address Addr of the LUT designated by the CPU 10 is rewritten to the corrected table value CTB.

  As described above, the conversion module 80 employed here has the following formulas (3) to (3) for each of the regions R1 to R3 with respect to the table value TB of the reference table memory STM input from the CPU 10, that is, the input data DATAin. This module obtains output data DATAout by executing the correction calculation according to (5). That is, when the address Addr is included in the region R1, the conversion module 80 performs a correction operation according to the following equation (3), and when the address Addr is included in the region R2, the correction is performed according to the following equation (4). When the calculation is executed and the address Addr is included in the region R3, the correction calculation is executed by the following equation (5).

DATAout = DATAin + {(Addr−RA) × M1 + A1} (3)
DATAout = DATAin + {(Addr−RA) × M2 + A2} (4)
DATAout = DATAin + {(Addr−RA) × M3 + A3} (5)
As a result, through the change of the correction coefficient (multiplication value M and addition value A) for each of the regions R1 to R3 by the coefficient control circuit 85, the correction is different for each address of the LUT and has a different slope for each of the regions R1 to R3. Correction based on the value C3 becomes possible.

  FIG. 9 is a flowchart showing the processing procedure of the correction coefficient (multiplication value M and addition value A) setting method by the coefficient control circuit 85. Next, the setting method is shown in FIG. Further details will be described.

  First, the coefficient control circuit 85 receives an address Addr from the CPU 10 in step 10. When the address Addr is input in this way, the coefficient control circuit 85 next compares the input address Addr with the first comparison address AD1 which is the head address of the region R2, as a process of step 11. As a result, when it is determined that the address Addr is less than the first comparison address AD1, that is, when it is determined that the address Addr is included in the region R1, the coefficient control circuit 85 next performs the process of step 12 The multiplication value M is set to the first multiplication value M1, and the addition value A is set to the first addition value A1.

  On the other hand, if it is determined in step 11 that the address Addr is equal to or higher than the first comparison address AD1, the coefficient control circuit 85 next uses the address Addr and the start address of the region R3 as processing in step 13. A certain second comparison address AD2 is compared. As a result, when it is determined that the address Addr is less than the second comparison address AD2, that is, when it is determined that the address Addr is included in the region R2, the coefficient control circuit 85 next performs the process of step 14 The multiplication value M is set to the second multiplication value M2, and the addition value A is set to the second addition value A2.

  On the other hand, if it is determined in step 13 that the address Addr is equal to or higher than the second comparison address AD2, that is, if it is determined that the address Addr is included in the region R3, the coefficient control circuit 85 performs the next step. As the processing of 15, the multiplication value M is set to the third multiplication value M3, and the addition value A is set to the third addition value A3.

According to this embodiment described in detail above, in addition to the effects of (1), (3), (4), and (5) of the first and second embodiments, the following effects can be obtained. become.
(6) The coefficient control circuit 85 provided in the conversion module 80 changes the multiplication value M and the addition value A as correction coefficients according to the area to which the address Addr input from the CPU 10 belongs. At this time, the determination of the area to which the address Addr belongs is easy by comparing the address Addr with the first and second comparison addresses AD1 and AD2 as the head addresses for the respective areas R1 to R3, as shown in FIG. Can be judged. As a result, the correction value C1 that changes with a constant inclination according to the address Addr can be easily converted into a correction value C3 (correction value C2) whose inclination changes for each of the regions R1 to R3 as shown in FIG. Can do. By setting the correction coefficient for each of the regions R1 to R3, the degree of freedom for setting the correction value C3 used for converting the table value can be improved. Furthermore, conversion of table values with a higher degree of freedom is possible through this correction value C3. As a result, conversion of table values according to the contents of each macro 40 is also possible.

(Fourth embodiment)
A fourth embodiment of the table value conversion apparatus according to the present invention will be described below with reference to FIGS. The same members as those shown in FIGS. 1 to 9 are denoted by the same reference numerals, and detailed description of these elements is omitted.

  As shown in FIG. 10, the table value conversion apparatus mainly includes the CPU 10, a conversion module 90 and an inverse conversion module 95 provided so as to be interposed on the external bus OB of the CPU 10, the ROM 30, The macro 40 is provided.

  Here, as described in the above embodiments, the conversion module 90 has arithmetic functions such as multiplication and addition, and mainly performs table value conversion writing of the LUTs 51 and 52 provided in the macros A41 and B42, respectively. This is a part that assists and mediates the processing of the CPU 10 when executing. That is, when executing the table value conversion writing, the CPU 10 reads the table value TB of the reference table memory STM from the ROM 30 and outputs the read table value TB to the conversion module 90. Prior to this, the CPU 10 sets a conversion parameter for the conversion module 90 through the setting signal SS. Incidentally, the conversion parameter here includes a multiplication value M and an addition value A. Thus, the conversion module 90 to which the conversion parameter is set and the table value TB is given performs a correction operation based on the set conversion parameter with respect to the given table value TB, and the corrected table value CTB Are output to the LUT of a specific macro designated by the CPU 10 in the macro 40. As a result, the LUT of the corresponding macro is updated, that is, rewritten by the corrected table value CTB.

  The inverse conversion module 95 has an operation function (here, division / subtraction) opposite to the operation function in the conversion module 90, and the corrected table value CTB is read from the LUTs 51 and 52 mainly by the CPU 10. When the data is read as data, the table value CTB after the correction is converted back to the table value TBa corresponding to the table value TB before the correction. That is, when reading the corrected table value CTB from the LUTs 51 and 52, the CPU 10 reads the corrected table value CTB written in the LUT 51 or LUT 52 commonly connected to the external bus OB. Here, the corrected table value CTB read from the LUTs 51 and 52 by the CPU 10 is input to the CPU 10 through the inverse conversion module 95. Prior to the reading, the CPU 10 sets an inverse transformation parameter for use in the inverse transformation process of the corrected table value CTB in the inverse transformation module 95 through the setting signal SS. Incidentally, the inverse transformation parameters set by the CPU 10 for the inverse transformation module 95 include a division value N and a subtraction value B. Here, the division value N and the subtraction value B, which are inverse conversion parameters, are the same values as the multiplication value M and the addition value A, which are conversion parameters input to the conversion module 90 when the table value conversion is written. Is set to That is, the inverse transformation parameters are set so that the relationship of multiplication value M = division value N and addition value A = subtraction value B is established.

  The inverse conversion module 95 in which the inverse conversion parameter is set and the corrected table value CTB is given executes the inverse conversion process based on the set inverse conversion parameter for the given table value CTB. The table value TBa corresponding to the uncorrected table value TB obtained by the inverse transformation is output to the CPU 10.

  The inverse conversion module 95 is set to output the table value TB read from the ROM 30 to the CPU 10 as it is when the CPU 10 reads the table value TB from the ROM 30.

FIG. 11 is a block diagram showing an example of the internal configuration of a correction arithmetic circuit that performs table value conversion of the conversion module 90 employed in the table value conversion apparatus of this embodiment.
As shown in FIG. 11, the conversion module 80 basically includes a multiplier 91 and an adder 92 as the correction arithmetic circuit. Among these, the multiplier 91 receives a multiplication value M, which is a conversion parameter set by the setting signal SS from the CPU 10. The multiplier 91 multiplies the table value TB of the reference table memory STM input from the CPU 10 by the multiplication value M and outputs the calculated value V11 to the adder 92. Also, the adder 92 receives the addition value A, which is a conversion parameter set by the setting signal SS from the CPU 10. The adder 92 adds the added value A to the calculated value V11 and outputs the calculated value as a corrected table value CTB to a predetermined address of the LUT of the specific macro. As a result, the table value at the address specified by the CPU 10 is rewritten to the corrected table value CTB.

As described above, the conversion module 90 employed here performs a correction operation on the table value TB of the reference table memory STM input from the CPU 10.
CTB = TB × M + A (6)
To obtain a table value CTB.

FIG. 12 is a block diagram showing an internal configuration example of an inverse conversion processing circuit that performs an inverse conversion process of the inverse conversion module 95 employed in the table value conversion apparatus of the present embodiment.
As shown in FIG. 12, the inverse conversion module 95 basically includes a subtractor 96 and a divider 97 as the inverse conversion processing circuit. Among these, the subtracter 96 receives a subtraction value B (= addition value A) which is an inverse conversion parameter set in a register or the like by the setting signal SS from the CPU 10. The subtractor 96 subtracts the subtraction value B from the corrected table value CTB input from the macro LUT specified by the CPU 10 and outputs the calculated value V12 to the divider 97. The divider 97 also receives a division value N (= multiplication value M), which is an inverse conversion parameter set in a register or the like by the setting signal SS from the CPU 10. The divider 97 divides the calculated value V12 by the divided value N and outputs the calculated value to the CPU 10. As a result, the corrected table value CTB is inversely converted to a table value TBa corresponding to the uncorrected table value TB and input to the CPU 10.

As described above, the inverse conversion module 95 employed here performs an inverse conversion process on the corrected table value CTB input from the macro LUT specified by the CPU 10.
TBa = (CTB-B) / N
= (CTB-A) / M
= TB
To obtain a table value TB before correction (table value TBa corresponding thereto).

According to this embodiment described in detail above, the following effects can be obtained in addition to the functions and effects of the first embodiment (1), (3), and (4).
(7) A table value TBa corresponding to the table value TB before correction is generated by reversely converting the corrected table value CTB read from the macro LUT designated by the CPU 10, and the table value TBa after the reverse conversion is generated. Is provided to the CPU 10. Thereby, the table value TB output as write data from the CPU 10 and the table value TBa after reverse conversion input to the CPU 10 as read data become the same value. Therefore, for example, even if the CPU 10 is changed to an ICE (In-Circuit Emulator) that determines that a write error occurs when the write data and the read data do not match, the write data and the read data match. It is possible to avoid being judged as an error. Note that this ICE is used when debugging software or checking the operation of hardware, and is indispensable in the development of an embedded system.

(Other embodiments)
In addition, you may implement the said embodiment in the following aspects.
In each of the above embodiments, the ROM 30 is commonly connected to the subsequent stage through the conversion modules 20, 70, 80, 90 provided on the external bus OB of the CPU 10 together with the macros A41 to C43. Instead of this, the ROM 30 may be provided so as to be directly connected to the CPU 10.

  In each of the above embodiments, as the table value conversion writing method, the table value TB is read from the ROM 30 for each address one by one, and the read table value TB (correctly corrected table value CTB) is 1 Each address is written into the LUT of a specific macro, for example, the LUT 51 of the macro A41. For example, the table value TB is read one address at a time in a specific address range, and the table value TB in the specific address range is corrected, and the corrected table value CTB is read from a specific macro. You may make it write in the address corresponding to LUT. When it is not necessary to rewrite all the table values, that is, when it is necessary to rewrite only the table values in a part of the address range, the table value conversion writing time of the LUT can be shortened.

  In the conversion modules 20, 70, 80, and 90 in each of the above embodiments, the type of correction calculation performed on the input table value TB is not particularly limited. That is, in each of the above-described embodiments, multiplication and addition correction operations are mainly performed on the table value TB input to the conversion modules 20, 70, 80, and 90. Not limited to this, subtraction and division correction operations may be performed on the table value TB. In this case, in the fourth embodiment, it is desirable to configure the inverse conversion module 95 so as to have a calculation function opposite to the calculation function of the conversion module 90.

  In the first embodiment, multiplication, addition, and clipping are performed on the table value TB output from the CPU 10 as the correction calculation executed by the conversion module 20. For example, the correction calculation without clipping may be executed. Alternatively, a correction operation only for multiplication or addition may be executed.

The conversion modules 70 and 80 in the second and third embodiments may include the clip circuit 23 of the conversion module 20 in the first embodiment.
In the conversion modules 70 and 80 in the second and third embodiments, the type of correction calculation performed on the address Addr input from the CPU 10 is not particularly limited.

The address assignment in the second and third embodiments is not particularly limited to the address map shown in FIG.
In the second and third embodiments, the correction value C1 is set to “0” when the reference address RA is input to the conversion modules 70 and 80 as the start address of the LUT of each macro 40 as the address Addr. Although it was set, it is not limited to this. For example, by setting the reference address RA so that the correction value C1 is, for example, “+ X (X: integer)” or “−X” when the leading address of the LUT of each macro 40 is input as the address Addr. The offset in the + direction or − direction can be set to the address of the LUT.

  In the second embodiment, the conversion module 70 generates the correction value C2 based on the multiplication value M that is the conversion parameter and the address Addr input from the CPU 10, and the correction value C2 for the table value TB. The correction calculation (addition) was performed according to the above. For example, the multiplication value M, which is a conversion parameter, may be used as it is as a correction value in the correction calculation for the table value TB. Further, the correction value C1 generated based on the address Addr and the reference address RA input from the CPU 10 may be directly used as a correction value in the correction calculation for the table value TB.

  The reference address RA in the second and third embodiments may be omitted. In this case, the address Addr input from the CPU 10 to the conversion modules 70 and 80 may be directly used for generating the correction value C2. Alternatively, the address Addr input from the CPU 10 to the conversion modules 70 and 80 may be used as it is as a correction value in the correction calculation for the table value TB.

In the third embodiment, the entire LUT is divided into three regions R1, R2, and R3. However, the number of divisions of this region is not particularly limited.
In the third embodiment, the coefficient control circuit 85 changes the multiplication value M and the addition value A as correction coefficients for each of the regions R1 to R3. For example, the coefficient control circuit 85 may change one of the multiplication value M and the addition value A as the correction coefficient for each of the regions R1 to R3.

  The coefficient control circuit 85 of the conversion module 80 of the third embodiment may be applied to the conversion modules 20 and 90 and the inverse conversion module 95 of the first and fourth embodiments. Here, for example, when the coefficient control circuit 85 is provided in the conversion module 20 of the first embodiment, the coefficient control circuit 85 causes the multiplier 21 that constitutes the first arithmetic unit according to the area to which the address Addr of the LUT belongs. In addition, the multiplication value M and the addition value A as correction coefficients input to the adder 22 are changed.

The various embodiments described above can be summarized as follows.
(Appendix 1)
The table value read from the memory storing the template table value is corrected, and the table value of the lookup table provided separately for the function macro that is the hardware that performs the specific processing is based on the corrected value. A table value conversion device for rewriting
On the external bus of the central processing unit that reads out the table value as a model from the memory, a specific correction operation is performed on the data output from the central processing unit, and the macro has a look based on the calculated value. A table value conversion apparatus comprising a conversion module for converting a table value of an up table.
(Appendix 2)
The table value conversion apparatus according to appendix 1, wherein the conversion module executes the specific correction calculation according to a conversion parameter set in the conversion module.
(Appendix 3)
The conversion parameters set in the conversion module are a multiplication value, an addition value, a clip lower limit value, and a clip upper limit value. The multiplication value is M, the addition value is A, the clip lower limit value is L, and the clip upper limit value is When H is H, data output from the central processing unit is DATAin, and an operation value output from the conversion module is DATAout, the conversion module calculates the correction operation as the correction operation.

DATAout = max (L, min (H, DATAin × M + A))
However, max (a, b): a function for selecting the larger of a and b
min (a, b): function that selects the smaller of a and b

The table value conversion device according to attachment 2, wherein the table value conversion device is executed.
(Appendix 4)
The memory and the macro are commonly connected to a subsequent stage of the external bus of the central processing unit with the conversion module interposed therebetween, and the conversion module is connected to the memory from the memory by the central processing unit via the external bus. When the table value is read, the table value to be read is passed to the central processing unit as it is, and when the table value is rewritten to the lookup table of the macro, the data is transferred from the central processing unit to the external bus as the data. The table value conversion device according to any one of appendices 1 to 3, wherein the specific calculation process is executed on the read table value to be output.

In the invention according to attachment 4, the memory and the macro are commonly connected to a subsequent stage of the external bus of the central processing unit with the conversion module interposed therebetween, and the conversion module is connected to the central bus via the external bus. When the table value is read from the memory by the arithmetic processing unit, the read table value is passed to the central processing unit as it is, and when the table value is rewritten to the lookup table of the macro, the central processing unit The specific arithmetic processing is executed on the read table value output as the data to the external bus. By using the external bus in common in this way, the use efficiency of the external bus can be improved, and especially for the above memory, this is connected to the downstream of the conversion module, The degree of freedom of design of the entire device can be increased.
(Appendix 5)
The rewritten table value read by the central processing unit from the look-up table of the macro in which the table value has been rewritten based on the data subjected to the specific correction calculation by the conversion module, The table value conversion apparatus according to appendix 1 or 2, further comprising an inverse conversion module that performs inverse conversion to data corresponding to data before the correction calculation and outputs the data after the reverse conversion to the central processing unit. .
(Appendix 6)
The conversion module performs the specific correction calculation according to a conversion parameter set in the conversion module,
The table value conversion apparatus according to appendix 5, wherein the inverse conversion module performs the inverse conversion in accordance with an inverse conversion parameter set in the inverse conversion module in accordance with the conversion parameter.
(Appendix 7)
The inverse conversion module is interposed on an external bus of the central processing unit, and the memory and the macro are commonly connected to a subsequent stage of the external bus of the central processing unit in which the conversion module and the inverse conversion module are interposed. The inverse conversion module passes the read table value as it is to the central processing unit when the central processing unit reads the table value from the memory via the external bus. The table value conversion device according to any one of appendices 4 to 6.
(Appendix 8)
A predetermined address of the lookup table of the macro specified by the central processing unit is input to the conversion module from the central processing unit as an address of the calculation value to be written in the conversion module.
The conversion module generates a correction value according to at least one of the conversion parameter set in the conversion module and the address of the write destination, and executes the specific correction calculation according to the correction value. The table value conversion apparatus as described in any one.
(Appendix 9)
The conversion module subtracts a predetermined reference address from the write destination address, and converts the write destination address into an address in a lookup table of the macro specified by the central processing unit. 9. The table value conversion device according to 8.
(Appendix 10)
The table value conversion device according to appendix 9, wherein the reference address is a head address of a lookup table included in the macro designated as the writing destination.
(Appendix 11)
A predetermined address of the lookup table of the macro specified by the central processing unit is input to the conversion module from the central processing unit as an address of the calculation value to be written in the conversion module.
The conversion module performs the specific correction calculation according to the area to which the write destination address belongs while dividing the lookup table of the macro specified by the central processing unit into a plurality of areas. 11. The table value conversion device according to any one of supplementary notes 1 to 10, further comprising a coefficient control circuit that sets a correction coefficient input to a first arithmetic unit for performing the operation.
(Appendix 12)
A predetermined address of the lookup table of the macro specified by the central processing unit is input to the conversion module from the central processing unit as an address of the calculation value to be written in the conversion module.
The conversion module generates the correction value according to the area to which the write destination address belongs while dividing the lookup table of the macro specified by the central processing unit into a plurality of areas. The table value conversion device according to any one of appendices 1 to 11, further comprising a coefficient control circuit that sets a correction coefficient input to the second computing unit.
(Appendix 13)
The table value read from the memory storing the template table value is corrected, and the table value of the lookup table provided separately for the function macro that is the hardware for performing the specific processing is based on the corrected value. A method of converting and writing to the lookup table,
On the external bus of the central processing unit that reads out the table value as a model from the memory, a specific correction operation is performed on the data output from the central processing unit, and the macro has a look based on the calculated value. When a conversion module that converts the table value of the up table is interposed, and the table value is rewritten to the lookup table of the macro, the calculated value corrected through the conversion module is written to the corresponding lookup table. A table value conversion writing method characterized by that.
(Appendix 14)
The conversion module is configured to execute a correction operation according to a conversion parameter set in the conversion module, and an operation value written in a lookup table of the macro is in accordance with the set conversion parameter. 14. The table value conversion writing method according to appendix 13, wherein the table value conversion writing method is determined as a determined value.
(Appendix 15)
A multiplication value, an addition value, a clip lower limit value, and a clip upper limit value are prepared as conversion parameters set in the conversion module, the multiplication value is M, the addition value is A, the clip lower limit value is L, and the clip upper limit value is set. Is H, and the data output from the central processing unit is DATAin, and the calculation value output from the conversion module is DATAout, the calculation to the conversion module is the correction calculation.

DATAout = max (L, min (H, DATAin × M + A))
However, max (a, b): a function for selecting the larger of a and b
min (a, b): function that selects the smaller of a and b

15. The table value conversion writing method according to appendix 14, wherein an operation value to be written in a lookup table of the macro is obtained by executing
(Appendix 16)
After setting the conversion parameters in the conversion module corresponding to a specific macro lookup table,
a. A process of reading the table value as the template from the memory through the central processing unit by one address;
b. Corresponding to this reading, a process of converting the table value output from the central processing unit to be written to the lookup table of the specific macro by a correction operation based on the set conversion parameter through the conversion module ,
c. A process of writing the converted table value to a predetermined address of the lookup table of the specific macro;
A. ~ C. Note that the above processing is repeatedly executed until the table value read address from the memory and the table value write address to the lookup table of the specific macro are incremented until all the table values in the lookup table are rewritten. The table value conversion writing method according to 13 or 14.

The block diagram which shows the whole structure of the table value conversion apparatus of 1st Embodiment. The block diagram which shows the internal structural example of the conversion module of 1st Embodiment. The flowchart which shows the table value conversion writing method of 1st Embodiment. The block diagram which shows the internal structural example of the conversion module of 2nd Embodiment. The address map of 2nd Embodiment. Explanatory drawing for demonstrating the table value conversion of 2nd Embodiment. The block diagram which shows the internal structural example of the conversion module of 3rd Embodiment. Explanatory drawing for demonstrating the table value conversion of 3rd Embodiment. The flowchart which shows the setting method of the correction coefficient of 3rd Embodiment. The block diagram which shows the whole structure of the table value conversion apparatus of 4th Embodiment. The block diagram which shows the internal structural example of the conversion module of 4th Embodiment. The block diagram which shows the internal structural example of the inverse conversion module of 4th Embodiment. (A), (b), (c) is a block diagram which shows the outline | summary of the structure, respectively about the conventional table value converter.

Explanation of symbols

10 Central processing unit (CPU)
20, 70, 80, 90 Conversion module 21, 91 Multiplier (first computing unit)
22, 73, 84, 92 Adder (first arithmetic unit)
30 ROM
40 Macro 41-43 Macro A-Macro C
51-53 Look-up table (LUT)
71, 81 subtractor (second multiplier)
72,82 multiplier (second computing unit)
83 Adder (second computing unit)
85 Coefficient control circuit 95 Inverse conversion module OB External bus

Claims (10)

The table value read from the memory storing the template table value is corrected, and the table value of the lookup table provided separately for the function macro that is the hardware that performs the specific processing is based on the corrected value. A table value conversion device for rewriting
On the external bus of the central processing unit that reads out the table value as a model from the memory, a specific correction operation is performed on the data output from the central processing unit, and the macro has a look based on the calculated value. A table value conversion apparatus comprising a conversion module for converting a table value of an up table.   The table value conversion device according to claim 1, wherein the conversion module executes the specific correction calculation according to a conversion parameter set in the conversion module. The conversion parameters set in the conversion module are a multiplication value, an addition value, a clip lower limit value, and a clip upper limit value. The multiplication value is M, the addition value is A, the clip lower limit value is L, and the clip upper limit value is When H is H, data output from the central processing unit is DATAin, and an operation value output from the conversion module is DATAout, the conversion module calculates the correction operation as the correction operation.

DATAout = max (L, min (H, DATAin × M + A))
However, max (a, b): a function for selecting the larger of a and b
min (a, b): function that selects the smaller of a and b

The table value conversion apparatus according to claim 2, wherein:   The rewritten table value read by the central processing unit from the look-up table of the macro in which the table value has been rewritten based on the data subjected to the specific correction calculation by the conversion module, The table value conversion according to claim 1, further comprising: an inverse conversion module that performs inverse conversion to data corresponding to data before the correction calculation and outputs the data after the reverse conversion to the central processing unit. apparatus. The conversion module performs the specific correction calculation according to a conversion parameter set in the conversion module,
The table value conversion device according to claim 4, wherein the inverse conversion module performs the inverse conversion according to an inverse conversion parameter set in the inverse conversion module according to the conversion parameter. A predetermined address of the lookup table of the macro specified by the central processing unit is input to the conversion module from the central processing unit as an address of the calculation value to be written in the conversion module.
6. The conversion module according to claim 1, wherein the conversion module generates a correction value according to at least one of a conversion parameter set in the conversion module and the write destination address, and executes the specific correction calculation according to the correction value. The table value conversion apparatus as described in any one of Claims.   The conversion module subtracts a predetermined reference address from the write destination address, and converts the write destination address into an address in a lookup table of the macro specified by the central processing unit. Item 7. The table value conversion device according to Item 6. A predetermined address of the lookup table of the macro specified by the central processing unit is input to the conversion module from the central processing unit as an address of the calculation value to be written in the conversion module.
The conversion module generates the correction value according to the area to which the write destination address belongs while dividing the lookup table of the macro specified by the central processing unit into a plurality of areas. The table value conversion apparatus as described in any one of Claims 1-7 provided with the coefficient control circuit which sets the correction coefficient input into said 2nd calculator. The table value read from the memory storing the template table value is corrected, and the table value of the lookup table provided separately for the function macro that is the hardware for performing the specific processing is based on the corrected value. A method of converting and writing to the lookup table,
On the external bus of the central processing unit that reads out the table value as a model from the memory, a specific correction operation is performed on the data output from the central processing unit, and the macro has a look based on the calculated value. When a conversion module that converts the table value of the up table is interposed, and the table value is rewritten to the lookup table of the macro, the calculated value corrected through the conversion module is written to the corresponding lookup table. A table value conversion writing method characterized by that. After setting a conversion parameter for the specific correction operation in the conversion module corresponding to a lookup table of a specific macro,
a. A process of reading the table value as the template from the memory through the central processing unit by one address;
b. Corresponding to this reading, a process of converting the table value output from the central processing unit to be written to the lookup table of the specific macro by a correction operation based on the set conversion parameter through the conversion module ,
c. A process of writing the converted table value to a predetermined address of the lookup table of the specific macro;
A. ~ C. The process is repeatedly executed until all the table values of the lookup table are rewritten while incrementing the table value read address from the memory and the table value write address to the lookup table of the specific macro. Item 10. The table value conversion writing method according to Item 9.

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