JP2007273016A - Reproduction signal processor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the following problem: an information decoder operating at high speed is needed in order to speed up a data transfer rate of a digital information recorder and this invites increases in circuit scale, power consumption, and decoding delay. <P>SOLUTION: A PRML information processor 8 for reducing power consumption and deleting decoding delay while improving reproduction performance by using a PR equalizer 5 for performing PR equalization by using data delayed in 1/2 phase with respect to information which has digitized reproduction waveform obtained from a recording medium 1 by an A/D (analog/digital) converter 4, an adaptive equalization coefficient calculator 6 for learning a filter coefficient adaptively in the PR equalizer, and a viterbi decoder 7 for performing maximum likelihood decoding that reduces a path memory length by sorting out an output result from a path memory with respect to the equalization waveform. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an adaptive equalization apparatus that adaptively equalizes a reproduction waveform in a reproduction signal processing apparatus using a PRML (Partial Response Maximum Likelihood) signal processing method, and a decoding method thereof.

  In recent years, a CD (Compact Disc) or a DVD (Digital Versatile Disc) is used as a recording medium for recording and reproducing information. When reproducing information recorded on these recording media, a reproduction signal processing apparatus having a higher reading ability is required.

  In particular, since DVD has a higher recording density than CD, the reproduction waveform of DVD is affected by intersymbol interference, and the reproduction waveform is distorted. For example, since DVD uses EFM (Eight to Fourteen Modulation) modulation that modulates 8-bit information into a 16-bit codeword, when the reference length is T, the pit length is 3T to 11T to 14T. ing. Although it is desirable that the pit length is exactly 3T to 11T to 14T, for example, when the recordable quality of a recordable DVD is poor, the pit length is not formed correctly or even on a read-only DVD. Since some of the lengths are not formed correctly, the reproduced waveform is distorted. Further, in order to read information on a DVD at a high speed, the reproduction signal processing apparatus needs to perform data processing at high speed. An optical pickup 46 (FIG. 11), FEP (Front End Processor) 47, which are analog signal processing systems, are used. (FIG. 11) causes a phenomenon in which the distortion of the reproduction signal further increases due to the deterioration of the group delay characteristic due to the lack of the frequency characteristic necessary for passing the reproduction waveform.

  If “1” to “0” of the digital data is determined by simply binarizing the reproduced waveform with only the signal amplitude, the pit formation is not correctly formed, or an analog signal Data read error occurs due to distortion of the reproduction waveform due to degradation of the group delay characteristics due to the frequency pass band of the processing system, and the data is read as data whose reliability is significantly impaired, and the BER (Bit Error Rate) is deteriorated. Cannot be read.

Therefore, in recent years, the PRML detection method has attracted attention as a reproduction signal processing apparatus having a high reproduction capability. The PRML detection method is a technology used as a signal processing method for high-density recording media such as HDDs (Hard Disk Drives) and rewritable optical discs, and is a partial response method that is a waveform equalization technology. This is a method combining Viterbi decoding, which is one of the likelihood decoding methods, and is a method for decoding correct data from a reproduction signal having a low S / N (signal-to-noise) ratio and a reproduction signal having a lot of nonlinear distortion.
FIG. 11 is a block diagram showing a configuration of an information reproducing apparatus that performs signal processing of a general PRML detection method. The recording medium 45 is irradiated with a laser from the optical pickup 46. By detecting the intensity of the reflected light, the data recorded on the recording medium 45 is read and converted into an analog electric signal.

The FEP 47 performs a process of amplifying the read reproduction signal, adjusting the gain, removing a high-frequency noise component, and emphasizing a necessary band. The output signal from the FEP 47 is converted from an analog signal to a digital signal by the A / D converter 48.
The digital signal is input to a PR equalizer 49 configured by a transversal filter or a FIR (Finite Impulse Response) filter in the PRML detection device 51.

  As for the equalizing apparatus, the fact that the signal band in DVD is concentrated in the band of 1/4 or less in the standardized frequency from the MTF (Mutual Transfer Function) characteristic which is the optical reproduction characteristic of DVD as shown in FIG. Then, as shown in FIG. 3, two delay units 42 that delay 1T (T: time per channel bit) are used, a multiplier 43 is inserted every 2T, and an adder 44 that adds the multiplication results is configured. Some of them are reducing power consumption.

  In general, it is considered that the PR system having a frequency characteristic close to the MTF characteristic is more advantageous as a partial response system. However, when the PR system having a long PR length is used, the circuit scale of the Viterbi decoder 25 is increased along with the PR length. Since the scale increases exponentially, considering that the PR method with a short PR length is used, the PR (1, 2, 2, 1) method and PR (3, PR (a, b, b, c), which is a 4, 4, 3) system, corresponds to this.

The tap coefficient optimum for this PR method is obtained by the appropriate equalization coefficient calculation device 50 (FIG. 11), and the waveform is equalized using the tap coefficient by the PR equalizer 49 (FIG. 11).
There is an LMS (Least Mean Square) algorithm as a method for calculating the optimum tap coefficient, and an adaptive equalization coefficient calculator 50 (FIG. 11) using the algorithm will be described.

  The LMS algorithm updates and learns the tap coefficient of the PR equalizer 49 (FIG. 11) that minimizes the square value of the equalization error signal, which is the difference between the PR equalizer output value and the equalization target value. It is to calculate by. A general tap coefficient updating formula of the LMS algorithm is shown in the following formula.

Ci (t + 1) = Ci (t) + μ × e (t) × xi (t) Equation (1)
(However, t = 0, 1, 2, 3, ...)
In Equation (1), Ci is the i-th tap coefficient at time t, Ci (t + 1) is the updated i-th tap coefficient, μ is the loop gain, e (t) is the equalization error at time t, and xi (t ) Indicates the input value of the FIR filter for the i-th, and the sum of the equalization error e (t) for the i-th and the input value xi of the FIR filter is called a correlation value in the LMS algorithm.

  This is a decoding scheme that uses the waveform interference intentionally given by the PR equalizer 49 (FIG. 11), and a code sequence that makes the difference between the value estimated by the PR scheme and the Viterbi decoder input signal small. It is possible to decode digital data recorded on a recording medium by performing Viterbi decoding which is one of the maximum likelihood decoding methods.

  FIG. 6 shows a configuration of a general Viterbi decoder 25. The Viterbi decoder stores in a register 28 a branch metric 26 that calculates likelihood information from the PR equalizer output signal and an estimated value estimated from the PR method, and a path metric 27 (ACS: Add Compare Select). A path memory 29 for discriminating the information sequence having the highest likelihood from the likelihood information one time before and the output of the branch metric, and selecting the path having the highest likelihood information from the determined information; , And an output selector for selecting information with higher likelihood from the output result of the path memory.

Here, a feature that three or more of the same codes, which are the features of the EFM modulation method used for DVDs, and a Viterbi decoder limited to the PR (a, b, b, a) method will be described. The state transition in the Viterbi decoder is shown in FIG. In this figure, the state can be divided into six states S0 to S5 because three or more of the same codes that are characteristic of the EFM modulation method are continuous, and the paths that transition from the state Si to the state Sj are shown. The estimated value at is obtained by the following equation.

Estimated value = a × ck + b × ck−1 + b × ck−2 + a × ck−3 Equation (2)
In Expression (2), a and b indicate a and b in the PR (a, b, b, a) system, and ck, ck-1, ck-2, and ck-3 are times k, k-1, k-. 2 shows a recording sequence c in k-3.

The trellis diagram shown in FIG. 8 is a diagram illustrating state transitions in the Viterbi decoder (see Patent Document 1).
JP 2000-123487 A

However, in the conventional PRML detection apparatus, it is necessary to operate the PR equalizer, the adaptive equalization coefficient calculator, and the Viterbi decoder at high speed in order to support high-speed reproduction.
In order to cope with the high speed operation, it is necessary to perform pipeline processing and parallel processing for various operations in the PR equalizer, the adaptive equalization coefficient calculator, and the Viterbi decoder. As a result, the circuit scale increases and the power consumption also increases.
Furthermore, accompanying pipeline processing and parallel processing, the time from obtaining a signal from the optical pickup and obtaining the decoding result increases.

  As a technique for reducing the circuit scale, there is a PR equalizer (FIG. 3) in consideration of the MTF characteristics of FIG. 2, but the PR (1, 2, 2, 1) system shown in FIG. The 4, 4, 3) method uses a band of 1/4 or more, but has a configuration that gives priority to the circuit scale and controls signals of a band of 1/4 or less. An adaptive equalization coefficient calculator 50 that is difficult to perform sufficient waveform equalization due to a mismatch in the frequency band to be handled with respect to the PR system that is an equalization target, and that automatically learns tap coefficients of the PR equalizer. Even in (FIG. 11), the control becomes unstable. For this reason, the PRML detection device becomes unstable, resulting in characteristic deterioration of the PRML detection device 51 (FIG. 11).

  The present invention has been made to solve the above problems, and as a means for reading digital data recorded on the recording medium 1 (FIG. 1), the circuit scale and power consumption are reduced, and An object of the present invention is to provide a PRML detection device 5 (FIG. 1) capable of improving reproduction performance while reducing output delay.

  In order to solve the above problems, the PRML detection apparatus of the present invention uses a channel bit standard as a means for demodulating digital data from a recording medium digitally recorded by a recording code having a restriction that three or more of the same codes are continuous. A PR equalizer configured by a FIR (Finite Impulse Response) filter for controlling 1/3 of the equalization frequency, an adaptive equalization coefficient calculator that adaptively learns tap coefficients of the PR equalizer, When decoding the output result of the PR equalizer, maximum likelihood decoding is performed by a Viterbi decoder having a function of varying the output delay.

Furthermore, N delay devices in which two delay elements that delay the input signal by 1T (T: time per channel bit) are connected in series, and a signal whose phase is delayed by ½ phase with respect to the input signal. M delay devices in which two delay elements each delaying by 1T are connected in series, N first delay devices and M
The second delay unit includes a multiplier every 2T, and is configured by an adder that performs multiplication with a plurality of tap coefficients that can be input from the outside and adds the outputs of the multipliers It is.

  Further, the A / D converter has an interpolator that generates a signal that is half phase out of the data sampled at the channel rate, and the output of the interpolator is delayed by the half phase. Two delay elements that delay the signal by 1T are input to M delay devices connected in series two by two.

  Further, in the PR equalizer in the PRML detection apparatus, in the data sampled with a clock twice the channel rate in the A / D converter, a signal whose 1/2 phase is delayed is delayed by the 1/2 phase. The signal is input to a delay element that delays the signal by 1T.

  Further, in the PR equalizer, in the PR equalizer, in the data sampled with a clock twice the channel rate in the A / D converter, a signal delayed by 1/2 phase is converted into the 1/2 phase. A signal delayed by 1 is input to a delay element that delays by 1T.

  Further, in the interpolator in the PRML detection apparatus, the A / D converter generates a signal delayed in 1/2 phase by linear interpolation from the sampled data and the data sampled 1T before the sampled data. It is a feature.

  Further, in the PR equalizer in the PRML detection device, the signal output from the interpolator is delayed by a half phase, and the A / D converter obtains a half phase obtained by sampling at twice the channel rate. It is characterized in that the signal that is delayed is varied by external control.

  Further, in the adaptive equalization coefficient calculator in the PRML detection device, a correlation value between the equalization error obtained from the difference between the output of the PR equalizer and the equalization target value and the input waveform of the PR equalizer is obtained. In the correlation calculator, the code information of the correlation value is obtained from the code information in the information of the equalization error and the code information of the input waveform of the PR equalizer, and the magnitude of the correlation value is the value of the input waveform of the PR equalizer. It is characterized by using data.

Further, in the adaptive equalization coefficient calculator in the PRML detection device, a rule filter gain setting unit having a function of changing a gain in an output of the correlation calculator, and an integrator for integrating the output of the loop filter gain setting unit. It is characterized by doing.
The Viterbi decoder in the PRML detection device according to claim 1, further comprising a branch metric calculator, a path metric calculator, a path memory, and a decoding result selector. In the decoding result selector, the path The memory output is divided into two groups, and if each of the groups matches, the path memory output is left as a decoding result candidate. The output is excluded from the decoding result candidates, and the pair remaining as the decoding result candidates is divided into two sets, and the previous operation is performed until the set becomes one set, and one set is Viterbi decoded. It has the function to output as a decoding result of a device.

  Further, the Viterbi decoder in the PRML detection device is characterized in that the Pasme memory length is varied by external control.

  According to the PRML detection apparatus according to the present invention, the PR equalizer configured by the FIR filter for controlling 1/3 of the normalized frequency is stable with respect to the MTF characteristic and the PR characteristic which is an equalization target. It is possible to obtain an equalization characteristic.

  In addition, according to the PRML detection apparatus of the present invention, N delay devices in which two delay elements each delaying by 1T are connected in series, and a signal delayed by 1/2 phase with respect to the input signal are delayed by 1T. 2 delay elements to be connected in series, N first delay elements and M second delay elements each having a multiplier every 2T and capable of being input from the outside Since the adder performs multiplication with a plurality of tap coefficients and adds the outputs of the multipliers, a stable PR equalizer can be realized with a small increase in the multipliers.

  In addition, according to the PRML detection apparatus according to the present invention, since the channel rate sampled data is generated using an interpolator that generates a signal delayed by 1/2 phase, the channel rate sampled data is It is possible to generate data in which a half phase is sent.

  In addition, according to the PRML detection apparatus according to the present invention, equalization by a PR equalizer is performed in order to input a signal delayed by 1/2 phase in data sampled with a clock twice the channel rate to the PR equalizer. The characteristics can be stabilized.

  Further, according to the PRML detection apparatus according to the present invention, a signal whose half phase is delayed with respect to channel rate sampled data is simply calculated by linear interpolation, so that the circuit scale can be suppressed.

  Further, according to the PRML detection apparatus according to the present invention, the sampling mode is switched between the channel rate sampling and the double channel rate sampling in the A / D converter. It is possible to generate data with a ½ phase delay by using it, and at a slow double speed, by generating data with a ½ phase delay by double channel rate sampling, it is possible to use different PR equalizers according to the double speed. It becomes possible.

  Further, according to the PRML detection apparatus according to the present invention, it is possible to perform PR equalization with a reduced circuit scale by generating data with a ½ phase delay by an interpolator based on linear interpolation.

  In the PRML detection apparatus of the present invention, when the tap coefficient of the PR equalizer is adaptively calculated, the correlation calculator calculates the sign information in the information of the equalization error and the sign of the input waveform of the PR equalizer. By obtaining the code information of the correlation value from the information and using the data of the input waveform of the PR equalizer as the magnitude of the correlation value, it is possible to reduce the circuit because no multiplier is used.

  Further, in the PRML detection apparatus of the present invention, the output from the path memory is divided into groups of every two to perform matching confirmation, and by selecting a decoding result, the Viterbi decoder can be controlled by a method that suppresses the circuit scale. It becomes possible to improve the reliability of the decryption result.

  Further, in the PRML detection apparatus of the present invention, it is possible to reduce the decoding delay by changing the path memory length to external control.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1)
The PRML detection apparatus according to the present embodiment includes a PR equalizer for controlling a signal band that is 1/3 of a channel bit standardized frequency, an adaptive equalization coefficient calculator that reduces circuit scale and power consumption, By using a Viterbi decoder capable of varying the output delay, it is compatible with high-speed operation.

  FIG. 1 is a block diagram showing a configuration of a PRML detection apparatus according to the present embodiment. In the figure, 1 is a recording medium, 2 is an optical pickup, 3 is an FEP that amplifies the read reproduction signal, adjusts the gain, removes high-frequency noise components, and emphasizes a necessary band, 4 is an A / D converter that converts an analog signal into a digital signal, 5 is a PR equalizer that equalizes the A / D converted digital signal in the PR format, and 6 is a tap coefficient in the PR equalizer 5. An adaptive equalization coefficient calculator 7 calculated by automatic learning is a Viterbi decoder 7 that performs maximum likelihood decoding on the output signal of the PR equalizer.

The PR equalizer 5 shown in FIG. 1 applies a filter coefficient adapted to each PR method to an analog signal output from the FEP 3 by A / D conversion and converted by the adaptive equalization coefficient calculator 6. This is for calculating and equalizing the waveform using the filter coefficient. In the FIR filter generally used as a PR equalizer, 1T delay elements are connected in series, one multiplier is inserted into each delay element, and the outputs of the multipliers are added. Consists of an adder. However, in order to correct the group delay degradation in FEP3, an FIR filter having as long a time width as possible must be constructed.
However, when a FIR filter having a long time width is configured, if one multiplier is used for one 1T delay element, the circuit scale increases.

  Therefore, in the MTF characteristic which is the optical reproduction characteristic of the DVD as shown in FIG. 2, the characteristic that the signal band in the DVD is concentrated in a band equal to or less than 1/4 of the standardized frequency is shown in FIG. A circuit scale is obtained using a PR equalizer 49 configured by using two delay units 42 that delay such 1T, inserting a multiplier 43 every 2T, and adding the outputs of the multipliers. Some have reduced power consumption and reduced power consumption.

  However, the PR equalizer 49 gives priority to the circuit scale, and the PR system that is an equalization target, for example, the PR (1, 2, 2, 1) system or the PR (3, 3) as shown in FIG. As in the 4, 4, 3) method, the PR equalizer 49 configured as shown in FIG. 3 has a configuration in which a signal having a frequency characteristic of ¼ or more cannot be controlled. For a certain PR (1, 2, 2, 1) system or PR (3, 4, 4, 3) system, it is difficult to perform sufficient waveform equalization due to mismatch of the frequency bands to be handled. Further, even in the adaptive equalization coefficient calculator that automatically calculates the tap coefficient of the PR equalizer 49, the operation becomes unstable due to the influence of the mismatch of the frequency band.

  For this reason, the PR equalizer 5 in this embodiment is configured as shown in FIG. The PR equalizer 5 includes a delay unit 10 in which two delay elements each delayed by 1T for a PR equalizer input signal sampled by A / D conversion are connected in series, and a 1 / A delay device 11 in which two delay elements for delaying a two-phase delayed signal by 1T are connected in series, and a multiplier 15 is inserted every 2T to multiply by a plurality of coefficients that can be input from the outside. It comprises an adder 16 that adds the outputs of the multiplier 15. The frequency range that can be controlled by the PR equalizer 5 is 1/3.

Therefore, since the frequency range that can be controlled by the PR equalizer 5 has been expanded to 1/3, a portion in which signal components are concentrated in the low region of the MTF characteristic and the PR (1, 2, 2, 1) system Or from the frequency band at which the output gain in the PR (3, 4, 4, 3) system first becomes zero,
It is considered that more stable waveform equalization characteristics can be obtained. In addition, as PR methods, PR (a, b, b, a) methods such as PR (1, 2, 2, 1) method and PR (3, 4, 4, 3) method, and other PRs are used. The method may be used.

  Further, for example, when comparing the number of multipliers that greatly affect the circuit scale with respect to a PR equalizer that can control the time width of 14T, one multiplier is used for one general 1T delay element. When 14 are used, 7 are required when two delays 42 delayed by 1T are used and a multiplier 43 is inserted every 2T. The PR equalizer 5 according to the present invention requires 9 multipliers. Therefore, it is possible to control the time width of 14T, thereby suppressing an increase in circuit scale and obtaining stable PR equalization characteristics.

  Here, in the PR equalizer 5, the signal delayed by ½ phase is the interpolator 12 using the data sampled with the channel clock by the A / D converter 4 and the data sampled 1T before that. Is generated by linear interpolation.

  Further, as a means for generating a signal delayed by ½ phase, data that is delayed by ½ phase by sampling at twice the channel clock in the A / D converter 4 without using the interpolator 12. Can be considered, and the data can be input to the delay unit 11, and by using actually sampled data, it is possible to obtain better equalization characteristics than those calculated by linear interpolation.

  Further, as a method of generating a signal with a ½ phase delay, PR or the like including both a method of generating by linear interpolation by the interpolator 12 and a method of using data actually sampled by the A / D converter 4 A PR equalizer 5 that can switch the selector 13 and the operation of the A / D converter 4 by external control of the register 14 or the like is also conceivable.

  Next, the adaptive equalization coefficient calculator 6 will be described. The adaptive equalization coefficient calculator is a device that calculates tap coefficients necessary for the PR equalizer 5 to perform waveform equalization to a PR system that is an equalization target. An LMS algorithm is used as a method for calculating the tap coefficient. The LMS algorithm is a method of calculating the tap coefficient for minimizing the square value of the equalization error, which is the difference between the PR equalizer output value and the equalization target value, by automatically updating and learning from time to time. .

  FIG. 5 shows an adaptive equalization coefficient calculator 6 according to this embodiment, and the adaptive equalization coefficient calculator 6 will be described. The adaptive equalization coefficient calculator 6 is a provisional binarization determination for generating a binarized signal by level discrimination from the PR equalization target value 20 that can be set by external control by the register 21 and the PR equalizer output signal. An equalization target value for the output signal of the PR equalizer 5 is selected from the equalizer 18, and an equalization error is obtained from the equalization target value and the output signal of the PR equalizer 5. In general, a correlation operation unit 22 that calculates a correlation value by multiplying the equalization error by the PR equalizer input signal generates a signal serving as a reference for updating the tap coefficient. There is a loop filter gain setting 23 for setting the gain of the loop filter to the correlation value, and an integrator 24 for integrating the output value of the loop filter gain setting 23.

  However, in the general form of adaptive equalization coefficient calculator 50, since there are as many multipliers as the number of taps in the correlation calculator for obtaining the correlation value, the number of multipliers depends on the number of taps to be calculated. This increases the circuit scale.

Therefore, the adaptive equalization coefficient calculator 6 according to the present invention obtains the code information of the correlation value from the code information of the equalization error signal and the code information of the PR equalizer input signal, and regarding the magnitude of the value in the correlation value, Calculation is performed using the amplitude information of the PR equalizer input signal. As a result, the conventional adaptive equalization coefficient calculator 50 does not require all the multipliers that exist as many as the number of taps, and has the effect of reducing the circuit scale and the calculation time.

  Therefore, although the number of multipliers in the PR equalizer 5 is increased, the adaptive equalization coefficient calculation device 6 does not require a multiplier for obtaining a correlation value for updating the filter coefficient, so that the circuit scale can be reduced as a whole. In addition, stable PR equalization characteristics can be obtained, and performance as a PRML detector can be improved.

Next, the Viterbi decoder 7 that is one of the maximum likelihood decoding methods will be described. This is done by the PR equalizer 5 in the form of a PR (1, 2, 2, 1) system or a PR (a, b, b, a) system such as the PR (3, 4, 4, 3) system. As an example, a Viterbi decoder for a digitized waveform is introduced.
The Viterbi decoder 7 generally has the configuration shown in FIG. 6, and includes a branch metric 26 that calculates likelihood information based on the PR equalizer output signal and an estimated value estimated from the PR method, and a path metric 27 in a register 28. It is possible to discriminate the information sequence with the highest likelihood from the stored likelihood information one hour before and the output of the branch metric, and the decoding result that is most likely from the discrimination information, that is, the likelihood information is considered to be high. And the output selector 30 for selecting the decoding result from the output result of the path memory 29.

  Here, the Viterbi decoder for the PR (a, b, b, a) system has 8 states and 16 branches, but a codeword having a recording sequence in which three or more identical codes are continuous. Is used, the states and branches that do not exist can be deleted, and there are six states S0 to S5 and eight branches corresponding thereto as shown in FIG. In order to obtain the most probable sequence in the Viterbi decoder, a certain amount of past information is accumulated, and a decoding result is obtained based on the accumulated information. As means for accumulating the past information, there is a path memory 29 corresponding to the six states S0 to S5 shown in FIG. As shown in FIG. 9, the path memory 29 controls the selector 33 by path selection SEL0, SEL1 for selecting a path with a path metric 27, and updates the value of FF (Flip Flop) 32 for storing the contents of the path memory as needed. As a result, a decoded sequence is calculated.

  In the path memory 29, when all the outputs of the six-state path memories 29 match, this is called a merge state, and the same result is obtained regardless of which is selected, but if the output of the path memory 29 is different, no merge is performed. It is called a state, and the value differs depending on the output of the path memory in any state as a decoding result.

  Therefore, as a means for compensating the decoding result, it is conceivable to use a device having a longer path memory in order to make it difficult to generate a no-merging state. However, the decoding delay increases, and the circuit hope also increases. End up.

  In addition, even when no merge occurs, as a method of selecting a decoding result with high likelihood, the path metric corresponding to the six states from the path memory 29 in the state having the smallest path metric value is used. There is a method for selecting an output as a decoding result, but it is necessary to compare the path metrics in each state and determine which is the smallest path metric among them. In a Viterbi decoder having a larger number of states, the number of circuits necessary for the operation increases.

Thus, FIG. 10 shows a method for selecting a decoding result having a high likelihood in a manner that suppresses the circuit scale even when the no-merging occurs. When the states are divided into two groups from the six states, and “1” or “0” matches in each of the coincidence detectors 1 to 3 (27 to 29), the output of the path memory is obtained as a result of decoding. If it does not match, the output of the path memory in the set is excluded from the candidates for decoding results. The matching detector 4 (30) and the matching detector 5 (31) are used until one set is selected, and the path memory output value for the remaining set is selected as a decoding result.

  By using this, the decoding result can be selected by a simple method, and even when no merge occurs when the path memory length is short, a more correct decoding result can be obtained. This method is also effective because the increase in circuit scale is small even in a Viterbi decoder having a large number of states.

  Even when the signal processing method until the signal input to the Viterbi decoder is generated is different and the operation delay until the signal is input to the Viterbi decoder is different, the path memory length can be varied by the above method. Since there is no performance degradation in the Viterbi decoder, switching of the path memory length is controlled by an external register, and the decoding result is obtained from the pickup even when the operation delay until input to the Viterbi decoder is different. Can be made the same decoding delay.

  The PRML detection apparatus according to the present invention reduces the reproduction waveform distortion due to the higher density and higher speed of the recording medium, and reduces the circuit scale and power consumption, while reducing the circuit scale. A PR equalizer having an improved function, an adaptive equalization coefficient calculator, and a Viterbi decoder capable of varying the decoding delay, is useful as a PRML detection apparatus for DVD playback at high speed. Further, the present invention can be applied to the use of a PRML detection apparatus for a reproduction waveform of a next-generation high-density recorded optical disc such as a Blu-ray disc.

The block diagram which shows the structure of the PRML detection apparatus which performs the signal processing of the PRML detection system in this invention The figure which shows the frequency characteristic and MTF characteristic of various PR systems Block diagram showing the configuration of a conventional PR equalizer The figure which shows the FIR type PR equalizer in this invention The figure which shows the adaptive equalization coefficient calculator using the LMS algorithm in this invention Diagram showing the configuration of a general Viterbi decoder The figure which shows the state transition of the Viterbi decoder in PR (a, b, b, a) system with respect to the codeword by which EFM modulation was carried out The figure which shows the metric of the Viterbi decoder in PR (a, b, b, a) system with respect to the EFM modulated codeword The figure which shows the path memory of the Viterbi decoder in PR (a, b, b, a) system with respect to the codeword by which EFM modulation was carried out The figure which shows the output selection function of the path memory in this invention A block diagram showing a configuration of an information reproducing apparatus that performs signal processing of a general PRML detection method

Explanation of symbols

1, 45 Recording medium 2, 46 Optical pickup 3, 47 FEP
4, 48 A / D converter 5 PR equalizer 6 Adaptive equalization coefficient calculator 7 Viterbi decoder 8 PRML detection device 9 PR equalizer 10 2T interval delay element 11 1/2 2T for data delayed in phase Delay element for interval 12 Interpolator 13 Input switching device for channel sampling and double sampling 14 Channel sampling and double sampling external switching device 15, 43 Multiplier 16, 44 Adder 17 Adaptive equalization coefficient calculator 18 Temporary binarization Determinator 19 Equalization error calculator 20 Equalization target value 21 Equalization target value external control device 22 Correlation calculator 23 Loop gain setting unit 24 Integrator 25 Viterbi decoder 26 Branch metric 27 Path metric 28 Path metric delay unit 29 Path memory 30 Path memory output selector 31 Path memory initial value 32 Path memory internal FF
33 Path selection selector 34 Decoding result selector 35 Path memory 36 Decoding result selector 37 Match detector 1
38 coincidence detector 2
39 Match detector 3
40 coincidence detector 4
41 coincidence detector 5
42 1T delay element

Claims (10)

As a means for demodulating digital data from a recording medium digitally recorded by a recording code having the restriction that three or more of the same codes are continuous, FIR (Finite Impulse Response) for controlling 1/3 of the normalized frequency of channel bits ) PR equalizer composed of filters, an adaptive equalization coefficient calculator that adaptively learns tap coefficients of the PR equalizer, and an output delay when decoding the output result of the PR equalizer A PRML detection apparatus, wherein maximum likelihood decoding is performed by a Viterbi decoder having a function of varying the frequency. The PR equalizer in the PRML detection device according to claim 1, wherein N delay devices are connected in series, each including two delay elements each delaying an input signal by 1T (T: time per channel bit); M delay elements connected in series with two delay elements each delaying a phase ½ with respect to the input signal by 1T, N first delay elements, and M second delay elements A PRML equalizing apparatus comprising: an adder for multiplying a plurality of tap coefficients that can be input from outside by adding a multiplier to the delay unit every 2T, and adding the outputs of the multipliers. The PR equalizer in the PRML detection device according to claim 2, further comprising: an interpolator that generates a signal that is ½ phase out of data sampled by a channel rate in an A / D converter, A PRML detection device, wherein the output of the interpolator is input to M delay units in which two delay elements each delaying the signal delayed by 1/2 phase by 1T are connected in series. 3. The PR equalizer in the PRML detection device according to claim 2, wherein a signal whose phase is delayed by 1/2 in the data sampled by a clock twice as high as the channel rate in the A / D converter, A PRML detection device, wherein a signal delayed in phase is input to a delay element that delays by 1T. 4. The interpolator in the PRML detection device according to claim 3, wherein the A / D converter converts the sampled data and a signal delayed by 1/2 phase by linear interpolation from the data sampled 1T before the sampled data. A PRML detection device characterized by generating. 3. The PR equalizer in the PRML detection apparatus according to claim 2, wherein the signal is obtained by sampling at a signal having a half phase output from the interpolator and at twice the channel rate in the A / D converter. A PRML detection device characterized in that a signal whose phase is ½ is varied by external control. The adaptive equalization coefficient calculator in the PRML detection device according to claim 2, wherein an equalization error obtained from a difference between an output of the PR equalizer and an equalization target value and an input waveform of the PR equalizer are calculated. In the correlation calculator for obtaining the correlation value, the code information of the correlation value is obtained from the code information in the information of the equalization error and the code information of the input waveform of the PR equalizer, and the magnitude of the correlation value is determined by the PR equalizer. A PRML detection apparatus using the input waveform data. 8. The adaptive equalization coefficient calculator in the PRML detection device according to claim 7, wherein a rule filter gain setting unit having a function of varying a gain is integrated in an output of the correlation calculator, and an output of the loop filter gain setting unit is integrated. A PRML detection device characterized by performing an integrator. The Viterbi decoder in the PRML detection device according to claim 1, further comprising a branch metric calculator, a path metric calculator, a path memory, and a decoding result selector, wherein the decoding result selector includes: The output is divided into two groups, and if each of the groups matches, the output of the path memory is left as a candidate for the decoding result, and if they do not match, the output of the path memory in the group is Excluded from the decoding result candidates, perform the previous operation separately for each of the two sets of the decoding result candidates, and perform the above operations until one set is made. A PRML detection device having a function of outputting as a decoding result. 10. The Viterbi decoder of the PRML detection device according to claim 9, wherein the length of the Pasme memory is varied by external control.

Images