JP2007266861A - Image encoding device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce a circuit size of an image encoding device by performing and repeating processing of a pixel block size of the minimum processing unit. <P>SOLUTION: The image encoding device repeats and performs various processing of intra prediction, excess in 4×4 pixel and 16×16 pixel units in a decoding processing unit 3, discrete cosine transformation, quantization, etc., and respective processing of excess in 8×8 pixel unit, quantization, inverse quantization, addition, and SATD (Sum of Absolute Transformed Difference) addition, in a 4×4 pixel unit. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an image encoding device that compresses and encodes an image.

  In recent years, image compression coding systems represented by MPEG-2 and MPEG-4 have been widely used in general household equipment such as video cameras and disk recorders.

  However, in these methods, the amount of codes to be assigned greatly affects the quality of the compressed image, and is accompanied by drastic image degradation particularly at a low bit rate. In the future, high-resolution image compression coding will be more common, and there is a strong demand for coding schemes with higher coding efficiency.

  In recent years, H.P. One example is H.264 | MPEG-4 AVC (ITU-T Rec. H.264 | ISO / IEC 14496-10 MPEG-4 Part 10 Advanced Video Coding). Hereinafter, this standard is referred to as H.264. It will be called H.264 / AVC. H. H.264 / AVC is known to have encoding efficiency twice to three times that of MPEG-2.

  H. In H.264 / AVC encoding, the block size can be changed to 4 × 4 to 16 × 16 pixels for each block, and by selecting and encoding the optimum block size from among them according to the image, Encoding efficiency is improved.

  Here, H. A conventional image coding apparatus based on H.264 / AVC will be described with reference to the drawings.

  FIG. 3 is a block diagram showing a configuration of a conventional image coding apparatus. As shown in FIG. A conventional image coding apparatus based on H.264 / AVC includes an inter prediction unit 10, a luminance 4 × 4 processing unit 20, a luminance 8 × 8 processing unit 40, a luminance 16 × 16 processing unit 60, and a color difference 4 × 4 processing unit 80. A selection unit 101, a control unit 102, a deblocking filter 106, and an entropy encoding unit 107. The control unit 102 includes a register 103, a selection result storage unit 104, and a line memory 105.

  In FIG. 3, when an image signal is input to the inter prediction unit 10, the inter prediction unit 10 performs inter prediction processing and generates inter prediction data including motion vector information and the like. Then, the generated inter prediction data and the image signal of the original image are supplied to the luminance 4 × 4 processing unit 20, the luminance 8 × 8 processing unit 40, the luminance 16 × 16 processing unit 60, and the color difference 4 × 4 processing unit 80. To do.

  The luminance 4 × 4 processing unit 20, the luminance 8 × 8 processing unit 40, the luminance 16 × 16 processing unit 60, and the color difference 4 × 4 processing unit 80 are stored in advance in the line memory 105 of the control unit 102. Peripheral information is input. The peripheral information is a pixel value of a pixel that has been decoded around the block to be encoded.

  In the luminance 4 × 4 processing unit 20, the luminance 8 × 8 processing unit 40, the luminance 16 × 16 processing unit 60, and the color difference 4 × 4 processing unit 80, an original image and inter-prediction data or peripheral information are obtained by processing described later. , SATD (Sum of Absolute Transformed Difference) is calculated as an evaluation value, and the calculated SATD is supplied to the selection unit 101.

  The selection unit 101 selects the block size with the smallest SATD as the block size with the smallest code amount based on the input SATD (evaluation value). As for the luminance signal, when SATD is calculated using inter prediction data, either 4 × 4 pixels or 8 × 8 pixels is selected. When the SATD is calculated using the peripheral information, it is selected from 4 × 4 pixels, 8 × 8 pixels, and 16 × 16 pixels. That is, for the luminance signal, the block size is 4 × 4 pixels (inter), 8 × 8 pixels (inter), 4 × 4 pixels (intra), 8 × 8 pixels (intra), 16 × 16 pixels (intra). Are selected from the following five types.

  For the color difference signal, either 4 × 4 pixels (inter) or 4 × 4 pixels (intra) is selected.

  Further, when the SATD is calculated using the peripheral information, the selection unit 101 also selects the prediction mode. In the case of a luminance signal, 9 types are selected for 4 × 4 pixels (intra) and 8 × 8 pixels (intra), and 4 types are selected for 16 × 16 pixels (intra). In the case of a color difference signal, 4 × 4 pixels (intra) are selected from four types.

  When selecting the block size (and prediction mode) with the smallest code amount, the selection unit 101 supplies the result to the selection result storage unit 104.

  Then, based on the supplied selection result, the control unit 102 sends a luminance signal to one of the luminance 4 × 4 processing unit 20, the luminance 8 × 8 processing unit 40, and the luminance 16 × 16 processing unit 60, which will be described later. The internal decoding process is performed. The decoded image information generated thereby is stored in the register 103 of the control unit 102.

  Thereafter, the control unit 102 causes the color difference 4 × 4 processing unit 80 to perform an internal decoding process to be described later on the color difference signal in units of the selected block size. The decoded image information generated thereby is stored in the register 103 of the control unit 102. Here, the quantized data generated by the quantization process in the inner decoding process is stored in the register 103 of the control unit 102.

  The control unit 102 supplies the quantized data stored in the register 103 to the entropy encoding unit 107, and the entropy encoding unit 107 performs entropy encoding processing on the quantized data and outputs it as encoded data.

  The decoded image information stored in the register 103 of the control unit 102 is supplied to the deblocking filter 106, subjected to a process for removing block distortion, and then stored in the line memory 105 of the control unit 102. The luminance 4 × 4 It is used as peripheral information in the processing unit 20, the luminance 8 × 8 processing unit 40, and the like.

  Here, the luminance 4 × 4 processing unit 20 will be described with reference to FIG. As shown in FIG. 4, the luminance 4 × 4 processing unit 20 includes an image register 21, a prediction data register 22, a subtraction unit 23, a discrete Hadamard transform (DHT) unit 24, a SATD addition unit 25, and a discrete cosine transform. (DCT: Discrete Cosine Transform) section 26, quantization section 27, inverse quantization section 28, inverse discrete cosine transform (IDCT) section 29, addition section 30, and selector 31 are provided. Each unit included in the luminance 4 × 4 processing unit 20 performs processing in units of 4 × 4 pixels.

  In FIG. 4, the image register 21 stores the image signal (luminance signal) of the original image input from the inter prediction unit 10. The prediction data register 22 stores inter prediction data input from the inter prediction unit 10 via the selector 31 and peripheral information input from the line memory 105 via the selector 31.

  First, when calculating SATD using inter prediction data, the subtraction unit 23 generates difference information between the image signal of the original image and the inter prediction data, and the difference information is supplied to the discrete Hadamard transform unit 24. In the discrete Hadamard transform unit 24, the discrete Hadamard transform is performed on the difference information, and the obtained transform coefficients are summed in the SATD addition unit 25, and the calculated SATD is supplied to the selection unit 101.

  When calculating the SATD using the peripheral information, the subtracting unit 23 generates difference information between the image signal of the original image and the peripheral information. Thereafter, the SATD is calculated and supplied to the selection unit 101 in the same manner as described above.

  Next, the internal decoding process will be described. When the selection unit 101 selects 4 × 4 pixels (inter) or 4 × 4 pixels (intra) for the processing block size of the luminance signal, the luminance 4 × 4 processing unit 20 performs an internal decoding process.

  When 4 × 4 pixels (inter) is selected, difference information between the image signal of the original image and the inter prediction data stored in the prediction data register 22 is generated in the subtraction unit 23, and this difference information is a discrete cosine. It is supplied to the conversion unit 26.

  In the discrete cosine transform unit 26, discrete cosine transform is performed on the difference information, and the obtained DCT coefficients are supplied to the quantization unit 27. The quantization unit 27 quantizes the DCT coefficients, and the generated quantized data is output to the register 103 and the inverse quantization unit 28 of the control unit 102.

  The quantized data supplied to the inverse quantization unit 28 is inversely quantized there, and the inversely quantized data is supplied to the inverse discrete cosine transform unit 29 to be subjected to inverse discrete cosine transform and decoded. Difference information.

  The decoded difference information is added to the inter prediction data stored in the prediction data register 22 in the adding unit 30 and is output to the register 103 of the control unit 102 as decoded image information.

  Next, when 4 × 4 pixels (intra) is selected as the processing block size of the luminance signal, the subtraction unit 23 obtains difference information between the image signal of the original image and the peripheral information stored in the prediction data register 22. The difference information is generated and supplied to the discrete cosine transform unit 26. Other processes are the same as when 4 × 4 pixels (inter) are selected.

  Next, the luminance 8 × 8 processing unit 40 will be described with reference to FIG. As shown in FIG. 5, the luminance 8 × 8 processing unit 40 includes an image register 41, a prediction data register 42, a subtraction unit 43, a discrete Hadamard transform unit 44, a SATD addition unit 45, a discrete cosine transform unit 46, and a quantization unit 47. , An inverse quantization unit 48, an inverse discrete cosine transform unit 49, an addition unit 50, and a selector 51.

  Also in the luminance 8 × 8 processing unit 40, the SATD is calculated by the same process as the luminance 4 × 4 processing unit 20 and is supplied to the selection unit 101.

  When the selection unit 101 selects 8 × 8 pixels (inter) or 8 × 8 pixels (intra) for the processing block size of the luminance signal, the luminance 8 × 8 processing unit 40 performs an internal decoding process. Is called. The luminance 8 × 8 processing unit 40 performs the same processing as the luminance 4 × 4 processing unit 20 except that all processing is performed in units of 8 × 8 pixels.

  Next, the luminance 16 × 16 processing unit 60 will be described with reference to FIG. As shown in FIG. 6, the luminance 16 × 16 processing unit 60 includes an image register 61, a prediction data register 62, a subtraction unit 63, a discrete Hadamard transform unit 64, a SATD addition unit 65, a discrete cosine transform unit 66, and a discrete Hadamard transform unit. 67, a quantization unit 68, an inverse quantization unit 69, an inverse discrete Hadamard transform (IDHT: Inverse DHT) unit 70, an inverse discrete cosine transform unit 71, an addition unit 72, and a selector 73.

  In FIG. 6, the image register 61 stores the image signal of the original image input from the inter prediction unit 10. The prediction data register 62 stores inter prediction data input from the inter prediction unit 10 via the selector 73 and peripheral information input from the line memory 105 via the selector 73.

  First, when calculating the SATD using inter prediction data, the subtraction unit 63 generates difference information between the image signal of the original image and the inter prediction data, and this difference information is supplied to the discrete Hadamard transform unit 64. In the discrete Hadamard transform unit 64, the discrete Hadamard transform is performed on the difference information, and the obtained transform coefficients are summed in the SATD addition unit 65, and the calculated SATD is supplied to the selection unit 101. Here, each of the subtracting unit 63, discrete Hadamard transforming unit 64, and SATD adding unit 65 repeats the processing in units of 4 × 4 pixels by dividing 16 × 16 pixels into 16 blocks.

  When calculating the SATD using the peripheral information, the subtracting unit 63 generates difference information between the image signal of the original image and the peripheral information. Thereafter, the SATD is calculated and supplied to the selection unit 101 in the same manner as described above.

  Next, the internal decoding process will be described. When the selection unit 101 selects 16 × 16 pixels (intra) for the processing block size of the luminance signal, the luminance 16 × 16 processing unit 60 performs an internal decoding process.

  When 16 × 16 pixels (intra) is selected, difference information between the image signal of the original image and the inter prediction data stored in the prediction data register 62 is generated in the subtraction unit 63, and this difference information is the discrete cosine. This is supplied to the conversion unit 66.

  In the discrete cosine transform unit 66, discrete cosine transform is performed on the difference information. In the discrete cosine transform unit 66, processing in units of 4 × 4 pixels is repeatedly performed 16 times, and 16 direct current (DC) components of the DCT coefficient are obtained. The obtained direct current component is supplied to the discrete Hadamard transform unit 67. The alternating current (AC) component of the DCT coefficient obtained by the discrete cosine transform unit 66 is supplied to the quantization unit 68.

  In the discrete Hadamard transform unit 67, the 16 DC components input from the discrete cosine transform unit 66 are combined to form a 4 × 4 pixel DC block, and the discrete Hadamard transform is performed on the 4 × 4 pixel DC block. . The transform coefficient obtained here is supplied to the quantization unit 68.

  The quantizing unit 68 quantizes the AC component of the DCT coefficient input from the discrete cosine transform unit 66 to generate quantized data, and the quantized data of the AC component is stored in the control unit 102. This is supplied to the register 103 and the inverse quantization unit 69. This is repeated 16 times in units of 4 × 4 pixels.

  Further, the quantization unit 68 performs quantization processing on the transform coefficient from the discrete Hadamard transform unit 67, and the generated quantized data is supplied to the inverse discrete Hadamard transform unit 70.

  The inverse discrete Hadamard transform unit 70 performs inverse discrete Hadamard transform on the quantized data of the DC component of the DCT coefficient. The DC component subjected to the inverse discrete Hadamard transform, which is the output of the inverse discrete Hadamard transform unit 70, is supplied to the inverse quantization unit 69, where an inverse quantization process is performed. The inversely quantized DC component data is supplied to the inverse discrete cosine transform unit 71.

  Further, in the inverse quantization unit 69, inverse quantization processing is performed on the quantized data of the AC component from the quantization unit 68. The inverse quantized AC component data is supplied to the inverse discrete cosine transform unit 71.

  The inverse discrete cosine transform unit 71 returns the direct current component to the original position for the inversely quantized data, and the inverse discrete cosine in units of 16 (4 × 4) pixels including 1 direct current component pixel and 15 alternating current component pixels. Conversion is performed and the difference information is decoded. This is repeated 16 times in units of 4 × 4 pixels.

  The decoded difference information is added to the peripheral information stored in the prediction data register 62 in the adding unit 72, and is output to the register 103 of the control unit 102 as decoded image information.

  Next, the color difference 4 × 4 processing unit 80 will be described with reference to FIG. As shown in FIG. 7, the color difference 4 × 4 processing unit 80 includes an image register 81, a prediction data register 82, a subtraction unit 83, a discrete Hadamard transform unit 84, a SATD addition unit 85, a discrete cosine transform unit 86, and a quantization unit 87. , An inverse quantization unit 88, an inverse discrete cosine transform unit 89, an addition unit 90, a discrete Hadamard transform unit 91, a quantization unit 92, an inverse discrete Hadamard transform unit 93, an inverse quantization unit 94, and a selector 95.

Here, in the color difference 4 × 4 processing unit 80, in each unit excluding the discrete Hadamard transform unit 91, the quantization unit 92, the inverse discrete Hadamard transform unit 93, and the inverse quantization unit 94, the 8 × 8 pixel block is changed to four blocks. Since the divided 4 × 4 pixel unit processing is performed for C _b and C _r , the 4 × 4 pixel unit processing is performed 8 times.

  In FIG. 7, the image register 81 stores the image signal (color difference signal) of the original image input from the inter prediction unit 10. The prediction data register 82 stores inter prediction data input from the inter prediction unit 10 via the selector 95 and peripheral information input from the line memory 105 via the selector 95.

  First, when calculating the SATD using inter prediction data, the subtraction unit 83 generates difference information between the image signal of the original image and the inter prediction data, and this difference information is supplied to the discrete Hadamard transform unit 84. In the discrete Hadamard transform unit 84, the discrete Hadamard transform is performed on the difference information, and the obtained transform coefficients are summed in the SATD addition unit 85, and the calculated SATD is supplied to the selection unit 101.

  When calculating the SATD using the peripheral information, the subtraction unit 83 generates difference information between the image signal of the original image and the peripheral information. Thereafter, the SATD is calculated and supplied to the selection unit 101 in the same manner as described above.

  Next, the internal decoding process will be described. When the selection unit 101 selects 4 × 4 pixels (inter) for the processing block size of the color difference signal, the subtraction unit 83 selects the image signal of the original image and the inter prediction data stored in the prediction data register 82. Difference information is generated, and this difference information is supplied to the discrete cosine transform unit 86.

  The discrete cosine transform unit 86 performs discrete cosine transform on the difference information. The AC component of the obtained DCT coefficient is supplied to the quantization unit 87. The discrete cosine transform unit 86 obtains four DC components of the DCT coefficient. The obtained direct current component is supplied to the discrete Hadamard transform unit 91.

  In the quantizing unit 87, the AC component of the DCT coefficient input from the discrete cosine transform unit 86 is quantized to generate quantized data, and the quantized data of the AC component is stored in the control unit 102. This is supplied to the register 103 and the inverse quantization unit 88.

  The quantized data of the AC component supplied to the inverse quantization unit 88 is inversely quantized there, and the AC data of the inverse quantized AC component is supplied to the inverse discrete cosine transform unit 89.

  On the other hand, the discrete Hadamard transform unit 91 combines the four DC components input from the discrete cosine transform unit 86 to form a DC block of 2 × 2 pixels, and performs the discrete Hadamard transform on the 2 × 2 pixel DC block. Is done. The transform coefficient obtained here is supplied to the quantization unit 92.

  In addition, the quantization unit 92 performs a quantization process on the transform coefficient from the discrete Hadamard transform unit 91. The quantized data generated by the quantization unit 92 is supplied to the inverse discrete Hadamard transform unit 93, where the inverse discrete Hadamard transform is performed. The DC component subjected to the inverse discrete Hadamard transform, which is the output of the inverse discrete Hadamard transform unit 93, is supplied to the inverse quantization unit 94, where inverse quantization processing is performed. The inversely quantized DC component data is supplied to the inverse discrete cosine transform unit 89.

  In the inverse discrete cosine transform unit 89, the DC component of the inverse quantized data is returned to the original position, and the inverse discrete cosine is obtained in units of 16 (4 × 4) pixels including one DC component and 15 AC components. Conversion is performed and the difference information is decoded.

  The decoded difference information is added to the peripheral information stored in the prediction data register 82 in the adding unit 90, and is output to the register 103 of the control unit 102 as decoded image information.

  Next, when 4 × 4 pixels (intra) is selected as the processing block size of the color difference signal, the subtraction unit 83 obtains difference information between the image signal of the original image and the peripheral information stored in the prediction data register 82. The difference information is generated and supplied to the discrete cosine transform unit 86. Other processes are the same as when 4 × 4 pixels (inter) are selected.

H. The details of the H.264 / AVC image coding system are described in Non-Patent Documents 1 and 2.
Joint Video Team (JVT) of ISO / IEC MPEG & ITU-T VCEG, “Draft ITU-T Recommendation and Final Draft International Standard of Joint Video Specification (ITU-T Rec. H.264 | ISO / IEC 14496-10 AVC) ”, 2003.5 Supervised by Satoshi Okubo, “H.264 / AVC Textbook”, Impress, August 11, 2004

  As mentioned above, H.M. In a high-efficiency image compression method using block division such as H.264 / AVC, macroblocks (16 × 16 pixels) have various block sizes such as 4 × 4 pixels, 8 × 8 pixels, and 16 × 16 pixels. Process.

  Therefore, it corresponds to each block size, such as the luminance 4 × 4 processing unit 20, the luminance 8 × 8 processing unit 40, the luminance 16 × 16 processing unit 60, and the color difference 4 × 4 processing unit 80 shown in FIGS. An arithmetic processing circuit is required.

  In addition, the subtraction unit 43, the quantization unit 47, the inverse quantization unit 48, the addition unit 50, and the SATD addition unit 45 of the luminance 8 × 8 processing unit 40 illustrated in FIG. 5 are the luminance 4 × 4 processing unit 20 illustrated in FIG. The circuit scale is four times that of the corresponding parts.

  In this way, H.C. In the H.264 / AVC image compression coding system, there has been a problem that the circuit scale of the image coding apparatus becomes extremely large.

  In particular, when performing compression processing in real time, it is necessary to perform processing at high speed, which tends to increase the circuit scale. In addition, an increase in power consumption accompanying an increase in circuit scale is also a problem.

  Therefore, the present invention relates to H.264. An object of the present invention is to reduce the circuit scale in an image encoding apparatus using a method that performs arithmetic processing with various block sizes such as the H.264 / AVC image compression encoding method.

  The image coding apparatus according to the present invention is an image coding apparatus that divides an image into pixel blocks and performs coding processing for each pixel block, and generates the difference information between an original image and a predicted image by Hadamard transform By performing the evaluation value calculation process for calculating the sum of the conversion coefficients as an evaluation value with the pixel block size of the minimum processing unit, by repeating the processing of the pixel block size of the minimum processing unit corresponding to a plurality of pixel block sizes, Evaluation value calculating means for calculating each evaluation value of the plurality of pixel block sizes, and selection for selecting a pixel block size as a processing unit of the encoding process based on the evaluation value calculated by the evaluation value calculating means Means for quantizing an orthogonal transform coefficient generated by orthogonal transform of difference information between the original image and the predicted image, and dequantizing the generated quantized data Inner decoding means for performing an inner decoding process for generating decoded difference information by generating inverse difference transform of the generated inverse quantized data and adding the predicted image to the decoded difference information The internal decoding unit repeatedly performs the processing of the pixel block size of the minimum processing unit according to the pixel block size selected by the selection unit.

  An image encoding apparatus according to the present invention includes a minimum processing unit in processing for calculating an evaluation value for selecting a pixel block size as a processing unit of encoding processing, and in internal decoding processing in accordance with the selected pixel block size. Since processing of various pixel block sizes is performed by repeatedly performing the processing of the pixel block size, it is not necessary to provide an arithmetic processing circuit corresponding to all pixel block sizes, and the circuit scale can be reduced.

  Hereinafter, the best mode for carrying out the image coding apparatus of the present invention will be described with reference to the drawings.

  FIG. 1 is a block diagram showing a configuration of an image encoding device according to an embodiment of the present invention, and FIG. 2 is a block diagram showing in detail a control unit and an intra prediction / decoding processing unit in the image encoding device shown in FIG. .

  As shown in FIGS. 1 and 2, the image coding apparatus according to the present embodiment includes an inter prediction unit 1, a control unit 2, an intra prediction / decoding processing unit 3, a deblocking filter 4, and an entropy coding unit 5. The control unit 2 includes a RAM 201, a register 202, a line memory 203, and selectors 204 to 216. The intra prediction / decoding processing unit 3 includes discrete Hadamard transform units 301 and 302, a SATD addition unit 303, a selection unit 304, a subtraction unit 305, discrete cosine transform units 306 and 307, a discrete Hadamard transform unit 308, and a quantization unit 309. , An inverse quantization unit 310, inverse discrete cosine transform units 311 and 312, and an addition unit 313.

  When the image signal is input, the inter prediction unit 1 performs inter prediction processing, generates inter prediction data including motion vector information and the like, and outputs the inter prediction data to the RAM 201. Further, the inter prediction unit 1 outputs the input image signal to the RAM 201. The RAM 201 stores the inter prediction data and the image signal from the inter prediction unit 1.

  The register 202 stores an image signal of the original image, inter prediction data, peripheral information, and various data generated by the intra prediction / decoding processing unit 3. The line memory 203 stores in advance the already decoded image information as peripheral information.

  The selector 204 selects the inter prediction data stored in the RAM 201 or the peripheral information stored in the line memory 203 and outputs it to the register 202.

  When the original image signal, the inter prediction data, or the peripheral information is input from the register 202 via the selector 209, the subtraction unit 305 outputs the difference information between the original image and the inter prediction data or the original image in units of 4 × 4 pixels. Difference information of intra prediction data is generated. The generated difference information is output to the register 202 and the discrete cosine transform unit 306.

  The selector 209 outputs the original image signal, inter prediction data, or peripheral information to the subtraction unit 305.

  When the difference information generated by the subtraction unit 305 is input via the selector 205, the discrete Hadamard transform unit 301 performs the discrete Hadamard transform on the difference information in units of 4 × 4 pixels, and outputs the transform coefficient to the register 202. To do. Also, the discrete Hadamard transform unit 301 generates a transform coefficient by performing a discrete Hadamard transform on the DC component of the DCT coefficient obtained by subjecting the difference information generated by the subtractor 305 to a discrete cosine transform. The discrete Hadamard transform unit 301 performs inverse discrete Hadamard transform on the data obtained by quantizing the transform coefficient of the DC component.

  The selector 205 is a discrete Hadamard transform unit among the difference information generated by the subtraction unit 305, a DC component of a DCT coefficient obtained by subjecting the difference information to discrete cosine transform, and data obtained by quantizing the transform coefficient of the DC component. Select the output to 301.

  When the difference information generated by the subtraction unit 305 is input from the register 202 via the selector 206, the discrete Hadamard transform unit 302 performs a discrete Hadamard transform on the difference information in units of 8 × 8 pixels, and obtains a transform coefficient. Output to the register 202.

  The selector 206 supplies the difference information generated by the subtraction unit 305 from the register 202 to the discrete Hadamard transform unit 302.

  When the transform coefficient generated by the discrete Hadamard transform unit 301 or the discrete Hadamard transform unit 302 is input from the register 202 via the selector 207, the SATD addition unit 303 performs the discrete Hadamard transform unit 301 in units of 4 × 4 pixels. Alternatively, the sum of transform coefficients generated by the discrete Hadamard transform unit 302 is calculated as an evaluation value, and the calculated SATD (evaluation value) is output to the register 202.

  The selector 207 outputs the transform coefficient generated by the discrete Hadamard transform unit 301 or the transform coefficient generated by the discrete Hadamard transform unit 302 to the SATD addition unit 303.

  When the SATD (evaluation value) calculated by the SATD addition unit 303 is input, the selection unit 304 selects the block size with the smallest SATD as the block size with the smallest code amount based on the input SATD. . As for the luminance signal, when SATD is calculated using inter prediction data, either 4 × 4 pixels or 8 × 8 pixels is selected. When the SATD is calculated using the peripheral information, it is selected from 4 × 4 pixels, 8 × 8 pixels, and 16 × 16 pixels. That is, for the luminance signal, the block size is 4 × 4 pixels (inter), 8 × 8 pixels (inter), 4 × 4 pixels (intra), 8 × 8 pixels (intra), 16 × 16 pixels (intra). Are selected from the following five types.

  For the color difference signal, either 4 × 4 pixels (inter) or 4 × 4 pixels (intra) is selected.

  Further, when the SATD is calculated using the peripheral information, the selection unit 304 also selects the prediction mode. In the case of a luminance signal, nine types are selected for 4 × 4 pixels (intra) and 8 × 8 pixels (intra), and four types are selected for 16 × 16 pixels (intra). In the case of a color difference signal, 4 × 4 pixels (intra) are selected from four types.

  When selecting the block size (and prediction mode) with the smallest code amount, the selection unit 304 outputs the result to the register 202.

  The selector 208 outputs the SATD calculated by the SATD addition unit 303 from the register 202 to the selection unit 304.

When the difference information between the original image and the inter prediction data or the difference information between the original image and the peripheral information is input from the subtraction unit 305, the discrete cosine transform unit 306 performs the discrete cosine transform on the difference information in units of 4 × 4 pixels. The DCT coefficient is output to the register 202 and the selector 212. When 16 × 16 pixels (intra) is selected as the processing unit of the luminance signal, this 4 × 4 pixel unit processing is repeated 16 times. Further, in the case of a color difference signal, 4 × 4 pixel unit processing in which an 8 × 8 pixel block is divided into four blocks is performed for C _b and _Cr , respectively, so that 4 × 4 pixel unit processing is performed eight times.

  When the difference information between the original image and the inter prediction data or the difference information between the original image and the peripheral information is input from the register 202 via the selector 210, the discrete cosine transform unit 307 receives the difference information in units of 8 × 8 pixels. Is subjected to discrete cosine transform, and DCT coefficients are output to the register 202. The discrete cosine transform unit 307 is used only when 8 × 8 pixels (inter) or 8 × 8 pixels (intra) are selected by the selection unit 304.

  The selector 210 supplies the difference information between the original image and the inter prediction data or the difference information between the original image and the peripheral information from the register 202 to the discrete cosine transform unit 307.

  The discrete Hadamard transform unit 308 performs discrete Hadamard transform in units of 2 × 2 pixels on the DC component of the DCT coefficient obtained by performing discrete cosine transform on the difference information of the color difference signal generated by the subtractor 305, and registers the transform coefficient To 202. The discrete Hadamard transform unit 308 performs inverse discrete Hadamard transform on the data obtained by quantizing the transform coefficient of the DC component in units of 2 × 2 pixels, and outputs the DC component subjected to the inverse discrete Hadamard transform to the register 202.

  The selector 211 includes a DC component of a DCT coefficient obtained by subjecting the difference information of the color difference signal generated by the subtracting unit 305 to a discrete cosine transform, and data obtained by quantizing the DC component of the DCT coefficient by performing a discrete Hadamard transform. To the output to the discrete Hadamard transform unit 308.

  The quantization unit 309 generates transform coefficients obtained by performing discrete Hadamard transform on the DC component of the DCT coefficient obtained by the discrete cosine transform of the difference information generated by the subtraction unit 305 generated by the discrete Hadamard transform unit 301. Quantization is performed in units of 4 × 4 pixels.

  Further, the quantization unit 309 performs quantization processing on the DCT coefficients generated by the discrete cosine transform unit 306 in units of 4 × 4 pixels. Further, quantization for one macroblock (16 × 16 pixels) is performed by repeating the quantization process in units of 4 × 4 pixels 16 times.

  Further, the quantization unit 309 performs a quantization process on the DCT coefficient generated by the discrete cosine transform unit 307. This quantization process is performed in units of 4 × 4 pixels, and this is repeated four times, and further four times, thereby performing quantization for one macroblock (16 × 16 pixels).

  In addition, the quantization unit 309 converts the difference information of the color difference signal generated by the subtraction unit 305 generated by the discrete Hadamard transform unit 308 into a DC component of a DCT coefficient obtained by performing discrete cosine transform in units of 2 × 2 pixels. The transform coefficient obtained by performing the discrete Hadamard transform is quantized in units of 2 × 2 pixels.

  The selector 212 supplies the outputs of the discrete Hadamard transform unit 301, the discrete cosine transform unit 306, the discrete cosine transform unit 307, and the discrete Hadamard transform unit 308 from the register 202 to the quantization unit 309.

The inverse quantization unit 310 performs inverse quantization processing on the quantized data generated by the quantization unit 309, and outputs the data subjected to the inverse quantization processing to the register 202 or the selector 214. When the selection unit 304 selects 4 × 4 pixels (inter) or 4 × 4 pixels (intra) for the luminance signal, the inverse quantization process is repeated 16 times in units of 4 × 4 pixels. When 8 × 8 pixels (inter) and 8 × 8 pixels (intra) are selected, the inverse quantization process in units of 4 × 4 pixels is repeated four times and further four times. When 16 × 16 pixels (intra) is selected, the inverse quantization process is repeated 16 times in units of 4 × 4 pixels for the AC component quantized data. In the case of color difference signal processing, inverse quantization processing is repeated four times in units of 4 × 4 pixels for the AC component quantized data. This process is performed for C _b and C _r , respectively.

  In addition, the inverse quantization unit 310 performs inverse quantization in units of 4 × 4 pixels on the data obtained by performing the inverse discrete Hadamard transform on the data generated by the discrete Hadamard transform unit 301 and quantizing the transform coefficient of the DC component of the DCT coefficient. The data subjected to the quantization process is output to the register 202 and the selector 214. This process is performed only when 16 × 16 pixels (intra) are selected by the selection unit 304.

In addition, the inverse quantization unit 310 performs 2 × 2 pixel units on the data obtained by performing the inverse discrete Hadamard transform on the data generated by the discrete Hadamard transform unit 308 and quantized the DC component transform coefficient of the DCT coefficient of the color difference signal. Then, the inverse quantization process is performed, and the data subjected to the inverse quantization process is output to the register 202 and the selector 214. This process is performed once for each of C _b and C _r .

  The selector 213 supplies the outputs of the quantization unit 309, the discrete Hadamard transform unit 301, and the discrete Hadamard transform unit 308 from the register 202 to the inverse quantization unit 310.

The inverse discrete cosine transform unit 311 performs an inverse discrete cosine transform process on the inversely quantized data generated by the inverse quantization unit 310 and outputs the decoded difference information to the register 202 or the selector 216. When the selection unit 304 selects 4 × 4 pixels (inter) or 4 × 4 pixels (intra) for the luminance signal, the inverse discrete cosine transform process is repeated 16 times in units of 4 × 4 pixels. When 16 × 16 pixels (intra) is selected, inverse discrete cosine transform is applied to the dequantized data in units of 16 (4 × 4) pixels consisting of 1 DC component and 15 AC components. This process of 4 × 4 pixels is repeated 16 times. In the case of color difference signal processing, the inverse quantized data is subjected to inverse discrete cosine transform in units of 16 (4 × 4) pixels including 1 DC component and 15 AC components, and the 4 × 4 pixels. Repeat the unit process four times. This color difference signal processing is performed for C _b and C _r , respectively.

  The selector 214 supplies the inverse quantized data generated by the inverse quantization unit 310 from the register 202 to the inverse discrete cosine transform unit 311.

  The inverse discrete cosine transform unit 312 performs an inverse discrete cosine transform process on the inversely quantized data generated by the inverse quantizer 310 and outputs the decoded difference information to the register 202. The inverse discrete cosine transform unit 312 is used only when the selection unit 304 selects 8 × 8 pixels (inter) or 8 × 8 pixels (intra) for the luminance signal, and performs processing in units of 8 × 8 pixels. Is called.

  The selector 215 supplies the inverse quantized data generated by the inverse quantization unit 310 from the register 202 to the inverse discrete cosine transform unit 312.

The adding unit 313 adds the peripheral information stored in the register 202 to the decoded difference information generated by the inverse discrete cosine transform units 311 and 312 to generate decoded image information. For the luminance signal, this process is repeated 16 times in units of 4 × 4 pixels. With respect to the color difference signal, each of C _b and C _{r is} repeated four times in units of 4 × 4 pixels. Then, the generated decoded image information is output to the register 202.

  The deblocking filter 4 performs a process for removing block distortion on the decoded image information generated by the adding unit 313 and outputs the result to the line memory 203.

  The entropy encoding unit 5 performs entropy encoding processing on the quantized data generated by the quantization unit 309 and outputs the result as encoded data.

  Next, the operation of the image coding apparatus according to this embodiment will be described.

  When an image signal is input, the inter prediction unit 1 performs inter prediction processing, generates inter prediction data including motion vector information and the like, and outputs the inter prediction data to the RAM 201. The image signal input to the inter prediction unit 1 is stored in the RAM 201 and then stored in the register 202.

  The inter prediction data stored in the RAM 201 or the peripheral information stored in advance in the line memory 203 of the control unit 2 is stored in the register 202 via the selector 204.

  First, in order to select a block size as a processing unit for performing an internal decoding process to be described later, SATD is calculated for each block size from the original image and inter prediction data or peripheral information.

  When calculating the SATD for the luminance signal in units of 4 × 4 pixels using the inter prediction data, the subtraction unit 305 generates difference information between the image signal of the original image and the inter prediction data in units of 4 × 4 pixels. The difference information is stored in the register 202 and then supplied to the discrete Hadamard transform unit 301 via the selector 205.

  In the discrete Hadamard transform unit 301, this difference information is subjected to discrete Hadamard transform in units of 4 × 4 pixels, and the obtained transform coefficients are summed in the SATD addition unit 303, and the calculated SATD is stored in the register 202. Thereafter, the data is supplied to the selection unit 304 via the selector 208.

  When the SATD is calculated for the luminance signal in units of 4 × 4 pixels using the peripheral information, the subtraction unit 305 generates difference information between the image signal of the original image and the peripheral information. In other cases, the SATD is calculated and supplied to the selection unit 304 in the same manner as described above.

  Next, when calculating the SATD in units of 8 × 8 pixels using the inter prediction data, the subtraction unit 305 generates difference information between the image signal of the original image and the inter prediction data. The information is stored in the register 202 and then supplied to the discrete Hadamard transform unit 302 via the selector 205.

  In the discrete Hadamard transform unit 302, the discrete Hadamard transform is performed on the difference information generated by the subtraction unit 305 in units of 8 × 8 pixels, and the obtained transform coefficients are summed in the SATD addition unit 303, and the calculated SATD is After being stored in the register 202, it is supplied to the selection unit 304 via the selector 208. Here, in the subtracting unit 305 and the SATD adding unit 303, processing of 4 × 4 pixel units in which 8 × 8 pixels are divided into four blocks is repeatedly performed four times.

  When the SATD is calculated for the luminance signal in units of 8 × 8 pixels using the peripheral information, the subtraction unit 305 generates difference information between the image signal of the original image and the peripheral information. Thereafter, the SATD is calculated and supplied to the selection unit 304 in the same manner as described above.

  Next, when calculating the SATD in units of 16 × 16 pixels using the inter prediction data, the subtraction unit 305 generates difference information between the image signal of the original image and the inter prediction data. The information is stored in the register 202 and then supplied to the discrete Hadamard transform unit 301 via the selector 205.

  In the discrete Hadamard transform unit 301, the discrete Hadamard transform is performed on the difference information generated by the subtraction unit 305, and the obtained transform coefficients are summed in the SATD addition unit 303, and the calculated SATD is stored in the register 202. Thereafter, the data is supplied to the selection unit 304 via the selector 208. Here, in the subtraction unit 305, the discrete Hadamard transform unit 301, and the SATD addition unit 303, processing of 4 × 4 pixel units in which 16 × 16 pixels are divided into 16 blocks is repeatedly performed 16 times.

  When the SATD is calculated for the luminance signal in units of 16 × 16 pixels using the peripheral information, the subtraction unit 305 generates difference information between the image signal of the original image and the peripheral information. In other cases, the SATD is calculated and supplied to the selection unit 304 in the same manner as described above.

  Next, when the SATD is calculated for the color difference signal using the inter prediction data, the subtraction unit 305 generates difference information between the image signal of the original image and the inter prediction data, and the difference information is stored in the register 202. After being stored, it is supplied to the discrete Hadamard transform unit 301 via the selector 205.

In the discrete Hadamard transform unit 301, the discrete Hadamard transform is performed on the difference information generated by the subtraction unit 305, and the obtained transform coefficients are summed in the SATD addition unit 303, and the calculated SATD is stored in the register 202. Thereafter, the data is supplied to the selection unit 304 via the selector 208. Here, in the subtraction unit 305, discrete Hadamard transform unit 301, and SATD addition unit 303, the processing in units of 4 × 4 pixels obtained by dividing 8 × 8 pixels into four blocks is repeated four times for C _b and C _r , respectively. Done.

  When the SATD is calculated for the color difference signal using the peripheral information, the subtraction unit 305 generates difference information between the image signal of the original image and the peripheral information. In other cases, the SATD is calculated and supplied to the selection unit 304 in the same manner as described above.

  When the SATD for each block size is calculated, the selection unit 304 selects the block size with the smallest code amount based on the SATD.

  As described above, the block size is 4 × 4 pixels (inter), 8 × 8 pixels (inter), 4 × 4 pixels (intra), 8 × 8 pixels (intra), 16 × 16 pixels ( Intra) is selected from among five types, and either 4 × 4 pixels (inter) or 4 × 4 pixels (intra) is selected for the color difference signal.

  Further, when the SATD is calculated using the peripheral information, the selection unit 304 also selects the prediction mode. In the case of a luminance signal, 9 types are selected for 4 × 4 pixels (intra) and 8 × 8 pixels (intra), and 4 types are selected for 16 × 16 pixels (intra). In the case of a color difference signal, 4 × 4 pixels (intra) are selected from four types. When selecting the block size (and prediction mode) with the smallest code amount, the selection unit 304 outputs the result to the register 202.

  Next, the internal decoding process for each block size will be described. First, when 4 × 4 pixels (inter) is selected for the processing block size of the luminance signal, the difference information between the image signal of the original image and the inter prediction data generated by the subtraction unit 305 is the discrete cosine transform unit. 306 is supplied.

  In the discrete cosine transform unit 306, this difference information is subjected to discrete cosine transform in units of 4 × 4 pixels, and the obtained DCT coefficients are supplied to the quantization unit 309 via the selector 212.

  In the quantization unit 309, DCT coefficients are quantized in units of 4 × 4 pixels, and the generated quantized data is supplied to the inverse quantization unit 310 via the selector 213. The quantized data generated here is stored in the register 202 and then output to the entropy encoding unit 5.

  The quantized data supplied to the inverse quantization unit 310 is inversely quantized in units of 4 × 4 pixels, and the inverse quantized data is supplied to the inverse discrete cosine transform unit 29 via the selector 214. Then, inverse discrete cosine transform is performed in units of 4 × 4 pixels, and becomes decoded difference information.

  The decoded difference information is added to the inter prediction data stored in the register 202 in units of 4 × 4 pixels in the adding unit 313, and is output to the register 202 as decoded image information. In the addition unit 313, this addition process is repeated 16 times in units of 4 × 4 pixels.

  When 4 × 4 pixels (intra) is selected as the processing block size of the luminance signal, difference information between the image signal of the original image and the peripheral information generated by the subtraction unit 305 is supplied to the discrete cosine transform unit 306. . Other processes are the same as when 4 × 4 pixels (inter) are selected.

  Next, when 8 × 8 pixels (inter) is selected for the processing block size of the luminance signal, the difference information between the image signal of the original image and the inter prediction data generated by the subtraction unit 305 is converted into discrete cosine transform. Supplied to the unit 307.

  In the discrete cosine transform unit 307, this difference information is subjected to discrete cosine transform in units of 8 × 8 pixels, and the obtained DCT coefficients are supplied to the quantization unit 309 via the selector 212.

  In the quantization unit 309, the DCT coefficient generated by the discrete cosine transform unit 307 is subjected to quantization processing. This quantization process is performed in units of 4 × 4 pixels, and this is repeated four times, and further four times, thereby performing quantization for one macroblock (16 × 16 pixels). The generated quantized data is supplied to the inverse quantization unit 310 via the selector 213. The quantized data generated here is stored in the register 202 and then output to the entropy encoding unit 5.

  The quantized data supplied to the inverse quantization unit 310 is subjected to inverse quantization there. The inverse quantization unit 310 repeats the inverse quantization process in units of 4 × 4 pixels four times, and further repeats four times to perform inverse quantization for one macroblock (16 × 16 pixels). The inversely quantized data obtained here is stored in the register 202, then supplied to the inverse discrete cosine transform unit 312 via the selector 215, and subjected to inverse discrete cosine transform in units of 8 × 8 pixels and decoded. It becomes difference information.

  The decoded difference information is added to the inter prediction data stored in the register 202 in units of 4 × 4 pixels in the adding unit 313, and is output to the register 202 as decoded image information. In the addition unit 313, this addition process is repeated 16 times in units of 4 × 4 pixels.

  When 8 × 8 pixels (intra) is selected as the processing block size of the luminance signal, difference information between the image signal of the original image and the peripheral information generated by the subtraction unit 305 is supplied to the discrete cosine transform unit 306. . Other processes are the same as when 8 × 8 pixels (inter) are selected.

  Next, when 16 × 16 pixels (intra) is selected for the processing block size of the luminance signal, the difference information between the image signal of the original image and the inter prediction data generated by the subtraction unit 305 is converted into a discrete cosine transform. Supplied to the unit 306.

  The discrete cosine transform unit 306 performs discrete cosine transform on the difference information. In the discrete cosine transform unit 306, the process in units of 4 × 4 pixels is repeatedly performed 16 times, and 16 direct current (DC) components of the DCT coefficient are obtained. The obtained DC component is stored in the register 202 and then supplied to the discrete Hadamard transform unit 301 via the selector 205. The alternating current (AC) component of the DCT coefficient obtained by the discrete cosine transform unit 306 is supplied to the quantization unit 309.

  In the discrete Hadamard transform unit 301, the 16 DC components generated by the discrete cosine transform unit 306 are combined to form a 4 × 4 pixel DC block, and the discrete Hadamard transform is performed on the 4 × 4 pixel DC block. . The transform coefficient obtained here is stored in the register 202 and then supplied to the quantization unit 309 via the selector 212.

  Then, the quantization unit 309 performs quantization processing on the AC component of the DCT coefficient generated by the discrete cosine transform unit 306 to generate quantized data. The quantized data of the AC component is sent via the selector 213. This is supplied to the inverse quantization unit 310. The quantized data generated here is stored in the register 202 and then output to the entropy encoding unit 5. The processing in the quantization unit 309 is repeated 16 times in units of 4 × 4 pixels.

  Further, the quantization unit 309 performs a quantization process on the transform coefficient of the DC component generated by the discrete Hadamard transform unit 301, and the generated quantized data is stored in the register 202 and then passed through the selector 205. This is supplied to the discrete Hadamard transform unit 301.

  The discrete Hadamard transform unit 301 performs inverse discrete Hadamard transform on the quantized data of the DC component of the DCT coefficient. The DC component subjected to the inverse discrete Hadamard transform is stored in the register 202, and then supplied to the inverse quantization unit 310 via the selector 213, where an inverse quantization process is performed. The inversely quantized DC component data is stored in the register 202 and then supplied to the inverse discrete cosine transform unit 311 via the selector 214.

  Further, in the inverse quantization unit 310, inverse quantization processing is performed on the quantized data of the AC component generated by the quantization unit 309. The inversely quantized AC component data is supplied to the inverse discrete cosine transform unit 311 via the selector 214.

  In the inverse discrete cosine transform unit 311, the inverse quantized data is subjected to inverse discrete cosine transform in units of 16 (4 × 4) pixels including one DC component pixel and 15 AC component pixels, and the decoded difference Information. This is repeated 16 times in units of 4 × 4 pixels.

  The decoded difference information is added to the inter prediction data stored in the register 202 in units of 4 × 4 pixels in the adding unit 313, and is output to the register 202 as decoded image information. Here, the process of 4 × 4 pixel units is repeated 16 times.

  Next, when 4 × 4 pixels (inter) is selected as the processing block size of the color difference signal, the difference information between the image signal of the original image and the inter prediction data generated by the subtraction unit 305 is converted into a discrete cosine transform. Supplied to the unit 306.

The discrete cosine transform unit 306 performs discrete cosine transform on the difference information. Processing of 4 × 4 pixel units is performed for C _b and C _r , respectively. The AC component of the obtained DCT coefficient is supplied to the quantization unit 309.

  The discrete cosine transform unit 306 obtains four DC components of DCT coefficients. The obtained direct current component is stored in the register 202 and then supplied to the discrete Hadamard transform unit 308 via the selector 211.

  In the discrete Hadamard transform unit 308, the four DC components of the color difference signals generated by the discrete cosine transform unit 306 are combined to form a 2 × 2 pixel DC block, and the discrete Hadamard transform is applied to the 2 × 2 pixel DC block. Applied. The transform coefficient obtained here is stored in the register 202 and then supplied to the quantization unit 309 via the selector 212.

Then, the quantization unit 309 performs quantization processing on the AC component of the DCT coefficient generated by the discrete cosine transform unit 306 to generate quantized data. The quantized data of the AC component is sent via the selector 213. This is supplied to the inverse quantization unit 310. The quantized data generated here is stored in the register 202 and then output to the entropy encoding unit 5. Here, the process of 4 × 4 pixel units is repeated four times for each of C _b and C _r .

  In addition, the quantization unit 309 performs quantization processing on the transform coefficient of the DC component generated by the discrete Hadamard transform unit 308, and the generated quantized data is stored in the register 202 and then passed through the selector 211. This is supplied to the discrete Hadamard transform unit 308.

  The quantized data of the DC component of the DCT coefficient of the color difference signal is subjected to inverse discrete Hadamard transform in units of 2 × 2 pixels in the discrete Hadamard transform unit 308. The DC component subjected to the inverse discrete Hadamard transform is stored in the register 202, and then supplied to the inverse quantization unit 310 via the selector 213, where an inverse quantization process is performed. The inversely quantized DC component data is stored in the register 202 and then supplied to the inverse discrete cosine transform unit 311 via the selector 214.

In addition, in the inverse quantization unit 310, inverse quantization processing is performed on the quantized data of the AC component of the color difference signal generated by the quantization unit 309. The inversely quantized AC component data is supplied to the inverse discrete cosine transform unit 311 via the selector 214. Here, the process of 4 × 4 pixel units is repeated four times for each of C _b and C _r .

In the inverse discrete cosine transform unit 311, the inverse quantized data is subjected to inverse discrete cosine transform in units of 16 (4 × 4) pixels including one DC component pixel and 15 AC component pixels, and the decoded difference Information. In this case, processing of 4 × 4 pixel units is repeated four times for C _b and _Cr .

The decoded difference information is added to the inter prediction data stored in the register 202 in units of 4 × 4 pixels in the adding unit 313, and is output to the register 202 as decoded image information. Here, the process of 4 × 4 pixel units is repeated four times for each of C _b and C _r .

  The quantized data generated by the quantization unit 309 and stored in the register 202 is supplied to the entropy coding unit 5. Then, the entropy encoding unit 5 performs entropy encoding processing on the quantized data and outputs it as encoded data.

  Also, the decoded image information stored in the register 202 is supplied to the deblocking filter 4, subjected to processing for removing block distortion, and then stored in the line memory 203, as peripheral information in the intra prediction / decoding processing unit. used.

  As described above, according to the image encoding device of the present embodiment, the difference in the image encoding process in units of 4 × 4 pixels and 16 × 16 pixels, various processes such as discrete cosine transform, quantization, and 8 × 8 pixels. Since each process of difference, quantization, inverse quantization, addition, and SATD addition in image coding processing in units is repeated in units of 4 × 4 pixels, it is necessary to provide an arithmetic processing circuit corresponding to all pixel block sizes Therefore, the circuit scale can be reduced. In addition, an increase in power consumption accompanying an increase in circuit scale can be reduced.

It is a block diagram which shows the structure of the image coding apparatus which concerns on embodiment of this invention. It is a block diagram which shows in detail the control part and intra prediction and decoding process part in the image coding apparatus shown in FIG. It is a block diagram which shows the structure of the conventional image coding apparatus. It is a block diagram which shows the structure of the brightness | luminance 4x4 process part of the image coding apparatus shown in FIG. It is a block diagram which shows the structure of the brightness | luminance 8x8 process part of the image coding apparatus shown in FIG. It is a block diagram which shows the structure of the luminance 16x16 process part of the image coding apparatus shown in FIG. It is a block diagram which shows the structure of the color difference 4x4 process part of the image coding apparatus shown in FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Inter prediction part 2 Control part 3 Intra prediction and decoding process part 4 Deblock filter 5 Entropy encoding part 201 RAM
202 Register 203 Line Memory 204 to 216 Selector 301, 302 Discrete Hadamard Transformer 303 SATD Adder 304 Selector 305 Subtractor 306, 307 Discrete Cosine Transformer 308 Discrete Hadamard Transformer 309 Quantizer 310 Inverse Quantizer 311, 312 Inverse discrete cosine transform unit 313 Adder

Claims (1)

An image encoding device that divides an image into pixel blocks and performs an encoding process for each pixel block,
The evaluation value calculation process is performed with the pixel block size of the minimum processing unit, and the total of the conversion coefficients generated by Hadamard transform of the difference information between the original image and the predicted image is calculated as the evaluation value. Evaluation value calculating means for calculating the evaluation value of each of the plurality of pixel block sizes by repeating the processing of the pixel block size of the minimum processing unit,
A selection unit that selects a pixel block size that is a processing unit of an encoding process based on the evaluation value calculated by the evaluation value calculation unit;
Quantize the orthogonal transform coefficient generated by orthogonal transform of the difference information between the original image and the predicted image, dequantize the generated quantized data, and inverse orthogonal transform the generated dequantized data An internal decoding means for generating decoded difference information, and performing an internal decoding process for generating decoded image information by adding the predicted image to the decoded difference information;
The internal decoding unit repeatedly performs a process of a pixel block size of a minimum processing unit in accordance with the pixel block size selected by the selection unit.

Images