JP2007256728A - Display device and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display device which is capable of reducing blurs of a moving image, without applying not so high driving voltage to pixel circuits. <P>SOLUTION: Each of a plurality of pixel circuits includes a first transistor (TFT 402), a capacitive element 410 for storing and holding charges that correspond to image data through the first transistor; a second transistor (TFT 401) which has the amount of conduction controlled by charges stored in the capacitive element; and a light-emitting element 420, to which a current corresponding to the amount of conduction of the second transistor is supplied from a power line L. A third transistor (TFT 405), connected in parallel with the capacity element, is provided in each pixel circuit to constitute a time-constant circuit having a time constant CR, which comprises a capacitance value C of the capacitive element and an off-resistance value R of the third transistor. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

The present invention relates to a display device, and more particularly to a display device that can display moving image with high image quality by eliminating moving image blur.

As a display device that replaces a liquid crystal display device, an organic EL element (hereinafter referred to as an OLED element).
) Is attracting attention. OLED (Organic Light Emitting Diode) element
Electrically operates like a diode, and optically, light is emitted at the time of forward bias, and light emission luminance increases as the forward bias current increases.

An active matrix driving type display device in which OLED elements are arranged in a matrix form,
A plurality of scanning lines and a plurality of data lines are provided, and pixel circuits are provided corresponding to the intersections of the scanning lines and the data lines. That is, a pixel region which is a display portion is formed by pixel circuits arranged in a matrix. Here, the pixel circuit has a function of storing a value of a current supplied from the data line and supplying a driving current corresponding to the stored current value to the OLED element.

An active matrix pixel circuit will be described. FIG. 16 is a schematic diagram of an active matrix pixel circuit. As shown in FIG. 16, the pixel circuit 600 includes two TFTs (Thin Film Transistors) 601 and 602, a capacitor element 610, and an OLED element 6.
20, and a power supply voltage Vdd is supplied from a power supply line (not shown).

A TFT 601 that is a driving transistor is a p-channel type, and a TFT 602 that is a switching transistor is an n-channel type. The source electrode of the TFT 601 is connected to a power supply line (not shown), while the drain electrode is connected to the anode of the OLED element 620.

One end of the capacitive element 610 is connected to a power line (not shown), but the other end is connected to the TFT 60.
1 gate electrode and the drain electrode of the TFT 602. The gate electrode of the TFT 602 is connected to a scanning line (not shown), and the source electrode of the TFT 602 is connected to a data line (not shown). Note that the cathode of the OLED element 620 is a common electrode for all the pixel circuits and has a GND potential.

In such a configuration, when the scanning signal Yi becomes the H level, the n-channel TFT 602 is turned on, so that the data line is connected to the gate electrode of the TFT 601 and one end of the capacitor 610. Then, electric charge corresponding to the voltage of the gate electrode of the TFT 601 is transferred to the capacitor 610.
And between the source and drain of the TFT 601 and the OLED element 620,
An injection current Ioled corresponding to the voltage of the gate electrode flows.

When the scanning line Yi becomes L level, the TFT 602 is turned off. At this time, TFT 601
Since the input impedance at the gate electrode is extremely high, the accumulation state of the capacitor 610 is maintained. That is, the voltage of the gate electrode of the TFT 601 is maintained as the voltage when the scanning line Yi is at the H level. Therefore, the injection current Ioled corresponding to the voltage of the gate electrode continues to flow between the source and drain of the TFT 601 and the OLED element 620. These operations are performed for each frame. That is,
In the pixel circuit 600 that performs the hold driving, a constant current Ioled is OL for each frame.
Since the flow continues to the ED element 620, as shown in FIG.
The OLED element 620 continues to emit light with a constant luminance.

However, as described above, a method of emitting light at a constant luminance is called hold driving. In a pixel circuit that performs this method, pixels always emit light, so that when displaying a moving image, the outline of the moving image is displayed unclearly. There was a problem that so-called motion blur occurred.

On the other hand, a lighting method that produces high brightness for a moment like a conventional CRT is called impulse driving, but this method does not cause moving image blur. When using a pixel circuit that emits light close to impulse driving, the light emission period can be controlled by a switching element, as described below, so black is inserted between frames to reduce motion blur. Can be made.

FIG. 18 is a schematic diagram of a pixel circuit that performs an impulse-driven operation. As shown in FIG. 18, the pixel circuit 700 includes three TFTs 701 to 703, a capacitor element 710, and an OLE.
D power source voltage Vdd is supplied from a power source line (not shown).

The driving transistor TFT 701 is a p-channel type, and the switching transistors TFTs 702 and 703 are n-channel type. The source electrode of the TFT 701 is connected to a power supply line (not shown), while the drain electrode thereof is connected to the drain electrode of the TFT 703.

One end of the capacitor 710 is connected to a power supply line (not shown), and the other end is connected to the gate electrode of the TFT 701 and the drain electrode of the TFT 702. The gate electrode of the TFT 702 is connected to a scanning line (not shown), and the source electrode of the TFT 702 is connected to a data line (not shown). On the other hand, the gate electrode of the TFT 703 is connected to a light emission control line (not shown), and its source electrode is connected to the anode of the OLED element 720. A light emission control signal Vgi is supplied to the gate electrode of the TFT 703 via a light emission control line (not shown). OLED
The cathode of the element 720 is a common electrode for all the pixel circuits and has a GND potential.

In such a configuration, when the scanning signal Yi becomes H level, the n-channel TFT 702 is used.
Is turned on, the data line is connected to the gate electrode of the TFT 701 and one end of the capacitor 710. Then, the electric charge according to the voltage of the gate electrode of the TFT 701 is transferred to the capacitor 71.
Accumulated to 0.

When the scanning signal Yi becomes L level, the TFT 702 is turned off. At this time, TFT7
Since the input impedance at the 01 gate electrode is extremely high, the charge accumulation state in the capacitor 710 is maintained. That is, the voltage of the gate electrode of the TFT 701 is the scanning line.
The voltage when Yi is at the H level is held as it is. When the light emission control signal Vgi becomes H level, the TFT 703 is turned on. Therefore, an injection current Ioled corresponding to the gate voltage flows between the source and drain of the TFT 703 and the OLED element 720, and the OLED element 7.
20 emits light. Then, when Vgi becomes L level, the TFT 703 is turned off, so that the current Ioled does not flow between the source and drain of the TFT 703 and the OLED element 720, and the OLED element 720 does not emit light. Therefore, in this way TFT7
By controlling 03, the OLED element 720 can emit light instantaneously. These operations are performed for each frame. That is, as shown in FIG. 19, the pixel circuit 700 that performs this driving is OL with instantaneously high luminance at the beginning of the frame.
After causing the ED element 720 to emit light, motion picture blur can be reduced by stopping the light emission of the OLED element 720 and inserting black.

  In addition, the following patent document 1 can be mentioned as a well-known document which discloses this kind of technique.

Japanese Patent Laid-Open No. 2001-60076

However, a pixel circuit that performs an impulse-driven operation in order to reduce moving image blurring has a reduced light emission period compared to a pixel circuit that performs conventional driving, and therefore the luminance itself is also reduced, so that the luminance is maintained. In order to do this, the luminance was increased. Incidentally, the integrated value of luminance × time within one frame is the actual luminance perceived by humans. Therefore, in order to instantaneously increase the light emission luminance, it is necessary to apply a higher drive voltage to the OLED element, which increases the circuit load of the pixel circuit.

In view of the circumstances described above, an object of the present invention is to provide a display device capable of reducing moving image blur without applying a high driving voltage necessary for conventional moving image blur countermeasure driving to a pixel circuit. .

The first aspect of the present invention that solves the above problem corresponds to a plurality of scanning lines, a plurality of data lines each supplied with image data, and an intersection of the plurality of scanning lines and the plurality of data lines. A plurality of pixel circuits provided, and a power supply line for supplying a power supply potential to each of the plurality of pixel circuits,
Each of the plurality of pixel circuits includes a first transistor, a capacitive element that accumulates and holds charge corresponding to image data through the first transistor, and conduction with the charge accumulated in the capacitive element A second transistor whose amount is controlled, and a light emitting element to which a current corresponding to the conduction amount of the second transistor is supplied from the power supply line, and is connected in parallel to the capacitor element The display device is provided with a time constant circuit having a time constant CR including a capacitance value C of the capacitor and an off-resistance value R of the third transistor. is there.
In the first aspect, it is possible to reduce moving image blur without applying a drive voltage so high to the pixel circuit.

The second aspect of the present invention is provided corresponding to a plurality of scanning lines, a plurality of data lines to which image data is supplied to each of the scanning lines, and an intersection of the plurality of scanning lines and the plurality of data lines. A plurality of pixel circuits; and a power supply line that supplies a power supply potential to each of the plurality of pixel circuits. Each of the plurality of pixel circuits converts image data into a first transistor and the first transistor. A capacitive element that accumulates and holds the corresponding charge; a second transistor whose conduction amount is controlled by the charge accumulated in the capacitive element; and a current corresponding to the conduction amount of the second transistor is the power supply line A reference voltage line to which a predetermined reference voltage is applied, and the other of the reference voltage line and the capacitive element. Connected to the electrode of the third A transistor is provided in each of the pixel circuits to form a time constant circuit having a time constant CR including a capacitance value C of the capacitive element and an off-resistance value R of the third transistor, and the light emission luminance of the light emitting element The display device is characterized by being controlled.
In the second aspect, moving image blur can be reduced and emission luminance can be controlled in detail without applying a drive voltage so high to the pixel circuit.

According to a third aspect of the present invention, in the display device according to the second aspect, the reference voltage applied to the reference voltage line is controlled in relation to the average gradation of the frame so as to have a predetermined peak luminance. The display device is characterized by the above.
In the third aspect, the peak luminance can be controlled according to the average gradation of the frame.

According to a fourth aspect of the present invention, in the display device according to any one of the first to third aspects, an auxiliary data line to which data corresponding to image data supplied to the data line is supplied, and the auxiliary data A fourth transistor provided between the line and the gate electrode of the third transistor and functioning as switching means, and the fourth transistor is driven in synchronization with the first transistor. The display device is characterized by the above.
In the fourth aspect, the light emission luminance of the light emitting element can be controlled more accurately.

According to a fifth aspect of the present invention, in the display device according to any one of the first to fourth aspects,
The display device is characterized in that the off-resistance R is lower than that of the first transistor.
In the fifth aspect, the light emission luminance can be controlled more accurately.

According to a sixth aspect of the present invention, in the display device according to any one of the first to fifth aspects, the third
The display device is characterized in that the off-resistance value R of the transistor is such that the time constant CR of the time constant circuit is shorter than one frame period.
In the sixth aspect, moving image blur can be reduced more effectively.

According to a seventh aspect of the present invention, in the display device according to any one of the first to sixth aspects, the third aspect
The off-resistance value R of the transistor of FIG. 1 is such that the time constant CR of the time constant circuit is 1 / frame period.
The display device is characterized by being 2 to 1/4.
In the seventh aspect, moving image blur can be further effectively reduced.

According to an eighth aspect of the present invention, in the display device according to any one of the first to seventh aspects, the light-emitting element is an organic EL element.
In the eighth aspect, it is possible to provide a display device having the above-described effect using an organic EL element.

According to a ninth aspect of the present invention, there is provided an electronic apparatus including the display device according to any one of the first to eighth aspects.
In the ninth aspect, it is possible to provide an electronic apparatus having a good display performance without moving image blur.

Hereinafter, the best mode for carrying out the present invention will be described. The description of the present embodiment is an exemplification, and the present invention is not limited to the following description.
(Embodiment 1)
FIG. 1 is a block diagram showing a schematic configuration of a display device according to Embodiment 1 of the present invention. As shown in the figure, the electro-optical device I includes a pixel region A, a scanning line driving circuit 100, a data line driving circuit 200, a control circuit 300, and a power supply circuit 500. Among these, the pixel region A has
M scanning lines 101 are formed in parallel with the X direction, and n data lines 103 are formed in parallel with the Y direction orthogonal to the X direction. A pixel circuit 400 including an OLED element is provided corresponding to each intersection of the scanning line 101 and the data line 103. Each pixel circuit 400
Is supplied with the power supply voltage Vdd via the power supply line L.

The scanning line driving circuit 100 scans signals Y1 and Y for sequentially selecting a plurality of scanning lines 101.
2, Y3,..., Ym are generated. The scanning signals Y1 to Ym are generated by sequentially transferring the Y transfer start pulse DY in synchronization with the Y clock signal YCLK.

FIG. 2 shows an example of a timing chart of the scanning signals Y1 to Ym. The scanning signal Y1 is a pulse having a width corresponding to one horizontal scanning period (1H) from the first timing of one vertical scanning period (1F), and is supplied to the scanning line 101 in the first row. Thereafter, the pulses are sequentially shifted and supplied as scanning signals Y2, Y3,..., Ym to the scanning lines 101 in the 2, 3,. In general, when the scanning signal Yi supplied to the scanning line 101 in the i-th row (i is an integer satisfying 1 ≦ i ≦ m) becomes H level, this indicates that the scanning line 101 is selected.

The data line driving circuit 200 selects the scanning line 101 selected based on the output gradation data Dout.
Current signals Idata1, Idata2, and Idata3 representing the gray levels for each of the pixel circuits 400 positioned at
, Idata4,..., Idatan are supplied. That is, in this example, the gradation signal is given as current signals Idata1, Idata2, Idata3, Idata4,.
Idataj is supplied to the data line in the j-th column (j is an integer satisfying 1 ≦ j ≦ n).

The control circuit 300 generates various control signals such as a Y clock signal YCLK, an X clock signal XCLK, an X transfer start pulse DX, and a Y transfer start pulse DY, and sends them to the scanning line drive circuit 100 and the data line drive circuit 200. Output. In addition, the control circuit 300 performs image processing such as gamma correction on the input gradation data Din supplied from the outside to generate output gradation data Dout. This output gradation data Dout is, for example, 8-bit gradation components arranged in a predetermined arrangement.

Next, the pixel circuit 400 will be described. FIG. 3 shows a schematic diagram of a pixel circuit. The pixel circuit 400 shown in the figure corresponds to the i-th row and the j-th column, and the power source voltage Vdd is supplied via the power source line L.
Is supplied. The pixel circuit 400 includes three TFTs 401, 402, and 405 and a capacitor element 4.
10 and an OLED element 420. In the manufacturing process of the TFTs 401, 402, and 405, a polysilicon layer is formed on the glass substrate using laser annealing shot. That is, the TFTs 401, 402, and 405 can be formed easily and with high density by the same manufacturing process. In the OLED element 420, a light emitting layer is sandwiched between an anode and a cathode. The OLED element 420 emits light with a luminance corresponding to the forward current. An organic EL (Electroluminescence) material corresponding to the emission color is used for the light emitting layer. In the manufacturing process of the light emitting layer, the organic EL material is ejected as droplets from an inkjet head and dried. Note that the cathode of the OLED element 420 is a common electrode for all the pixel circuits 400 and has a GND potential.

The TFT 401 that is a driving transistor is a p-channel type, the TFT 402 that is a switching transistor, and the TFT 405 that functions as a resistor is an n-channel type. TF
The source electrode of T401 is connected to the power supply line L, while its drain electrode is connected to the OLED element 4
20.

One end of the capacitive element 410 is connected to the source electrode of the TFT 401, while the other end is connected to the T
The gate electrode of FT 401 and the drain electrode of TFT 402 are connected to each other. TFT
A source electrode 402 is connected to the data line 103, and a gate electrode thereof is connected to the scanning line 101.

The drain electrode of the TFT 405 is connected to the power line L, while the source electrode is the TFT 401.
And the other end of the capacitor 410 are connected. That is, the TFT 405 is arranged in parallel with the capacitor 410, and the off-resistance value R of the TFT 405 and the capacitor 41
A time constant circuit of time constant CR composed of a capacitance value C of 0 is configured. Also,
The gate electrode of the TFT 405 is grounded (connected to the common electrode described above),
An off potential (GND potential) is applied. That is, the TFT 405 functions as a resistance having an off-resistance value R. The TFT 405 is not particularly limited as long as it has an off-resistance value R smaller than the off-resistance value of the TFT 402, but the time constant CR of the time constant circuit is ½ to ¼ of one frame period. Those are preferred. That is, the TFT 405
A thing with a large off-state current compared with TFT402 is preferable. The off-current (off-resistance value R) of the TFT 405 can be controlled by the transistor size (W width, L length) and the film formation process.

In such a configuration, when the scanning signal Yi becomes H level, the n-channel TFT 402
Is turned on, so that the charge corresponding to the voltage of the gate electrode of the TFT 401 is transferred to the capacitor 410.
And the current Ioled corresponding to the voltage of the gate electrode of the TFT 401 flows to the OLED element 420. Therefore, the OLED element 420 emits light according to the voltage of the gate electrode of the TFT 401.

On the other hand, since the TFT 405 functions as a resistor having a resistance value R, when the scanning signal Yi becomes H level, a leak current I405 determined by the voltage between the source and drain electrodes of the TFT 405 and the off-resistance value R of the TFT 405 flows.

When the scanning signal Yi becomes L level, the TFT 402 is turned off. At this time,
Since the input impedance at the gate electrode of the TFT 401 is extremely high, the TFT 402
The charge accumulation state in the capacitor 410 at the moment when is turned off does not change. That is, the voltage of the gate electrode of the TFT 401 at the moment when the scanning signal Yi becomes L level is the current Idat.
It is held at the voltage when a flows. However, one end of the capacitive element 410 is connected to the TFT 4.
05, the charge accumulated in the capacitor 410 is leak current.
I405 flows between the source and drain electrodes of the TFT 405 and gradually decreases.
That is, since the capacitor element 410 and the TFT 405 constitute a time constant circuit with a time constant CR, the charge accumulated in the capacitor element 410 is a time constant circuit until the voltage between the source and drain electrodes of the TFT 405 becomes equal. It decreases according to the time constant CR. Then, the voltage of the gate electrode of the TFT 401 is lowered together with the charge accumulation state in the capacitor element 410, and the current Ioled flowing through the OLED element 420 is accordingly reduced. Therefore,
As a result, the light emission luminance of the OLED element 420 also decreases according to the time constant CR of the time constant circuit.

FIG. 4 shows examples of the current Ioled flowing through the OLED element 420 of the present embodiment, the current I405 flowing between the source and drain electrodes of the TFT 405, the scanning signal Yi, and the voltage at Vg shown in FIG. As shown in FIG. 4, when the scanning signal Yi is input, the current Ioled and the current I
As 405 flows, the voltage of Vg decreases. After a while, as indicated by the voltage at Vg, the charge accumulated in the capacitor 410 decreases, and the voltage of the gate electrode of the TFT 401 decreases according to the accumulation state of the charge accumulated in the capacitor 410. . Then, since the current Ioled flows in accordance with the voltage of the gate electrode of the TFT 401, the current Ioled flows in a large amount at the beginning of the frame and then decreases exponentially. Then, before the current Ioled stops flowing completely, a new scanning signal Yi is input and a new frame starts. As described above, the OLED element 420 can continue to emit light until the end of the frame while sufficiently reducing the light emission luminance. Here, since the luminance perceived by humans is an integral value of luminance × time within one frame, the pixel circuit of the present embodiment is a conventional impulse-driven pixel circuit that does not emit light completely during the frame. As compared with the above, there is an effect that the moving image blur can be reduced without applying such a high driving voltage. That is, the OLED element 420 of the pixel circuit according to the present embodiment continues to emit light until the end of the frame while sufficiently reducing the light emission luminance. Therefore, compared with the conventional OLED element of the pixel circuit driven by impulse driving, Thus, without applying a high driving voltage to the OLED element to emit light with high luminance, the OLED element of the conventional pixel circuit driven by impulse driving can obtain a light emission amount equal to the light emission amount emitted during one frame. it can. Therefore, the display device I of this embodiment is
There is an effect that good display performance without moving image blur can be maintained without applying a high voltage or high current to the pixel circuit 400. In addition, since the display device I of the present embodiment can control the light emission luminance, the dynamic range of the luminance can be widened, and an effect that a higher image quality can be displayed can be achieved. Further, since it is not necessary to apply a drive voltage as high as the pixel circuit 400, the circuit load can be reduced, and as a result, the lifetime of the display device I can be extended.

(Embodiment 2)
In the first embodiment, the display device is configured to supply the power supply voltage Vdd to the drain electrode of the TFT 405 via the power supply line L. However, the control circuit is provided with a reference voltage generation unit that generates the reference voltage Vref, and the reference voltage line The display device may be configured to supply the reference voltage Vref to the drain electrode of the TFT 405 via the TFT. By configuring the display device in this way, in addition to the effect described in the first embodiment, there is an effect that the peak luminance of the display device can be controlled in accordance with the video content displayed on the display device.

FIG. 5 is a block diagram showing a schematic configuration of a display device according to Embodiment 2 of the present invention. As shown in the figure, the electro-optical device IA includes a pixel region A, a scanning line driving circuit 100, a data line driving circuit 200, a control circuit 300A, and a power supply circuit 500. Unlike the display device according to the first embodiment, a reference voltage line L2 that connects the control circuit 300A and the pixel circuit 400A configuring the pixel region A is further provided, and the control circuit 300A refers to the pixel circuit 400A. The voltage Vref can be supplied.

FIG. 6 is a block diagram showing details of the control circuit extracted. As shown in the figure, the control circuit 300A includes a display control unit 301 and a reference voltage generation unit 302.

The display control unit 301 performs predetermined image processing on the input gradation data Din supplied from the outside to form output gradation data Dout, and outputs the Y clock signal YCLK and the X clock signal X.
Various control signals such as CLK, X transfer start pulse DX, and Y transfer start pulse DY are generated and output to the scanning line driving circuit 100 and the data line driving circuit 200 (see FIG. 5).

On the other hand, the reference voltage generation unit 302 generates an optimal reference voltage Vref according to the average gradation of the image and supplies it to the pixel circuit 400A. The reference voltage generation unit 302 includes a histogram detection unit 302a.
And an average gradation value calculator 302b and a voltage generator 302c.

The histogram detection unit 302a is a predetermined frame (usually one frame) based on the input image signal.
The frequency distribution for each gradation of the input gradation data Din for the minute is detected. The average gradation value calculation unit 302b calculates the average value of the frequency distribution detected by the histogram detection unit 302a. Voltage generator 302
c represents an average gradation value calculation unit 3 so that the peak luminance of the display device IA becomes a predetermined peak luminance.
The optimum reference voltage Vref is output according to the average value of the frequency distribution calculated by 02b. Here, a method for outputting the optimum reference voltage Vref according to the average value of the frequency distribution is not particularly limited, but an optimum reference voltage Vre corresponding to the average value of the frequency distribution using an LUT (Look Up Table).
A method of extracting f and generating and outputting the reference voltage Vref is preferable. In this method, the optimum reference voltage Vref is stored in a table in advance. Then, the reference voltage Vref is supplied to the pixel circuit via the reference voltage line L2.

FIG. 7 is a schematic diagram of the pixel circuit of the present embodiment. As shown in FIG. 7, the pixel circuit 400A of the present embodiment is different from the pixel circuit of the first embodiment in that the drain electrode of the TFT 405 is connected to the reference voltage line L2, and other configurations are the same as those of the first embodiment. This is the same as the pixel circuit. As described above, the reference voltage Vref different from the power supply voltage Vdd is supplied to the reference voltage line L2.

In such a configuration, when the scanning signal Yi becomes the H level, the n-channel TFT 402 is turned on as in the pixel circuit of Embodiment 1, so that the charge corresponding to the voltage of the gate electrode of the TFT 401 is charged by the capacitor 410. And the current Ioled corresponding to the voltage of the gate electrode of the TFT 401 flows to the OLED element 420. Therefore, the OLED element 420 emits light according to the voltage of the gate electrode of the TFT 401.

On the other hand, since the TFT 405 functions as a resistor having a resistance value R, when the scanning signal Yi becomes H level, a leak current I405 determined by the voltage between the source and drain electrodes of the TFT 405 and the resistance value R of the TFT 405 flows.

When the scanning signal Yi becomes the L level, the TFT 402 is turned off, so that the voltage of the gate electrode of the TFT 401 is lowered together with the charge accumulation state in the capacitor 410 as in the pixel circuit of the first embodiment. As a result, the current Ioled flowing through the OLED element 420 also decreases, and as a result, the light emission luminance of the OLED element 420 also decreases according to the time constant CR of the time constant circuit.

Here, since the drain electrode of the TFT 405 is connected to the reference voltage line L2, the TFT
The voltage between the source and drain electrodes 405 corresponds to the difference between the reference voltage Vref and the voltage of the gate electrode of the TFT 401. Therefore, by controlling the reference voltage Vref, the leakage current I405
Therefore, as described above, the light emission amount of the OLED element 420 can be controlled. That is, by supplying a reference voltage Vref from the control circuit 300A so that the peak luminance of the display device IA becomes a predetermined peak luminance for each frame, in addition to the effect described in the first embodiment, the peak luminance of the display device IA. There is an effect that can be controlled dynamically.

FIG. 8 shows the relationship between the current Ioled flowing through the OLED element 420 and time when the magnitude of the reference voltage Vref is changed relative to the power supply voltage Vdd in this embodiment. As shown in FIG. 8, when the reference voltage Vref decreases with respect to the power supply voltage Vdd, the voltage between the source and drain electrodes of the TFT 405 increases, so that the current Ioled flowing through the OLED element 420 increases. On the other hand, when the reference voltage Vref increases with respect to the power supply voltage Vdd, the voltage between the source and drain electrodes of the TFT 405 decreases, so that the current Ioled flowing through the OLED element 420 decreases. Therefore, the light emission amount of the OLED element 420 can be controlled by controlling the reference voltage Vref.

(Embodiment 3)
In the first and second embodiments, the gate electrode of the TFT 405 provided in the pixel circuit is grounded, and the off potential (GND potential) is applied. However, the gate electrode is applied to the gate electrode of the TFT 405 according to the gradation data. The voltage may be changed. With this configuration, the light emission luminance of the OLED element 420 can be controlled more accurately.

FIG. 9 is a block diagram showing a schematic configuration of a display apparatus according to Embodiment 3 of the present invention. As shown in the drawing, the electro-optical device IB includes a pixel region A, a scanning line driving circuit 100, a data line driving circuit 200B, a control circuit 300, and a power supply circuit 500. Unlike the display device according to the first embodiment, the auxiliary data line 103a adjacent to the data line 103 is provided in the pixel region A.
Are formed in the Y direction. Note that the other components constituting the display device IB are the same as those in the first embodiment, and thus the same reference numerals are given and description thereof is omitted.

The auxiliary data line 103 a is supplied with an auxiliary current signal corresponding to the current signal supplied to the data line 103. Specifically, the auxiliary current signal supplied to the auxiliary data line 103a is higher by a predetermined voltage than the voltage applied to the gate electrode of the transistor when the current signal is supplied to the gate electrode of the transistor. Voltage (e.g. 0.1
(V high) is applied to the gate electrode of the transistor.

Here, the auxiliary current signal supplied to the auxiliary data line 103a can be generated by, for example, a data conversion circuit 210 as shown in FIG. A plurality of data conversion circuits 210 are provided for each data line 103 in the data line driving circuit 200B. Below,
The data conversion circuit 210 corresponding to the Jth auxiliary data line 103a will be described.

As shown in FIG. 10, the data conversion circuit 210 is provided with a DA conversion circuit 211A connected to the data line 103 and a conversion circuit 211B connected to the auxiliary data line 103a. The DA conversion circuit 211B is connected to the DA conversion circuit 211A via the arithmetic circuit 215.
And a gradation data line Ld to which a gradation data signal Dj made of a digital signal is supplied. On the other hand, the DA conversion circuit 211A is also directly connected to the gradation data line Ld.

Here, the DA conversion circuit 211A and the DA conversion circuit 211B are digital-analog converters.
(digital-to-analog converter), which can generate and output an analog signal from an input digital signal. Then, the arithmetic circuit 215 specifies a gradation data signal that specifies an auxiliary current signal Idataj ′ corresponding to the current signal Idataj specified by the gradation data signal Dj from the gradation data signal Dj supplied by the gradation data line Ld. This circuit calculates and outputs Dj ′. That is, the arithmetic circuit 215 can supply a grayscale data signal Dj ′ for designating the auxiliary current signal Idataj ′ to the DA conversion circuit 211B based on the grayscale data signal Dj. Here, as described above, the auxiliary current signal Idataj ′ is a voltage that is higher by a predetermined voltage than the voltage applied to the gate electrode of the transistor when the current signal Idataj is supplied to the gate electrode of the transistor. Is applied to the gate electrode of the transistor.

Therefore, according to the data conversion circuit 210, the current signal Idataj is supplied to the data line 103 and the auxiliary current signal Id is supplied to the auxiliary data line 103a based on the gradation data signal Dj.
can supply ataj '. Then, the current signal Idataj and the auxiliary current signal Idataj ′ are supplied to the pixel circuit 400B.

FIG. 11 is a schematic diagram of the pixel circuit of the present embodiment. As shown in FIG. 11, the pixel circuit 400B of this embodiment is provided with an auxiliary data line 103a, and the auxiliary data line 103a and the gate electrode of the TFT 405 are connected via the TFT 406.
The point that the gate electrode of 06 is connected to the scanning line 101 similarly to the gate electrode of the TFT 402 is different from the pixel circuit of the first embodiment, and the other configuration is the same as that of the pixel circuit of the first embodiment.

The TFT 406 which is a switching transistor is an n-channel type, and a polysilicon layer is formed on a glass substrate using a laser annealing shot in the manufacturing process, as in other transistors.

In such a configuration, when the scanning signal Yi becomes H level, the n-channel TFT 402
Since both the n-channel TFT 406 and the n-channel TFT 406 are turned on, electric charge corresponding to the voltage of the gate electrode of the TFT 401 is accumulated in the capacitor element 410 and current Ioled corresponding to the voltage of the gate electrode of the TFT 401 flows to the OLED element 420. Further, the voltage applied to the auxiliary data line 103a is applied to the gate electrode of the TFT 405. Therefore, TFT40
The OLED element 420 emits light according to the voltage of one gate electrode, and a current I405 corresponding to the voltage applied to the gate electrode of the TFT 405 flows between the source and drain electrodes of the TFT 405.

When the scanning signal Yi becomes the L level, both the TFT 402 and the TFT 406 are turned off, so that the voltage applied to the gate electrode of the TFT 406 is maintained, and the first embodiment is performed.
As in the pixel circuit of FIG. 5, the voltage of the gate electrode of the TFT 401 is lowered together with the charge accumulation state in the capacitor element 410, and the current Ioled flowing through the OLED element 420 is also reduced accordingly.
As a result, the light emission luminance of the OLED element 420 also decreases according to the time constant CR of the time constant circuit.

Here, the auxiliary current signal Idataj ′ supplied to the gate electrode of the TFT 406 is the current signal Ida
When taj is supplied to the gate electrode of the transistor, a voltage higher than the voltage applied to the gate electrode of the transistor by a predetermined voltage is applied to the gate electrode of the transistor. That is, a voltage higher than the voltage applied to the source electrode of the TFT 405 by a predetermined voltage is applied to the gate electrode of the TFT 405.

FIG. 12 shows the relationship between the gate-source voltage Vgs of the TFT 405 and the current I405 flowing between the source-drain electrodes of the TFT 405. As shown in FIG. 12, TFT 405
When the voltage applied between the gate and source electrodes of the TFT 405 is 0 V or higher, the current I405 increases as the voltage Vgs between the gate and source electrodes of the TFT 405 increases.

Therefore, when considering the pixel circuit 400B of the present embodiment, as described above, the TFT 4
Since a voltage higher than the voltage applied to the source electrode of the TFT 405 by a predetermined voltage is applied to the gate electrode of 05, a predetermined voltage is always applied between the gate and source electrodes of the TFT 405 regardless of the voltage of the current signal. A voltage will be applied. Therefore, a constant current I405 flows between the source and drain electrodes of the TFT 405 regardless of the gradation data.
As a result, the light emission luminance of the OLED element 420 can be controlled more accurately.

In the present embodiment, the data conversion circuit 210 is provided in the data line driving circuit 200B, but the data conversion circuit 210 may be provided in a peripheral circuit portion (peripheral substrate or the like) of another pixel circuit 400.

(Other embodiments)
In the first to third embodiments, an n-channel transistor is used as the TFT 405.
It goes without saying that a p-channel transistor can be used for 05.

Further, the TFT 405 may be composed of the same transistor as the TFTs 401 and 402, or may be composed of a different transistor. Further, as the TFT 405, a transistor having an off-resistance value R smaller than that of the TFT 402 is preferable. TFT40
5, TFT 4 having an off-resistance value R smaller than that of TFT 402 is used.
Since the current flowing between the source and drain electrodes of 02 can be ignored, the TFT 405
And the time constant CR of the time constant circuit composed of the capacitor element 410 can be easily determined. That is, by using a TFT 405 having an off-resistance value R smaller than that of the TFT 402, the light emission luminance can be controlled more accurately.

Further, in the first and second embodiments, the gate electrode of the TFT 405 is grounded, and it is preferable because the GND potential is applied to the gate electrode. However, the 0 to GND potential is applied to the gate electrode. If so, the connection destination is not particularly limited.

<Application example>
Next, an electronic apparatus to which the display device according to Embodiments 1 to 3 described above is applied will be described.
FIG. 13 shows a configuration of a mobile personal computer to which the display device described above is applied. The personal computer 2000 includes a display device I as a display unit and a main body 20.
10 is provided. The main body 2010 is provided with a power switch 2001 and a keyboard 2002. Since this display device uses the OLED element 420, it is possible to display an easy-to-see screen with a wide viewing angle.

FIG. 14 shows a configuration of a mobile phone to which the display device described above is applied. Cell phone 3000
Includes a plurality of operation buttons 3001, scroll buttons 3002, and a display device I as a display unit. By operating the scroll button 3002, the screen displayed on the display device I is scrolled.

FIG. 15 shows a personal digital assistant (PDA: Personal Digital Ass) to which the display device described above is applied.
istants). The portable information terminal 4000 includes a plurality of operation buttons 4001, a power switch 4002, and a display device I as a display unit. Power switch 40
When 02 is operated, various kinds of information such as an address book and a schedule book are displayed on the display device.

Note that electronic devices to which the above-described display device is applied include, in addition to those illustrated in FIGS. 13 to 15, a large-screen television, a computer monitor, a display / lighting device, a mobile phone, a game machine,
Electronic paper, driving operation panel, video camera, digital still camera, viewfinder type, monitor direct-view type video tape recorder, car navigation device, pager, electronic notebook, calculator, word processor, workstation, videophone, POS terminal, touch panel Examples include equipped equipment. And the display apparatus mentioned above is applicable as a display part of these various electronic devices.

1 is a block diagram illustrating a display device according to Embodiment 1. FIG. 2 is a timing chart of scanning signals and light emission control signals in FIG. 1. It is a schematic diagram which shows the pixel circuit in the display apparatus shown in FIG. FIG. 4 is a graph showing the relationship between time in FIG. 3 and voltage at current Ioled, current I405, scanning signal Yi, and Vg. 5 is a block diagram illustrating a schematic configuration of a display device according to Embodiment 2. FIG. FIG. 6 is a block diagram showing details of an extracted control circuit in FIG. 5. FIG. 6 is a schematic diagram illustrating a pixel circuit in the display device illustrated in FIG. 5. It is a graph which shows the relationship between time and an electric current in FIG. FIG. 6 is a block diagram illustrating a schematic configuration of a display device according to a third embodiment. It is a block diagram which shows an example of a data conversion circuit. FIG. 10 is a schematic diagram illustrating a pixel circuit in the display device illustrated in FIG. 9. It is a figure which shows the relationship between the voltage between the gate-source electrodes of TFT in FIG. 11, and an electric current. It is a perspective view showing a mobile personal computer to which a display device is applied. It is a perspective view which shows the structure of the mobile telephone to which a display apparatus is applied. It is a perspective view which shows the structure of the portable information terminal to which a display apparatus is applied. It is a schematic diagram which shows the pixel circuit which performs hold drive. It is a graph which shows the relationship between the flame | frame in FIG. 16, and light emission luminance. It is a schematic diagram which shows the pixel circuit which performs an impulse drive. It is a graph which shows the relationship between the flame | frame in FIG. 18, and light emission luminance.

Explanation of symbols

100 scanning line driving circuit, 101 scanning line, 103 data line, 103 auxiliary data line, 200 data line driving circuit, 210 data conversion circuit, 300, 300A
Control circuit, 301 display control unit, 302a histogram detection unit, 302 reference voltage generation unit, 302c voltage generation unit, 302b average gradation value calculation unit, 400, 40
0A, 400B pixel circuit, 401, 402, 405, 406 TFT, 410 capacitive element, 420 OLED element, 500 power supply circuit

Claims (9)

A plurality of scan lines;
A plurality of data lines each supplied with image data;
A plurality of pixel circuits provided corresponding to intersections of the plurality of scanning lines and the plurality of data lines;
A power supply line for supplying a power supply potential to each of the plurality of pixel circuits,
Each of the plurality of pixel circuits is
A first transistor;
A capacitive element that accumulates and holds charges corresponding to image data through the first transistor;
A second transistor whose conduction amount is controlled by the charge accumulated in the capacitor;
A light emitting element to which a current corresponding to the conduction amount of the second transistor is supplied from the power line;
Have
A third transistor connected in parallel to the capacitive element is provided in each of the pixel circuits;
A time constant CR comprising a capacitance value C of the capacitive element and an off-resistance value R of the third transistor
A display device comprising a time constant circuit. A plurality of scan lines;
A plurality of data lines each supplied with image data;
A plurality of pixel circuits provided corresponding to intersections of the plurality of scanning lines and the plurality of data lines;
A power supply line for supplying a power supply potential to each of the plurality of pixel circuits,
Each of the plurality of pixel circuits is
A first transistor;
A capacitive element that accumulates and holds charges corresponding to image data through the first transistor;
A second transistor whose conduction amount is controlled by the charge accumulated in the capacitor;
A light emitting element to which a current corresponding to the conduction amount of the second transistor is supplied from the power line;
Have
One electrode of the capacitive element is connected to the power line,
A reference voltage line to which a predetermined reference voltage is applied;
A third transistor connected to the reference voltage line and the other electrode of the capacitor is provided in each of the pixel circuits;
A time constant CR comprising a capacitance value C of the capacitive element and an off-resistance value R of the third transistor
A display device characterized in that the time constant circuit is configured and the light emission luminance of the light emitting element is controlled. The display device according to claim 2,
The display device according to claim 1, wherein the reference voltage applied to the reference voltage line is controlled in relation to the average gradation of the frame so as to have a predetermined peak luminance. The display device according to any one of claims 1 to 3,
An auxiliary data line to which data corresponding to the image data supplied to the data line is supplied;
A fourth transistor provided between the auxiliary data line and the gate electrode of the third transistor and functioning as a switching means;
The display device, wherein the fourth transistor is driven in synchronization with the first transistor. The display device according to any one of claims 1 to 4,
The display device, wherein the third transistor has an off-resistance value R lower than that of the first transistor. In the display device according to any one of claims 1 to 5,
The display device characterized in that the off-resistance value R of the third transistor is such that the time constant CR of the time constant circuit is shorter than one frame period. The display device according to any one of claims 1 to 6,
The off resistance value R of the third transistor is such that the time constant CR of the time constant circuit is ½ to ¼ of one frame period. In the display device in any one of Claims 1-7,
The display device, wherein the light emitting element is an organic EL element. An electronic apparatus comprising the display device according to claim 1.

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