JP2007198917A - Current measurement circuit and its integrated circuit element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a high-precision current measurement circuit achieving a wide range of measurement range and facilitating measurement operations. <P>SOLUTION: The current measurement circuit includes: a first FET through which a current to be measured flows as a source current (drain current); a first feedback means to which a source electric potential (drain electric potential) of the first FET is applied as an input and which outputs a first control electric potential for controlling the gate electric potential of the first FET; a second FET whose gate electric potential is controlled by the first control electric potential; and a second feedback means in which the source electric potential (drain electric potential) of the first FET, as a reference electric potential, is applied to one of two inputs and the source electric potential (drain electric potential) of the second FET is applied to the other input, and which outputs a second control electric potential for controlling of the source electric potential (drain electric potential) of the second FET so that the source electric potential (drain electric potential) of the second FET is at the same electric potential as the reference electric potential, wherein the measurement of the current to be measured is performed using the second control electric potential. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a current measurement circuit that measures a current flowing in an electric circuit such as a power circuit or an electronic device, and relates to a current measurement circuit that realizes current measurement in a high accuracy and wide measurement range.

  As a method for measuring a current flowing in an electric circuit, a method for measuring a voltage drop across a shunt resistor is known. When a shunt resistor is used, the measured current i is measured by detecting the voltage V, which is the product of the measured current and the resistance R. In a multi-tester or the like using this method, for example, the current R to be measured is accommodated by switching resistors R having different values with a switch.

  There are also a method using a current transformer, a method using a Hall element, and the like.

  Further, Patent Documents 1 and 2 disclose a method of measuring a measured current by passing a measured current i between the drain and source of an FET (Field Effect Transisor) and measuring a drain-source voltage Vd of the FET. is doing. This utilizes the characteristic that the on-resistance Ron between the drain and source of the FET is substantially constant with respect to the change of the drain current.

In the FET method described above, the on-resistance is set to a predetermined value by the gate voltage. Accordingly, the gate voltage is adjusted in accordance with the magnitude of the current to be measured in order to obtain a predetermined on-resistance that provides an output voltage suitable for measurement. Therefore, the magnitude of the current to be measured can be accommodated by the gate voltage.
JP-A-6-201738 JP-A-7-198758

  However, any of the conventional current measurement methods has a limitation on the measurement range, and for example, a method capable of measuring a wide range of current such as 1 μA to 100 A with one circuit has not been realized.

When a constant resistance value is used in the shunt resistor, the current to be measured i can be measured with high accuracy if the current is sufficiently large with respect to the resistance value, but the voltage V becomes small when measuring a minute current. Highly accurate current measurement becomes difficult. In addition, in a measurement range (for example, 1 to 10 A) of a constant resistance value (for example, 1Ω), the change (for example, 1 to 100 W) of the power loss i ² R generated by the shunt resistor is very large, particularly at a large current. Power loss. Furthermore, when switching a plurality of resistance values for switching the measurement range, the current path is interrupted. Furthermore, a multi-tester or the like is provided with a dedicated terminal without a switch contact for measuring a large current because of the limitation of the current capacity of the switch contact and the influence of contact resistance when measuring a large current. Therefore, in the case of measuring a large current, an operation for switching to a dedicated terminal is necessary, which is complicated.

  The current transformer and Hall element methods measure current based on the strength of the magnetic field generated by the current, so the measurement range is limited by the output voltage saturation in the large current region and by the measurement accuracy in the small current region. The Rukoto.

  In the method of measuring the current using the FET drain-source voltage Vd, the measurement range is limited by the fact that the on-resistance Ron is not constant in the large current region due to the characteristics of the FET, and the measurement range is limited by the measurement accuracy in the small current region. It will be limited.

  In the FET method, in order to increase the measurement accuracy, the drain-source on-resistance Ron must be set with high accuracy. However, the gate voltage that determines the on-resistance Ron is set with high accuracy. However, the on-resistance Ron is not uniquely determined. This is due to variations in the characteristics of individual FETs. Therefore, as long as only one FET is used, the accuracy of the on-resistance Ron cannot be increased by increasing the accuracy of the gate voltage.

  Furthermore, the relationship between the drain-source voltage Vd using the gate voltage as a parameter and the drain current is nonlinear due to the characteristics of the individual FET. This means that the on-resistance Ron fluctuates non-linearly with respect to any fluctuations in the gate voltage and the drain current. It is impossible to eliminate this non-linearity with only one FET.

  Furthermore, since the temperature characteristic of the drain-source on-resistance Ron has a positive characteristic, the on-resistance Ron varies with temperature even at the same gate voltage. This temperature change cannot be dealt with by only one FET. Because of these factors, it has been difficult to improve the accuracy of the current measurement method using the drain-source voltage Vd of the FET.

  In view of such a current situation, an object of the present invention is to provide a highly accurate current measurement circuit that realizes a wide measurement range and easy measurement operation with a simple configuration.

In order to achieve the above object, the present invention provides the following configurations.
(1) A current measurement circuit according to claim 1 includes a first FET in which a current to be measured flows as a source current or a drain current;
First feedback means for applying a source potential or drain potential of the first FET as an input and outputting a first control potential for controlling the gate potential of the first FET;
A second FET whose gate potential is controlled by the first control potential;
The source potential or drain potential of the first FET is applied as a reference potential to one input of the two inputs, and the source potential or drain potential of the second FET is applied to the other input, and the source potential or the second FET Second feedback means for outputting a second control potential for controlling the source potential or drain potential of the second FET so that the drain potential is the same as the reference potential;
The current to be measured is measured using the second control potential.

(2) The current measuring circuit according to claim 2 is characterized in that, in claim 1, there is provided means for generating a bias voltage, and the bias voltage is applied to an input of the first feedback means.

(3) The current measuring circuit according to claim 3 is characterized in that, in claim 1, the source potential or drain potential of the second FET is controlled by using the output potential obtained by amplifying the second control potential by the grounded emitter circuit. And

(4) The current measurement circuit according to claim 4 is the current measurement circuit according to any one of claims 1 to 3, wherein the second FET has a change characteristic of a source current or a drain current with respect to a source potential change or a drain potential change, and a gate potential change. The change characteristic of the source-drain resistance or the drain-source resistance is the same as that of the first FET.

(5) The current measurement circuit according to claim 5 is the current measurement circuit according to any one of claims 1 to 4, wherein the first FET and the second FET have a source-drain resistance change characteristic or a drain-source resistance change characteristic with respect to a temperature change. Are the same.

(6) The current measurement circuit according to claim 6 is the resistance for measurement according to any one of claims 1 to 5, wherein the measurement current that flows as the source current or the drain current of the second FET due to the second control potential is measured. And the current to be measured is measured by a voltage drop of the measuring resistor.

(7) The current measurement circuit according to claim 7 is characterized in that, in claim 6, the measurement range of the current to be measured is changed by changing the value of the measurement resistor.

(8) A current measuring circuit according to an eighth aspect is characterized in that, in any one of the first to seventh aspects, the drains of the first FET and the second FET are grounded.

(9) An integrated circuit element according to a ninth aspect includes the current measuring circuit according to any one of the first to eighth aspects.

(1) In the current measuring circuit according to the first aspect, the first and second FETs are used, and the current to be measured flows as the source current (or drain current) between the source and drain of the first FET. Here, “source current” refers to a source-drain current in the case of grounded drain, and “drain current” refers to a drain-source current in the case of grounded source. The principle of the present invention is the same whether the current to be measured is connected to flow from the source to the drain of the first FET or vice versa. Hereinafter, for convenience of explanation, the case of grounded drain will be described as an example.
In this circuit, the characteristics of the first FET and the second FET are selected so that the source current of the first FET and the source current of the second FET in a balanced state are proportional. The first and second feedback means are combined so as to realize this proportional relationship and eliminate the influence on the measurement accuracy due to the nonlinear characteristics of the first FET and the second FET. As a result, the second feedback means Measurement can be performed using the second control potential as an output.

  First, the first feedback means receives the source potential of the first FET corresponding to the voltage drop due to the on-resistance between the source and drain of the first FET through which the current to be measured flows. Then, the first feedback means outputs a first control potential for controlling the gate potential of the first FET so that the source potential of the first FET is in an equilibrium state. The gate potential is determined by the first control potential, and the source-drain resistance of the first FET becomes a predetermined value. As a result, the source potential changes and is input again to the first feedback means. For example, when the first control potential rises and the gate potential rises, the source-drain resistance decreases, the source potential falls, and the first control potential that is the output of the first feedback means also falls. By this feedback operation, the source potential of the first FET, the gate potential, and the resistance between the source and the drain take constant values at a constant current to be measured and are in an equilibrium state.

  On the other hand, the first control potential, which is the output of the first feedback means, also controls the gate potential of the second FET. Thereby, the gate potentials of the first FET and the second FET are basically the same potential.

  The second feedback means has two inputs. The source potential of the first FET is applied as a reference potential to one input, and the source potential of the second FET is applied to the other input. The second control potential, which is the output of the second feedback means, controls the source potential of the second FET. Therefore, the second control potential is controlled so that the source potential of the second FET is the same as the reference potential, that is, the source potential of the first FET, and the controlled source potential of the second FET is input to the second feedback means again. . When the balanced state is obtained by this feedback operation, the source potentials of the first FET and the second FET are the same potential.

  When the equilibrium state is achieved by the first and second feedback means of the circuit, the gate potentials and the source potentials of the first FET and the second FET are basically the same potential. Measurement can be performed using the second control potential at this time.

  The ratio between the source current of the first FET (current to be measured) and the source current of the second FET in the equilibrium state is kept constant even when the current to be measured changes. The first FET and the second FET are selected so as to have a characteristic that maintains this proportional relationship. As long as the combination of the pair of first FET and second FET maintains this relationship, it is not necessary to consider variation in individual characteristics of the first FET (or second FET) itself.

  Also, when the measured current changes, the source potential of the first FET changes, thereby changing the gate potential and the source-drain resistance. However, for example, if the measured current increases, the gate potential increases.・ It changes with the tendency that resistance between drains becomes small. This means that the power consumption in the first FET does not increase greatly because the resistance between the source and drain decreases even when the measured current increases, that is, it has a self-control mechanism for power consumption (also for the second FET). The same). In this respect, there is a great advantage over the conventional shunt resistance method for measuring the voltage drop across the fixed resistance value.

(2) In the current measuring circuit according to claim 2, a bias voltage is applied to the input of the first feedback means. Therefore, the output of the first control potential is obtained by superimposing a potential reflecting the bias voltage on the potential reflecting the source potential of the first FET. By controlling the gate potentials of the first FET and the second FET using such a first control potential, the first FET and the second FET can be operated in a slightly on state even for the minimum current in a predetermined measurement range. It becomes possible. That is, the gate threshold potential at which the first FET and the second FET shift from the off state to the on state is offset by an amount reflecting the bias voltage. For this reason, stable and accurate measurement can be performed.

(3) In the current measuring circuit according to claim 3, the second control potential that is the output of the second feedback means is amplified by the grounded emitter circuit, and the source potential of the second FET is controlled using the output potential. When the source current (measured current) of the first FET is the minimum current within one range, the gate potential to turn on to the extent that the second FET can be measured cannot be obtained. There is a region where the inter-resistance takes a very large value. If the resistance between the source and drain of the second FET is large, the second feedback means cannot exhibit the amplification function, and the feedback operation of the second feedback means does not work. For this reason, it becomes unstable if there is no grounded emitter circuit. On the other hand, the grounded emitter circuit has a large voltage amplification factor and constant current characteristics. Therefore, sufficient voltage amplification is performed and a stable current is obtained by passing the output of the second feedback means through the grounded emitter circuit. As a result of the feedback operation in the entire feedback circuit including the second feedback means and the grounded emitter circuit, the second FET can be immediately turned on (not in a saturated state, but can take various values. The same applies hereinafter. ) And the source current is stable and accurate measurement can be performed.

(4) In the current measuring circuit according to claim 4, the change characteristic of the source current (drain current) with respect to the source potential change (drain potential) in the second FET, and the source-drain resistance or drain-source resistance with respect to the gate potential change Change characteristics (change characteristics including nonlinearity) are the same as those of the first FET. As described above, since the source potentials and the gate potentials of both FETs are held at the same potential, the proportional relationship between the source currents of both FETs can always be maintained by having these change characteristics. it can.

  In this circuit, the non-linearity of the individual characteristics of the first FET and that of the second FET are completely canceled out by the two feedback means, so that the ratio of the source currents is not affected. This realizes a highly accurate current measurement circuit that does not include any errors due to the nonlinearity of the individual characteristics of the FET, particularly the nonlinearity of the resistance between the source and drain with respect to the source current and the gate potential.

(5) In the current measuring circuit according to claim 5, the first FET and the second FET have the same on-resistance change characteristics between the source and the drain (or between the drain and the source) with respect to a temperature change. Thereby, if the temperature environment of both FETs is made common, the change in on-resistance with respect to the temperature change of each FET can be completely canceled, and a highly accurate current measurement circuit is realized.

(6) In the current measurement circuit according to claim 6, if a measurement current that flows as a source current (drain current) of the second FET is caused to flow through a predetermined measurement resistor, the voltage drop in an equilibrium state is measured to be measured. Current can be measured.

(7) In the current measurement circuit according to claim 7, the measurement range of the current to be measured is changed by changing the value of the resistance for measurement in claim 6. This enables a wide range of current measurements. In the conventional shunt resistance method, the measurement range is switched by changing the shunt resistance that is the current path of the current to be measured, so the current to be measured is interrupted at the time of switching. The measurement range can be switched without interrupting (between the source and drain of the first FET).

(8) In the current measuring circuit according to claim 8, the drains of the first FET and the second FET are grounded. The drains of both FETs can be strongly temperature-coupled, the resistance between the source and drain of both FETs can be further stabilized, and more accurate current measurement can be realized.

(9) An integrated circuit element according to a ninth aspect includes the current measuring circuit according to any one of the first to eighth aspects. Thereby, downsizing, reduction of manufacturing cost, power saving consumption, and the like can be achieved.

(1) First Embodiment (1-1) Circuit Configuration FIG. 1 is a first embodiment of a current measuring circuit according to the present invention. This circuit mainly includes two N-channel FETs Q1 and Q2 and two operational amplifiers OP1 and OP2. This circuit is for measuring the measured current i flowing in the measured current path (in the direction of the arrow), and the measurement output corresponding to the magnitude of the measured current i is the measurement current iS2 flowing through it. It can be obtained as a potential Vout at one end of the resistors Rx1.

  The source of the first FET Q1 is connected to the input terminal of the current to be measured i, and the drain is grounded. The measured current i is the source current iS1 that flows from the source to the drain when the FET Q1 is in the ON state. In the illustrated circuit, only the current flowing in this direction can be measured. Further, the source of the FET Q1 is connected to the non-inverting input of the operational amplifier OP1. Therefore, the source potential of the FET Q1 is applied to the non-inverting input of the operational amplifier OP1.

  The reverse current bypass diode D1 has a cathode connected to the source of the FET Q1 and an anode connected to the drain of the FET Q1.

  In the circuit of FIG. 1, the source and drain of the FET Q1 may be switched and connected. In that case, the current to be measured i flows from the drain to the source (the drain current of the FET Q1), and the drain potential is applied to the non-inverting input of the operational amplifier OP1.

  In the operational amplifier OP1, a feedback resistor R3 is connected between the inverting input and the output, and a bias voltage circuit is connected between the inverting input and the ground via a resistor R2. The operational amplifier OP1 is configured as a non-inverting amplifier (amplification factor = 1 + R3 / R2, where the resistance of the bias circuit is ignored). The bias voltage circuit is a circuit for applying a bias voltage to the inverting input of the operational amplifier OP1. The ground side of the resistor R2 is connected to the intermediate terminal of the variable resistor VR2, and a bias voltage (potential difference between the ground potential) can be set between the positive power supply potential + Vcc and the negative power supply potential −Vcc by this intermediate terminal.

  As a result of experiments on this bias voltage, a slightly positive potential (in mV units) was suitable for the large current range, and a slightly negative potential (in mV units) was suitable for the small current range. This may be due to variations in the elements of the FETs Q1 and Q2.

  Further, the output of the operational amplifier OP1 is connected to the intermediate terminal of the variable resistor VR1. One end of the variable resistor VR1 and the gate of the FET Q1 are connected, and the other end of the variable resistor VR1 and the gate of the FET Q2 are connected. Therefore, the gate potentials of the FETQ1 and FETQ2 are controlled by the output potential (first control potential) of the operational amplifier OP1.

  The variable resistor VR1 is provided for adjusting the gate potential of both FETs. In principle, the gates of FETQ1 and FETQ2 having the same characteristics may be set to the same potential. However, in practice, it is difficult to ideally match the characteristics of both FETs, and adjustment is made by the variable resistor VR1.

  On the other hand, the operational amplifier OP2 has a non-inverting input connected to the source of the FET Q1, and an inverting input connected to the source of the FET Q2. Therefore, the source potential of the FET Q1 is applied to the non-inverting input of the operational amplifier OP2, and the source potential of the FET Q2 is applied to the inverting input.

  Further, the output of the operational amplifier OP2 is connected to the base of the NPN bipolar transistor Q3. The collector of the transistor Q3 is connected to the positive power source + Vcc, and the emitter is connected to one end of any of the measuring resistors Rx1 to Rxn. The transistor Q3 is provided for amplifying the output current of the operational amplifier OP2, but is not an essential element.

  Any one of the measurement resistors Rx1 to Rxn can be selected by the changeover switch SW. The other ends of the measurement resistors Rx1 to Rxn are connected to the source of the FET Q2. Since the measurement resistors Rx1 to Rxn and the source-drain resistance of the FET Q2 are in series, the source current iS2 of the FET Q2 flows through the measurement resistors Rx1 to Rxn. The source current iS2 of the FET Q2 becomes a measurement current. In practice, a measurement output Vout is obtained between one end of the measurement resistors Rx1 to Rxn and the ground potential.

  When the source and drain of the FET Q1 are switched and connected, the source and drain of the FET Q2 are also switched and connected. In that case, a measurement current flows from the drain to the source (the drain current of the FET Q2), and the drain potential is applied to the inverting input of the operational amplifier OP2.

  The FET Q1 is a measurement current path through which the current to be measured i flows. Therefore, a large current capacity is required when measuring a large current, whereas the FET Q2 is used for canceling the nonlinear characteristic of the FET Q1 and current. Since it is for measurement, it is not necessary for it to be for a large current, and it is preferable to use it for a small current so as to avoid a measurement power loss.

  In principle, the FET Q1 and the FET Q2 are selected so that the change characteristics of the source current (or drain current) with respect to the source potential change (or drain potential change) are the same. In other words, the FET Q1 and the FET Q2 are selected so that the change characteristics of the source-drain resistance (or drain-source resistance) with respect to the gate potential change are the same. The resistance between the source and the drain here means on-resistance.

  Further, it is preferable that the FETQ1 and the FETQ2 have the same on-resistance change characteristics with respect to temperature changes.

(1-2) Circuit operation <Overview>
This circuit operates so that the source current iS2 of the FET Q2 always flows at the same ratio to the current to be measured i, that is, the source current iS1 of the FET Q1, by the first and second feedback means including each of the two operational amplifiers. . When the current to be measured i starts to flow from the initial state, or when the current to be measured i changes from a certain value to another value, these feedback means operate and an equilibrium state is achieved through a transient state. The In practice, the time to transition to the equilibrium state is instantaneous, and there is no problem in real-time current measurement. Current measurement is performed in this equilibrium state.

<First Feedback Operation by Operational Amplifier OP1>
In the initial state before the voltage via the load is applied to the source of the FET Q1, the FET Q1 is in a slightly conductive state due to the offset generated by the bias voltage circuit. When the voltage is applied to the source of the FET Q1 (when the current to be measured starts to flow), the maximum voltage in the operating state of this circuit is applied to the source of the FET Q1. Therefore, the source potential of the FET Q1 applied to the non-inverting input of the operational amplifier OP1 constituting the first feedback means is amplified by the operational amplifier OP1 and applied to the gate of the FET Q1. As a result, the on-resistance of the FET Q1 is reduced, and the operation of lowering the source potential of the FET Q1 is executed. In this case, the gate potential of the FET Q1 fed back by the source potential of the FET Q1, the resistance value between the source and the drain of the FET Q1 determined thereby, and the source potential of the FET Q1 determined thereby instantaneously balance to a certain value. Calm down (assuming that the source current of FET Q1 does not fluctuate).

  During this feedback operation, due to the offset, even if the source current of the FET Q1 is the minimum current value within one measurement range, it does not include a process of making a slight transition from the off state to the on state of the FET Q1. Thus, stable and highly accurate current measurement is possible.

  This first feedback operation is executed instantaneously when the measured current i, that is, the source current iS1 of the FET Q1 changes in the balanced state, and the balance is broken, and the balanced state is realized again. At that time, the source potential, the gate potential, and the source-drain resistance of the FET Q1 also change and are set to different values.

<Control of gate of FET Q2>
Since the output potential of the operational amplifier OP1 is also applied to the gate of the FET Q2, the gate potentials of the FET Q1 and the FET Q2 are basically always the same potential. Therefore, at the same time that the FET Q1 is turned on at a predetermined gate potential, the FET Q2 also has a predetermined on-resistance value immediately from the state where the source-drain of the FET Q2 is made conductive while the resistance between the source and drain is slight. It becomes.
FETQ1 and FETQ2 are ideally selected so that the on-resistance change characteristics with respect to the gate potential change are completely the same, in which case the gate potentials of both FETs can be made completely the same, The variable resistor VR1 is also unnecessary. However, it is practically difficult to match the characteristics of the two FETs ideally, and the cost is high. Therefore, the balance of the gate potentials of both FETs is adjusted by the variable resistor VR1 so that the on-resistance change characteristics of both FETs are the same in at least one measurement range.

<Second Feedback Operation by Operational Amplifier OP2>
The source potential of the FET Q1 is also applied to the non-inverting input of the operational amplifier OP2. Then, it is amplified by the operational amplifier OP2 at a predetermined amplification factor, and the source potential of the FET Q2 is controlled by the output potential. The source potential of the FET Q2 is applied to the inverting input of the operational amplifier OP2. Therefore, the output of the operational amplifier OP2 is set so that the source potential of the FET Q1 applied to the non-inverting input of the operational amplifier OP2 is the reference potential, and the source potential of the FET Q2 applied to the inverting input is the same potential as this reference potential. The source potential of the FET Q2 is controlled by the potential. Thus, the source potential of the FET Q2 is balanced with the source potential of the FET Q1 by the feedback operation of the operational amplifier OP2.
When the equilibrium state is obtained in this way, the source potential and the gate potential of the FET Q2 are the same as those of the FET Q1, respectively, and the on-resistance of the FET Q2 is also set to a predetermined value. The output potential of the operational amplifier OP2 and the measurement source current iS2 are also fixed.

  This second feedback operation is executed when the measured current i, that is, the value of the source current iS1 of the FET Q1 changes in the equilibrium state, and when the source potential of the FET Q1 changes and the equilibrium is broken, the equilibrium state is instantaneously again. To be realized. At that time, the source potential, gate potential, and on-resistance of the FET Q2 also change, and are set to different values. Similarly, the output potential of the operational amplifier OP2 and the measurement source current iS2 are also set to different values.

<Application of bias voltage>
The bias voltage applied to the inverting input of the operational amplifier OP1 is inverted and amplified and reflected on the output. On the other hand, the source potential applied to the non-inverting input of the operational amplifier OP1 is non-inverting amplified and reflected on the output. These outputs are differentially amplified to control the gate potentials of FETQ1 and FETQ2. Accordingly, the bias voltage has a function of offsetting the gate potential determined only from the source potential of the FET Q1 by a predetermined voltage. In the case of FIG. 1, since a bias voltage is applied to the inverting input, a negative bias voltage is input when the gate potential is offset in the increasing direction, and a positive bias voltage is input when the gate potential is offset in the decreasing direction. That's fine. If this bias voltage is not applied, stable and highly accurate current measurement may not be possible when the minimum current is within one measurement range as described above. Since the apparent gate threshold potential can be offset by applying a bias voltage to give a gate potential sufficient to turn on both FETs so that they can be measured, the source current has one measurement range. Even in the case of the minimum current at, both FETs can be turned on slightly, and stable and accurate measurement can be performed.

<Realization of proportional relationship between measured current i and measuring current iS2>
As described above, the gate potential of FET Q1 is fixed by the first feedback means, the gate potentials of FET Q1 and FET Q2 are maintained at the same potential, and the source potentials of FET Q1 and FET Q2 are maintained at the same potential by the second feedback means. With this circuit operation, it is possible to always maintain a proportional relationship between the current to be measured i (source current of the FET Q1) and the measurement current iS2 (source current of the FET Q2). For this purpose, the FET Q1 and the FET Q2 may be selected so that the change characteristics of the source current with respect to the source potential change are the same. Since the source potential of both FETs is always maintained at the same potential, when the source potential changes, the amount of change is the same in both FETs. Therefore, when the source potential changes, for example, if the source current of the FET Q1 is doubled, if the source current of the FET Q2 is also doubled, the change characteristics of both FETs can be said to be the same.

  This has the same meaning as that the on-resistance variation characteristics of both FETs with respect to the gate potential variation are the same. Since the gate potentials of both FETs are always maintained at the same potential, when the gate potential changes, the amount of change is the same in both FETs. Therefore, if the on-resistance of the FET Q1 is doubled when the gate potential is changed, for example, if the on-resistance of the FET Q2 is also doubled, it can be said that the change characteristics of both FETs are the same. This can be realized by making the nonlinearity of the individual characteristics of FETQ1 and FETQ2 the same. The non-linearity of both FETs is offset in the output potential of the operational amplifier OP2 by applying the source potential of both FETs in the form of a voltage to the two inputs of the operational amplifier OP2 that are opposite in phase with the same homologous potential. . Thereby, a highly accurate current measuring circuit is realized.

  Furthermore, the FETQ1 and FETQ2 have the same on-resistance change characteristics with respect to temperature changes, so that if both FETs have the same temperature environment, the on-resistance changes with respect to the temperature changes of the FETs can be completely cancelled. Thus, a more accurate current measurement circuit is realized. It is preferable to ground the drains of FETQ1 and FETQ2 as shown in FIG. 1 in that the drains of both FETs can be strongly temperature-coupled. When the drains of both FETs are grounded, an IC can be formed using the drain as a common base, and the temperature characteristics can be easily matched to cancel errors caused by the temperature characteristics.

<Output voltage measurement>
In this circuit, it can also be said that the measured current i is measured using the output potential of the operational amplifier OP2.
In practice, the measurement output Vout is measured between one end of the measurement resistors Rx1 to Rxn through which the source current is2 of the FET Q2 in FIG. 1 flows and the ground potential. In this case, the values of the measurement resistors Rx1 to Rxn are set so that the measurement error due to the on-resistance of the FET Q2 does not become a problem.

  FIG. 2 shows a modification of the output portion of the circuit of FIG. 1 (measurement resistors Rx1 to Rxn are omitted from Rx), and measurement errors due to the on-resistance of the FET Q2 can be eliminated. As shown in FIG. 2, a current mirror circuit (bipolar transistor Q4, bipolar transistor Q5, R9) is provided so that the same amount of current as the source current is2 flowing through the bipolar transistor Q4 flows through the bipolar transistor Q5 and measured by the resistor R9. I do. As a result, a measurement output without a measurement error due to the on-resistance of the FET Q2 can be obtained, and at the same time, a voltage can be measured with respect to the ground potential.

With respect to the measurement range setting, for example, if the current to be measured i is 10 amperes and the measurement current iS2 is 10 μamperes, the measurement output 10 is obtained by selecting 1 MΩ from the measurement resistors Rx1 to Rx2 in FIG. Volts are obtained as full scale voltage. Although the on-resistance of the FET Q2 is an error, there is no problem if the measurement resistance is set to a value that can ignore the error due to the on-resistance.
If the measured current i is 1 ampere when the measurement resistance is 1 MΩ, the measurement current iS2 is 1 μampere and the measurement output is 1 volt. Thus, a linear output voltage of 10 to 1 volt can be obtained for a measured current of 10 to 1 ampere.

  Thus, each value of measurement resistance Rx1-xn is set so that it may become a full scale which is easy to measure, and a measurement range can be selected by switching these. In this way, a wide measurement range can be realized.

Also, in the conventional shunt resistance method, the measurement range is switched by changing the shunt resistance that is the current path of the current to be measured, so that the current to be measured is interrupted at the time of switching. The measurement range can be switched without interrupting the current path (between the source and drain of FET Q1).
Furthermore, since the resistance of the current path tends to decrease when the measured current increases, the power consumption in the current path does not increase in proportion to the measured current.

<Response to exchange>
In the circuit of FIG. 1, measurement is possible only when the measured current i is in a direction flowing from the measured current path. When the measured current i is in the direction of flowing out to the measured current path, the output potential of the operational amplifier OP1 is a negative potential, and the non-inverting input of the operational amplifier OP2 is also a negative potential, so that both the FET Q1 and the FET Q2 are turned on. This is because the circuit does not operate.

  However, since the positive phase and the negative phase are symmetric with respect to general AC, it is only necessary to measure either one. Therefore, in FIG. 1, when the alternating current is in the negative phase, the current is bypassed by the diode D1, and only when the positive phase is in the current measurement by this circuit operation. Thereby, AC measurement is also possible.

  Since the power loss due to the diode D1 increases when the alternating current is large, the diode D1 is not used, and even if the alternating current phase is detected and the FET Q1 is controlled to be in the on state (fully saturated on) when the negative phase is detected Good.

(2) Second Embodiment FIG. 3 is a second embodiment of a current measuring circuit according to the present invention. In the second embodiment, the basic operation such as the feedback operation of the operational amplifiers OP1 and OP2 is the same as that of the first embodiment, but the form of the bias voltage circuit is different. Note that the measurement resistor Rx is omitted and only one is shown.

  In the bias voltage circuit of the second embodiment, a bias voltage is applied to the non-inverting input of the operational amplifier OP1. The bias voltage can be set between the positive power supply potential + Vcc and the ground potential by the variable resistor VR2, and this bias voltage is applied to the non-inverting input via the resistors R8 and R6.

  The bias voltage applied to the non-inverting input of the operational amplifier OP1 is non-inverting amplified and reflected on the output. The non-inverting input of the operational amplifier OP1 is applied with the source potential of the FET Q1 and the bias potential superimposed by dividing both potentials by the resistors R1 and R6 (with the base point of the bias potential as the connection point potential of the resistors R6 and R7). The gate potential of FETQ1 and FETQ2 is controlled. As described in the first embodiment, by applying this bias voltage to offset the gate potentials of both FETs, both FETs are slightly changed even if the current to be measured is the minimum current in a predetermined measurement range. Enables stable and accurate measurement in the on state.

  However, since the bias voltage is applied to the non-inverting input in the circuit of FIG. 3, the current iB1 flowing through the resistor R6 due to the bias voltage flows to the FET Q1 via the resistor R1 and affects the source potential of the FET Q1. Therefore, the current iB2 is also passed through the source of the FET Q2, and the resistor R7 is connected between one end of the resistor R6 and the source of the FET Q2 so as to balance the source potential of the FET Q1 and the source potential of the FET Q2. In order to achieve the balance, the ratio of the current iB1 and the current iB2 may be the same as the ratio of the source current iS1 of the FET Q1 and the source current iS2 of the FET Q2.

(3) Third Embodiment FIG. 4 is a third embodiment of a current measuring circuit according to the present invention. In the third embodiment, the feedback operations of the operational amplifiers OP1 and OP2 are the same as those in the first and second embodiments. However, the third embodiment is stable in the minimum current region in a predetermined measurement range without using a bias voltage circuit. Accurate measurement is realized.

  In the circuit of FIG. 4, the output of the operational amplifier OP2 is amplified by a grounded emitter circuit configured using a PNP-type bipolar transistor Q3. That is, the output of the operational amplifier OP2 is connected to the base of the transistor via the resistor R10, the positive power supply potential + Vcc is applied to the emitter, and the output is obtained from the collector. Since the grounded emitter circuit has a constant current characteristic, a collector current can be output quickly even if the base current is very small. As a result, the positive power supply potential + Vcc is immediately applied to the source of the FET Q2 to be turned on. Incidentally, in the circuits of FIGS. 1 and 3 described above, since this portion is an emitter follower circuit, the effect of the constant current characteristic as in the circuit of FIG. 4 cannot be obtained.

In addition, the grounded-emitter circuit has an important characteristic that the voltage amplification factor is large. FIG. 5 is a diagram for schematically explaining the effect. The left figure of FIG. 5 extracts a part of the circuit of FIG. 4, and shows the operational amplifier OP2, the transistor Q3, the measurement resistor Rx, and the FET Q2. In the circuit of FIG. 4, since the output voltage amplification means of the operational amplifier OP2 is an inverting amplifier, the polarities of the two inputs of the operational amplifier OP2 are the above-described circuits of FIG. 1 and FIG. 3 (amplified by the emitter follower). The source potential of the FET Q1 is applied to the inverting input, and the source potential of the FET Q2 is applied to the non-inverting input. The right diagram of FIG. 5 illustrates the amplification factor when only the operational amplifier OP2 is provided by removing the transistor Q3 from the left diagram. In the right diagram of FIG. 5, the resistance between the source and drain of the FET Q2 is indicated by Rds. From Rds and Rx, the operational amplifier OP2 can be regarded as constituting a non-inverting amplifier (amplification factor = 1 + Rx / Rds). When the FET Q2 is in the OFF state, since Rds is infinite, the amplification factor of the operational amplifier OP2 itself is almost 1 and is not amplified. Without the amplification function, the feedback operation including the operational amplifier OP2 does not work, and the FET Q2 cannot be turned on.
However, by inserting a grounded-emitter circuit having a large voltage amplification factor A, even if the operational amplifier OP2 cannot be amplified, the amplification factor can be obtained as a whole circuit, so that a feedback operation is possible and the FET Q2 can be turned on. . When the FET Q2 is turned on, Rds becomes extremely small (for example, several mΩ to several hundred Ω), so that the operational amplifier OP2 can also obtain a sufficient amplification factor and contribute to the feedback operation.

  As described above, the circuit shown in FIG. 3 can eliminate unstable operation in the minimum current region of the current to be measured when only the grounded emitter circuit is provided on the output side of the operational amplifier OP2. .

  Finally, in the circuit of FIG. 4, a plurality of variable resistors VR1 to VRn for adjusting the gate potentials of the FETQ1 and FETQ2 are provided, which can be switched by the changeover switch SW2, and further linked to the measurement range changeover switch SW1. . Each of the plurality of variable resistances VR1 to VRn is adjusted so that the change characteristics in the slight ON state of both FETs are the same in one corresponding measurement range. This corresponds to the fact that the variations of the FET Q1 and the FET Q2 do not necessarily match depending on the measurement range.

1 is an embodiment of a current measuring circuit according to the present invention. It is a figure which shows the modification of the output part of the circuit of FIG. It is another embodiment of the current measurement circuit by this invention. It is another embodiment of the current measurement circuit by this invention. It is a figure explaining the effect of the grounded emitter circuit in the circuit of FIG.

Explanation of symbols

Q1 1st FET
Q2 2nd FET
Q3 Transistor OP1 First operational amplifier OP2 Second operational amplifier Rx, Rx1 to Rxn Measuring resistance VR1, VR2 Variable resistance VR2 Variable resistance

Claims (9)

A first FET in which a current to be measured flows as a source current or a drain current;
First feedback means for applying a source potential or drain potential of the first FET as an input and outputting a first control potential for controlling the gate potential of the first FET;
A second FET whose gate potential is controlled by the first control potential;
The source potential or drain potential of the first FET is applied as a reference potential to one input of the two inputs, and the source potential or drain potential of the second FET is applied to the other input, and the source potential or the second FET Second feedback means for outputting a second control potential for controlling the source potential or drain potential of the second FET so that the drain potential is the same as the reference potential;
A current measurement circuit that measures the current to be measured using the second control potential.   2. The current measuring circuit according to claim 1, further comprising means for generating a bias voltage, wherein the bias voltage is applied to an input of the first feedback means.   2. The current measuring circuit according to claim 1, wherein a source potential or a drain potential of the second FET is controlled using an output potential obtained by amplifying the second control potential by a grounded emitter circuit.   The second FET has the same change characteristics of the source current or the drain current with respect to the source potential change or the drain potential change, and the change characteristics of the source-drain resistance or the drain-source resistance with respect to the gate potential change. The current measurement circuit according to any one of claims 1 to 3.   5. The current measuring circuit according to claim 1, wherein the first FET and the second FET have the same change characteristics of a source-drain resistance or a drain-source resistance with respect to a temperature change. .   A measurement current that flows as a source current or a drain current of the second FET due to the second control potential is caused to flow through a measurement resistor, and the current to be measured is measured by a voltage drop of the measurement resistor. The current measuring circuit according to claim 1.   The current measurement circuit according to claim 6, wherein a measurement range of the current to be measured is changed by changing a value of the measurement resistor.   The current measuring circuit according to claim 1, wherein drains of the first FET and the second FET are grounded.   An integrated circuit element comprising the current measuring circuit according to claim 1.

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