JP2007194383A - Optical member and backlight - Google Patents

Optical member and backlight Download PDF

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JP2007194383A
JP2007194383A JP2006010693A JP2006010693A JP2007194383A JP 2007194383 A JP2007194383 A JP 2007194383A JP 2006010693 A JP2006010693 A JP 2006010693A JP 2006010693 A JP2006010693 A JP 2006010693A JP 2007194383 A JP2007194383 A JP 2007194383A
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substrate
light emitting
emitting element
semiconductor light
optical member
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Hiroshi Koyama
洋 小山
Naoya Isada
尚哉 諫田
Kimihiko Sudo
公彦 須藤
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Hitachi Lighting Ltd
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Hitachi Lighting Ltd
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    • HELECTRICITY
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    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
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    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612Auxiliary members for layer connectors, e.g. spacers
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    • H01L2224/27Manufacturing methods
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    • H01L2224/27013Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the layer connector, e.g. solder flow barrier
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    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
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    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
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    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8312Aligning
    • H01L2224/83136Aligning involving guiding structures, e.g. spacers or supporting members
    • H01L2224/83138Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
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    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires
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    • H01L2924/351Thermal stress

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)
  • Light Guides In General And Applications Therefor (AREA)
  • Liquid Crystal (AREA)
  • Planar Illumination Modules (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To keep a conductive adhesive applied on the undersurfaces of LEDs uniform in thickness so as to satisfy requirements, such as a density enhancement and an improvement in heat dissipation properties, for LEDs mounted on a sub-mount, and to prevent an electrical short circuit from occurring between interconnections due to the fact that the conductive adhesive spreads too wide. <P>SOLUTION: Columnar bumps having each a smooth outer shape are provided at the periphery of a die bonding region on a sub-mount, so that the thickness and wetting spread of the conductive adhesive can be controlled when a die bonding process is carried out. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、半導体発光素子を搭載するサブマウントに関するものである。更に、本発明の別な観点は、バックライトに関するものである。前記サブマウントを有用に用いることが出来る。又、本バックライトはLCD(Liquid Crystal Display)用に供して極めて有用である。   The present invention relates to a submount on which a semiconductor light emitting element is mounted. Furthermore, another aspect of the present invention relates to a backlight. The submount can be used effectively. In addition, this backlight is extremely useful for LCD (Liquid Crystal Display).

近年、高輝度、高発光効率、長寿命を特徴とする高性能の発光ダイオード(以下、LED(Light Emitting Diode)と略記する)が実用化され、各種ディスプレイや交通信号機、液晶ディスプレイのバックライト、プリンタヘッド、照明などに利用され始めている。   In recent years, high-performance light-emitting diodes (hereinafter abbreviated as LED (Light Emitting Diode)) characterized by high brightness, high luminous efficiency, and long life have been put into practical use. Various displays, traffic lights, backlights for liquid crystal displays, It has begun to be used for printer heads and lighting.

光源モジュールの小型化、高密度化への傾向が見られる中、高輝度化による消費電力の増加とも相まって、LEDチップから発生する熱は増大する傾向にある。   While there is a trend toward miniaturization and high density of light source modules, the heat generated from the LED chip tends to increase in conjunction with an increase in power consumption due to higher brightness.

通常、LEDに流す電流を増加すると、一定の電流値までは、比較的リニアに発光輝度が上昇するが、LEDの温度上昇に反比例して発光効率は低下する。又、温度上昇に伴い発光素子から放出される光のスペクトルがシフトするなど動作特性が不安定となる。場合によっては、熱応力により発光装置の部分的破壊が生じることもある。従って、LEDを安定に駆動させるためには、駆動時の温度上昇を抑制することが重要であり、LEDで発生した熱を効率よく放熱する構造が望まれる。半導体レーザダイオードの実装では、放熱特性やハンドリングの観点から、搭載基板に直接チップを搭載するのではなく、サブマウントを介在させるのが一般的となっている。サブマウントは、半導体発光素子から基板への放熱断面積を広げる役割があり、LEDから発せられた熱が効率よく搭載基板に伝達される。   Normally, when the current flowing through the LED is increased, the light emission luminance increases relatively linearly up to a certain current value, but the light emission efficiency decreases in inverse proportion to the temperature increase of the LED. In addition, the operating characteristics become unstable, for example, the spectrum of light emitted from the light emitting element shifts with increasing temperature. In some cases, thermal stress may cause partial destruction of the light emitting device. Therefore, in order to drive the LED stably, it is important to suppress a temperature rise during driving, and a structure that efficiently dissipates heat generated in the LED is desired. In mounting a semiconductor laser diode, it is common to interpose a submount rather than mounting a chip directly on a mounting substrate from the viewpoint of heat dissipation characteristics and handling. The submount has a role of expanding a heat radiation cross section from the semiconductor light emitting element to the substrate, and heat generated from the LED is efficiently transmitted to the mounting substrate.

LEDとサブマウントの接続には、Au電極同士を超音波や熱圧着によって接続する方法のほか、AuSn等のはんだを用い熱圧着やリフローによって接続する方法がある。超音波接続や熱圧着接続の場合には、素子一つ一つに対して、超音波や圧力の印加に時間を要し、スループット増加の妨げとなっている。又、はんだリフローの場合には、チップの一括搭載が可能であるが、200℃以上の高温状態での接続となる。   The connection between the LED and the submount includes a method of connecting Au electrodes to each other by ultrasonic waves or thermocompression bonding, and a method of connecting by soldering such as AuSn by thermocompression bonding or reflow. In the case of ultrasonic connection or thermocompression bonding, it takes time to apply ultrasonic waves or pressure to each element, which hinders increase in throughput. In the case of solder reflow, the chips can be mounted together, but the connection is performed at a high temperature of 200 ° C. or higher.

これに対し、Agペーストを用いる場合には、LEDチップを搭載したモジュールを150℃程度の温度で一括加熱することが可能となる。   On the other hand, when the Ag paste is used, the module on which the LED chip is mounted can be collectively heated at a temperature of about 150 ° C.

LEDの放熱の観点から考えると、従来からダイボンドに用いられているAgペーストでは、はんだ等の金属材料に比べ熱伝導率が一桁から二桁小さく、数W/mKであった。一般にAgペーストなどの導電性ペーストは、その母材に樹脂が配合されており、これらの樹脂の熱伝導性が金属より低いのが要因である。はんだ材料の鉛フリー化のため、はんだ代替材料の開発が進められ、導電性接着剤の一種であるAgペーストも性能が向上している。銀フィラーの充填率を90%程度まで高め、熱伝導率を30W/mK程度まで改善したAgペースト剤が製造されるようになり、LEDチップダイボンドへの適用の可能性が出てきた。Agペーストの供給には、ディスペンスや印刷技術が利用される。パッケージの小型化、高密度化のため、ペースト供給量を制御し、ペースト剤の広がりすぎによる電極間ショートや、濡れ不足を防がなければならない。こうした問題に対し、いくつかのアイディアが提案されている。   From the viewpoint of LED heat dissipation, the Ag paste conventionally used for die bonding has a thermal conductivity that is one to two orders of magnitude smaller than metal materials such as solder, and is several W / mK. In general, conductive pastes such as Ag pastes are blended with resin in the base material, and the reason is that the thermal conductivity of these resins is lower than that of metals. In order to make lead-free solder materials, development of alternative solder materials is progressing, and the performance of Ag paste, a kind of conductive adhesive, is also improving. Ag pastes with a silver filler filling rate of up to about 90% and a thermal conductivity of up to about 30 W / mK have been produced, and the possibility of application to LED chip die bonding has emerged. Dispensing and printing techniques are used to supply the Ag paste. In order to reduce the size and increase the density of the package, it is necessary to control the amount of paste supplied to prevent short-circuiting between electrodes due to excessive spreading of the paste agent and insufficient wetting. Several ideas have been proposed for these problems.

特開平9−223846号公報(特許文献1)には、LEDを導電性材料によってフリップチップ接続する際、アノード、カソード両電極間がショートするのを防ぐため、サブマウント上面に、ウェットエッチングやドライエッチングによって凹状の溝を形成する方法が示される。又、特開2002−299747号公報(特許文献2)の実施例には、次の事実が示される。即ち、サブマウントとマザーボードのAu電極同士を超音波接続後、その隙間に熱伝導性ペーストを注入する際、ペーストが広がることが好ましくない領域がある場合には、基板上に予め凸部枠などの堤防を設け、その中にペーストを流し込む方法である。   Japanese Patent Laid-Open No. 9-223846 (Patent Document 1) discloses that when an LED is flip-chip connected with a conductive material, the anode and cathode electrodes are prevented from being short-circuited. A method of forming a concave groove by etching is shown. Moreover, the following fact is shown in the Example of Unexamined-Japanese-Patent No. 2002-299747 (patent document 2). That is, after ultrasonically connecting the Au electrodes of the submount and the motherboard, when injecting the heat conductive paste into the gap, if there is a region where it is not desirable for the paste to spread, a convex frame or the like is previously formed on the substrate. This is a method of providing a dike and pouring paste into it.

特開2005−183899には、発光素子の外側よりも内側に位置する導体層の上面に、半球状の凸部が複数設けられた例、或いは長方形の凸部が発光素子の外周に対して平行になるように設けられた例が提示されている(特許文献3)。   In JP-A-2005-183899, an example in which a plurality of hemispherical convex portions are provided on the upper surface of a conductor layer located inside the outside of the light emitting element, or rectangular convex portions are parallel to the outer periphery of the light emitting element. The example provided so that it may become is shown (patent document 3).

特開平9−223846号公報(図2)Japanese Patent Application Laid-Open No. 9-223846 (FIG. 2) 特開2002−299747号公報(段落<0083>)JP 2002-299747 A (paragraph <0083>) 特開2005−183899号公報(請求項1、段落<0036>)JP 2005-183899 A (claim 1, paragraph <0036>)

はんだ代替のダイボンド剤として、Agペーストが検討されている。ところが、Agペーストの塗布量が少ない場合には、LEDチップとサブマウント基板間に隙間が生じたり、チップが傾いたりする。又、膜厚が不均一となることで、放熱特性の低下が懸念される。一方、ダイボンド剤の塗布量が多すぎると、隣接するLEDチップや配線パターンに接触する恐れがある。   Ag paste has been studied as a die-bonding agent instead of solder. However, when the application amount of the Ag paste is small, a gap is generated between the LED chip and the submount substrate, or the chip is inclined. In addition, since the film thickness is not uniform, there is a concern that the heat dissipation characteristics may be degraded. On the other hand, when there is too much application quantity of a die-bonding agent, there exists a possibility of contacting with an adjacent LED chip and a wiring pattern.

LED実装の高密度化と高放熱性への要求を満足するため、均等な膜厚を保ちつつ、電極間ショートのないダイボンド方式の開発が求められる。   In order to satisfy the demands for high density and high heat dissipation of LED mounting, it is necessary to develop a die bond system that does not cause a short circuit between electrodes while maintaining a uniform film thickness.

現状用いられるLEDチップは、大きくとも1mm角程度である。この面積に対応したAgペースト量を印刷又はディスペンスにより供給する場合、円状あるいは楕円状に一点ないし数点載せることになる。この上に、チップボンダを用いてLEDチップを搭載すると、Agペーストは押しつぶされ、余分なAgペーストはチップの外周からはみ出す。ここで、チップの四隅にもAgペーストを十分に行き渡らせるには、Agペーストの量を多くするか、チップをスクラブさせるなどの方法が必要となる。   Currently used LED chips are about 1 mm square at most. When the amount of Ag paste corresponding to this area is supplied by printing or dispensing, one or several points are placed in a circle or ellipse. On top of this, when an LED chip is mounted using a chip bonder, the Ag paste is crushed, and excess Ag paste protrudes from the outer periphery of the chip. Here, in order to sufficiently spread the Ag paste to the four corners of the chip, it is necessary to increase the amount of the Ag paste or scrub the chip.

本願発明においては、LEDチップを搭載するサブマウント側の構造を工夫することにより問題を解決する。   In the present invention, the problem is solved by devising the structure on the submount side on which the LED chip is mounted.

第1の方法としては、サブマウントの電極上に高さ数〜数十μmの周囲がなめらかな曲線を有する凸状バンプ、例えば円柱状バンプを形成する。これらのバンプをLED搭載位置のやや内側に直線状ではなく千鳥配置することで、Agペーストが四辺からはみ出すのを抑えつつ、四隅方向へ移動し膜厚が均等となりより好ましい。又、周囲がなめらかな曲線を有する凸状のバンプを用いることで、バンプの裏側にもAgペーストが回り込みやすくなる。このバンプの代表的な例は、例えば円柱或いは楕円柱のバンプである。それに加えて、一定の高さのバンプをLEDチップ下に配置することで、サブマウント上の電極とLED裏面との隙間がバンプの高さによって決定される。Agペーストの供給量を適正化することで、ボイドの発生も抑制し、膜厚の均一性と放熱性の向上を両立させることが出来る。   As a first method, convex bumps having a smooth curve around a height of several to several tens of μm, for example, cylindrical bumps, are formed on the electrodes of the submount. By arranging these bumps in a staggered manner rather than linearly at the inner side of the LED mounting position, it is more preferable that the Ag paste moves in the four corner directions while suppressing the protrusion from the four sides and the film thickness becomes uniform. Further, by using convex bumps having a smooth curve around the periphery, Ag paste can easily flow around the back side of the bumps. A typical example of this bump is, for example, a cylindrical or elliptical bump. In addition, by arranging a bump having a certain height below the LED chip, the gap between the electrode on the submount and the back surface of the LED is determined by the height of the bump. By optimizing the supply amount of the Ag paste, generation of voids can be suppressed, and both uniformity of film thickness and improvement of heat dissipation can be achieved.

第2の方法は、サブマウント上にLEDチップを取り囲むように高さ数十μmの細長い枠状のバンプを配置する方法である。細長いバンプは、LEDチップを完全に取り囲むのではなく、LEDの四隅に近い位置には隙間を設ける。更に、四隅に近づくにつれ枠体の幅を狭くする。こうすることで、チップ搭載時に押し広げられたAgペーストは、バンプで堰き止められ、チップ四隅へ追いやられる。Agペーストの広がり過ぎを防止しつつ、LEDチップの四隅までAgペーストを十分に行き渡らせることが可能となる。   The second method is a method in which elongated frame-like bumps having a height of several tens of μm are arranged on the submount so as to surround the LED chip. The elongated bumps do not completely surround the LED chip, but provide gaps at positions close to the four corners of the LED. Furthermore, the width of the frame is reduced as it approaches the four corners. By doing so, the Ag paste spread when the chip is mounted is dammed by the bumps and driven to the four corners of the chip. It is possible to sufficiently spread the Ag paste to the four corners of the LED chip while preventing the Ag paste from spreading too much.

次に、本願の係るバックライトに関する諸形態は次の通りである。バックライトの構成は大きくは二つの方法がある。尚、本発明に係る光学部材以外の基本構成はこれまでのもので十分であるので、その詳細説明は省略する。   Next, various aspects related to the backlight according to the present application are as follows. There are two main methods for configuring the backlight. Since the basic configuration other than the optical member according to the present invention is sufficient, the detailed description thereof will be omitted.

第1の形態は、LCDパネルの側面から入射する形態である。即ち、バックライト用基板と、当該バックライト用基板上に配置された複数の光学部材と、前記複数の光学部材を覆って設けられた透光性部材と、前記透光性部材に光学的に接続され、光をLCDパネルの側面に供給するための導光板とを備えたバックライトである。   The first form is a form incident from the side surface of the LCD panel. That is, a backlight substrate, a plurality of optical members disposed on the backlight substrate, a translucent member provided so as to cover the plurality of optical members, and optically attached to the translucent member A backlight including a light guide plate connected to supply light to the side surface of the LCD panel.

第2の形態は、LCDパネルの背面から入射する形態である。即ち、バックライト用基板と、当該バックライト用基板上に配置された複数の光学部材と、前記複数の光学部材を覆って設けられた透光性部材と、前記透光性部材上に設けら、拡散光をLCDパネルの背面に供給するための拡散体とを備えたバックライトである。そして、いずれの形態においても、光学部材としてこれまで説明して来たいずれかの光学部材を採用する。   The second form is a form incident from the back surface of the LCD panel. That is, a backlight substrate, a plurality of optical members disposed on the backlight substrate, a translucent member provided to cover the plurality of optical members, and a translucent member are provided. And a diffuser for supplying diffused light to the back surface of the LCD panel. In any form, any one of the optical members described so far is employed as the optical member.

本発明は、LED下面の導電性接着剤の厚さを均等に保ちつつ、導電性接着剤が広がり過ぎることによる配線間の電気的ショートを防止することが出来る。   The present invention can prevent electrical shorting between wirings due to excessive spreading of the conductive adhesive while keeping the thickness of the conductive adhesive on the lower surface of the LED uniform.

本願発明の実施の諸形態を説明するに先立って、発明の諸形態について、公知の技術との比較を含めて説明を加える。   Prior to describing the embodiments of the present invention, the embodiments of the invention will be described, including a comparison with known techniques.

本発明の代表的な形態は、前述したように、基板側電極を有する基板と、当該基板上に導電性接着剤を用いて接合された半導体発光素子とを、少なくとも備え、前記基板上における前記半導体発光素子に対するダイボンド領域の周辺部に、滑らかな外周形状を有する複数の柱状バンプを有し、且つ前記ダイボンド領域の中央部には前記柱状バンプを有しない光学部材である。多くの場合、半導体発光素子は四辺形である。そして、この場合、前記複数の柱状バンプが、前記四辺形の各辺に対応して、千鳥配列に設けるのが好ましい。ところで、前記特開2005−183899号公報(特許文献3)では、発光素子の外側よりも内側に位置する導体層の上面に、半球状の凸部が複数設けられた例が提示されている。これに対して、本願の例では、ダイボンド領域の周辺部に滑らかな外周形状を有する複数の柱状バンプを有し、且つ前記ダイボンド領域の中央部には前記柱状バンプを有しない形態を採用する。一方、上記特許文献3の例では、半球状の凸部が発光素子の領域に均一に配置されている。本例のごとくダイボンド領域の中央部に凸部が存在しない形態は、固化前の導電性接着剤が均一な膜厚で且つ四隅にも行き渡らせるに極めて好ましい。   As described above, a representative embodiment of the present invention includes at least a substrate having a substrate-side electrode and a semiconductor light-emitting element bonded to the substrate using a conductive adhesive, and the substrate on the substrate is An optical member having a plurality of columnar bumps having a smooth outer peripheral shape in a peripheral portion of a die bond region with respect to the semiconductor light emitting element and not having the columnar bumps in a central portion of the die bond region. In many cases, the semiconductor light emitting device is a quadrilateral. In this case, the plurality of columnar bumps are preferably provided in a staggered arrangement corresponding to each side of the quadrilateral. By the way, in the said Unexamined-Japanese-Patent No. 2005-183899 (patent document 3), the example in which several hemispherical convex parts were provided in the upper surface of the conductor layer located inside rather than the outer side of a light emitting element is shown. On the other hand, in the example of the present application, a configuration is adopted in which a plurality of columnar bumps having a smooth outer peripheral shape are provided in the peripheral portion of the die bond region, and the columnar bumps are not provided in the central portion of the die bond region. On the other hand, in the example of Patent Document 3, the hemispherical convex portions are uniformly arranged in the region of the light emitting element. The form in which the convex portion does not exist in the central portion of the die bond region as in this example is extremely preferable for allowing the conductive adhesive before solidification to have a uniform film thickness and spread to the four corners.

本例の別な形態は、基板側電極を有する基板と、当該基板上に導電性接着剤を用いて接合された半導体発光素子とを、少なくとも備え、前記半導体発光素子の角部に対応する領域に間隙を有し、且つ当該角部に向かって幅が狭くなした枠状のバンプを有する光学部材である。多くの場合、前記半導体発光素子は四辺形であり、且つ当該四辺形の各辺に対応して、前記枠状のバンプが配置される。   Another form of this example includes at least a substrate having a substrate-side electrode and a semiconductor light emitting element bonded to the substrate using a conductive adhesive, and corresponds to a corner portion of the semiconductor light emitting element. The optical member has a frame-like bump having a gap at the corner and a width narrowing toward the corner. In many cases, the semiconductor light emitting element has a quadrangular shape, and the frame-shaped bumps are arranged corresponding to the sides of the quadrilateral.

ことろで、前記特開2005−183899号公報(特許文献3)では、長方形の凸部が発光素子の外周に対して平行になるように設けられた例が提示されている。しかし、本発明の例では、半導体発光素子の角部に向かって幅が狭くなした枠状のバンプを用いるのである。即ち、固化前の導電性接着剤が、バンプに沿って四隅の方向に容易に移動し、余分な導電性接着剤がバンプの隙間から外部に押し出されるのである。   By the way, in the said Unexamined-Japanese-Patent No. 2005-183899 (patent document 3), the example provided so that a rectangular convex part might become parallel with respect to the outer periphery of a light emitting element was shown. However, in the example of the present invention, a frame-like bump whose width is narrowed toward the corner of the semiconductor light emitting element is used. That is, the conductive adhesive before solidification easily moves along the bumps in the four corner directions, and excess conductive adhesive is pushed out from the gaps between the bumps.

前述した代表的な形態を踏まえて、本願発明に係る光学部材は、次のように述べることが出来る。即ち、基板側電極を有する基板と、当該基板上に導電性接着剤を用いて接合された半導体発光素子とを、少なくとも備え、基板上における半導体発光素子に対するダイボンド領域の周辺部に、半導体発光素子の角部以外のダイボンド領域での導電性接着剤の広がりを抑制しつつ且つ前記半導体発光素子の角部での前記導電性接着剤の広がりを促す機能を有するバンプを有し、且つ前記ダイボンド領域の中央部には前記柱状バンプを有しない光学部材である。   Based on the above-described representative form, the optical member according to the present invention can be described as follows. That is, at least a substrate having a substrate-side electrode and a semiconductor light-emitting element bonded to the substrate by using a conductive adhesive, and a semiconductor light-emitting element on the periphery of a die bond region with respect to the semiconductor light-emitting element on the substrate A bump having a function of suppressing the spread of the conductive adhesive in the die bond area other than the corner of the semiconductor light emitting element and promoting the spread of the conductive adhesive in the corner of the semiconductor light emitting element; It is an optical member which does not have the said columnar bump in the center part.

次に、本発明に係るサブマウントの構造と製造方法について、具体的に説明する。   Next, the structure and manufacturing method of the submount according to the present invention will be specifically described.

<実施例1>
図1は、本例の模式的な断面図である。円柱バンプ付のサブマウント基板1上にLEDチップ5が、導電性接着剤7を用いてダイボンドされている。LEDチップの基板にはAlやSiCやSiが用いられるが、本実施例では、コストと量産性の観点からSi基板を使用する。サブマウント基板1にシリコン基板を用いた場合、この上面に絶縁層を予め形成する。基板1が絶縁性基板の場合は、この絶縁層を設ける必要はない。基板1上に、Cu製の配線2が形成され、この配線2上には円柱状のバンプ3が形成されている。そして、その上に、Agペースト7を供給し、LEDチップ5を搭載する。LED素子の上下電極はAuワイヤによって外部回路と接続される。外部回路への一方の接続部には、Cu層11が配置され、この上部に上部電極用導体(Au電極)12が形成されている。LEDチップの上部電極部と前記上部電極用導体12とはAuワイヤ6−1で結線されている。LEDチップの他方の電極は配線2の一方の端部に導体層4として形成され、この導体層4にAuワイヤ6−2によって外部に導出される。尚、図1では外部回路は省略されている。
<Example 1>
FIG. 1 is a schematic cross-sectional view of this example. An LED chip 5 is die-bonded using a conductive adhesive 7 on a submount substrate 1 with cylindrical bumps. Al 2 O 3 , SiC, and Si are used for the substrate of the LED chip. In this embodiment, a Si substrate is used from the viewpoint of cost and mass productivity. When a silicon substrate is used for the submount substrate 1, an insulating layer is formed in advance on this upper surface. When the substrate 1 is an insulating substrate, it is not necessary to provide this insulating layer. A Cu wiring 2 is formed on the substrate 1, and cylindrical bumps 3 are formed on the wiring 2. And Ag paste 7 is supplied on it and LED chip 5 is mounted. The upper and lower electrodes of the LED element are connected to an external circuit by Au wires. A Cu layer 11 is disposed at one connection portion to the external circuit, and an upper electrode conductor (Au electrode) 12 is formed thereon. The upper electrode portion of the LED chip and the upper electrode conductor 12 are connected by an Au wire 6-1. The other electrode of the LED chip is formed as a conductor layer 4 at one end of the wiring 2, and is led out to the conductor layer 4 by an Au wire 6-2. In FIG. 1, the external circuit is omitted.

図2はサブマウントの上面図である。Si基板1上にCu配線2があり、その上にCu製の円柱状バンプ3を配置する。これらの円柱バンプをLEDチップが搭載される位置に千鳥配列とすることで、余分なAgペーストは四隅からはみ出す。   FIG. 2 is a top view of the submount. A Cu wiring 2 is provided on the Si substrate 1, and a cylindrical bump 3 made of Cu is disposed thereon. By arranging these cylindrical bumps in a staggered arrangement at the positions where the LED chips are mounted, excess Ag paste protrudes from the four corners.

図3はLED素子5をダイボンドした上面図である。図1と同一符号は図1と同様の部材を表す。基板1上に配線2が形成され、LEDチップ5の周縁部に対応する箇所に円柱状のバンプ3が配置されている。更に、配線2の端部にLCDの下部電極4が配置されている。図3において、符号7はAgペーストが良好に広げられた状態を示している。   FIG. 3 is a top view in which the LED element 5 is die-bonded. 1 denote the same members as in FIG. Wirings 2 are formed on the substrate 1, and cylindrical bumps 3 are arranged at locations corresponding to the peripheral edge of the LED chip 5. Further, the lower electrode 4 of the LCD is disposed at the end of the wiring 2. In FIG. 3, the code | symbol 7 has shown the state by which Ag paste was spread | expanded favorably.

図7は、本発明の係るバンプを用いない場合の、導電性接着剤の広がりの例を示す比較例の断面図である。図面での各部位は図1と同一の符号を用いた。導電性接着剤7が周囲に拡大し、例えば、発光素子5の上部電極を外部回路に接続するに用いる導体層(Cu層)11に接触する事態も発生する。この場合、発光素子の両電極が接続される事態となる。又、発光素子(5)下部の導電性接着剤7の厚さが均一でなくなる恐れも大きい。   FIG. 7 is a cross-sectional view of a comparative example showing an example of spreading of the conductive adhesive when the bump according to the present invention is not used. The same reference numerals as those in FIG. 1 are used for the respective parts in the drawings. For example, the conductive adhesive 7 expands to the surroundings, and for example, a situation occurs in which the upper electrode of the light emitting element 5 comes into contact with a conductor layer (Cu layer) 11 used for connecting to an external circuit. In this case, both electrodes of the light emitting element are connected. Further, there is a great possibility that the thickness of the conductive adhesive 7 under the light emitting element (5) is not uniform.

次に、円柱状バンプ付サブマウントの製造プロセスを、図1より図3を参酌しつつ、説明する。先ず、シリコン基板1表面に絶縁膜13を形成する。この絶縁膜の製造方法は、酸素又は水蒸気雰囲気中で1000℃程度の高温に放置することで熱酸化膜を形成する方法や、有機樹脂を塗布する方法がある。次に、電気配線用のCuめっきを実施するために、給電膜を前記絶縁膜上に形成する。給電膜の製造方法には、蒸着法、スパッタ法、CVD法、無電解めっき法などを用いることができる。本実施例における給電膜としては、スパッタ膜によるCu/Crの二層膜を用いた。ここでのCrの機能は、絶縁膜とCu配線膜間の密着性を確保することにある。Crに代えてTiやWなどを用いることもある。   Next, the manufacturing process of the columnar bump-equipped submount will be described with reference to FIGS. First, the insulating film 13 is formed on the surface of the silicon substrate 1. As a method for manufacturing this insulating film, there are a method of forming a thermal oxide film by leaving it at a high temperature of about 1000 ° C. in an oxygen or water vapor atmosphere, and a method of applying an organic resin. Next, in order to perform Cu plating for electric wiring, a power feeding film is formed on the insulating film. A vapor deposition method, a sputtering method, a CVD method, an electroless plating method, or the like can be used as a method for manufacturing the power supply film. As the power supply film in this example, a Cu / Cr double-layer film made of a sputtered film was used. The function of Cr here is to ensure adhesion between the insulating film and the Cu wiring film. Ti or W may be used instead of Cr.

一方、Cuのスパッタ膜厚は、後に実施する電解Cuめっき時に、膜厚分布が生じない最小限の膜厚が好ましく、めっき前処理として行う酸洗などでの膜減り量も考慮したうえで膜厚を決定する。銅の膜厚を必要以上に厚くした場合、例えば、1μmを超える膜厚の場合には、スパッタ時間が長くなり生産効率が低下する。それに加え、後に実施する給電膜のエッチング除去工程の長時間化が避けられず、その結果として再配線層のサイドエッチングが大きくなる。   On the other hand, the sputtering film thickness of Cu is preferably a minimum film thickness that does not cause a film thickness distribution at the time of electrolytic Cu plating to be carried out later. Determine the thickness. When the copper film thickness is increased more than necessary, for example, when the film thickness exceeds 1 μm, the sputtering time becomes long and the production efficiency decreases. In addition to this, it is inevitable that the power supply film etching removal process to be performed later will be prolonged, and as a result, side etching of the rewiring layer becomes large.

次に通常のホトリソグラフィ技術を用いて、配線と逆パターンのめっき用レジストを形成する。電解銅めっきには硫酸・硫酸銅めっき液を用い、界面活性剤による洗浄、水洗、希硫酸による洗浄、水洗を行った後、配線用の電解銅めっき膜を形成する。   Next, a plating resist having a pattern opposite to that of the wiring is formed by using a normal photolithography technique. For electrolytic copper plating, a sulfuric acid / copper sulfate plating solution is used. After washing with a surfactant, washing with water, washing with dilute sulfuric acid, and washing with water, an electrolytic copper plating film for wiring is formed.

配線層のめっきに用いたレジストを剥離後、再びホトリソ技術により円柱状バンプパターンおよびワイヤボンディング電極パターンのめっきレジストを形成する。バンプの高さは放熱時の熱抵抗とめっき時間などを考慮し、本実施例では10μm〜20μmの高さとする。上記配線用銅めっき工程と同様に、バンプおよび電極用の銅めっき、金めっきを行う。   After removing the resist used for plating the wiring layer, a plating resist for the cylindrical bump pattern and the wire bonding electrode pattern is formed again by the photolithography technique. The height of the bump is set to a height of 10 μm to 20 μm in this embodiment in consideration of the thermal resistance at the time of heat dissipation and the plating time. Similar to the copper plating process for wiring, copper plating and gold plating for bumps and electrodes are performed.

めっきレジストを剥離の後、予め成膜したCu/Cr給電膜をウェットエッチングにより除去する。Cuのエッチングには、塩化鉄、アルカリ系エッチング液等の種類があるが、本実施例では硫酸/過硫酸アンモンを主成分とするエッチング液を用いる。実用的には10秒以上のエッチング時間で制御することが望ましいが、長時間のエッチング、例えば5分間を超えてエッチングする場合には、サイドエッチングが大きくなるとともにタクトが長くなるという問題が生じる。そのため、エッチング液およびエッチング条件は、適宜実験により求めるのが良い。   After removing the plating resist, the Cu / Cr power supply film formed in advance is removed by wet etching. There are various types of etching of Cu, such as iron chloride and an alkaline etching solution. In this embodiment, an etching solution mainly containing sulfuric acid / ammonium persulfate is used. Practically, it is desirable to control with an etching time of 10 seconds or more. However, when etching is performed for a long time, for example, exceeding 5 minutes, there arises a problem that side etching becomes large and tact becomes long. Therefore, the etching solution and the etching conditions are preferably obtained by experiments as appropriate.

引き続いて行う給電膜Cr部分のエッチングには、過マンガン酸カリウムとメタケイ酸を主成分とするエッチング液を用いる。還元処理のため、塩酸ヒロドキシルアミンに数分間浸す。   For the subsequent etching of the feeding film Cr portion, an etching solution mainly composed of potassium permanganate and metasilicic acid is used. Soak in hydroxyamine hydrochloride for several minutes for reduction treatment.

最後にバックグラインドおよびダイシングを行いサブマウント個片に分割する。LEDの搭載では、Agペーストをディスペンサや印刷技術によって供給する。ダイボンド後のAgペーストの膜厚を均等にする。このため、一点ではなく複数点に塗布した上にチップを載せる方が好ましいが、本実施例のようなバンプを形成することによって、一点塗布の場合にも容易に均等な膜厚を得ることができる。   Finally, back grinding and dicing are performed to divide into submount pieces. In mounting LEDs, Ag paste is supplied by a dispenser or printing technology. The film thickness of the Ag paste after die bonding is made uniform. For this reason, it is preferable to place the chip on a plurality of points instead of one point. However, by forming bumps as in this embodiment, it is possible to easily obtain a uniform film thickness even in the case of single point application. it can.

又、1mmを越えるサイズのLEDを搭載する場合には、Agペースト中の溶剤に起因するボイドの発生を軽減するため、Agペーストの加熱硬化時には急激に高温まで加熱することなく、1分間に10℃程度の上昇率で緩やかに昇温するのが望ましい。   In addition, when an LED having a size exceeding 1 mm is mounted, in order to reduce the generation of voids due to the solvent in the Ag paste, the Ag paste is not heated rapidly to a high temperature at 10 minutes per minute. It is desirable to raise the temperature gently at an increase rate of about ° C.

<実施例2>
図4は、枠型バンプを用いた例を示す模式的な断面図である。LED素子5の搭載部周辺に、細長いバンプ8を形成したサブマウントに、LEDチップ5をダイボンドした例である。
<Example 2>
FIG. 4 is a schematic cross-sectional view showing an example using a frame-type bump. This is an example in which the LED chip 5 is die-bonded to a submount in which elongated bumps 8 are formed around the mounting portion of the LED element 5.

実施例1と同様に表面に絶縁膜13を有するSi基板1上には、Cu製の配線2が形成され、LEDチップ5搭載部の周辺に枠状のバンプ8が形成される。この枠状のバンプ8の平面形状は図5を持って後述する。LEDチップ5とCu配線2の間にはAgペースト7が充填される。LEDからはみ出したAgペーストは枠状のバンプ8に堰き止められ、LEDチップの側面に這い上がる。この時、Agペーストの這い上がりが多過ぎ、LEDの発光層まで到達すると、点灯不良の原因となるので、Agペーストの供給量にも注意が必要である。図4、図5において、同じ部位はこれまでの図と同一の符号を用いた。   Similar to the first embodiment, Cu wiring 2 is formed on the Si substrate 1 having the insulating film 13 on the surface, and frame-shaped bumps 8 are formed around the LED chip 5 mounting portion. The planar shape of the frame-like bump 8 will be described later with reference to FIG. An Ag paste 7 is filled between the LED chip 5 and the Cu wiring 2. The Ag paste protruding from the LED is dammed up by the frame-like bumps 8 and crawls up to the side surface of the LED chip. At this time, there is too much scooping up of the Ag paste, and if it reaches the light emitting layer of the LED, it causes a lighting failure, so attention should be paid to the supply amount of the Ag paste. In FIG. 4 and FIG. 5, the same symbols are used for the same parts as in the previous figures.

図5は枠状バンプ付サブマウントの模式的な上面図である。Si基板1上にCu配線2を形成し、その周囲に枠状のバンプ8を形成する。LEDの四隅に対応する位置は開放状態とし、又、四隅に近づくにつれバンプの幅を狭くする。前述したように、本例においては、枠型バンプが、四隅に近づくにつれバンプの幅が狭くなる形状を用いることが肝要である。本構成を採用することで、初めてAgペーストの広がり過ぎを防止しつつ、LEDチップの四隅までAgペーストを十分に行き渡らせることが可能となる。図6は、図5の状態に、LED素子5を搭載した上面図である。Agペースト7はバンプに沿って四隅の方向へ移動し、余分なAgペーストはバンプの隙間から外側へ押し出される。このようなサブマウントを実施例1と同様なプロセスで製造することが出来る。   FIG. 5 is a schematic top view of the submount with frame-shaped bumps. Cu wirings 2 are formed on the Si substrate 1 and frame-like bumps 8 are formed around the Cu wirings 2. The positions corresponding to the four corners of the LED are in an open state, and the width of the bump is narrowed as the four corners are approached. As described above, in this example, it is important to use a shape in which the width of the bump becomes narrower as the frame-type bump approaches the four corners. By adopting this configuration, it is possible to sufficiently spread the Ag paste to the four corners of the LED chip while preventing the Ag paste from spreading too much for the first time. FIG. 6 is a top view in which the LED element 5 is mounted in the state of FIG. The Ag paste 7 moves along the bumps toward the four corners, and the excess Ag paste is pushed outward from the gaps between the bumps. Such a submount can be manufactured by the same process as in the first embodiment.

<実施例3>
本発明に係るサブマウントは、例えば液晶ディスプレイ(LCD)のバックライトなどに利用され、極めて有用である。この適用形態を説明する。図8、図9は、LCDディスプレイの二つの例を示す図である。図8は導光板を用いてLED画面の側面から光を導入する方式を例示する平面図、図9はLED画面の背面から光を照射する方式に関する側面図である。
<Example 3>
The submount according to the present invention is very useful, for example, for a backlight of a liquid crystal display (LCD). This application form will be described. 8 and 9 are diagrams showing two examples of the LCD display. FIG. 8 is a plan view illustrating a method of introducing light from the side surface of the LED screen using a light guide plate, and FIG. 9 is a side view of a method of irradiating light from the back surface of the LED screen.

図8に例示する側面入射の例を説明する。バックライト用基板21上に、これまで説明してきた半導体発光素子が搭載されたサブマウント22が、複数個配置されている。バックライト用基板がメタルベース基板21を用いた場合、その上面に絶縁膜33が形成される。これらのサブマウウント22の詳細な構成は、これまでの実施例で述べてきた形態を用いて十分である。符号26がLEDチップである。この例は各LEDが直列に接続された例である。その接続は、前記バックライト用基板21に絶縁層27を、各LED間に形成する。この絶縁層27の上部に配線層2が形成され、各LEDよりの外部引出し線が接続される。この配線層2上は保護絶縁膜28が形成されている。その他LED部の細部の詳細説明は、これまでの実施例の構成と同様につき省略する。これらの各LED部には透光性の封止樹脂23で覆われている。こうして準備されたバックライト用基板21には、透明キャップ24で覆われ、導光板25に接続される。こうして、各LEDからの光は、導光板25に導入され、LCDパネル31のバックライトに供される。尚、こうした液晶ディスプレイの基本構成は、LED部の構成以外は、従来のものと同様である。   An example of side incidence illustrated in FIG. 8 will be described. A plurality of submounts 22 on which the semiconductor light emitting elements described so far are mounted are arranged on the backlight substrate 21. When the metal substrate 21 is used as the backlight substrate, an insulating film 33 is formed on the upper surface thereof. The detailed structure of these submounts 22 is sufficient using the form described in the previous embodiments. Reference numeral 26 denotes an LED chip. In this example, each LED is connected in series. For this connection, an insulating layer 27 is formed between the LEDs on the backlight substrate 21. The wiring layer 2 is formed on the insulating layer 27, and external lead lines from each LED are connected. A protective insulating film 28 is formed on the wiring layer 2. Other detailed description of the LED section is omitted because it is the same as the configuration of the previous embodiments. Each of these LED portions is covered with a translucent sealing resin 23. The backlight substrate 21 thus prepared is covered with a transparent cap 24 and connected to the light guide plate 25. Thus, the light from each LED is introduced into the light guide plate 25 and used for the backlight of the LCD panel 31. The basic configuration of such a liquid crystal display is the same as the conventional one except for the configuration of the LED section.

次に、図9の背面入射の例を説明する。LED用サブマウント22は、バックライトの背面パネル30に配置される。LED用サブマウント22に係わる部位は、これまでの説明してきたものと基本的に同様である。同じ部位は同じ符号で示した。バックライトの上面は拡散板32などで光が拡散される。こうした各種の拡散板が知られている。拡散板32の表面には、これまでも用いられている、明るさの向上の為の更なるフィルムを用いても良いことはいうまでもない。バックライトの後面或いは側壁は高反射率になされている。LCDパネル31は、拡散板32を介してバックライトの前に配置される。尚、本例も、こうした液晶ディスプレイの基本構成は、LED部の構成以外は、従来のものと同様である。従って、その詳細の説明は省略する。   Next, an example of back incidence in FIG. 9 will be described. The LED submount 22 is disposed on the back panel 30 of the backlight. The parts related to the LED submount 22 are basically the same as those described so far. The same parts are indicated by the same reference numerals. Light is diffused on the upper surface of the backlight by a diffusion plate 32 or the like. Such various diffusion plates are known. It goes without saying that a further film for improving the brightness, which has been used so far, may be used on the surface of the diffusion plate 32. The back surface or side wall of the backlight is made highly reflective. The LCD panel 31 is disposed in front of the backlight via the diffusion plate 32. In this example as well, the basic configuration of such a liquid crystal display is the same as the conventional one except for the configuration of the LED section. Therefore, detailed description thereof is omitted.

図1は、円柱バンプ付サブマウントへLEDを搭載した断面図である。FIG. 1 is a sectional view in which an LED is mounted on a submount with a cylindrical bump. 図2は、円柱バンプ付サブマウントの平面図である。FIG. 2 is a plan view of a submount with cylindrical bumps. 図3は、円柱バンプ付サブマウントへLED素子を搭載した平面図である。FIG. 3 is a plan view of an LED element mounted on a submount with cylindrical bumps. 図4は、枠状バンプ付サブマウントへLED素子を搭載した断面図である。FIG. 4 is a cross-sectional view in which an LED element is mounted on a submount with a frame-like bump. 烏z5は、枠状バンプ付サブマウントの平面図である。烏 z5 is a plan view of the submount with frame-shaped bumps. 図6は、枠状バンプ付サブマウントへLED素子を搭載した平面図である。FIG. 6 is a plan view of LED elements mounted on a submount with a frame-like bump. 図7は、本発明を用いない場合、光学部材の断面図である。FIG. 7 is a cross-sectional view of an optical member when the present invention is not used. 図8は、バックライトの例の上面図である。FIG. 8 is a top view of an example of a backlight. 図9は、バックライトの別な例の断面図である。FIG. 9 is a cross-sectional view of another example of a backlight.

符号の説明Explanation of symbols

1:基板、2:配線、3:バンプ、4:Au電極、5:LEDチップ(素子)、6、6−1、6−2:金ワイヤ、7:導電性接着剤、8:枠状バンプ、11:導体層、12Au層、13:絶縁層、21:バックライト用基板、22:LED用サブマウント、23:透光性封止樹脂、24:透明キャップ、25:導光板、26:LEDチップ、27:絶縁層、28:保護絶縁層、31:LCDパネル、32:拡散体、33:絶縁膜。
1: substrate, 2: wiring, 3: bump, 4: Au electrode, 5: LED chip (element), 6, 6-1, 6-2: gold wire, 7: conductive adhesive, 8: frame-shaped bump 11: Conductor layer, 12Au layer, 13: Insulating layer, 21: Substrate for backlight, 22: Submount for LED, 23: Translucent sealing resin, 24: Transparent cap, 25: Light guide plate, 26: LED Chip: 27: insulating layer, 28: protective insulating layer, 31: LCD panel, 32: diffuser, 33: insulating film.

Claims (8)

基板側電極を有する基板と、当該基板上に導電性接着剤を用いて接合された半導体発光素子とを、少なくとも備え、
前記基板上における前記半導体発光素子に対するダイボンド領域内の周辺部に、滑らかな外周形状を有する複数の柱状バンプを有し、且つ
前記ダイボンド領域の中央部には前記柱状バンプを有しないことを特徴とする光学部材。
At least a substrate having a substrate side electrode and a semiconductor light emitting element bonded on the substrate using a conductive adhesive,
A plurality of columnar bumps having a smooth outer peripheral shape are provided in a peripheral portion in a die bond region with respect to the semiconductor light emitting element on the substrate, and the columnar bumps are not provided in a central portion of the die bond region. Optical member to be used.
前記半導体発光素子が、四辺形であることを特徴とする請求項1に記載の光学部材。   The optical member according to claim 1, wherein the semiconductor light emitting element is a quadrilateral. 前記半導体発光素子が、四辺形であり、
前記複数の柱状バンプが、前記四辺形の各辺に対応して、千鳥配列に設けられたことを特徴とする請求項1に記載の光学部材。
The semiconductor light emitting element is a quadrilateral,
The optical member according to claim 1, wherein the plurality of columnar bumps are provided in a staggered arrangement corresponding to each side of the quadrilateral.
基板側電極を有する基板と、当該基板上に導電性接着剤を用いて接合された半導体発光素子とを、少なくとも備え、
前記半導体発光素子の角部に対応する領域に間隙を有し、且つ当該角部に向かって幅が狭くなした枠状のバンプを有することを特徴とする光学部材。
At least a substrate having a substrate side electrode and a semiconductor light emitting element bonded on the substrate using a conductive adhesive,
An optical member comprising a frame-like bump having a gap in a region corresponding to a corner of the semiconductor light emitting element and having a width narrowed toward the corner.
前記半導体発光素子が、四辺形であり、且つ当該四辺形の各辺に対応して、前記枠状のバンプが配置されたことを特徴とする請求項4に記載の光学部材。   The optical member according to claim 4, wherein the semiconductor light emitting element is a quadrilateral, and the frame-shaped bumps are arranged corresponding to the sides of the quadrilateral. 基板側電極を有する基板と、当該基板上に導電性接着剤を用いて接合された半導体発光素子とを、少なくとも備え、
前記基板上における前記半導体発光素子に対するダイボンド領域内の周辺部に、前記半導体発光素子の角部以外の前記ダイボンド領域での前記導電性接着剤の広がりを抑制しつつ且つ前記半導体発光素子の角部での前記導電性接着剤の広がりを促す機能を有するバンプを有し、 且つ
前記ダイボンド領域の中央部には前記柱状バンプを有しないことを特徴とする光学部材。
At least a substrate having a substrate side electrode and a semiconductor light emitting element bonded on the substrate using a conductive adhesive,
A corner portion of the semiconductor light emitting element while suppressing spreading of the conductive adhesive in the die bond region other than the corner portion of the semiconductor light emitting element at a peripheral portion in the die bond region with respect to the semiconductor light emitting element on the substrate An optical member comprising: a bump having a function of promoting the spread of the conductive adhesive at a portion; and the columnar bump not provided in a central portion of the die bond region.
バックライト用基板と、当該バックライト用基板上に配置された複数の光学部材と、前記複数の光学部材を覆って設けられた透光性部材と、前記透光性部材に光学的に接続され、光をLCDパネルの側面に供給するための導光板とを備え、
前記光学部材が、請求項1から請求項6のいずれかに記載の光学部材であることを特徴とするバックライト。
A backlight substrate, a plurality of optical members disposed on the backlight substrate, a translucent member provided to cover the plurality of optical members, and optically connected to the translucent member A light guide plate for supplying light to the side of the LCD panel,
The said optical member is an optical member in any one of Claims 1-6, The backlight characterized by the above-mentioned.
バックライト用基板と、当該バックライト用基板上に配置された複数の光学部材と、前記複数の光学部材を覆って設けられた透光性部材と、前記透光性部材上に設けられ、拡散光をLCDパネルの背面に供給するための拡散体とを備え、
前記光学部材が、請求項1から請求項6のいずれかに記載の光学部材であることを特徴とするバックライト。
Backlight substrate, a plurality of optical members arranged on the backlight substrate, a translucent member provided to cover the plurality of optical members, and a diffusion member provided on the translucent member A diffuser for supplying light to the back of the LCD panel;
The said optical member is an optical member in any one of Claims 1-6, The backlight characterized by the above-mentioned.
JP2006010693A 2006-01-19 2006-01-19 Optical member and backlight Pending JP2007194383A (en)

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US11677062B2 (en) 2018-12-25 2023-06-13 Nichia Corporation Method of manufacturing light source device having a bonding layer with bumps and a bonding member
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